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author | patrik.gustavsson <patrik.gustavsson@arm.com> | 2021-08-19 11:51:45 +0000 |
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committer | patrik.gustavsson <patrik.gustavsson@arm.com> | 2021-08-19 11:51:45 +0000 |
commit | 6f23da6937a6d53263cf922d8f96732df09ff362 (patch) | |
tree | 2c2d73d8837cf18924070a17e0f5d3d226197489 /ethosu | |
parent | 257a31e93cb2c7a8c06a102211ebb05b3ba78cd8 (diff) | |
download | ethos-u-vela-6f23da6937a6d53263cf922d8f96732df09ff362.tar.gz |
Revert "Revert "MLBEDSW-5028: SRAM target exceeded for legacy_sram_size test option""
This reverts commit 257a31e93cb2c7a8c06a102211ebb05b3ba78cd8.
Reason for revert: <INSERT REASONING HERE>
Change-Id: If4f565d8c692e2b32903819561591d9e4af619fa
Diffstat (limited to 'ethosu')
-rw-r--r-- | ethosu/vela/architecture_features.py | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/ethosu/vela/architecture_features.py b/ethosu/vela/architecture_features.py index 5e26f1a1..e79ed720 100644 --- a/ethosu/vela/architecture_features.py +++ b/ethosu/vela/architecture_features.py @@ -517,14 +517,13 @@ class ArchitectureFeatures: ) def mem_type_size(self, mem_type: MemType) -> int: - """Returns size in bytes available for the given memory type""" - if mem_type == MemType.Scratch_fast or (mem_type == MemType.Scratch and not self.is_spilling_enabled()): - # the arena cache memory area always contains the scratch fast memory type. it also contains the scratch - # memory type when memory spilling is not being used + """Returns size in bytes available for the given memory type. This is a hard limit.""" + if mem_type == MemType.Scratch_fast and self.is_spilling_enabled(): + # when accessing the scratch fast memory type with memory spilling enabled the arena_cache_size refers to + # the cache memory area which is a hard limit return self.arena_cache_size else: - # the compiler is not aware of the memory limits for these memory types and so all it can do is return the - # maximum address size + # for all other memory types and modes the hard limit is the maximum possible address offset return self.max_address_offset def _mem_port_mapping(self, mem_port): |