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| author | Diqing Zhong <diqing.zhong@arm.com> | 2020-04-27 10:27:34 +0200 |
|---|---|---|
| committer | Tim Hall <tim.hall@arm.com> | 2020-05-13 15:56:19 +0100 |
| commit | fed918bfb26dc330a5f066ea5947bc5eb2db4651 (patch) | |
| tree | 9200ba8ed1d88789aa74223adb12bb2930c9da2a /ethosu/vela/register_command_stream_generator.py | |
| parent | b7311708b81e7022105d335c5e67efcd8f155610 (diff) | |
| download | ethos-u-vela-fed918bfb26dc330a5f066ea5947bc5eb2db4651.tar.gz | |
Update to HI 0.169
Change-Id: I897bea10ae744162fd285838ee2b2c018695a278
(cherry picked from commit d5ac9b55faa899ac686433e79900cadd321b71bf)
Signed-off-by: Diqing Zhong <diqing.zhong@arm.com>
Diffstat (limited to 'ethosu/vela/register_command_stream_generator.py')
| -rw-r--r-- | ethosu/vela/register_command_stream_generator.py | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/ethosu/vela/register_command_stream_generator.py b/ethosu/vela/register_command_stream_generator.py index 5563b969..faae2cf3 100644 --- a/ethosu/vela/register_command_stream_generator.py +++ b/ethosu/vela/register_command_stream_generator.py @@ -861,14 +861,14 @@ def generate_register_command_stream(nng, sg, arch, verbose=False): if ifm_dtype.size_in_bits() == 8: if ifm_dtype.type & BaseType.Signed: - prec = ifm_precision.W8_S8 + prec = ifm_precision.S8 else: - prec = ifm_precision.W8_U8 + prec = ifm_precision.U8 elif ifm_dtype.size_in_bits() == 16: if ifm_dtype.type & BaseType.Signed: - prec = ifm_precision.W8_S16 + prec = ifm_precision.S16 else: - prec = ifm_precision.W8_U16 + prec = ifm_precision.U16 ifm_prec = prec.value ifm2_prec = ifm_prec |