MLBEDSW-2688: Improved LUT support

- Support for more than one 256-byte LUT in SHRAM
- No DMA is performed for a LUT that is already located in SHRAM
- Added MemArea.Shram, used for LUT, to avoid false address collision
  asserts during SRAM tensor allocation
- Added read access to LUT in memory access calculation

Change-Id: If4d1eded5ed029d253f4f5efb2d80495fc3eac99
Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>

1 files changed, 1 insertions, 3 deletions

diff --git a/ethosu/vela/greedy_allocation.py b/ethosu/vela/greedy_allocation.py
index e0176875..1cbfce3f 100644
--- a/ethosu/vela/greedy_allocation.py
+++ b/ethosu/vela/greedy_allocation.py
@@ -77,9 +77,7 @@ class GreedyAllocator:
             for m in lrs:
                 if n != m and n.overlaps_ranges(m):
                     overlap, tens_n, tens_m = n.overlaps_address(m)
-                    if overlap and not (
-                        tens_n.equivalence_id == tens_m.equivalence_id and tens_n.address == tens_m.address
-                    ):
+                    if overlap and not (tens_n.equivalent(tens_m) and tens_n.address == tens_m.address):
                         print("Solution failed, overlapping buffer!")
                         print(tens_n.address, tens_n.address + n.size, n.name)
                         print(tens_m.address, tens_m.address + m.size, m.name)