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authorLouis Verhaard <louis.verhaard@arm.com>2020-08-05 16:11:29 +0200
committerLouis Verhaard <louis.verhaard@arm.com>2020-08-17 15:10:21 +0200
commit0b8268a0dac80aa22133ca83ed6912d3b565439a (patch)
tree159fe485c156d6a3f3a1a65ab1b1a24ff68f2849 /ethosu/vela/compiler_driver.py
parent458a208c44f70a9848f1e8e2e91f28ce3641c48f (diff)
downloadethos-u-vela-0b8268a0dac80aa22133ca83ed6912d3b565439a.tar.gz
MLBEDSW-2688: Improved LUT support
- Support for more than one 256-byte LUT in SHRAM - No DMA is performed for a LUT that is already located in SHRAM - Added MemArea.Shram, used for LUT, to avoid false address collision asserts during SRAM tensor allocation - Added read access to LUT in memory access calculation Change-Id: If4d1eded5ed029d253f4f5efb2d80495fc3eac99 Signed-off-by: Louis Verhaard <louis.verhaard@arm.com>
Diffstat (limited to 'ethosu/vela/compiler_driver.py')
-rw-r--r--ethosu/vela/compiler_driver.py2
1 files changed, 2 insertions, 0 deletions
diff --git a/ethosu/vela/compiler_driver.py b/ethosu/vela/compiler_driver.py
index f407fdc4..5e9e38fb 100644
--- a/ethosu/vela/compiler_driver.py
+++ b/ethosu/vela/compiler_driver.py
@@ -22,6 +22,7 @@ from . import graph_optimiser
from . import high_level_command_stream_generator
from . import insert_dma
from . import live_range
+from . import lut
from . import mark_tensors
from . import npu_performance
from . import npu_serialisation
@@ -198,6 +199,7 @@ def compiler_driver(nng, arch, options, scheduler_options):
high_level_command_stream_generator.generate_high_level_command_stream(
nng, sg, arch, options.verbose_high_level_command_stream
)
+ lut.optimize_high_level_cmd_stream(sg, arch)
register_command_stream_generator.generate_register_command_stream(
nng, sg, arch, options.verbose_register_command_stream
)