MLBEDSW-3763: Vela memory setting

 - Fixed bug which stopped DRAM being selected for Ethos-U55
 - Fixed type of default values used by burst length and latency

Signed-off-by: Tim Hall <tim.hall@arm.com>
Change-Id: Ic1ae36586e3b4ffe8af8fea1fd23501d434b7731

2 files changed, 22 insertions, 30 deletions

diff --git a/ethosu/vela/architecture_features.py b/ethosu/vela/architecture_features.py
index 9edc87e..33e7add 100644
--- a/ethosu/vela/architecture_features.py
+++ b/ethosu/vela/architecture_features.py
@@ -491,13 +491,16 @@ class ArchitectureFeatures:
         # ArchitectureFeatures.DEFAULT_CONFIG values
         if self.is_ethos_u65_system:
             # Default Ethos-U65 memory mode
-            # Dedicated SRAM: SRAM is only used by the Ethos-U
+            # Dedicated SRAM: the SRAM is only for use by the Ethos-U
+            # The non-SRAM memory is assumed to be read-writeable
             self.const_mem_area = MemPort.Axi1
             self.arena_mem_area = MemPort.Axi1
             self.cache_mem_area = MemPort.Axi0
             self.cache_sram_size = 384 * 1024
         else:
-            # Default Ethos-U65 memory mode
+            # Default Ethos-U55 memory mode
+            # Shared SRAM: the SRAM is shared between the Ethos-U and the Cortex-M software
+            # The non-SRAM memory is assumed to be read-only
             self.const_mem_area = MemPort.Axi1
             self.arena_mem_area = MemPort.Axi0
             self.cache_mem_area = MemPort.Axi0
@@ -513,8 +516,8 @@ class ArchitectureFeatures:
         self.axi0_port = MemArea(1)
         self.axi1_port = MemArea(1)
         self.memory_clock_scales = np.ones(MemArea.Size)
-        self.memory_burst_length = np.ones(MemArea.Size)
-        self.memory_latency = np.zeros((MemArea.Size, BandwidthDirection.Size))
+        self.memory_burst_length = np.ones(MemArea.Size, np.int)
+        self.memory_latency = np.zeros((MemArea.Size, BandwidthDirection.Size), np.int)
         self.const_mem_area = MemPort(1)
         self.arena_mem_area = MemPort(1)
         self.cache_mem_area = MemPort(1)
@@ -615,33 +618,22 @@ class ArchitectureFeatures:
                 self.memory_latency[MemArea.OnChipFlash] = self.memory_latency[MemArea.Sram]
 
         # check configuration
-        if self._mem_port_mapping(self.cache_mem_area) != MemArea.Sram:
-            raise ConfigOptionError("cache_mem_area", self._mem_port_mapping(self.cache_mem_area).name, "Sram")
+        if self._mem_port_mapping(self.const_mem_area) not in (
+            MemArea.Dram,
+            MemArea.OnChipFlash,
+            MemArea.OffChipFlash,
+        ):
+            raise ConfigOptionError(
+                "const_mem_area",
+                self._mem_port_mapping(self.const_mem_area).name,
+                "Dram or OnChipFlash or OffChipFlash",
+            )
 
-        if self.is_ethos_u65_system:
-            if self._mem_port_mapping(self.const_mem_area) not in (
-                MemArea.Dram,
-                MemArea.OnChipFlash,
-                MemArea.OffChipFlash,
-            ):
-                raise ConfigOptionError(
-                    "const_mem_area",
-                    self._mem_port_mapping(self.const_mem_area).name,
-                    "Dram or OnChipFlash or OffChipFlash",
-                )
+        if self._mem_port_mapping(self.arena_mem_area) not in (MemArea.Sram, MemArea.Dram):
+            raise ConfigOptionError("arena_mem_area", self._mem_port_mapping(self.arena_mem_area).name, "Sram or Dram")
 
-            if self._mem_port_mapping(self.arena_mem_area) not in (MemArea.Sram, MemArea.Dram):
-                raise ConfigOptionError(
-                    "arena_mem_area", self._mem_port_mapping(self.arena_mem_area).name, "Sram or Dram"
-                )
-        else:
-            if self._mem_port_mapping(self.const_mem_area) not in (MemArea.OnChipFlash, MemArea.OffChipFlash):
-                raise ConfigOptionError(
-                    "const_mem_area", self._mem_port_mapping(self.const_mem_area).name, "OnChipFlash or OffChipFlash"
-                )
-
-            if self._mem_port_mapping(self.arena_mem_area) != MemArea.Sram:
-                raise ConfigOptionError("arena_mem_area", self._mem_port_mapping(self.arena_mem_area).name, "Sram")
+        if self._mem_port_mapping(self.cache_mem_area) != MemArea.Sram:
+            raise ConfigOptionError("cache_mem_area", self._mem_port_mapping(self.cache_mem_area).name, "Sram")
 
         # assign existing memory areas
         self.permanent_storage_mem_area = self._mem_port_mapping(self.const_mem_area)
diff --git a/vela.ini b/vela.ini
index 47fa669..5ac5956 100644
--- a/vela.ini
+++ b/vela.ini
@@ -113,7 +113,7 @@ const_mem_area=Axi0
 arena_mem_area=Axi0
 cache_mem_area=Axi0
 
-; Shared SRAM: the SRAM is shared between the Ethos-U and the Cortex-M software.
+; Shared SRAM: the SRAM is shared between the Ethos-U and the Cortex-M software
 ; The non-SRAM memory is assumed to be read-only
 [Memory_Mode.Shared_Sram]
 const_mem_area=Axi1