aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorTim Hall <tim.hall@arm.com>2020-11-27 12:23:42 +0000
committertim.hall <tim.hall@arm.com>2020-11-27 14:57:24 +0000
commit14e8a2041877f277f96fe339f48d4f51e0395a42 (patch)
tree778b399efa01874c8cebece32ff5c9e7b9602739
parent061eeb4c6a1af7780992ae6d3967905b03e2433a (diff)
downloadethos-u-vela-14e8a2041877f277f96fe339f48d4f51e0395a42.tar.gz
vela: Rename --keep-scale-placement CLI
- Changed to --cache-bias-scale-tensor Signed-off-by: Tim Hall <tim.hall@arm.com> Change-Id: I285fe253f03ba98eff36dbe996ad3a57e2ee3d99
-rw-r--r--OPTIONS.md10
-rw-r--r--ethosu/vela/compiler_driver.py2
-rw-r--r--ethosu/vela/scheduler.py4
-rw-r--r--ethosu/vela/vela.py8
4 files changed, 15 insertions, 9 deletions
diff --git a/OPTIONS.md b/OPTIONS.md
index 156338d..4c5b3e8 100644
--- a/OPTIONS.md
+++ b/OPTIONS.md
@@ -98,13 +98,15 @@ mode. More details can be found in the Configuration File section below.
vela network.tflite --config my_vela_cfg1.ini --config my_vela_cfg2.ini --system-config My_Sys_Cfg --memory-mode My_Mem_Mode
```
-### Keep scale placement
+### Cache Bias Scale Tensor
-Prevents scheduler from placing scale tensors for IFM streamed passes in SRAM
-and keeps these in flash.
+Controls whether the scheduler caches the bias & scale tensors in SRAM or if it
+leaves them in Flash. This only affects IFM streamed passes.
+**Type: Boolean**
+**Default: True**
```bash
-vela network.tflite --keep-scale-placement
+vela network.tflite --cache-bias-scale-tensor False
```
### Cascading
diff --git a/ethosu/vela/compiler_driver.py b/ethosu/vela/compiler_driver.py
index 7b1ea21..d17f1e5 100644
--- a/ethosu/vela/compiler_driver.py
+++ b/ethosu/vela/compiler_driver.py
@@ -174,7 +174,7 @@ def compiler_driver(nng, arch, options, scheduler_options):
# block config, and calc and pack the scales and biases
weight_compressor.update_pass_weight_and_scale_tensors(nng, arch)
- if not scheduler_options.keep_scale_placement:
+ if scheduler_options.cache_bias_scale_tensor:
scheduler.move_scales_to_fast_storage(nng, arch)
# LiveRanges for constant tensors for all Npu subgraphs
diff --git a/ethosu/vela/scheduler.py b/ethosu/vela/scheduler.py
index 7347b5a..977eb58 100644
--- a/ethosu/vela/scheduler.py
+++ b/ethosu/vela/scheduler.py
@@ -65,7 +65,7 @@ class SchedulerOptions:
use_ifm_streaming=True,
pareto_metric=ParetoMetric.BwCycMem,
use_nhcwb16_between_cascaded_passes=True,
- keep_scale_placement=False,
+ cache_bias_scale_tensor=True,
):
self.use_cascading = use_cascading
self.verbose_schedule = verbose_schedule
@@ -73,7 +73,7 @@ class SchedulerOptions:
self.use_ifm_streaming = use_ifm_streaming
self.pareto_metric = pareto_metric
self.use_nhcwb16_between_cascaded_passes = use_nhcwb16_between_cascaded_passes
- self.keep_scale_placement = keep_scale_placement
+ self.cache_bias_scale_tensor = cache_bias_scale_tensor
def __str__(self):
return type(self).__name__ + ": " + str(self.__dict__)
diff --git a/ethosu/vela/vela.py b/ethosu/vela/vela.py
index b93774d..08ab483 100644
--- a/ethosu/vela/vela.py
+++ b/ethosu/vela/vela.py
@@ -245,7 +245,11 @@ def main(args=None):
"--show-cpu-operations", action="store_true", help="Show the operations that fall back to the CPU"
)
parser.add_argument(
- "--keep-scale-placement", action="store_true", help="Keep scale tensors memory placement during scheduling"
+ "--cache-bias-scale-tensor",
+ type=ast.literal_eval,
+ default=True,
+ choices=[True, False],
+ help="Controls the caching of the bias & scale tensors in SRAM (default: %(default)s)",
)
parser.add_argument(
"--cascading",
@@ -416,7 +420,7 @@ def main(args=None):
use_ifm_streaming=args.ifm_streaming,
pareto_metric=args.pareto_metric,
use_nhcwb16_between_cascaded_passes=args.nhcwb16_between_cascaded_passes,
- keep_scale_placement=args.keep_scale_placement,
+ cache_bias_scale_tensor=args.cache_bias_scale_tensor,
)
model_reader_options = model_reader.ModelReaderOptions()