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authorPer Åstrand <per.astrand@arm.com>2020-10-23 21:25:05 +0200
committerPer Åstrand <per.astrand@arm.com>2020-11-16 13:57:35 +0100
commitf7e407a0fe58d76d54e3d1f9d2cb117036cd095b (patch)
tree8726e753f14c5a95d64312004c5117cf0e75b6d2 /kernel/ethosu_mailbox.c
parentf8ae5e1f5ca090b37a701f9dd75ee57106d30dc8 (diff)
downloadethos-u-linux-driver-stack-f7e407a0fe58d76d54e3d1f9d2cb117036cd095b.tar.gz
Add PMU config to inference creation
Add PMU configuration information to inference creation. Change-Id: Id8a69517a5d3e4822dbaf46f76cadb2700b3d981
Diffstat (limited to 'kernel/ethosu_mailbox.c')
-rw-r--r--kernel/ethosu_mailbox.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/kernel/ethosu_mailbox.c b/kernel/ethosu_mailbox.c
index 47c4698..77b9614 100644
--- a/kernel/ethosu_mailbox.c
+++ b/kernel/ethosu_mailbox.c
@@ -175,14 +175,25 @@ int ethosu_mailbox_inference(struct ethosu_mailbox *mbox,
struct ethosu_buffer **ifm,
uint32_t ofm_count,
struct ethosu_buffer **ofm,
- struct ethosu_buffer *network)
+ struct ethosu_buffer *network,
+ uint8_t *pmu_event_config,
+ uint8_t pmu_event_config_count,
+ uint8_t pmu_cycle_counter_enable)
{
struct ethosu_core_inference_req inf;
uint32_t i;
+ /* Verify that the uapi and core has the same number of pmus */
+ if (pmu_event_config_count != ETHOSU_CORE_PMU_MAX) {
+ dev_err(mbox->dev, "PMU count misconfigured.\n");
+
+ return -EINVAL;
+ }
+
inf.user_arg = (ptrdiff_t)user_arg;
inf.ifm_count = ifm_count;
inf.ofm_count = ofm_count;
+ inf.pmu_cycle_counter_enable = pmu_cycle_counter_enable;
for (i = 0; i < ifm_count; i++)
ethosu_core_set_size(ifm[i], &inf.ifm[i]);
@@ -190,6 +201,9 @@ int ethosu_mailbox_inference(struct ethosu_mailbox *mbox,
for (i = 0; i < ofm_count; i++)
ethosu_core_set_capacity(ofm[i], &inf.ofm[i]);
+ for (i = 0; i < ETHOSU_CORE_PMU_MAX; i++)
+ inf.pmu_event_config[i] = pmu_event_config[i];
+
ethosu_core_set_size(network, &inf.network);
return ethosu_queue_write_msg(mbox, ETHOSU_CORE_MSG_INFERENCE_REQ,