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-rw-r--r--drivers/timing_adapter/CMakeLists.txt23
-rw-r--r--drivers/timing_adapter/include/timing_adapter.h133
-rw-r--r--drivers/timing_adapter/src/timing_adapter.c215
3 files changed, 0 insertions, 371 deletions
diff --git a/drivers/timing_adapter/CMakeLists.txt b/drivers/timing_adapter/CMakeLists.txt
deleted file mode 100644
index f17eaeb..0000000
--- a/drivers/timing_adapter/CMakeLists.txt
+++ /dev/null
@@ -1,23 +0,0 @@
-#
-# Copyright (c) 2020-2021 Arm Limited. All rights reserved.
-#
-# SPDX-License-Identifier: Apache-2.0
-#
-# Licensed under the Apache License, Version 2.0 (the License); you may
-# not use this file except in compliance with the License.
-# You may obtain a copy of the License at
-#
-# www.apache.org/licenses/LICENSE-2.0
-#
-# Unless required by applicable law or agreed to in writing, software
-# distributed under the License is distributed on an AS IS BASIS, WITHOUT
-# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
-# See the License for the specific language governing permissions and
-# limitations under the License.
-#
-
-add_library(timing_adapter STATIC)
-target_include_directories(timing_adapter PUBLIC include)
-
-target_sources(timing_adapter PRIVATE src/timing_adapter.c)
-
diff --git a/drivers/timing_adapter/include/timing_adapter.h b/drivers/timing_adapter/include/timing_adapter.h
deleted file mode 100644
index ef4f9b9..0000000
--- a/drivers/timing_adapter/include/timing_adapter.h
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * Copyright (c) 2019-2021 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#ifndef TIMING_ADAPTER_H_
-#define TIMING_ADAPTER_H_
-
-#include <stdint.h>
-
-#if defined __cplusplus
-extern "C" {
-#endif
-
-/** TIMING ADAPTER
- *
- * The timing adapter is an AXI-to-AXI bridge for providing well-defined memory timing
- * to allow performance evaluation of an AXI master. The bridge works by delaying the
- * responses from the memory according to run-time configurable parameters that can be
- * set in the timing adapter. Parameters include read and write response latencies,
- * no. of outstanding transactions, and a model of interferring traffic.
- */
-
-struct timing_adapter {
- uintptr_t base_addr;
-};
-
-/** LIMITATIONS FOR FVP:
- *
- * - TA_MODE is hardcoded to 1 (one) at all times.
- * - Only TA_PERFCTRL_AWTRANS and TA_PERFCTRL_ARTRANS support is
- * implemented for the performance counter.
- */
-
-struct timing_adapter_settings {
- uint32_t maxr; // 6-bit field. Max no. of pending reads. 0=infinite
- uint32_t maxw; // 6-bit field. Max no. of pending writes. 0=infinite
- uint32_t maxrw; // 6-bit field. Max no. of pending reads+writes. 0=infinite
- uint32_t rlatency; // 12-bit field. Minimum latency (clock cycles) from AVALID to RVALID.
- uint32_t wlatency; // 12-bit field. Minimum latency (clock cycles) from WVALID&WLAST to BVALID.
- uint32_t pulse_on; // No. of cycles addresses let through (0-65535).
- uint32_t pulse_off; // No. of cycles addresses blocked (0-65535).
- uint32_t bwcap; // 16-bit field. Max no. of 64-bit words transfered per pulse cycle 0=infinite
- uint32_t perfctrl; // 6-bit field selecting an event for event counter 0=default
- uint32_t perfcnt; // 32-bit event counter
- uint32_t mode; // Bit 0: 1=enable dynamic clocking to avoid underrun
- // Bit 1: 1=enable random AR reordering (0=default)
- // Bit 2: 1=enable random R reordering (0=default)
- // Bit 3: 1=enable random B reordering (0=default)
- // Bit 11-4: Frequency scale 0=full speed, 255=(1/256) speed
- uint32_t maxpending; // (Read-only) Max supported value in MAXR and MAXW registers
- uint32_t histbin; // Controlls which histogram bin (0-15) that should be accessed by HISTCNT.
- uint32_t histcnt; // 32-bit field. Read/write the selected histogram bin.
-};
-
-enum timing_adapter_perfctrl_settings {
- TA_PERFCTRL_OFF = 0, // Disable performance counting
- TA_PERFCTRL_CYCLES, // Count all cycles (root clock)
- TA_PERFCTRL_UNDERRUN_R, // Unable to meet RLATENCY deadline
- TA_PERFCTRL_UNDERRUN_B, // Unable to meet WLATENCY deadline
- TA_PERFCTRL_OVERFLOW_AR, // Internal read address FIFO full
- TA_PERFCTRL_OVERFLOW_AW, // Internal write address FIFO full
- TA_PERFCTRL_OVERFLOW_R, // Internal read data FIFO full
- TA_PERFCTRL_OVERFLOW_W, // Internal write data FIFO full
- TA_PERFCTRL_OVERFLOW_B, // Internal write response FIFO full
- TA_PERFCTRL_RREADY, // RREADY wait state
- TA_PERFCTRL_BREADY, // BREADY wait state
- TA_PERFCTRL_RTRANS, // Handshake on R channel
- TA_PERFCTRL_WTRANS, // Handshake on W channel
- TA_PERFCTRL_BTRANS, // Handshake on B channel
- TA_PERFCTRL_ARTRANS, // Handshake on AR channel
- TA_PERFCTRL_AWTRANS, // Handshake on AW channel
- TA_PERFCTRL_ARQTIME, // Histogram of how much time spent with outstanding read transactions
- TA_PERFCTRL_AWQTIME, // Histogram of how much time spent with outstanding write transactions
- TA_PERFCTRL_MCLK_ON, // Count cycles when DUT clock is on
- TA_PERFCTRL_MCLK_OFF, // Count cycles when DUT clock is off
- TA_PERFCTRL_ARLEN0 = 32, // Handshake on AR channel with ARLEN=0
- TA_PERFCTRL_AWLEN0 = 48 // Handshake on AW channel with AWLEN=0
-};
-
-int ta_init(struct timing_adapter *ta, uintptr_t base_addr);
-void ta_uninit(struct timing_adapter *ta);
-
-void ta_set_all(struct timing_adapter *ta, struct timing_adapter_settings *in);
-void ta_set_maxr(struct timing_adapter *ta, uint32_t val);
-void ta_set_maxw(struct timing_adapter *ta, uint32_t val);
-void ta_set_maxrw(struct timing_adapter *ta, uint32_t val);
-void ta_set_rlatency(struct timing_adapter *ta, uint32_t val);
-void ta_set_wlatency(struct timing_adapter *ta, uint32_t val);
-void ta_set_pulse_on(struct timing_adapter *ta, uint32_t val);
-void ta_set_pulse_off(struct timing_adapter *ta, uint32_t val);
-void ta_set_bwcap(struct timing_adapter *ta, uint32_t val);
-void ta_set_perfctrl(struct timing_adapter *ta, uint32_t val);
-void ta_set_perfcnt(struct timing_adapter *ta, uint32_t val);
-void ta_set_mode(struct timing_adapter *ta, uint32_t val);
-void ta_set_histbin(struct timing_adapter *ta, uint32_t val);
-void ta_set_histcnt(struct timing_adapter *ta, uint32_t val);
-
-void ta_get_all(struct timing_adapter *ta, struct timing_adapter_settings *out);
-uint32_t ta_get_maxr(struct timing_adapter *ta);
-uint32_t ta_get_maxw(struct timing_adapter *ta);
-uint32_t ta_get_maxrw(struct timing_adapter *ta);
-uint32_t ta_get_rlatency(struct timing_adapter *ta);
-uint32_t ta_get_wlatency(struct timing_adapter *ta);
-uint32_t ta_get_pulse_on(struct timing_adapter *ta);
-uint32_t ta_get_pulse_off(struct timing_adapter *ta);
-uint32_t ta_get_bwcap(struct timing_adapter *ta);
-uint32_t ta_get_perfctrl(struct timing_adapter *ta);
-uint32_t ta_get_perfcnt(struct timing_adapter *ta);
-uint32_t ta_get_mode(struct timing_adapter *ta);
-uint32_t ta_get_maxpending(struct timing_adapter *ta);
-uint32_t ta_get_histbin(struct timing_adapter *ta);
-uint32_t ta_get_histcnt(struct timing_adapter *ta);
-uint32_t ta_get_version(struct timing_adapter *ta);
-
-#if defined __cplusplus
-}
-#endif
-
-#endif
diff --git a/drivers/timing_adapter/src/timing_adapter.c b/drivers/timing_adapter/src/timing_adapter.c
deleted file mode 100644
index 65e4178..0000000
--- a/drivers/timing_adapter/src/timing_adapter.c
+++ /dev/null
@@ -1,215 +0,0 @@
-/*
- * Copyright (c) 2020-2021 Arm Limited. All rights reserved.
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the License); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the License at
- *
- * www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- */
-
-#include <stdint.h>
-#include <timing_adapter.h>
-
-// Register offsets
-#define TA_MAXR 0x00
-#define TA_MAXW 0x04
-#define TA_MAXRW 0x08
-#define TA_RLATENCY 0x0C
-#define TA_WLATENCY 0x10
-#define TA_PULSE_ON 0x14
-#define TA_PULSE_OFF 0x18
-#define TA_BWCAP 0x1C
-#define TA_PERFCTRL 0x20
-#define TA_PERFCNT 0x24
-#define TA_MODE 0x28
-#define TA_MAXPENDING 0x2C
-#define TA_HISTBIN 0x30
-#define TA_HISTCNT 0x34
-#define TA_VERSION 0x38
-
-// Register masks
-#define TA_MAXR_MASK 0x0000003F
-#define TA_MAXW_MASK 0x0000003F
-#define TA_MAXRW_MASK 0x0000003F
-#define TA_RLATENCY_MASK 0x00000FFF
-#define TA_WLATENCY_MASK 0x00000FFF
-#define TA_PULSE_ON_MASK 0x0000FFFF
-#define TA_PULSE_OFF_MASK 0x0000FFFF
-#define TA_BWCAP_MASK 0x0000FFFF
-#define TA_PERFCTRL_MASK 0x0000003F
-#define TA_PERFCNT_MASK 0xFFFFFFFF
-#define TA_MODE_MASK 0x00000FFF
-#define TA_MAXPENDING_MASK 0xFFFFFFFF
-#define TA_HISTBIN_MASK 0x0000000F
-#define TA_HISTCNT_MASK 0xFFFFFFFF
-
-#define TA_VERSION_SUPPORTED 0x1117
-
-int ta_init(struct timing_adapter *ta, uintptr_t base_addr) {
- ta->base_addr = base_addr;
-
- if (ta_get_version(ta) != TA_VERSION_SUPPORTED) {
- return -1;
- }
- return 0;
-}
-
-void ta_uninit(struct timing_adapter *ta) {
- ta->base_addr = 0;
-}
-
-// -- Set API --------------------------------------
-void ta_set_all(struct timing_adapter *ta, struct timing_adapter_settings *in) {
- ta_set_maxr(ta, in->maxr);
- ta_set_maxw(ta, in->maxw);
- ta_set_maxrw(ta, in->maxrw);
- ta_set_rlatency(ta, in->rlatency);
- ta_set_wlatency(ta, in->wlatency);
- ta_set_pulse_on(ta, in->pulse_on);
- ta_set_pulse_off(ta, in->pulse_off);
- ta_set_bwcap(ta, in->bwcap);
- ta_set_perfctrl(ta, in->perfctrl);
- ta_set_perfcnt(ta, in->perfcnt);
- ta_set_mode(ta, in->mode);
- ta_set_histbin(ta, in->histbin);
- ta_set_histcnt(ta, in->histcnt);
-}
-
-void ta_set_maxr(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_MAXR) = val & TA_MAXR_MASK;
-};
-
-void ta_set_maxw(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_MAXW) = val & TA_MAXW_MASK;
-};
-
-void ta_set_maxrw(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_MAXRW) = val & TA_MAXRW_MASK;
-};
-
-void ta_set_rlatency(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_RLATENCY) = val & TA_RLATENCY_MASK;
-};
-
-void ta_set_wlatency(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_WLATENCY) = val & TA_WLATENCY_MASK;
-};
-
-void ta_set_pulse_on(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_PULSE_ON) = val & TA_PULSE_ON_MASK;
-};
-
-void ta_set_pulse_off(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_PULSE_OFF) = val & TA_PULSE_OFF_MASK;
-};
-
-void ta_set_bwcap(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_BWCAP) = val & TA_BWCAP_MASK;
-};
-
-void ta_set_perfctrl(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_PERFCTRL) = val & TA_PERFCTRL_MASK;
-};
-
-void ta_set_perfcnt(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_PERFCNT) = val & TA_PERFCNT_MASK;
-};
-
-void ta_set_mode(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_MODE) = val & TA_MODE_MASK;
-};
-
-void ta_set_histbin(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_HISTBIN) = val & TA_HISTBIN_MASK;
-};
-
-void ta_set_histcnt(struct timing_adapter *ta, uint32_t val) {
- *(volatile uint32_t *)(ta->base_addr + TA_HISTCNT) = val & TA_HISTCNT_MASK;
-};
-
-// -- Get API --------------------------------------
-void ta_get_all(struct timing_adapter *ta, struct timing_adapter_settings *out) {
- out->maxr = ta_get_maxr(ta);
- out->maxw = ta_get_maxw(ta);
- out->maxrw = ta_get_maxrw(ta);
- out->rlatency = ta_get_rlatency(ta);
- out->wlatency = ta_get_wlatency(ta);
- out->pulse_on = ta_get_pulse_on(ta);
- out->pulse_off = ta_get_pulse_off(ta);
- out->bwcap = ta_get_bwcap(ta);
- out->perfctrl = ta_get_perfctrl(ta);
- out->perfcnt = ta_get_perfcnt(ta);
- out->mode = ta_get_mode(ta);
- out->maxpending = ta_get_maxpending(ta);
- out->histbin = ta_get_histbin(ta);
- out->histcnt = ta_get_histcnt(ta);
-}
-
-uint32_t ta_get_maxr(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_MAXR) & TA_MAXR_MASK;
-};
-
-uint32_t ta_get_maxw(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_MAXW) & TA_MAXW_MASK;
-};
-
-uint32_t ta_get_maxrw(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_MAXRW) & TA_MAXRW_MASK;
-};
-
-uint32_t ta_get_rlatency(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_RLATENCY) & TA_RLATENCY_MASK;
-};
-
-uint32_t ta_get_wlatency(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_WLATENCY) & TA_WLATENCY_MASK;
-};
-
-uint32_t ta_get_pulse_on(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_PULSE_ON) & TA_PULSE_ON_MASK;
-};
-
-uint32_t ta_get_pulse_off(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_PULSE_OFF) & TA_PULSE_OFF_MASK;
-};
-
-uint32_t ta_get_bwcap(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_BWCAP) & TA_BWCAP_MASK;
-};
-
-uint32_t ta_get_perfctrl(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_PERFCTRL) & TA_PERFCTRL_MASK;
-};
-
-uint32_t ta_get_perfcnt(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_PERFCNT) & TA_PERFCNT_MASK;
-};
-
-uint32_t ta_get_mode(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_MODE) & TA_MODE_MASK;
-};
-
-uint32_t ta_get_maxpending(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_MAXPENDING) & TA_MAXPENDING_MASK;
-};
-
-uint32_t ta_get_histbin(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_HISTBIN) & TA_HISTBIN_MASK;
-};
-
-uint32_t ta_get_histcnt(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_HISTCNT) & TA_HISTCNT_MASK;
-};
-
-uint32_t ta_get_version(struct timing_adapter *ta) {
- return *(volatile uint32_t *)(ta->base_addr + TA_VERSION);
-};
generated by cgit v1.2.1 (git 2.23.0) at 2024-06-26 03:06:21 +0000