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Make sure that BRAM data is stored with correct aligment in DDR.
The BRAM data is copied from DDR by the .copy.table and if alignment
is not correct the BRAM data will be corrupt.
Change-Id: I0e8cd9d1ebdc9e8428ddcc9c842411ca40724740
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This is needed in order to for example turn tarmac tracing on for the
FVP running the tests.
Change-Id: I6606134046c2e228d3fe06db41792e7403cd6ba8
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Corstone-Polaris is the upcoming Corstone-3xx platform featuring
the Cortex-Olympus CPU.
Change-Id: I17b56b6e94f040e7f9a39dddad2e98309c82b294
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Move finding Python after the project command. This was causing
incremental CMake configurations to fail.
Moving ETHOSU_TARGET_* variables after adding the common subdirectory.
It is necessary to set the variables before the core driver is
included.
Change-Id: I1c6883061cb9247336f8b33d82d2e2de870634fa
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Updating the minimum required CMake version fixes
toolchain warnings for Arm Clang.
Change-Id: I8f7371136739f6beb758d03cc76c2df17180f07c
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The timing adapters are attached to the Ethos-U AXI ports and should
only be initialized if the platform has been built with NPU support.
Add priority to init the constructor, insuring it will run before
any other constructor. This is important because the init constructor
sets up UART.
Change-Id: I189687437b95b11f6503c7631720e7883c24ada6
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from drivers
Add mpu driver for upstreaming
After removing of interface library,targets and applications
will list explicitly which libraries to link
Change-Id: Icfa449a2981093161f283e45b4d52ca6199371b8
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Adjusting toolchain files which compiler warnings to enable.
Fixing compiler warnings reported by Arm Clang and Arm GCC.
Change-Id: I715e875904ffd7ecfe994d3093cdf066373981b1
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The name of the Python 3 interpreter is ambiguous. 'python3' is not
available on all systems and 'python' can be both a Python 2 and
Python 3 interpreter.
Change-Id: I4ea119c617d1746fd34ecdd118a7c25dfe17dc86
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Change-Id: Icd870cad2917480a01d5f79897931c1effc66546
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Set default to 'release_with_logs' to enable the TFLu profiler
by default.
Change-Id: If094caf0f844b54750d88e5071a8f9007774ccc4
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Set BRAM size to 1MB and SRAM size to 2MB for corstone-300 target in gcc and armclang.
Change-Id: I5728948ba64fa69459f9a28d8b6459f7d63bd4d0
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Setting default value for the timing adapters mode register.
Change-Id: I71efd96b8235d476a0d133c4f93cb97530172ab5
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Change-Id: Ib108298417980a586bed8c8b4e0bb5e57f238316
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Change-Id: I207271d41a8dfa899ac5f53842790c4206657fe5
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Control the placement of the model and the arena for baremetal application
in SRAM/DRAM by 4 configurable options:
a. Model in SRAM and Arena in SRAM
b. Model in SRAM and Arena in DRAM
c. Model in DRAM and Arena in DRAM w/o Scratch buffer
d. Model in DRAM and Arena in DRAM with Scratch buffer in SRAM
Change-Id: Ia154be8a1c88cb13aeee62e701c2db7719a9d71c
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are defined
Define default values
Jira: MLBEDSW-5215
Change-Id: Ie498f7170804a2f1a6d3eb64fff4c859272efe2b
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Enable configuration of up to 4 PMU counters
Jira: MLBEDSW-4744
Change-Id: I08e9073d827033b3340bffd680288b1a83833d64
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When using ARMClang compiler the functions _sys_write and _sys_read
should return the number of unprocessed characters, whilst when using
GCC the functions _write and _read should return the number of
processed (i.e., written or read) chars.
The code was returning the unprocessed characters value in both cases
(i.e., 0) making the calling code to exit early with error and stop
further processing when using GCC. Hence no subsequent calls to write
would be executed causing missing output on the console. For example,
string truncation has been seen when printing on stderr.
Note that the bug was not really visible when printing to stdout, but
it was immediately exposed when using stderr. This was likely due to
the fact that libc buffers the stdout output and flushes it only when
encountering a new line char (\n), whilst no buffering is done on
stderr. Indeed by printing whole buffers the problem was worked
around and went unseen.
Change-Id: I5a48d6a29441175b2a950716997332a8b9c34e10
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Tensorflow lite micro has increased the size of the MicroProfiler.
As a consequence the FreeRTOS application needs to increase the stack
size allocate from the heap.
Change-Id: I8e4df44767edaecee27d9571319ef72da5937a3b
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Support building applications for targets without a NPU.
Change-Id: I04199b1c0444f23eadc6d4cf85195413dfd8bc97
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- Allow linker file to be overriden
- Disable Trustzone build for other targets than Corstone-300
- Make toolchain TARGET_CPU variable cached
Change-Id: I98a15e1080e4bf49e029578888b1e4ce362bbab7
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Adjust to updated Ethos-U driver
Change-Id: Ie374c29bec2baee4717634588b22f6db419ad9a3
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Remove dependency on cpp, and instead use the specified
compiler to preprocess the linker scripts.
Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com>
Change-Id: I000082f8e90015b12f99ba3f616b6b3e07647873
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Fix inconsistencies between the scatter file and linker script
Jira: MLBEDSW-4596
Change-Id: I4d31fc89ef0d0371e1ba8758d60871674cf844a9
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Setting NDEBUG for non debug builds. This will disabled the asserts
used by the for example the Ethos-U driver.
Disabling caches by default.
Change-Id: I614edc09b99e9997af7e113c7565d64f273f3fa0
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Changes to facilitate building on Windows systems.
Signed-off-by: Jonas Ohlsson <jonas.ohlsson@arm.com>
Change-Id: Ib95bd89fe476790333bafccc3f6fa402b6569166
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NPU driver interface currently have functions which have been stepped
each time a compatibilty breaking changed has been introduced. Old
entrypoints have been redefined with macro to use the latest version
for backwards compatibility. This series of patches will remove any
such functions and macro to unify the interface.
Update: All driver entrypoints to support updated interface
Change-Id: Ibe5fa7b2ac909eceb16a6879d4eaf9d0d7e36211
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Add helper to generate binaries for all targets added with
ethosu_add_executable in order to ease development on fpga.
Change-Id: I23df4f8aa1fd2d8a1e633d337b9f09ad7fe75774
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Name memories as they are in reference manual and consolidate the ddr
objects to single section to ease the creation of the binary.
The program headers are also updated to use the same layout as using
armclang.
Change-Id: Ib98cad45d0679c0d44226c46c2398d02f771ea9f
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Note that the MPU is split between S and NS. Code running in
NS (non-secure) state will not have access to S regions, however
it will have access to NS regions unless the MPU_NS is configured
(or other security mechanisms like SAU/IDAU limits access).
The MPU for NS is not enabled or configured in this example code.
Change-Id: I6b07bda25e4dbb23e8c2afdfa01d82ca5611f21a
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- Enable CPU instruction- and data cache by default.
- Add a CMake option to turn CPU cache on/off.
- Add basic MPU configuration for memory areas. Make the code
segment RO (NS address' are reachable from secure state,
hence MPU config entries for both S and NS address of ITCM).
- Target latest NPU API version
Change-Id: Ie9bf2f02e5ad534375d146804fdc66b9f2f6770f
Change-Id: I9def430d1e61d18e521798db4f48ed0a8c58380e
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Update all license headers to the correct years.
Change-Id: I18881cbceabe26066d69d8535bb3cb969cbaeba1
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Add driver unit tests that runs simple command streams directly
on top of the NPU driver.
Change-Id: I3fcce2a2bfbd458d14186b8fd13ba47174f49562
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Add basic skeleton to initialize timing adapters.
See core_software/drivers/timing_adapter/include/timing_adapter.h
for description of settings and API.
Change-Id: I0884f8efc5735b1a837d45e0bb7c6612d329ad58
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Change-Id: I660cd5d2bc73eaf589598c4f0570f5e9293de28d
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Adding script to run CTest on the Corstone-300 FVP. The script will
detect which version of the FVP that is used and pass the correct
command line arguments.
Updating README with instructions how to run tests, either using
CTest or calling the FVP directly.
Update FreeRTOS example to exit with the status of the inference.
Minor adjustments are needed to the output vectors.
Change-Id: I8a1a740b0dec2ce35d95e5c5d91f4b57a2c8e1fa
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Replace the CPU-only network with mobilenet_v2_1.0_224.
The header files in this commit are the same as the model data in the
trustzone application, see the README.md in
applications/trustzone_inference for details on how to generate them
from source on Arm ML-Zoo repository on github.
Change-Id: I8d3cfd6313fd5d98880cf1b24511208ca12faa05
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Change-Id: Ia2ca0593e65bdb570c53a16cf7706d876e649e18
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Add example project that builds both secure and nonsecure world
sides and the inference is done on the secure side.
This commit includes the mpc driver as found in the upstream
trustedfirmware git repository
https://git.trustedfirmware.org/TF-M/trusted-firmware-m.git
(8c0a234e453b51e6606d11599d0cb15097c3da48)
The model,input and output used are described in the README.md in this
directory.
Change-Id: Ie54904a38d54df4de2d6936f066c388ea58e396b
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Moved the initialisation of the TensorArena from inference_process.cpp in core_software to application level.
Change-Id: Id2f8361b19241b4251e2ce90b4f330d32734e801
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Change-Id: I59561365b61d256d3211101739dfb5c3e15488fa
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The core_software handling has split cmsis_startup into cmsis_system and
cmsis_startup in order to be able to controll the build of the libraries
per excecutable. This change adapts to that change.
Change-Id: I13286c75ba1c2298e760f9c0594ce4fec9db33dc
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The source tree is configured for a specific target as defined in the
targets directory.
The common target components are defined in targets/common. Targets
for real platform should include this directory to get the default
target libraries setup.
Change-Id: I7fced4bfacec97432cbbd4125bd5b4cdd21122e3
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Change-Id: I6e6643a483fd37e51fcc33f5c77cda62b320508d
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Change-Id: I34e9845abdccb3363953bd70fad7c6420865291e
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