From 0fd65cec95a1d8735c21c4dc3b728576e09487ad Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Per=20=C3=85strand?= Date: Thu, 11 Mar 2021 10:25:18 +0100 Subject: Use event enum for configuring cycle counter The pmu configuration API expects the internal configuration values, and not the exported enum. Update the API to instead use the enums to be able to configure them correctly. Change-Id: I038b1841f2459baec4a62a6a4389ea4b5f4822f2 --- include/pmu_ethosu.h | 12 ++++-------- src/ethosu_pmu.c | 12 +++++++----- 2 files changed, 11 insertions(+), 13 deletions(-) diff --git a/include/pmu_ethosu.h b/include/pmu_ethosu.h index 74a2989..a344146 100644 --- a/include/pmu_ethosu.h +++ b/include/pmu_ethosu.h @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. All rights reserved. + * Copyright (c) 2019-2021 Arm Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -329,12 +329,10 @@ void ETHOSU_PMU_CNTR_Increment_v2(struct ethosu_driver *drv, uint32_t mask); /** * \brief Set start event number for the cycle counter - * \param [in] start_event Event number - * - Start event (bits [9:0]) + * \param [in] start_event Event to trigger start of the cycle counter * \note Sets the event number that starts the cycle counter. - * - Event number in the range 0..1023 */ -void ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event_v2(struct ethosu_driver *drv, uint32_t start_event); +void ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event_v2(struct ethosu_driver *drv, enum ethosu_pmu_event_type start_event); #define ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event(start_event) \ ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event_v2(ðosu_drv, start_event) @@ -342,11 +340,9 @@ void ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event_v2(struct ethosu_driver *drv, uint32 /** * \brief Set stop event number for the cycle counter * \param [in] stop_event Event number - * - Stop event (bits [25:16]) * \note Sets the event number that stops the cycle counter. - * - Event number in the range 0..1023 */ -void ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event_v2(struct ethosu_driver *drv, uint32_t stop_event); +void ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event_v2(struct ethosu_driver *drv, enum ethosu_pmu_event_type stop_event); #define ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event(stop_event) \ ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event_v2(ðosu_drv, stop_event) diff --git a/src/ethosu_pmu.c b/src/ethosu_pmu.c index 759a722..aef3255 100644 --- a/src/ethosu_pmu.c +++ b/src/ethosu_pmu.c @@ -1,5 +1,5 @@ /* - * Copyright (c) 2019-2020 Arm Limited. All rights reserved. + * Copyright (c) 2019-2021 Arm Limited. All rights reserved. * * SPDX-License-Identifier: Apache-2.0 * @@ -288,20 +288,22 @@ void ETHOSU_PMU_CNTR_Increment_v2(struct ethosu_driver *drv, uint32_t mask) ETHOSU_PMU_CNTR_Enable_v2(drv, cntrs_active); } -void ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event_v2(struct ethosu_driver *drv, uint32_t start_event) +void ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event_v2(struct ethosu_driver *drv, enum ethosu_pmu_event_type start_event) { LOG_DEBUG("%s: start_event=%u\n", __FUNCTION__, start_event); + uint32_t val = pmu_event_value(start_event); struct pmccntr_cfg_r cfg; cfg.word = drv->dev.pmccntr_cfg; - cfg.CYCLE_CNT_CFG_START = start_event; + cfg.CYCLE_CNT_CFG_START = val; ethosu_write_reg_shadow(&drv->dev, NPU_REG_PMCCNTR_CFG, cfg.word, &drv->dev.pmccntr_cfg); } -void ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event_v2(struct ethosu_driver *drv, uint32_t stop_event) +void ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event_v2(struct ethosu_driver *drv, enum ethosu_pmu_event_type stop_event) { LOG_DEBUG("%s: stop_event=%u\n", __FUNCTION__, stop_event); + uint32_t val = pmu_event_value(stop_event); struct pmccntr_cfg_r cfg; cfg.word = drv->dev.pmccntr_cfg; - cfg.CYCLE_CNT_CFG_STOP = stop_event; + cfg.CYCLE_CNT_CFG_STOP = val; ethosu_write_reg_shadow(&drv->dev, NPU_REG_PMCCNTR_CFG, cfg.word, &drv->dev.pmccntr_cfg); } -- cgit v1.2.1