From 089a34786cbe02863eaa79f39dc92bf061dfcda8 Mon Sep 17 00:00:00 2001 From: Kristofer Jonsson Date: Fri, 12 Nov 2021 12:52:07 +0100 Subject: Remove new line from log messages Remove new line from log messages to allow the log makros to format the output. Change-Id: Idc07d0ef1fb77530fa07279ae92b2c964ebb6287 --- src/ethosu_device_u55_u65.c | 37 ++++++++++++++++----------------- src/ethosu_driver.c | 50 ++++++++++++++++++++++----------------------- src/ethosu_log.h | 16 ++++----------- src/ethosu_pmu.c | 38 +++++++++++++++++----------------- 4 files changed, 66 insertions(+), 75 deletions(-) diff --git a/src/ethosu_device_u55_u65.c b/src/ethosu_device_u55_u65.c index 080bfe8..50ca2f9 100644 --- a/src/ethosu_device_u55_u65.c +++ b/src/ethosu_device_u55_u65.c @@ -45,7 +45,7 @@ struct ethosu_device *ethosu_dev_init(const void *base_address, uint32_t secure_ struct ethosu_device *dev = malloc(sizeof(struct ethosu_device)); if (!dev) { - LOG_ERR("Failed to allocate memory for Ethos-U device\n"); + LOG_ERR("Failed to allocate memory for Ethos-U device"); return NULL; } @@ -127,7 +127,7 @@ enum ethosu_error_codes ethosu_dev_run_command_stream(struct ethosu_device *dev, struct cmd_r cmd; uint64_t qbase = (uintptr_t)cmd_stream_ptr + BASE_POINTER_OFFSET; assert(qbase <= ADDRESS_MASK); - LOG_DEBUG("QBASE=0x%016llx, QSIZE=%u, base_pointer_offset=0x%08x\n", qbase, cms_length, BASE_POINTER_OFFSET); + LOG_DEBUG("QBASE=0x%016llx, QSIZE=%u, base_pointer_offset=0x%08x", qbase, cms_length, BASE_POINTER_OFFSET); dev->reg->QBASE.word[0] = qbase & 0xffffffff; #ifdef ETHOSU65 @@ -139,7 +139,7 @@ enum ethosu_error_codes ethosu_dev_run_command_stream(struct ethosu_device *dev, { uint64_t addr = base_addr[i] + BASE_POINTER_OFFSET; assert(addr <= ADDRESS_MASK); - LOG_DEBUG("BASEP%d=0x%016llx\n", i, addr); + LOG_DEBUG("BASEP%d=0x%016llx", i, addr); dev->reg->BASEP[i].word[0] = addr & 0xffffffff; #ifdef ETHOSU65 dev->reg->BASEP[i].word[1] = addr >> 32; @@ -150,7 +150,7 @@ enum ethosu_error_codes ethosu_dev_run_command_stream(struct ethosu_device *dev, cmd.transition_to_running_state = 1; dev->reg->CMD.word = cmd.word; - LOG_DEBUG("CMD=0x%08x\n", cmd.word); + LOG_DEBUG("CMD=0x%08x", cmd.word); return ETHOSU_SUCCESS; } @@ -168,7 +168,7 @@ bool ethosu_dev_handle_interrupt(struct ethosu_device *dev) if (dev->reg->STATUS.bus_status || dev->reg->STATUS.cmd_parse_error || dev->reg->STATUS.wd_fault || dev->reg->STATUS.ecc_fault) { - LOG_DEBUG("NPU fault. status=0x%08x, qread=%" PRIu32 "\n", dev->reg->STATUS.word, dev->reg->QREAD.word); + LOG_DEBUG("NPU fault. status=0x%08x, qread=%" PRIu32, dev->reg->STATUS.word, dev->reg->QREAD.word); ethosu_dev_soft_reset(dev); ethosu_dev_set_clock_and_power(dev, ETHOSU_CLOCK_Q_UNCHANGED, ETHOSU_POWER_Q_DISABLE); return false; @@ -197,7 +197,7 @@ enum ethosu_error_codes ethosu_dev_soft_reset(struct ethosu_device *dev) reset.pending_CSL = dev->secure ? SECURITY_LEVEL_SECURE : SECURITY_LEVEL_NON_SECURE; // Reset and set security level - LOG_INFO("Soft reset NPU\n"); + LOG_INFO("Soft reset NPU"); dev->reg->RESET.word = reset.word; // Wait until reset status indicates that reset has been completed @@ -207,14 +207,14 @@ enum ethosu_error_codes ethosu_dev_soft_reset(struct ethosu_device *dev) if (dev->reg->STATUS.reset_status != 0) { - LOG_ERR("Soft reset timed out\n"); + LOG_ERR("Soft reset timed out"); return ETHOSU_GENERIC_FAILURE; } // Verify that NPU has switched security state and privilege level if (ethosu_dev_verify_access_state(dev) != true) { - LOG_ERR("Failed to switch security state and privilege level\n"); + LOG_ERR("Failed to switch security state and privilege level"); return ETHOSU_GENERIC_FAILURE; } @@ -262,7 +262,7 @@ enum ethosu_error_codes ethosu_dev_set_clock_and_power(struct ethosu_device *dev } dev->reg->CMD.word = cmd.word; - LOG_DEBUG("CMD=0x%08x\n", cmd.word); + LOG_DEBUG("CMD=0x%08x", cmd.word); return ETHOSU_SUCCESS; } @@ -279,23 +279,23 @@ bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_ hw_id.word = dev->reg->ID.word; LOG_INFO("Optimizer config cmd_stream_version: %" PRIu32 " macs_per_cc: %" PRIu32 " shram_size: %" PRIu32 - " custom_dma: %" PRIu32 "\n", + " custom_dma: %" PRIu32, opt_cfg->cmd_stream_version, opt_cfg->macs_per_cc, opt_cfg->shram_size, opt_cfg->custom_dma); - LOG_INFO("Optimizer config Ethos-U version: %" PRIu32 ".%" PRIu32 ".%" PRIu32 "\n", + LOG_INFO("Optimizer config Ethos-U version: %" PRIu32 ".%" PRIu32 ".%" PRIu32, opt_id->arch_major_rev, opt_id->arch_minor_rev, opt_id->arch_patch_rev); LOG_INFO("Ethos-U config cmd_stream_version: %" PRIu32 " macs_per_cc: %" PRIu32 " shram_size: %" PRIu32 - " custom_dma: %" PRIu32 "\n", + " custom_dma: %" PRIu32, hw_cfg.cmd_stream_version, hw_cfg.macs_per_cc, hw_cfg.shram_size, hw_cfg.custom_dma); - LOG_INFO("Ethos-U version: %" PRIu32 ".%" PRIu32 ".%" PRIu32 "\n", + LOG_INFO("Ethos-U version: %" PRIu32 ".%" PRIu32 ".%" PRIu32, hw_id.arch_major_rev, hw_id.arch_minor_rev, hw_id.arch_patch_rev); @@ -304,7 +304,7 @@ bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_ { if (hw_cfg.macs_per_cc != opt_cfg->macs_per_cc) { - LOG_ERR("NPU config mismatch: npu.macs_per_cc=%" PRIu32 " optimizer.macs_per_cc=%" PRIu32 "\n", + LOG_ERR("NPU config mismatch: npu.macs_per_cc=%" PRIu32 " optimizer.macs_per_cc=%" PRIu32, hw_cfg.macs_per_cc, opt_cfg->macs_per_cc); ret = false; @@ -312,7 +312,7 @@ bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_ if (hw_cfg.shram_size != opt_cfg->shram_size) { - LOG_ERR("NPU config mismatch: npu.shram_size=%" PRIu32 " optimizer.shram_size=%" PRIu32 "\n", + LOG_ERR("NPU config mismatch: npu.shram_size=%" PRIu32 " optimizer.shram_size=%" PRIu32, hw_cfg.shram_size, opt_cfg->shram_size); ret = false; @@ -320,8 +320,7 @@ bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_ if (hw_cfg.cmd_stream_version != opt_cfg->cmd_stream_version) { - LOG_ERR("NPU config mismatch: npu.cmd_stream_version=%" PRIu32 " optimizer.cmd_stream_version=%" PRIu32 - "\n", + LOG_ERR("NPU config mismatch: npu.cmd_stream_version=%" PRIu32 " optimizer.cmd_stream_version=%" PRIu32, hw_cfg.cmd_stream_version, opt_cfg->cmd_stream_version); ret = false; @@ -329,7 +328,7 @@ bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_ if (!hw_cfg.custom_dma && opt_cfg->custom_dma) { - LOG_ERR("NPU config mismatch: npu.custom_dma=%" PRIu32 " optimizer.custom_dma=%" PRIu32 "\n", + LOG_ERR("NPU config mismatch: npu.custom_dma=%" PRIu32 " optimizer.custom_dma=%" PRIu32, hw_cfg.custom_dma, opt_cfg->custom_dma); ret = false; @@ -339,7 +338,7 @@ bool ethosu_dev_verify_optimizer_config(struct ethosu_device *dev, uint32_t cfg_ if ((hw_id.arch_major_rev != opt_id->arch_major_rev) || (hw_id.arch_minor_rev < opt_id->arch_minor_rev)) { LOG_ERR("NPU arch mismatch: npu.arch=%" PRIu32 ".%" PRIu32 ".%" PRIu32 " optimizer.arch=%" PRIu32 ".%" PRIu32 - ".%" PRIu32 "\n", + ".%" PRIu32, hw_id.arch_major_rev, hw_id.arch_minor_rev, hw_id.arch_patch_rev, diff --git a/src/ethosu_driver.c b/src/ethosu_driver.c index cfff045..1c78bcc 100644 --- a/src/ethosu_driver.c +++ b/src/ethosu_driver.c @@ -244,7 +244,7 @@ static void ethosu_register_driver(struct ethosu_driver *drv) drv->next = registered_drivers; registered_drivers = drv; - LOG_INFO("New NPU driver registered (handle: 0x%p, NPU: 0x%p)\n", drv, drv->dev->reg); + LOG_INFO("New NPU driver registered (handle: 0x%p, NPU: 0x%p)", drv, drv->dev->reg); } static int ethosu_deregister_driver(struct ethosu_driver *drv) @@ -257,7 +257,7 @@ static int ethosu_deregister_driver(struct ethosu_driver *drv) if (cur == drv) { *prev = cur->next; - LOG_INFO("NPU driver handle %p deregistered.\n", drv); + LOG_INFO("NPU driver handle %p deregistered.", drv); return 0; } @@ -265,7 +265,7 @@ static int ethosu_deregister_driver(struct ethosu_driver *drv) cur = cur->next; } - LOG_ERR("No NPU driver handle registered at address %p.\n", drv); + LOG_ERR("No NPU driver handle registered at address %p.", drv); return -1; } @@ -279,20 +279,20 @@ static struct ethosu_driver *ethosu_find_and_reserve_driver(void) if (!drv->reserved) { drv->reserved = true; - LOG_DEBUG("NPU driver handle %p reserved.\n", drv); + LOG_DEBUG("NPU driver handle %p reserved.", drv); return drv; } drv = drv->next; } - LOG_DEBUG("No NPU driver handle available.\n", drv); + LOG_DEBUG("No NPU driver handle available.", drv); return NULL; } static int handle_optimizer_config(struct ethosu_driver *drv, struct opt_cfg_s *opt_cfg_p) { - LOG_INFO("Optimizer release nbr: %d patch: %d\n", opt_cfg_p->da_data.rel_nbr, opt_cfg_p->da_data.patch_nbr); + LOG_INFO("Optimizer release nbr: %d patch: %d", opt_cfg_p->da_data.rel_nbr, opt_cfg_p->da_data.patch_nbr); if (ethosu_dev_verify_optimizer_config(drv->dev, opt_cfg_p->cfg, opt_cfg_p->id) != true) { @@ -312,11 +312,11 @@ static int handle_command_stream(struct ethosu_driver *drv, uint32_t cms_bytes = cms_length * BYTES_IN_32_BITS; ptrdiff_t cmd_stream_ptr = (ptrdiff_t)cmd_stream; - LOG_INFO("handle_command_stream: cmd_stream=%p, cms_length %d\n", cmd_stream, cms_length); + LOG_INFO("handle_command_stream: cmd_stream=%p, cms_length %d", cmd_stream, cms_length); if (0 != ((ptrdiff_t)cmd_stream & MASK_16_BYTE_ALIGN)) { - LOG_ERR("Command stream addr %p not aligned to 16 bytes\n", cmd_stream); + LOG_ERR("Command stream addr %p not aligned to 16 bytes", cmd_stream); return -1; } @@ -325,7 +325,7 @@ static int handle_command_stream(struct ethosu_driver *drv, { if (0 != (base_addr[i] & MASK_16_BYTE_ALIGN)) { - LOG_ERR("Base addr %d: 0x%llx not aligned to 16 bytes\n", i, base_addr[i]); + LOG_ERR("Base addr %d: 0x%llx not aligned to 16 bytes", i, base_addr[i]); return -1; } } @@ -383,7 +383,7 @@ static int handle_command_stream(struct ethosu_driver *drv, ******************************************************************************/ void __attribute__((weak)) ethosu_irq_handler(struct ethosu_driver *drv) { - LOG_DEBUG("Got interrupt from Ethos-U\n"); + LOG_DEBUG("Got interrupt from Ethos-U"); drv->irq_triggered = true; if (!ethosu_dev_handle_interrupt(drv->dev)) @@ -405,7 +405,7 @@ int ethosu_init(struct ethosu_driver *drv, uint32_t privilege_enable) { LOG_INFO("Initializing NPU: base_address=%p, fast_memory=%p, fast_memory_size=%zu, secure=%" PRIu32 - ", privileged=%" PRIu32 "\n", + ", privileged=%" PRIu32, base_address, fast_memory, fast_memory_size, @@ -431,7 +431,7 @@ int ethosu_init(struct ethosu_driver *drv, if (drv->dev == NULL) { - LOG_ERR("Failed to initialize Ethos-U device\n"); + LOG_ERR("Failed to initialize Ethos-U device"); return -1; } @@ -441,7 +441,7 @@ int ethosu_init(struct ethosu_driver *drv, if (set_clock_and_power_request(drv, ETHOSU_INFERENCE_REQUEST, ETHOSU_CLOCK_Q_ENABLE, ETHOSU_POWER_Q_DISABLE) != ETHOSU_SUCCESS) { - LOG_ERR("Failed to disable power-q for Ethos-U\n"); + LOG_ERR("Failed to disable power-q for Ethos-U"); return -1; } } @@ -490,14 +490,14 @@ int ethosu_invoke(struct ethosu_driver *drv, // First word in custom_data_ptr should contain "Custom Operator Payload 1" if (data_ptr->word != ETHOSU_FOURCC) { - LOG_ERR("Custom Operator Payload: %" PRIu32 " is not correct, expected %x\n", data_ptr->word, ETHOSU_FOURCC); + LOG_ERR("Custom Operator Payload: %" PRIu32 " is not correct, expected %x", data_ptr->word, ETHOSU_FOURCC); return -1; } // Custom data length must be a multiple of 32 bits if ((custom_data_size % BYTES_IN_32_BITS) != 0) { - LOG_ERR("custom_data_size=0x%x not a multiple of 4\n", custom_data_size); + LOG_ERR("custom_data_size=0x%x not a multiple of 4", custom_data_size); return -1; } @@ -510,7 +510,7 @@ int ethosu_invoke(struct ethosu_driver *drv, if (base_addr_size != NULL && base_addr_size[FAST_MEMORY_BASE_ADDR_INDEX] > drv->fast_memory_size) { - LOG_ERR("Fast memory area too small. fast_memory_size=%u, base_addr_size=%u\n", + LOG_ERR("Fast memory area too small. fast_memory_size=%u, base_addr_size=%u", drv->fast_memory_size, base_addr_size[FAST_MEMORY_BASE_ADDR_INDEX]); return -1; @@ -552,14 +552,14 @@ int ethosu_invoke(struct ethosu_driver *drv, switch (data_ptr->driver_action_command) { case OPTIMIZER_CONFIG: - LOG_DEBUG("OPTIMIZER_CONFIG\n"); + LOG_DEBUG("OPTIMIZER_CONFIG"); struct opt_cfg_s *opt_cfg_p = (struct opt_cfg_s *)data_ptr; ret = handle_optimizer_config(drv, opt_cfg_p); data_ptr += DRIVER_ACTION_LENGTH_32_BIT_WORD + OPTIMIZER_CONFIG_LENGTH_32_BIT_WORD; break; case COMMAND_STREAM: - LOG_DEBUG("COMMAND_STREAM\n"); + LOG_DEBUG("COMMAND_STREAM"); void *command_stream = (uint8_t *)(data_ptr) + sizeof(struct cop_data_s); int cms_length = (data_ptr->reserved << 16) | data_ptr->length; @@ -569,17 +569,17 @@ int ethosu_invoke(struct ethosu_driver *drv, ret = handle_command_stream(drv, command_stream, cms_length, base_addr, base_addr_size, num_base_addr); if (ret < 0) { - LOG_ERR("Inference failed.\n"); + LOG_ERR("Inference failed."); } data_ptr += DRIVER_ACTION_LENGTH_32_BIT_WORD + cms_length; break; case NOP: - LOG_DEBUG("NOP\n"); + LOG_DEBUG("NOP"); data_ptr += DRIVER_ACTION_LENGTH_32_BIT_WORD; break; default: - LOG_ERR("UNSUPPORTED driver_action_command: %d\n", data_ptr->driver_action_command); + LOG_ERR("UNSUPPORTED driver_action_command: %d", data_ptr->driver_action_command); ret = -1; break; } @@ -609,7 +609,7 @@ void ethosu_set_power_mode(struct ethosu_driver *drv, bool always_on) // Reset to enter correct security state/privilege mode if (ethosu_dev_soft_reset(drv->dev) == false) { - LOG_ERR("Failed to set power mode for Ethos-U\n"); + LOG_ERR("Failed to set power mode for Ethos-U"); return; } } @@ -633,7 +633,7 @@ struct ethosu_driver *ethosu_reserve_driver(void) break; } - LOG_INFO("Waiting for NPU driver handle to become available...\n"); + LOG_INFO("Waiting for NPU driver handle to become available..."); ethosu_semaphore_take(ethosu_semaphore); } while (1); @@ -647,7 +647,7 @@ void ethosu_release_driver(struct ethosu_driver *drv) if (drv != NULL && drv->reserved) { drv->reserved = false; - LOG_DEBUG("NPU driver handle %p released\n", drv); + LOG_DEBUG("NPU driver handle %p released", drv); ethosu_semaphore_give(ethosu_semaphore); } ethosu_mutex_unlock(ethosu_mutex); @@ -699,7 +699,7 @@ enum ethosu_error_codes set_clock_and_power_request(struct ethosu_driver *drv, { if (ethosu_dev_soft_reset(drv->dev) != ETHOSU_SUCCESS) { - LOG_ERR("Failed to set clock and power q channels for Ethos-U\n"); + LOG_ERR("Failed to set clock and power q channels for Ethos-U"); return ETHOSU_GENERIC_FAILURE; } } diff --git a/src/ethosu_log.h b/src/ethosu_log.h index 898f5f2..76fe292 100644 --- a/src/ethosu_log.h +++ b/src/ethosu_log.h @@ -46,35 +46,27 @@ #define LOG(f, ...) fprintf(stdout, f, ##__VA_ARGS__) #if ETHOSU_LOG_SEVERITY >= ETHOSU_LOG_ERR -#define LOG_ERR_N(f, ...) fprintf(stderr, f, ##__VA_ARGS__) -#define LOG_ERR(f, ...) LOG_ERR_N("E: " f " (%s:%d)", ##__VA_ARGS__, strrchr("/" __FILE__, '/') + 1, __LINE__) +#define LOG_ERR(f, ...) fprintf(stderr, "E: " f " (%s:%d)\n", ##__VA_ARGS__, strrchr("/" __FILE__, '/') + 1, __LINE__) #else #define LOG_ERR(f, ...) -#define LOG_ERR_N(f, ...) #endif #if ETHOSU_LOG_SEVERITY >= ETHOSU_LOG_WARN -#define LOG_WARN_N(f, ...) fprintf(stdout, f, ##__VA_ARGS__) -#define LOG_WARN(f, ...) LOG_WARN_N("W: " f, ##__VA_ARGS__) +#define LOG_WARN(f, ...) fprintf(stdout, "W: " f "\n", ##__VA_ARGS__) #else #define LOG_WARN(f, ...) -#define LOG_WARN_N(f, ...) #endif #if ETHOSU_LOG_SEVERITY >= ETHOSU_LOG_INFO -#define LOG_INFO_N(f, ...) fprintf(stdout, f, ##__VA_ARGS__) -#define LOG_INFO(f, ...) LOG_INFO_N("I: " f, ##__VA_ARGS__) +#define LOG_INFO(f, ...) fprintf(stdout, "I: " f "\n", ##__VA_ARGS__) #else #define LOG_INFO(f, ...) -#define LOG_INFO_N(f, ...) #endif #if ETHOSU_LOG_SEVERITY >= ETHOSU_LOG_DEBUG -#define LOG_DEBUG_N(f, ...) fprintf(stdout, f, ##__VA_ARGS__) -#define LOG_DEBUG(f, ...) LOG_DEBUG_N("D: %s(): " f, __FUNCTION__, ##__VA_ARGS__) +#define LOG_DEBUG(f, ...) fprintf(stdout, "D: %s(): " f "\n", __FUNCTION__, ##__VA_ARGS__) #else #define LOG_DEBUG(f, ...) -#define LOG_DEBUG_N(f, ...) #endif #endif \ No newline at end of file diff --git a/src/ethosu_pmu.c b/src/ethosu_pmu.c index 8059010..6feb324 100644 --- a/src/ethosu_pmu.c +++ b/src/ethosu_pmu.c @@ -62,7 +62,7 @@ static enum ethosu_pmu_event_type pmu_event_type(uint32_t id) { EXPAND_PMU_EVENT(EVTYPE, SEMICOLON); default: - LOG_ERR("Unknown PMU event id: 0x%" PRIx32 "\n", id); + LOG_ERR("Unknown PMU event id: 0x%" PRIx32, id); } return ETHOSU_PMU_SENTINEL; @@ -87,7 +87,7 @@ static uint32_t pmu_event_value(enum ethosu_pmu_event_type event) void ETHOSU_PMU_Enable(struct ethosu_driver *drv) { - LOG_DEBUG("Enable PMU\n"); + LOG_DEBUG("Enable PMU"); struct pmcr_r pmcr = {0}; pmcr.cnt_en = 1; set_clock_and_power_request(drv, ETHOSU_PMU_REQUEST, ETHOSU_CLOCK_Q_DISABLE, ETHOSU_POWER_Q_DISABLE); @@ -96,7 +96,7 @@ void ETHOSU_PMU_Enable(struct ethosu_driver *drv) void ETHOSU_PMU_Disable(struct ethosu_driver *drv) { - LOG_DEBUG("Disable PMU\n"); + LOG_DEBUG("Disable PMU"); set_clock_and_power_request(drv, ETHOSU_PMU_REQUEST, ETHOSU_CLOCK_Q_ENABLE, ETHOSU_POWER_Q_ENABLE); drv->dev->reg->PMCR.word = 0; } @@ -105,7 +105,7 @@ void ETHOSU_PMU_Set_EVTYPER(struct ethosu_driver *drv, uint32_t num, enum ethosu { assert(num < ETHOSU_PMU_NCOUNTERS); uint32_t val = pmu_event_value(type); - LOG_DEBUG("num=%u, type=%d, val=%u\n", num, type, val); + LOG_DEBUG("num=%u, type=%d, val=%u", num, type, val); drv->dev->reg->PMEVTYPER[num].word = val; } @@ -114,13 +114,13 @@ enum ethosu_pmu_event_type ETHOSU_PMU_Get_EVTYPER(struct ethosu_driver *drv, uin assert(num < ETHOSU_PMU_NCOUNTERS); uint32_t val = drv->dev->reg->PMEVTYPER[num].word; enum ethosu_pmu_event_type type = pmu_event_type(val); - LOG_DEBUG("num=%u, type=%d, val=%u\n", num, type, val); + LOG_DEBUG("num=%u, type=%d, val=%u", num, type, val); return type; } void ETHOSU_PMU_CYCCNT_Reset(struct ethosu_driver *drv) { - LOG_DEBUG("Reset PMU cycle counter\n"); + LOG_DEBUG("Reset PMU cycle counter"); struct pmcr_r pmcr; pmcr.word = drv->dev->reg->PMCR.word; pmcr.cycle_cnt_rst = 1; @@ -129,7 +129,7 @@ void ETHOSU_PMU_CYCCNT_Reset(struct ethosu_driver *drv) void ETHOSU_PMU_EVCNTR_ALL_Reset(struct ethosu_driver *drv) { - LOG_DEBUG("Reset all events\n"); + LOG_DEBUG("Reset all events"); struct pmcr_r pmcr; pmcr.word = drv->dev->reg->PMCR.word; pmcr.event_cnt_rst = 1; @@ -138,20 +138,20 @@ void ETHOSU_PMU_EVCNTR_ALL_Reset(struct ethosu_driver *drv) void ETHOSU_PMU_CNTR_Enable(struct ethosu_driver *drv, uint32_t mask) { - LOG_DEBUG("mask=0x%08x\n", mask); + LOG_DEBUG("mask=0x%08x", mask); drv->dev->reg->PMCNTENSET.word = mask; } void ETHOSU_PMU_CNTR_Disable(struct ethosu_driver *drv, uint32_t mask) { - LOG_DEBUG("mask=0x%08x\n", mask); + LOG_DEBUG("mask=0x%08x", mask); drv->dev->reg->PMCNTENCLR.word = mask; } uint32_t ETHOSU_PMU_CNTR_Status(struct ethosu_driver *drv) { uint32_t pmcntenset = drv->dev->reg->PMCNTENSET.word; - LOG_DEBUG("mask=0x%08x\n", pmcntenset); + LOG_DEBUG("mask=0x%08x", pmcntenset); return pmcntenset; } @@ -161,7 +161,7 @@ uint64_t ETHOSU_PMU_Get_CCNTR(struct ethosu_driver *drv) uint32_t val_hi = drv->dev->reg->PMCCNTR.CYCLE_CNT_HI; uint64_t val = ((uint64_t)val_hi << 32) | val_lo; - LOG_DEBUG("val=%" PRIu64 "\n", val); + LOG_DEBUG("val=%" PRIu64, val); return val; } @@ -169,7 +169,7 @@ void ETHOSU_PMU_Set_CCNTR(struct ethosu_driver *drv, uint64_t val) { uint32_t active = ETHOSU_PMU_CNTR_Status(drv) & ETHOSU_PMU_CCNT_Msk; - LOG_DEBUG("val=%llu\n", val); + LOG_DEBUG("val=%llu", val); if (active) { @@ -189,7 +189,7 @@ uint32_t ETHOSU_PMU_Get_EVCNTR(struct ethosu_driver *drv, uint32_t num) { assert(num < ETHOSU_PMU_NCOUNTERS); uint32_t val = drv->dev->reg->PMEVCNTR[num].word; - LOG_DEBUG("num=%u, val=%u\n", num, val); + LOG_DEBUG("num=%u, val=%u", num, val); return val; } @@ -197,7 +197,7 @@ uint32_t ETHOSU_PMU_Get_EVCNTR(struct ethosu_driver *drv, uint32_t num) void ETHOSU_PMU_Set_EVCNTR(struct ethosu_driver *drv, uint32_t num, uint32_t val) { assert(num < ETHOSU_PMU_NCOUNTERS); - LOG_DEBUG("num=%u, val=%u\n", num, val); + LOG_DEBUG("num=%u, val=%u", num, val); drv->dev->reg->PMEVCNTR[num].word = val; } @@ -215,20 +215,20 @@ void ETHOSU_PMU_Set_CNTR_OVS(struct ethosu_driver *drv, uint32_t mask) void ETHOSU_PMU_Set_CNTR_IRQ_Enable(struct ethosu_driver *drv, uint32_t mask) { - LOG_DEBUG("mask=0x%08x\n", mask); + LOG_DEBUG("mask=0x%08x", mask); drv->dev->reg->PMINTSET.word = mask; } void ETHOSU_PMU_Set_CNTR_IRQ_Disable(struct ethosu_driver *drv, uint32_t mask) { - LOG_DEBUG("mask=0x%08x\n", mask); + LOG_DEBUG("mask=0x%08x", mask); drv->dev->reg->PMINTCLR.word = mask; } uint32_t ETHOSU_PMU_Get_IRQ_Enable(struct ethosu_driver *drv) { uint32_t pmint = drv->dev->reg->PMINTSET.word; - LOG_DEBUG("mask=0x%08x\n", pmint); + LOG_DEBUG("mask=0x%08x", pmint); return pmint; } @@ -263,7 +263,7 @@ void ETHOSU_PMU_CNTR_Increment(struct ethosu_driver *drv, uint32_t mask) void ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event(struct ethosu_driver *drv, enum ethosu_pmu_event_type start_event) { - LOG_DEBUG("start_event=%u\n", start_event); + LOG_DEBUG("start_event=%u", start_event); uint32_t val = pmu_event_value(start_event); struct pmccntr_cfg_r cfg; cfg.word = drv->dev->reg->PMCCNTR_CFG.word; @@ -273,7 +273,7 @@ void ETHOSU_PMU_PMCCNTR_CFG_Set_Start_Event(struct ethosu_driver *drv, enum etho void ETHOSU_PMU_PMCCNTR_CFG_Set_Stop_Event(struct ethosu_driver *drv, enum ethosu_pmu_event_type stop_event) { - LOG_DEBUG("stop_event=%u\n", stop_event); + LOG_DEBUG("stop_event=%u", stop_event); uint32_t val = pmu_event_value(stop_event); struct pmccntr_cfg_r cfg; cfg.word = drv->dev->reg->PMCCNTR_CFG.word; -- cgit v1.2.1