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| author | Per Åstrand <per.astrand@arm.com> | 2020-04-21 14:19:44 +0200 |
|---|---|---|
| committer | Kristofer Jonsson <kristofer.jonsson@arm.com> | 2020-05-11 07:12:51 +0000 |
| commit | 25d78c0062908e91b4d0ae241600f4a077a19400 (patch) | |
| tree | 58e2c3441a6c24b4fe6a55bc7fa7f6084643d62a /src/irq_driver.h | |
| parent | 537c71cb602871b9957eeb07bca4d5740a2e7eb4 (diff) | |
| download | ethos-u-core-driver-25d78c0062908e91b4d0ae241600f4a077a19400.tar.gz | |
MLBEDSW-1796 Refactor IRQ initialization
Turn the IRQ initialization around, to have the application define the
interrupt handler and expose the driver routine that is to be called
when that happens.
Change-Id: Idbfba1b1d1a1eaf6678ee16e9583c496eb2287ed
Diffstat (limited to 'src/irq_driver.h')
| -rw-r--r-- | src/irq_driver.h | 83 |
1 files changed, 0 insertions, 83 deletions
diff --git a/src/irq_driver.h b/src/irq_driver.h deleted file mode 100644 index 5a853a5..0000000 --- a/src/irq_driver.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Copyright (c) 2019-2020 Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -// IRQ -#if defined(CPU_CORTEX_M3) || defined(CPU_CORTEX_M4) || defined(CPU_CORTEX_M7) || defined(CPU_CORTEX_M33) || \ - defined(CPU_CORTEX_M55) -typedef enum irqn_type -{ - Reset = -15, - Nmi = -14, - HardFault = -13, - MemoryManagement = -12, - BusFault = -11, - UsageFault = -10, - SVCall = -5, - DebugMonitor = -4, - PendSV = -2, - SysTick_IRQn = -1, - Irq0 = 0, -#if defined(FPGA) -#if defined(CPU_CORTEX_M55) - EthosuIrq = 55 -#else - EthosuIrq = 67 -#endif -#else - EthosuIrq = Irq0 -#endif -} IRQn_Type; - -#define __CM7_REV 0x0000U -#define __MPU_PRESENT 1 -#define __ICACHE_PRESENT 1 -#define __DCACHE_PRESENT 1 -#define __TCM_PRESENT 0 -#define __NVIC_PRIO_BITS 3 -#define __Vendor_SysTickConfig 0 - -#if defined(CPU_CORTEX_M7) -#include <core_cm7.h> -#elif defined(CPU_CORTEX_M4) -#include <core_cm4.h> -#elif defined(CPU_CORTEX_M3) -#include <core_cm3.h> -#elif defined(CPU_CORTEX_M0) -#include <core_cm0.h> -#elif defined(CPU_CORTEX_M33) -#include <core_cm33.h> -#elif defined(CPU_CORTEX_M55) -#include <core_cm55.h> -#else -#error "Unknown CPU" -#endif - -typedef void (*ExecFuncPtr)(); -static inline void setup_irq(void (*irq_handler)(), enum irqn_type irq_number) -{ - __NVIC_EnableIRQ(irq_number); - ExecFuncPtr *vectorTable = (ExecFuncPtr *)(SCB->VTOR); - vectorTable[irq_number + 16] = irq_handler; -} - -static inline void sleep() -{ - __WFI(); -} - -#endif |