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Conv2dTestImpl.hpp File Reference
#include "LayerTestResult.hpp"
#include <ResolveType.hpp>
#include <armnn/Types.hpp>
#include <armnn/backends/IBackendInternal.hpp>
#include <backendsCommon/WorkloadFactory.hpp>

Go to the source code of this file.

Functions

template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > Convolution2d3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > Convolution2d2x3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x5Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x3Stride2x2Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x3NhwcTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled)
 
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x5Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x3Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x5QSymm16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x3QSymm16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution1dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled)
 
LayerTestResult< uint8_t, 4 > Convolution1dUint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled)
 
LayerTestResult< float, 4 > CompareConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory)
 
LayerTestResult< uint8_t, 4 > Convolution2dPerAxisQuantTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2d3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2d2x3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2dMult4Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2dMult2Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template<typename T >
LayerTestResult< T, 4 > CompareDepthwiseConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthNhwcTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul1Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul64Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dAsymmetricTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager)
 
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dUint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dDepthMul1Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dInt16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dDepthMul1Int16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dPerAxisQuantTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > CompareDepthwiseConvolution2dFloatTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > CompareDepthwiseConvolution2dUint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::DataLayout layout)
 

Function Documentation

◆ CompareConvolution2dTest()

LayerTestResult<float, 4> CompareConvolution2dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory 
)

Definition at line 3136 of file Conv2dTestImpl.cpp.

3140 {
3141  return CompareConvolution2dTestImpl<armnn::DataType::Float32>(
3142  workloadFactory, memoryManager, refWorkloadFactory);
3143 }

◆ CompareDepthwiseConvolution2dFloatTest()

LayerTestResult<float, 4> CompareDepthwiseConvolution2dFloatTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::DataLayout  layout 
)

Definition at line 3376 of file Conv2dTestImpl.cpp.

3381 {
3382  return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::Float32>(
3383  workloadFactory, memoryManager, refWorkloadFactory, layout);
3384 }

◆ CompareDepthwiseConvolution2dTest()

LayerTestResult<T, 4> CompareDepthwiseConvolution2dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::DataLayout  layout 
)

◆ CompareDepthwiseConvolution2dUint8Test()

LayerTestResult<uint8_t, 4> CompareDepthwiseConvolution2dUint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::DataLayout  layout 
)

Definition at line 3386 of file Conv2dTestImpl.cpp.

3391 {
3392  return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8>(
3393  workloadFactory, memoryManager, refWorkloadFactory, layout);
3394 }

◆ Convolution1dTest()

LayerTestResult<float, 4> Convolution1dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled 
)

Definition at line 3026 of file Conv2dTestImpl.cpp.

3030 {
3031  return Convolution1dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3032  workloadFactory, memoryManager, 0.0f, 0, biasEnabled);
3033 }

◆ Convolution1dUint8Test()

LayerTestResult<uint8_t, 4> Convolution1dUint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled 
)

Definition at line 3035 of file Conv2dTestImpl.cpp.

3039 {
3040  return Convolution1dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3041  workloadFactory, memoryManager, 0.1f, 128, biasEnabled);
3042 }

◆ Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test()

LayerTestResult<T, 4> Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 1210 of file Conv2dTestImpl.cpp.

1215 {
1216  armnn::TensorInfo inputTensorInfo({1, 1, 10, 10}, ArmnnType);
1217  std::vector<float> inputNoQuantizedValues =
1218  {
1219  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1220  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1221  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1222  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1223  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1224  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1225  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1226  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1227  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1228  1, 1, 1, 1, 1, 1, 1, 1, 1, 1
1229  };
1230 
1231  armnn::TensorInfo kernelTensorInfo({ 1, 1, 2, 2}, ArmnnType);
1232  std::vector<float> kernelNoQuantizedValues =
1233  {
1234  1, 2,
1235  3, 4
1236  };
1237 
1238  // Since the dilation rate is 2 this will dilate the kernel to be like 3x3: d(K-1)+1 --> 2 x (2-1) + 1 = 3,
1239  // therefore the output will be 4x4: (I − K + 2P)/S +1 => trunc ( (10 - 3 + 2x2 ) / 3 + 1 )
1240  // where, dilation size = d = 2; kernel size = K = 2; input size = I = 10; padding size = P = 2; stride = S = 3
1241  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
1242  std::vector<float> outputExpectedNoQuantizedValues =
1243  {
1244  4, 7, 7, 3,
1245  6, 10, 10, 4,
1246  6, 10, 10, 4,
1247  2, 3, 3, 1
1248  };
1249  uint32_t padLeft = 1;
1250  uint32_t padTop = 1;
1251  uint32_t padRight = 1;
1252  uint32_t padBottom = 1;
1253 
1254  return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1255  workloadFactory,
1256  memoryManager,
1257  inputNoQuantizedValues,
1258  inputTensorInfo,
1259  kernelNoQuantizedValues,
1260  kernelTensorInfo,
1261  outputExpectedNoQuantizedValues,
1262  outputTensorInfo,
1263  2,
1264  2,
1265  layout,
1266  padLeft,
1267  padTop,
1268  padRight,
1269  padBottom,
1270  3,
1271  3,
1272  biasEnabled
1273  );
1274 }

◆ Convolution2d2x3x3Dilation3x3Test()

LayerTestResult<T, 4> Convolution2d2x3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 1139 of file Conv2dTestImpl.cpp.

1144 {
1145  armnn::TensorInfo inputTensorInfo({1, 2, 10, 10}, ArmnnType);
1146  std::vector<float> inputNoQuantizedValues =
1147  {
1148  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1149  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1150  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1151  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1152  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1153  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1154  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1155  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1156  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1157  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1158 
1159  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1160  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1161  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1162  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1163  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1164  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1165  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1166  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1167  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1168  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1169  };
1170 
1171  armnn::TensorInfo kernelTensorInfo({ 1, 2, 3, 3}, ArmnnType);
1172  std::vector<float> kernelNoQuantizedValues =
1173  {
1174  1, 2, 3,
1175  4, 5, 6,
1176  7, 8, 9,
1177 
1178  1, 2, 3,
1179  4, 5, 6,
1180  7, 8, 9
1181  };
1182 
1183  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
1184  // therefore the output will be 4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
1185  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
1186  std::vector<float> outputExpectedNoQuantizedValues =
1187  {
1188  12., 10., 10., 10.,
1189  12., 10., 10., 10.,
1190  12., 10., 10., 10.,
1191  6., 4., 4., 4.
1192  };
1193 
1194  return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1195  workloadFactory,
1196  memoryManager,
1197  inputNoQuantizedValues,
1198  inputTensorInfo,
1199  kernelNoQuantizedValues,
1200  kernelTensorInfo,
1201  outputExpectedNoQuantizedValues,
1202  outputTensorInfo,
1203  3,
1204  3,
1205  layout,
1206  biasEnabled);
1207 }

◆ Convolution2d3x3Dilation3x3Test()

LayerTestResult<T, 4> Convolution2d3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 1083 of file Conv2dTestImpl.cpp.

1088 {
1089  armnn::TensorInfo inputTensorInfo({1, 1, 10, 10}, ArmnnType);
1090  std::vector<float> inputNoQuantizedValues =
1091  {
1092  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1093  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1094  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1095  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1096  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1097  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1098  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1099  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1100  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1101  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1102  };
1103 
1104  armnn::TensorInfo kernelTensorInfo({ 1, 1, 3, 3}, ArmnnType);
1105  std::vector<float> kernelNoQuantizedValues =
1106  {
1107  1, 2, 3,
1108  4, 5, 6,
1109  7, 8, 9
1110  };
1111 
1112  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
1113  // therefore the output will be 4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
1114  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
1115  std::vector<float> outputExpectedNoQuantizedValues =
1116  {
1117  6., 5., 5., 5.,
1118  6., 5., 5., 5.,
1119  6., 5., 5., 5.,
1120  3., 2., 2., 2.
1121  };
1122 
1123  return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1124  workloadFactory,
1125  memoryManager,
1126  inputNoQuantizedValues,
1127  inputTensorInfo,
1128  kernelNoQuantizedValues,
1129  kernelTensorInfo,
1130  outputExpectedNoQuantizedValues,
1131  outputTensorInfo,
1132  3,
1133  3,
1134  layout,
1135  biasEnabled);
1136 }

◆ Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest()

LayerTestResult<float, 4> Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::DataLayout  layout 
)

Definition at line 3016 of file Conv2dTestImpl.cpp.

References Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon(), and armnn::Float32.

3020 {
3021  return Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon
3022  <armnn::DataType::Float32, armnn::DataType::Float32>(
3023  workloadFactory, memoryManager, layout, 0.0f, 0);
3024 }
Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon
LayerTestResult< T, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout, float qScale, int32_t qOffset)
Definition: Conv2dTestImpl.cpp:869

◆ Convolution2dAsymmetricPaddingTest()

LayerTestResult<float, 4> Convolution2dAsymmetricPaddingTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::DataLayout  layout 
)

Definition at line 3007 of file Conv2dTestImpl.cpp.

3011 {
3012  return SimpleConvolution2dAsymmetricPaddingTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3013  workloadFactory, memoryManager, layout, 0.0f, 0);
3014 }

◆ Convolution2dPerAxisQuantTest()

LayerTestResult<uint8_t, 4> Convolution2dPerAxisQuantTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::DataLayout  layout 
)

Definition at line 3044 of file Conv2dTestImpl.cpp.

References AllocateAndCopyDataToITensorHandle(), CopyDataFromITensorHandle(), CopyDataToITensorHandle(), IWorkloadFactory::CreateConvolution2d(), IWorkloadFactory::CreateTensorHandle(), Convolution2dDescriptor::m_BiasEnabled, Convolution2dDescriptor::m_DataLayout, Convolution2dDescriptor::m_PadBottom, Convolution2dDescriptor::m_PadLeft, Convolution2dDescriptor::m_PadRight, Convolution2dDescriptor::m_PadTop, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, Convolution2dDescriptor::m_StrideX, Convolution2dDescriptor::m_StrideY, armnn::NCHW, LayerTestResult< T, n >::output, LayerTestResult< T, n >::outputExpected, and PermuteTensorNhwcToNchw().

3048 {
3049  using namespace armnn;
3050 
3051  const DataType inputType = DataType::QAsymmU8;
3052  const DataType kernelType = DataType::QSymmS8;
3053  const DataType biasType = DataType::Signed32;
3054 
3055  TensorInfo inputInfo ({ 1, 3, 1, 2 }, inputType, 0.5f, 128);
3056  TensorInfo outputInfo({ 1, 3, 1, 3 }, inputType, 1.0f, 128);
3057 
3058  const std::vector<float> quantScales{ 0.5f, 0.75f, 1.0f };
3059  constexpr unsigned int quantDimension = 0;
3060 
3061  TensorInfo kernelInfo({ 3, 1, 1, 2 }, kernelType, quantScales, quantDimension);
3062 
3063  const std::vector<float> biasQuantScales{ 0.25f, 0.375f, 0.5f };
3064  TensorInfo biasInfo({ 3 }, biasType, biasQuantScales, quantDimension);
3065 
3066  std::vector<uint8_t> inputData =
3067  {
3068  138, 108, 138, 108, 138, 108
3069  };
3070 
3071  std::vector<int8_t> kernelData =
3072  {
3073  1, 2, 1, 2, 1, 2
3074  };
3075 
3076  std::vector<int32_t> biasData =
3077  {
3078  4, 4, 4
3079  };
3080 
3081  std::vector<uint8_t> expectedOutputData =
3082  {
3083  121, 118, 115, 121, 118, 115, 121, 118, 115
3084  };
3085 
3086  if (layout == DataLayout::NCHW)
3087  {
3088  PermuteTensorNhwcToNchw(inputInfo, inputData);
3089  PermuteTensorNhwcToNchw(kernelInfo, kernelData);
3090  PermuteTensorNhwcToNchw(outputInfo, expectedOutputData);
3091  }
3092 
3093  Convolution2dDescriptor descriptor;
3094  descriptor.m_StrideX = 1;
3095  descriptor.m_StrideY = 1;
3096  descriptor.m_PadLeft = 0;
3097  descriptor.m_PadRight = 0;
3098  descriptor.m_PadTop = 0;
3099  descriptor.m_PadBottom = 0;
3100  descriptor.m_BiasEnabled = true;
3101  descriptor.m_DataLayout = layout;
3102 
3103  std::unique_ptr<ITensorHandle> inputHandle = workloadFactory.CreateTensorHandle(inputInfo);
3104  std::unique_ptr<ITensorHandle> outputHandle = workloadFactory.CreateTensorHandle(outputInfo);
3105 
3106  WorkloadInfo workloadInfo;
3107  ScopedCpuTensorHandle weightTensor(kernelInfo);
3108  ScopedCpuTensorHandle biasTensor(biasInfo);
3109 
3110  AllocateAndCopyDataToITensorHandle(&weightTensor, kernelData.data());
3111  AllocateAndCopyDataToITensorHandle(&biasTensor, biasData.data());
3112 
3113  Convolution2dQueueDescriptor queueDescriptor;
3114  queueDescriptor.m_Parameters = descriptor;
3115  queueDescriptor.m_Weight = &weightTensor;
3116  queueDescriptor.m_Bias = &biasTensor;
3117 
3118  AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3119  AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3120 
3121  std::unique_ptr<IWorkload> workload = workloadFactory.CreateConvolution2d(queueDescriptor, workloadInfo);
3122  inputHandle->Allocate();
3123  outputHandle->Allocate();
3124 
3125  CopyDataToITensorHandle(inputHandle.get(), inputData.data());
3126 
3127  ExecuteWorkload(*workload, memoryManager);
3128 
3129  LayerTestResult<uint8_t, 4> ret(outputInfo);
3130  CopyDataFromITensorHandle(ret.output.origin(), outputHandle.get());
3131  ret.outputExpected = MakeTensor<uint8_t, 4>(outputInfo, expectedOutputData);
3132 
3133  return ret;
3134 }
AllocateAndCopyDataToITensorHandle
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:19
armnn::Convolution2dDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:440
armnn::Convolution2dDescriptor::m_PadRight
uint32_t m_PadRight
Padding right value in the width dimension.
Definition: Descriptors.hpp:424
CopyDataToITensorHandle
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:9
armnn::IWorkloadFactory::CreateTensorHandle
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo, const bool IsMemoryManaged=true) const =0
CopyDataFromITensorHandle
void CopyDataFromITensorHandle(void *memory, const armnn::ITensorHandle *tensorHandle)
Definition: TensorCopyUtils.cpp:14
armnn::Convolution2dDescriptor::m_PadBottom
uint32_t m_PadBottom
Padding bottom value in the height dimension.
Definition: Descriptors.hpp:428
armnn::Convolution2dDescriptor::m_StrideY
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
Definition: Descriptors.hpp:432
armnn::Convolution2dDescriptor::m_PadTop
uint32_t m_PadTop
Padding top value in the height dimension.
Definition: Descriptors.hpp:426
armnn::Convolution2dDescriptor::m_PadLeft
uint32_t m_PadLeft
Padding left value in the width dimension.
Definition: Descriptors.hpp:422
armnn::Convolution2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:430
PermuteTensorNhwcToNchw
void PermuteTensorNhwcToNchw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
Definition: DataLayoutUtils.hpp:26
armnn::Convolution2dDescriptor::m_BiasEnabled
bool m_BiasEnabled
Enable/disable bias.
Definition: Descriptors.hpp:438
armnn::DataType
DataType
Definition: Types.hpp:32
armnn::IWorkloadFactory::CreateConvolution2d
virtual std::unique_ptr< IWorkload > CreateConvolution2d(const Convolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
Definition: WorkloadFactory.cpp:1142
armnn::Convolution2dDescriptor
A Convolution2dDescriptor for the Convolution2dLayer.
Definition: Descriptors.hpp:392

◆ DepthwiseConvolution2d2x3x3Dilation3x3Test()

LayerTestResult<T, 4> DepthwiseConvolution2d2x3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2432 of file Conv2dTestImpl.cpp.

2437 {
2438  armnn::TensorInfo inputTensorInfo({1, 2, 10, 10}, ArmnnType);
2439  std::vector<float> inputNoQuantizedValues =
2440  {
2441  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2442  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2443  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2444  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2445  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2446  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2447  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2448  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2449  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2450  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2451 
2452  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2453  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2454  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2455  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2456  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2457  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2458  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2459  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2460  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2461  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2462  };
2463 
2464  armnn::TensorInfo kernelTensorInfo({ 1, 2, 3, 3}, ArmnnType);
2465  std::vector<float> kernelNoQuantizedValues =
2466  {
2467  1, 2, 3,
2468  4, 5, 6,
2469  7, 8, 9,
2470 
2471  1, 2, 3,
2472  4, 5, 6,
2473  7, 8, 9
2474  };
2475 
2476  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
2477  // therefore the output will be 2x4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
2478  armnn::TensorInfo outputTensorInfo({ 1, 2, 4, 4}, ArmnnType);
2479  std::vector<float> outputExpectedNoQuantizedValues =
2480  {
2481  6., 5., 5., 5.,
2482  6., 5., 5., 5.,
2483  6., 5., 5., 5.,
2484  3., 2., 2., 2.,
2485 
2486  6., 5., 5., 5.,
2487  6., 5., 5., 5.,
2488  6., 5., 5., 5.,
2489  3., 2., 2., 2.
2490  };
2491 
2492  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2493  workloadFactory,
2494  memoryManager,
2495  inputNoQuantizedValues,
2496  inputTensorInfo,
2497  kernelNoQuantizedValues,
2498  kernelTensorInfo,
2499  outputExpectedNoQuantizedValues,
2500  outputTensorInfo,
2501  3,
2502  3,
2503  layout,
2504  biasEnabled);
2505 }

◆ DepthwiseConvolution2d3x3Dilation3x3Test()

LayerTestResult<T, 4> DepthwiseConvolution2d3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2376 of file Conv2dTestImpl.cpp.

2381 {
2382  armnn::TensorInfo inputTensorInfo({1, 1, 10, 10}, ArmnnType);
2383  std::vector<float> inputNoQuantizedValues =
2384  {
2385  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2386  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2387  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2388  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2389  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2390  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2391  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2392  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2393  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2394  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2395  };
2396 
2397  armnn::TensorInfo kernelTensorInfo({ 1, 1, 3, 3}, ArmnnType);
2398  std::vector<float> kernelNoQuantizedValues =
2399  {
2400  1, 2, 3,
2401  4, 5, 6,
2402  7, 8, 9
2403  };
2404 
2405  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
2406  // therefore the output will be 4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
2407  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
2408  std::vector<float> outputExpectedNoQuantizedValues =
2409  {
2410  6., 5., 5., 5.,
2411  6., 5., 5., 5.,
2412  6., 5., 5., 5.,
2413  3., 2., 2., 2.
2414  };
2415 
2416  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2417  workloadFactory,
2418  memoryManager,
2419  inputNoQuantizedValues,
2420  inputTensorInfo,
2421  kernelNoQuantizedValues,
2422  kernelTensorInfo,
2423  outputExpectedNoQuantizedValues,
2424  outputTensorInfo,
2425  3,
2426  3,
2427  layout,
2428  biasEnabled);
2429 }

◆ DepthwiseConvolution2dAsymmetricTest()

LayerTestResult<float, 4> DepthwiseConvolution2dAsymmetricTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3206 of file Conv2dTestImpl.cpp.

3211 {
3212  return DepthwiseConvolution2dAsymmetricTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3213  workloadFactory, memoryManager, 0.0f, 0, biasEnabled, layout);
3214 }

◆ DepthwiseConvolution2dDepthMul1Int16Test()

LayerTestResult<int16_t, 4> DepthwiseConvolution2dDepthMul1Int16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3258 of file Conv2dTestImpl.cpp.

3263 {
3264  return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3265  workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3266 }

◆ DepthwiseConvolution2dDepthMul1Test()

LayerTestResult<float, 4> DepthwiseConvolution2dDepthMul1Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3164 of file Conv2dTestImpl.cpp.

3169 {
3170  return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3171  workloadFactory, memoryManager, 0.0f, 0, biasEnabled, layout);
3172 }

◆ DepthwiseConvolution2dDepthMul1Uint8Test()

LayerTestResult<uint8_t, 4> DepthwiseConvolution2dDepthMul1Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3226 of file Conv2dTestImpl.cpp.

3231 {
3232  return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3233  workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3234 }

◆ DepthwiseConvolution2dDepthMul64Test()

LayerTestResult<float, 4> DepthwiseConvolution2dDepthMul64Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager 
)

Definition at line 3174 of file Conv2dTestImpl.cpp.

References armnn::Float32, and armnn::NCHW.

3177 {
3178  armnn::TensorInfo inputTensorInfo({ 1, 1, 2, 2 }, armnn::DataType::Float32);
3179  auto input = MakeTensor<float, 4>(inputTensorInfo, { 1.f, 2.f, 3.f, 4.f });
3180 
3181  std::vector<float> kernelData;
3182  std::vector<float> singleDepthKernel{ 1.f, -1.f, -1.f, 1.f };
3183  for (unsigned int i = 0; i < 64; ++i)
3184  {
3185  kernelData.insert(kernelData.end(), singleDepthKernel.begin(), singleDepthKernel.end());
3186  }
3187  armnn::TensorInfo kernelTensorInfo({ 64, 1, 2, 2 }, armnn::DataType::Float32);
3188  auto kernel = MakeTensor<float, 4>(kernelTensorInfo, kernelData);
3189 
3190  std::vector<float> expectedOutputData(64, 0.f);
3191  armnn::TensorInfo outputTensorInfo({ 1, 64, 1, 1 }, armnn::DataType::Float32);
3192  auto expectedOutput = MakeTensor<float, 4>(outputTensorInfo, expectedOutputData);
3193 
3194  return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3195  workloadFactory,
3196  memoryManager,
3197  input,
3198  kernel,
3199  boost::multi_array<float, 1>(),
3200  expectedOutput,
3201  0.f,
3202  0,
3203  armnn::DataLayout::NCHW);
3204 }

◆ DepthwiseConvolution2dDepthNhwcTest()

LayerTestResult<float, 4> DepthwiseConvolution2dDepthNhwcTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled 
)

Definition at line 3155 of file Conv2dTestImpl.cpp.

3159 {
3160  return DepthwiseConvolution2dNhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3161  workloadFactory, memoryManager, 0.0f, 0, biasEnabled);
3162 }

◆ DepthwiseConvolution2dInt16Test()

LayerTestResult<int16_t, 4> DepthwiseConvolution2dInt16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3248 of file Conv2dTestImpl.cpp.

3253 {
3254  return DepthwiseConvolution2dTestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3255  workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3256 }

◆ DepthwiseConvolution2dMult2Test()

LayerTestResult<T, 4> DepthwiseConvolution2dMult2Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2600 of file Conv2dTestImpl.cpp.

2605 {
2606  armnn::TensorInfo inputTensorInfo({1, 2, 3, 3}, ArmnnType);
2607  std::vector<float> inputNoQuantizedValues =
2608  {
2609  10.0, 10.0, 10.0,
2610  10.0, 10.0, 10.0,
2611  10.0, 10.0, 10.0,
2612 
2613  21.0, 22.0, 23.0,
2614  24.0, 25.0, 26.0,
2615  27.0, 28.0, 29.0
2616  };
2617 
2618  armnn::TensorInfo kernelTensorInfo({ 2, 2, 2, 2}, ArmnnType);
2619 
2620  std::vector<float> kernelNoQuantizedValues =
2621  {
2622  0.25f, 0.25f,
2623  0.25f, 0.25f,
2624 
2625  0.2f , 0.0f,
2626  0.0f , 0.0f,
2627 
2628  0.0f , 0.0f,
2629  0.0f , 0.1f,
2630 
2631  0.0f , 0.3f,
2632  0.0f , 0.0f
2633 
2634  };
2635 
2636  armnn::TensorInfo outputTensorInfo({ 1, 4, 2, 2}, ArmnnType);
2637  std::vector<float> outputExpectedNoQuantizedValues =
2638  {
2639  10.f, 10.f,
2640  10.f, 10.f,
2641 
2642  1.f, 1.f,
2643  1.f, 1.f,
2644 
2645  4.2000003f, 4.4f,
2646  4.8f, 5.f,
2647 
2648  6.6000004f, 6.9f,
2649  7.5000005f, 7.8f
2650  };
2651 
2652 
2653  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2654  workloadFactory,
2655  memoryManager,
2656  inputNoQuantizedValues,
2657  inputTensorInfo,
2658  kernelNoQuantizedValues,
2659  kernelTensorInfo,
2660  outputExpectedNoQuantizedValues,
2661  outputTensorInfo,
2662  1,
2663  1,
2664  layout,
2665  biasEnabled);
2666 }

◆ DepthwiseConvolution2dMult4Test()

LayerTestResult<T, 4> DepthwiseConvolution2dMult4Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2508 of file Conv2dTestImpl.cpp.

2513 {
2514  armnn::TensorInfo inputTensorInfo({1, 2, 3, 3}, ArmnnType);
2515  std::vector<float> inputNoQuantizedValues =
2516  {
2517  10.0, 10.0, 10.0,
2518  10.0, 10.0, 10.0,
2519  10.0, 10.0, 10.0,
2520 
2521  21.0, 22.0, 23.0,
2522  24.0, 25.0, 26.0,
2523  27.0, 28.0, 29.0
2524  };
2525 
2526  armnn::TensorInfo kernelTensorInfo({ 4, 2, 2, 2}, ArmnnType);
2527 
2528  std::vector<float> kernelNoQuantizedValues =
2529  {
2530  0.25f, 0.25f,
2531  0.25f, 0.25f,
2532 
2533  0.25f, 0.25f,
2534  0.25f, 0.25f,
2535 
2536  0.0f , 0.0f,
2537  0.0f , 0.1f,
2538 
2539  0.0f , 0.0f,
2540  0.0f , 0.1f,
2541 
2542  0.2f , 0.0f,
2543  0.0f , 0.0f,
2544 
2545  0.2f , 0.0f,
2546  0.0f , 0.0f,
2547 
2548  0.0f , 0.3f,
2549  0.0f , 0.0f,
2550 
2551  0.0f , 0.3f,
2552  0.0f , 0.0f
2553  };
2554 
2555  armnn::TensorInfo outputTensorInfo({ 1, 8, 2, 2}, ArmnnType);
2556  std::vector<float> outputExpectedNoQuantizedValues =
2557  {
2558  10.f, 10.f,
2559  10.f, 10.f,
2560 
2561  1.f, 1.f,
2562  1.f, 1.f,
2563 
2564  2.f, 2.f,
2565  2.f, 2.f,
2566 
2567  3.f, 3.f,
2568  3.f, 3.f,
2569 
2570  23.f, 24.f,
2571  26.f, 27.f,
2572 
2573  2.5f, 2.6000001f,
2574  2.8f, 2.9f,
2575 
2576  4.2000003f, 4.4f,
2577  4.8f, 5.f,
2578 
2579  6.6000004f, 6.9f,
2580  7.5000005f, 7.8f
2581  };
2582 
2583 
2584  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2585  workloadFactory,
2586  memoryManager,
2587  inputNoQuantizedValues,
2588  inputTensorInfo,
2589  kernelNoQuantizedValues,
2590  kernelTensorInfo,
2591  outputExpectedNoQuantizedValues,
2592  outputTensorInfo,
2593  1,
2594  1,
2595  layout,
2596  biasEnabled);
2597 }

◆ DepthwiseConvolution2dPerAxisQuantTest()

LayerTestResult<uint8_t, 4> DepthwiseConvolution2dPerAxisQuantTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::DataLayout  layout 
)

Definition at line 3268 of file Conv2dTestImpl.cpp.

References AllocateAndCopyDataToITensorHandle(), CopyDataFromITensorHandle(), CopyDataToITensorHandle(), IWorkloadFactory::CreateDepthwiseConvolution2d(), IWorkloadFactory::CreateTensorHandle(), DepthwiseConvolution2dDescriptor::m_BiasEnabled, DepthwiseConvolution2dDescriptor::m_DataLayout, DepthwiseConvolution2dDescriptor::m_DilationX, DepthwiseConvolution2dDescriptor::m_DilationY, DepthwiseConvolution2dDescriptor::m_PadBottom, DepthwiseConvolution2dDescriptor::m_PadLeft, DepthwiseConvolution2dDescriptor::m_PadRight, DepthwiseConvolution2dDescriptor::m_PadTop, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, DepthwiseConvolution2dDescriptor::m_StrideX, DepthwiseConvolution2dDescriptor::m_StrideY, armnn::NCHW, LayerTestResult< T, n >::output, LayerTestResult< T, n >::outputExpected, and PermuteTensorNhwcToNchw().

3272 {
3273  using namespace armnn;
3274 
3275  const DataType inputType = DataType::QAsymmU8;
3276  const DataType kernelType = DataType::QSymmS8;
3277  const DataType biasType = DataType::Signed32;
3278 
3279  TensorInfo inputInfo ({ 1, 3, 3, 2 }, inputType, 0.5f, 128); // N H W C
3280  TensorInfo outputInfo({ 1, 2, 2, 4 }, inputType, 1.0f, 128); // N H W C
3281 
3282  const std::vector<float> quantScales{ 1.0f, 0.5f, 1.0f, 0.5f };
3283  const unsigned int quantDimension = 0;
3284  TensorInfo kernelInfo({ 2, 2, 2, 2 }, kernelType, quantScales, quantDimension); // M I H W
3285 
3286  const std::vector<float> biasQuantScales{ 0.5f, 0.25f, 0.5f, 0.25f };
3287  constexpr unsigned int biasQuantDimension = 0;
3288  TensorInfo biasInfo({ 4 }, biasType, biasQuantScales, biasQuantDimension);
3289 
3290  std::vector<uint8_t> inputData =
3291  {
3292  129, 130,
3293  129, 130,
3294  129, 130,
3295  129, 130,
3296  129, 130,
3297  129, 130,
3298  129, 130,
3299  129, 130,
3300  129, 130
3301  };
3302 
3303  std::vector<int8_t> kernelData =
3304  {
3305  1, 1, 1, 1,
3306  1, 1, 1, 1,
3307  1, 1, 1, 1,
3308  1, 1, 1, 1
3309  };
3310 
3311  std::vector<int32_t> biasData =
3312  {
3313  4, 4, 4, 4
3314  };
3315 
3316  std::vector<uint8_t> expectedOutputData =
3317  {
3318  132, 130, 134, 131,
3319  132, 130, 134, 131,
3320  132, 130, 134, 131,
3321  132, 130, 134, 131
3322  };
3323 
3324  if (layout == DataLayout::NCHW)
3325  {
3326  PermuteTensorNhwcToNchw(inputInfo, inputData);
3327  PermuteTensorNhwcToNchw(outputInfo, expectedOutputData);
3328  }
3329 
3330  DepthwiseConvolution2dDescriptor descriptor;
3331  descriptor.m_StrideX = 1;
3332  descriptor.m_StrideY = 1;
3333  descriptor.m_PadLeft = 0;
3334  descriptor.m_PadRight = 0;
3335  descriptor.m_PadTop = 0;
3336  descriptor.m_PadBottom = 0;
3337  descriptor.m_DilationX = 1;
3338  descriptor.m_DilationY = 1;
3339  descriptor.m_BiasEnabled = true;
3340  descriptor.m_DataLayout = layout;
3341 
3342  std::unique_ptr<ITensorHandle> inputHandle = workloadFactory.CreateTensorHandle(inputInfo);
3343  std::unique_ptr<ITensorHandle> outputHandle = workloadFactory.CreateTensorHandle(outputInfo);
3344 
3345  WorkloadInfo workloadInfo;
3346  ScopedCpuTensorHandle weightTensor(kernelInfo);
3347  ScopedCpuTensorHandle biasTensor(biasInfo);
3348 
3349  AllocateAndCopyDataToITensorHandle(&weightTensor, kernelData.data());
3350  AllocateAndCopyDataToITensorHandle(&biasTensor, biasData.data());
3351 
3352  DepthwiseConvolution2dQueueDescriptor queueDescriptor;
3353  queueDescriptor.m_Parameters = descriptor;
3354  queueDescriptor.m_Weight = &weightTensor;
3355  queueDescriptor.m_Bias = &biasTensor;
3356 
3357  AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3358  AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3359 
3360  std::unique_ptr<IWorkload> workload = workloadFactory.CreateDepthwiseConvolution2d(queueDescriptor, workloadInfo);
3361  inputHandle->Allocate();
3362  outputHandle->Allocate();
3363 
3364  CopyDataToITensorHandle(inputHandle.get(), inputData.data());
3365 
3366  ExecuteWorkload(*workload, memoryManager);
3367 
3368  LayerTestResult<uint8_t, 4> ret(outputInfo);
3369 
3370  CopyDataFromITensorHandle(ret.output.origin(), outputHandle.get());
3371  ret.outputExpected = MakeTensor<uint8_t, 4>(outputInfo, expectedOutputData);
3372 
3373  return ret;
3374 }
armnn::IWorkloadFactory::CreateDepthwiseConvolution2d
virtual std::unique_ptr< IWorkload > CreateDepthwiseConvolution2d(const DepthwiseConvolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
Definition: WorkloadFactory.cpp:1160
AllocateAndCopyDataToITensorHandle
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:19
armnn::DepthwiseConvolution2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:482
armnn::DepthwiseConvolution2dDescriptor::m_PadBottom
uint32_t m_PadBottom
Padding bottom value in the height dimension.
Definition: Descriptors.hpp:480
armnn::DepthwiseConvolution2dDescriptor::m_DilationX
uint32_t m_DilationX
Dilation factor value for width dimension.
Definition: Descriptors.hpp:486
CopyDataToITensorHandle
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:9
armnn::DepthwiseConvolution2dDescriptor::m_PadLeft
uint32_t m_PadLeft
Padding left value in the width dimension.
Definition: Descriptors.hpp:474
armnn::IWorkloadFactory::CreateTensorHandle
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo, const bool IsMemoryManaged=true) const =0
CopyDataFromITensorHandle
void CopyDataFromITensorHandle(void *memory, const armnn::ITensorHandle *tensorHandle)
Definition: TensorCopyUtils.cpp:14
armnn::DepthwiseConvolution2dDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:492
armnn::DepthwiseConvolution2dDescriptor::m_PadTop
uint32_t m_PadTop
Padding top value in the height dimension.
Definition: Descriptors.hpp:478
PermuteTensorNhwcToNchw
void PermuteTensorNhwcToNchw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
Definition: DataLayoutUtils.hpp:26
armnn::DepthwiseConvolution2dDescriptor::m_BiasEnabled
bool m_BiasEnabled
Enable/disable bias.
Definition: Descriptors.hpp:490
armnn::DataType
DataType
Definition: Types.hpp:32
armnn::DepthwiseConvolution2dDescriptor
A DepthwiseConvolution2dDescriptor for the DepthwiseConvolution2dLayer.
Definition: Descriptors.hpp:444
armnn::DepthwiseConvolution2dDescriptor::m_StrideY
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
Definition: Descriptors.hpp:484
armnn::DepthwiseConvolution2dDescriptor::m_DilationY
uint32_t m_DilationY
Dilation factor value for height dimension.
Definition: Descriptors.hpp:488
armnn::DepthwiseConvolution2dDescriptor::m_PadRight
uint32_t m_PadRight
Padding right value in the width dimension.
Definition: Descriptors.hpp:476

◆ DepthwiseConvolution2dTest()

LayerTestResult<float, 4> DepthwiseConvolution2dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3145 of file Conv2dTestImpl.cpp.

3150 {
3151  return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3152  workloadFactory, memoryManager, 0.0f, 0, biasEnabled, layout);
3153 }

◆ DepthwiseConvolution2dUint8Test()

LayerTestResult<uint8_t, 4> DepthwiseConvolution2dUint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3216 of file Conv2dTestImpl.cpp.

3221 {
3222  return DepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3223  workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3224 }

◆ SimpleConvolution2d3x3NhwcTest()

LayerTestResult<float, 4> SimpleConvolution2d3x3NhwcTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled 
)

Definition at line 2948 of file Conv2dTestImpl.cpp.

References armnn::NHWC.

2952 {
2953  return SimpleConvolution2d3x3NhwcTestCommon<armnn::DataType::Float32>(
2954  workloadFactory,
2955  memoryManager,
2956  0.f,
2957  0,
2958  biasEnabled,
2959  armnn::DataLayout::NHWC);
2960 }

◆ SimpleConvolution2d3x3QSymm16Test()

LayerTestResult<int16_t, 4> SimpleConvolution2d3x3QSymm16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2997 of file Conv2dTestImpl.cpp.

3002 {
3003  return SimpleConvolution2d3x3TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3004  workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
3005 }

◆ SimpleConvolution2d3x3Stride2x2Test()

LayerTestResult<float, 4> SimpleConvolution2d3x3Stride2x2Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2962 of file Conv2dTestImpl.cpp.

2967 {
2968  return SimpleConvolution2d3x3Stride2x2TestCommon<armnn::DataType::Float32>(
2969  workloadFactory,
2970  memoryManager,
2971  0.f,
2972  0,
2973  biasEnabled,
2974  layout);
2975 }

◆ SimpleConvolution2d3x3Test()

LayerTestResult<float, 4> SimpleConvolution2d3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2938 of file Conv2dTestImpl.cpp.

2943 {
2944  return SimpleConvolution2d3x3TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
2945  workloadFactory, memoryManager, 0.f, 0, biasEnabled, layout);
2946 }

◆ SimpleConvolution2d3x3Uint8Test()

LayerTestResult<uint8_t, 4> SimpleConvolution2d3x3Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2977 of file Conv2dTestImpl.cpp.

2982 {
2983  return SimpleConvolution2d3x3TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
2984  workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
2985 }

◆ SimpleConvolution2d3x5QSymm16Test()

LayerTestResult<int16_t, 4> SimpleConvolution2d3x5QSymm16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2987 of file Conv2dTestImpl.cpp.

2992 {
2993  return SimpleConvolution2d3x5TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
2994  workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
2995 }

◆ SimpleConvolution2d3x5Test()

LayerTestResult<float, 4> SimpleConvolution2d3x5Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2918 of file Conv2dTestImpl.cpp.

2923 {
2924  return SimpleConvolution2d3x5TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
2925  workloadFactory, memoryManager, 0.f, 0, biasEnabled, layout);
2926 }

◆ SimpleConvolution2d3x5Uint8Test()

LayerTestResult<uint8_t, 4> SimpleConvolution2d3x5Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2928 of file Conv2dTestImpl.cpp.

2933 {
2934  return SimpleConvolution2d3x5TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
2935  workloadFactory, memoryManager, 0.5f, 50, biasEnabled, layout);
2936 }

◆ SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest()

LayerTestResult<float, 4> SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager 
)

Definition at line 3236 of file Conv2dTestImpl.cpp.

3239 {
3240  return SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3241  workloadFactory,
3242  memoryManager,
3243  0.f,
3244  0,
3245  false);
3246 }