ArmNN
 23.05
TfLiteParser.cpp
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1 //
2 // Copyright © 2017-2023 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "TfLiteParser.hpp"
7 
9 #include "armnn/LstmParams.hpp"
10 
11 #include <armnn/BackendOptions.hpp>
12 #include <armnn/Descriptors.hpp>
13 #include <armnn/Exceptions.hpp>
14 #include <armnn/Logging.hpp>
15 #include <armnn/Tensor.hpp>
17 #include <armnn/TypesUtils.hpp>
18 #include <armnn/utility/Assert.hpp>
21 #include <armnn/LayerSupport.hpp>
22 
23 // armnnUtils:
24 #include <armnnUtils/Permute.hpp>
26 
27 #include <ParserHelper.hpp>
28 #include <VerificationHelpers.hpp>
29 
30 // The generated code based on the Tf Lite schema:
31 #include <schema_generated.h>
32 
33 #include <flatbuffers/flexbuffers.h>
34 
35 #include <fmt/format.h>
36 
37 #include <algorithm>
38 #include <iostream>
39 #include <limits>
40 #include <numeric>
41 
42 #define ARMNN_THROW_PARSE_EXCEPTION(msg) \
43  { \
44  throw armnn::ParseException( static_cast<const std::stringstream&>( std::stringstream() << msg \
45  << ": " \
46  << CHECK_LOCATION().AsString()).str()); \
47  }
48 
49 using namespace armnn;
51 namespace armnnTfLiteParser
52 {
53 
54 ITfLiteParser::ITfLiteParser(const armnn::Optional<TfLiteParserOptions>& options) :
55  pTfLiteParserImpl(new TfLiteParserImpl(options)) {}
56 
57 ITfLiteParser::~ITfLiteParser() = default;
58 
59 ITfLiteParser* ITfLiteParser::CreateRaw(const armnn::Optional<TfLiteParserOptions>& options)
60 {
61  return new ITfLiteParser(options);
62 }
63 
64 ITfLiteParserPtr ITfLiteParser::Create(const armnn::Optional<TfLiteParserOptions>& options)
65 {
66  return ITfLiteParserPtr(CreateRaw(options), &ITfLiteParser::Destroy);
67 }
68 
69 void ITfLiteParser::Destroy(ITfLiteParser* parser)
70 {
71  delete parser;
72 }
73 
74 armnn::INetworkPtr ITfLiteParser::CreateNetworkFromBinaryFile(const char* graphFile)
75 {
76  return pTfLiteParserImpl->CreateNetworkFromBinaryFile(graphFile);
77 }
78 
79 armnn::INetworkPtr ITfLiteParser::CreateNetworkFromBinary(const std::vector<uint8_t>& binaryContent)
80 {
81  return pTfLiteParserImpl->CreateNetworkFromBinary(binaryContent);
82 }
83 
84 BindingPointInfo ITfLiteParser::GetNetworkInputBindingInfo(size_t subgraphId,
85  const std::string& name) const
86 {
87  return pTfLiteParserImpl->GetNetworkInputBindingInfo(subgraphId, name);
88 }
89 
90 BindingPointInfo ITfLiteParser::GetNetworkOutputBindingInfo(size_t subgraphId,
91  const std::string& name) const
92 {
93  return pTfLiteParserImpl->GetNetworkOutputBindingInfo(subgraphId, name);
94 }
95 
96 size_t ITfLiteParser::GetSubgraphCount() const
97 {
98  return pTfLiteParserImpl->GetSubgraphCount();
99 }
100 
101 std::vector<std::string> ITfLiteParser::GetSubgraphInputTensorNames(size_t subgraphId) const
102 {
103  return pTfLiteParserImpl->GetSubgraphInputTensorNames(subgraphId);
104 }
105 
106 std::vector<std::string> ITfLiteParser::GetSubgraphOutputTensorNames(size_t subgraphId) const
107 {
108  return pTfLiteParserImpl->GetSubgraphOutputTensorNames(subgraphId);
109 }
110 
111 namespace
112 {
113 
114 const uint32_t VIRTUAL_OPERATOR_ID = std::numeric_limits<uint32_t>::max();
115 
116 void CheckSubgraph(const TfLiteParserImpl::ModelPtr& model,
117  size_t subgraphIndex,
118  const CheckLocation& location)
119 {
120  if (model.get() == nullptr)
121  {
122  throw ParseException(
123  fmt::format("{} was called with invalid (null) model. "
124  "Possible reason is that the model is not yet loaded and Unpack(ed). "
125  "subgraph:{} at {}",
126  location.m_Function,
127  subgraphIndex,
128  location.FileLine()));
129  }
130  else if (subgraphIndex >= model->subgraphs.size())
131  {
132  throw ParseException(
133  fmt::format("{} was called with an invalid subgraph index. "
134  "subgraph:{} at {}",
135  location.m_Function,
136  subgraphIndex,
137  location.FileLine()));
138  }
139 }
140 
141 #define CHECK_SUBGRAPH(MODEL, SUBGRAPH_INDEX) \
142  CheckSubgraph(MODEL, SUBGRAPH_INDEX, CHECK_LOCATION())
143 
144 void CheckModel(const TfLiteParserImpl::ModelPtr& model,
145  size_t subgraphIndex,
146  size_t operatorIndex,
147  const CheckLocation& location)
148 {
149  if (model.get() == nullptr)
150  {
151  throw ParseException(
152  fmt::format("{} was called with invalid (null) model. "
153  "Possible reason is that the model is not yet loaded and Unpack(ed). "
154  "subgraph:{} operator:{} at {}",
155  location.m_Function,
156  subgraphIndex,
157  operatorIndex,
158  location.FileLine()));
159  }
160  else if (subgraphIndex >= model->subgraphs.size())
161  {
162  throw ParseException(
163  fmt::format("{} was called with an invalid subgraph index. "
164  "subgraph:{} operator:{} at {}",
165  location.m_Function,
166  subgraphIndex,
167  operatorIndex,
168  location.FileLine()));
169  }
170  else if (operatorIndex >= model->subgraphs[subgraphIndex]->operators.size() &&
171  operatorIndex != VIRTUAL_OPERATOR_ID)
172  {
173  throw ParseException(
174  fmt::format("{} was called with an invalid operator index. "
175  "subgraph:{} operator:{} at {}",
176  location.m_Function,
177  subgraphIndex,
178  operatorIndex,
179  location.FileLine()));
180  }
181 }
182 
183 #define CHECK_MODEL(MODEL, SUBGRAPH_INDEX, OPERATOR_INDEX) \
184  CheckModel(MODEL, SUBGRAPH_INDEX, OPERATOR_INDEX, CHECK_LOCATION())
185 
186 void CheckTensor(const TfLiteParserImpl::ModelPtr& model,
187  size_t subgraphIndex,
188  size_t tensorIndex,
189  const CheckLocation& location)
190 {
191  // not checking model, because I assume CHECK_MODEL already run
192  // and checked that. An assert would do.
193  ARMNN_ASSERT_MSG(model.get() != nullptr, "Expecting a valid model in this function");
194 
195  // also subgraph index should be checked by CHECK_MODEL so
196  // I only add an assert here
197  ARMNN_ASSERT_MSG(subgraphIndex < model->subgraphs.size(), "Expecting a valid subgraph index");
198 
199  // the tensor index is the only one to check here
200  if (tensorIndex >= model->subgraphs[subgraphIndex]->tensors.size())
201  {
202  throw ParseException(
203  fmt::format("{} was called with an invalid tensor index. "
204  "subgraph:{} tensor:{} at {}",
205  location.m_Function,
206  subgraphIndex,
207  tensorIndex,
208  location.FileLine()));
209  }
210 }
211 
212 #define CHECK_TENSOR(MODEL, SUBGRAPH_INDEX, TENSOR_INDEX) \
213  CheckTensor(MODEL, SUBGRAPH_INDEX, TENSOR_INDEX, CHECK_LOCATION())
214 
215 void CheckTensorPtr(TfLiteParserImpl::TensorRawPtr rawPtr,
216  const CheckLocation& location)
217 {
218  if (rawPtr == nullptr)
219  {
220  throw ParseException(
221  fmt::format("{} was called with a null tensor pointer at {}", location.m_Function, location.FileLine()));
222  }
223 }
224 
225 #define CHECK_TENSOR_PTR(TENSOR_PTR) \
226  CheckTensorPtr(TENSOR_PTR, CHECK_LOCATION())
227 
228 void CheckBuffer(const TfLiteParserImpl::ModelPtr& model,
229  size_t bufferIndex,
230  const CheckLocation& location)
231 {
232  if (model.get() == nullptr)
233  {
234  throw ParseException(
235  fmt::format("{} was called with invalid (null) model. "
236  "Possible reason is that the model is not yet loaded and Unpack(ed). "
237  "buffer:{} at {}",
238  location.m_Function,
239  bufferIndex,
240  location.FileLine()));
241  }
242  else if (bufferIndex >= model->buffers.size())
243  {
244  throw ParseException(
245  fmt::format("{} was called with an invalid buffer index. "
246  "buffer index:{} at {}",
247  location.m_Function,
248  bufferIndex,
249  location.FileLine()));
250  }
251  else if (model->buffers[bufferIndex].get() == nullptr)
252  {
253  throw ParseException(
254  fmt::format("The buffer #{} is null. {}",
255  bufferIndex,
256  location.AsString()));
257  }
258 }
259 
260 #define CHECK_BUFFER(MODEL, BUFFER_INDEX) \
261  CheckBuffer(MODEL, BUFFER_INDEX, CHECK_LOCATION())
262 
263 void CheckBufferSize(TfLiteParserImpl::BufferRawPtr bufferPtr,
264  const armnn::TensorInfo& tensorInfo,
265  uint32_t bufferId,
266  const CheckLocation& location)
267 {
268  if (bufferPtr == nullptr)
269  {
270  throw ParseException(
271  fmt::format("BufferPtr is null for buffer:{}. {}",
272  bufferId,
273  location.AsString()));
274  }
275  else if(tensorInfo.GetNumElements() > bufferPtr->data.size() ||
276  tensorInfo.GetNumBytes() > bufferPtr->data.size())
277  {
278  std::stringstream ss;
279  ss << "Buffer #" << bufferId << " has " << bufferPtr->data.size() << " bytes. "
280  << "For tensor: " << tensorInfo.GetShape()
281  << " expecting: " << tensorInfo.GetNumBytes() << " bytes and "
282  << tensorInfo.GetNumElements() << " elements. " << location.AsString();
283  throw ParseException(ss.str());
284  }
285 }
286 
287 
288 tflite::BuiltinOperator GetOpCode(const TfLiteParserImpl::ModelPtr& model, size_t subgraphIndex, size_t operatorIndex)
289 {
290  const auto& operatorPtr = model->subgraphs[subgraphIndex]->operators[operatorIndex];
291  auto opcodeIndex = operatorPtr->opcode_index;
292 
293 // work around the introduction of the deprecated_builtin_code introduced in 2.4 in a backwards compatible manner
294 #if defined(ARMNN_POST_TFLITE_2_3)
295  auto opcode = std::max(model->operator_codes[opcodeIndex]->builtin_code,
296  static_cast<tflite::BuiltinOperator>(model->operator_codes[opcodeIndex]->deprecated_builtin_code));
297 #else
298  auto opcode = model->operator_codes[opcodeIndex]->builtin_code;
299 #endif
300  return opcode;
301 }
302 
303 std::vector<unsigned int> GetUIntBuffer(armnn::TensorInfo info,
304  const TfLiteParserImpl::ModelPtr& model,
305  size_t bufferIndex)
306 {
307  TfLiteParserImpl::BufferRawPtr bufferPtr = TfLiteParserImpl::GetBuffer(model, bufferIndex);
308  std::vector<unsigned int> buffer(info.GetNumElements());
309 
310  if (info.GetDataType() == DataType::Signed32)
311  {
312  ::memcpy(buffer.data(), bufferPtr->data.data(), bufferPtr->data.size());
313  }
314  else if (info.GetDataType() == DataType::Signed64)
315  {
316  std::vector<uint64_t> uint64Buffer(info.GetNumElements());
317  ::memcpy(uint64Buffer.data(), bufferPtr->data.data(), bufferPtr->data.size());
318  buffer.assign(std::begin(uint64Buffer), std::end(uint64Buffer));
319  }
320  else
321  {
322  CheckLocation location = CHECK_LOCATION();
323  throw ParseException(
324  fmt::format("Unsupported data type for uint buffer {}, only Signed 32 or Signed 64 are supported. {}",
325  GetDataTypeName(info.GetDataType()),
326  location.AsString()));
327  }
328  return buffer;
329 }
330 
331 #define CHECK_BUFFER_SIZE(BUFFER_PTR, TENSOR_INFO, BUFFER_ID) \
332  CheckBufferSize(BUFFER_PTR, TENSOR_INFO, BUFFER_ID, CHECK_LOCATION())
333 
334 bool IsActivationSupported(tflite::ActivationFunctionType activationType)
335 {
336  switch(activationType)
337  {
338  case tflite::ActivationFunctionType_NONE:
339  case tflite::ActivationFunctionType_RELU:
340  case tflite::ActivationFunctionType_RELU6:
341  case tflite::ActivationFunctionType_TANH:
342  {
343  return true;
344  }
345  default:
346  {
347  return false;
348  }
349  }
350 }
351 
352 #define CHECK_SUPPORTED_FUSED_ACTIVATION(OPTION, SUBGRAPH_INDEX, OPERATOR_INDEX) \
353  do { \
354  if (IsActivationSupported(OPTION->fused_activation_function) == false) \
355  { \
356  throw ParseException( \
357  fmt::format("TfLite parser doesn't support fused activation: " \
358  "{}/{} in {} subgraph:{} operator:{} at {}", \
359  OPTION->fused_activation_function, \
360  tflite::EnumNameActivationFunctionType(\
361  OPTION->fused_activation_function), \
362  __func__, \
363  SUBGRAPH_INDEX, \
364  OPERATOR_INDEX, \
365  CHECK_LOCATION().FileLine())); \
366  } \
367  } while(false)
368 
369 
370 std::vector<unsigned int> AsUnsignedVector(const std::vector<int32_t>& in)
371 {
372  std::vector<unsigned int> result;
373  result.reserve(in.size());
374  for (auto& i : in)
375  {
376  // If the location of the input data is -1 then the input should be ignored.
377  if (i == -1)
378  {
379  continue;
380  }
381  result.push_back(CHECKED_NON_NEGATIVE(i));
382  }
383  return result;
384 }
385 
386 bool IsOptionalOperandPresent(int input)
387 {
388  return (input >= 0);
389 }
390 
391 void CalcPadding(uint32_t inputSize,
392  uint32_t filterSize,
393  uint32_t stride,
394  uint32_t dilation,
395  uint32_t& paddingFront,
396  uint32_t& paddingBack,
397  tflite::Padding padding)
398 {
399  paddingFront = 0;
400  paddingBack = 0;
401  if (padding == tflite::Padding_SAME)
402  {
403  uint32_t outputSize = (inputSize + stride - 1) / stride;
404  uint32_t dilatedSize = filterSize + (dilation - 1) * (filterSize - 1);
405  uint32_t temp = (outputSize - 1) * stride + dilatedSize;
406  if (temp > inputSize)
407  {
408  paddingFront = (temp - inputSize) / 2;
409  paddingBack = (temp - inputSize) - paddingFront;
410  }
411  }
412 }
413 
414 // Function that calculates explicit padding when the output shape is known.
415 // At the moment the output is only given as an input parameter in Transpose Convolution,
416 // not in Convolution and Depthwise Convolution
417 void CalcPadding(uint32_t inputSize,
418  uint32_t filterSize,
419  uint32_t stride,
420  uint32_t dilation,
421  uint32_t& paddingFront,
422  uint32_t& paddingBack,
423  tflite::Padding padding,
424  uint32_t outputSize)
425 {
426  IgnoreUnused(dilation);
427  paddingFront = 0;
428  paddingBack = 0;
429  if (padding == tflite::Padding_SAME)
430  {
431  uint32_t totalPadding = (inputSize - 1) * stride + filterSize - outputSize;
432  paddingFront = totalPadding / 2;
433  paddingBack = totalPadding - paddingFront;
434  }
435 }
436 
438  const std::vector<unsigned int>& shape,
439  const bool outputTensor = false)
440 {
441  armnn::DataType type;
442  CHECK_TENSOR_PTR(tensorPtr);
443 
444  switch (tensorPtr->type)
445  {
446  case tflite::TensorType_UINT8:
448  break;
449  case tflite::TensorType_FLOAT32:
451  break;
452  case tflite::TensorType_FLOAT16:
454  break;
455  case tflite::TensorType_INT8:
456  if (tensorPtr->quantization->zero_point.size() == 1)
457  {
458  // Per-tensor
460  }
461  else
462  {
463  // Per-channel
465  }
466  break;
467  case tflite::TensorType_INT16:
469  break;
470  case tflite::TensorType_INT32:
472  break;
473  case tflite::TensorType_INT64:
475  break;
476  case tflite::TensorType_BOOL:
478  break;
479  default:
480  {
481  CheckLocation location = CHECK_LOCATION();
482  throw ParseException(
483  fmt::format("Unsupported data type {} = {} for tensor: {}. {}",
484  tensorPtr->type,
485  tflite::EnumNameTensorType(tensorPtr->type),
486  tensorPtr->name,
487  location.AsString()));
488  }
489  }
490  TensorShape tensorShape;
491 
492  std::vector<unsigned int> safeShape = shape;
493  if (shape.size() == 0)
494  {
495  safeShape.push_back(1);
496  }
497 
498  if (!outputTensor)
499  {
500  tensorShape = TensorShape(armnn::numeric_cast<unsigned int>(safeShape.size()), safeShape.data());
501  }
502  else
503  {
504  size_t shapeSignatureSize = tensorPtr->shape_signature.size();
505 
506  // If a shape signature exists we will use that to infer dynamic tensors
507  if (shapeSignatureSize != 0)
508  {
509  // If the shape is incompatible with the shape signature override the shape
510  if (shapeSignatureSize != shape.size())
511  {
512  safeShape = {};
513 
514  for (unsigned int i = 0; i < shapeSignatureSize; ++i)
515  {
516  unsigned int dim = tensorPtr->shape_signature[i] > -1 ?
517  static_cast<unsigned int>(tensorPtr->shape_signature[i]) : 0;
518  safeShape.push_back(dim);
519  }
520  }
521 
522  std::unique_ptr<bool[]> dimMask = std::make_unique<bool[]>(tensorPtr->shape_signature.size());
523  bool batchOnly = true;
524  for (unsigned int i = 0; i < tensorPtr->shape_signature.size(); ++i)
525  {
526  dimMask[i] = tensorPtr->shape_signature[i] != -1;
527 
528  if (i > 0 && !dimMask[i])
529  {
530  batchOnly = false;
531  }
532  }
533  if (batchOnly)
534  {
535  dimMask[0] = true;
536  }
537  tensorShape = TensorShape(static_cast<unsigned int>(safeShape.size()), safeShape.data(), dimMask.get());
538  }
539  // If there is no shape signature treat the tensor as dynamic if the shape has a size of zero
540  else if (shape.size() == 0)
541  {
542  tensorShape = TensorShape(1, false);
543  }
544  else
545  {
546  tensorShape = TensorShape(armnn::numeric_cast<unsigned int>(shape.size()), shape.data());
547  }
548  }
549 
550  float quantizationScale = 1.0f;
551  int32_t quantizationOffset = 0;
552 
553  if (tensorPtr->quantization.get())
554  {
555  if (tensorPtr->quantization->scale.size() <= 1)
556  {
557  CHECK_VALID_SIZE(tensorPtr->quantization->zero_point.size(), 0, 1);
558  CHECK_VALID_SIZE(tensorPtr->quantization->zero_point.size(), 0, 1);
559 
560  if (tensorPtr->quantization->scale.size() == 1)
561  {
562  quantizationScale = tensorPtr->quantization->scale[0];
563  }
564  if (tensorPtr->quantization->zero_point.size() == 1)
565  {
566  // NOTE: we lose precision here when converting from 64 bit to 32
567  // but this is what we support at the moment in ArmNN
568  quantizationOffset = armnn::numeric_cast<int32_t>(tensorPtr->quantization->zero_point[0]);
569  }
570 
571  armnn::TensorInfo result(tensorShape,
572  type,
573  quantizationScale,
574  quantizationOffset);
575  return result;
576  }
577  else
578  {
579  std::vector<float> quantizationScales;
580  std::vector<int32_t> quantizationOffsets;
581 
582  // Scale
583  std::copy(tensorPtr->quantization->scale.begin(),
584  tensorPtr->quantization->scale.end(),
585  std::back_inserter(quantizationScales));
586 
587  // QSymmS8 Per-axis
588  armnn::TensorInfo result(tensorShape,
589  type,
590  quantizationScales,
591  armnn::numeric_cast<unsigned int>(tensorPtr->quantization->quantized_dimension));
592  return result;
593  }
594  }
595  else
596  {
597  armnn::TensorInfo result(tensorShape,
598  type,
599  quantizationScale,
600  quantizationOffset);
601  return result;
602  }
603 }
604 
606  const bool outputTensor = false)
607 {
608  auto const& dimensions = AsUnsignedVector(tensorPtr->shape);
609  return ToTensorInfo(tensorPtr, dimensions, outputTensor);
610 }
611 
612 template<typename T>
613 std::pair<armnn::ConstTensor, std::unique_ptr<T[]>>
614 CreateConstTensorImpl(TfLiteParserImpl::BufferRawPtr bufferPtr,
616  armnn::TensorInfo& tensorInfo,
618 {
619  IgnoreUnused(tensorPtr);
620  ARMNN_ASSERT_MSG(tensorPtr != nullptr, "tensorPtr is null");
621  ARMNN_ASSERT_MSG(bufferPtr != nullptr,
622  fmt::format("Buffer for buffer:{} is null", tensorPtr->buffer).c_str());
623 
624  std::unique_ptr<T[]> data(new T[tensorInfo.GetNumElements()]);
625 
626  if (permutationVector.has_value() && permutationVector.value().GetSize() > 0)
627  {
628  tensorInfo = armnnUtils::Permuted(tensorInfo, permutationVector.value());
629  armnnUtils::Permute(tensorInfo.GetShape(), permutationVector.value(),
630  reinterpret_cast<const T*>(bufferPtr->data.data()), data.get(), sizeof(T));
631  }
632  else
633  {
634  ::memcpy(data.get(), bufferPtr->data.data(), tensorInfo.GetNumBytes());
635  }
636 
637  // Make sure isConstant flag is set.
638  tensorInfo.SetConstant();
639 
640  return std::make_pair(ConstTensor(tensorInfo, data.get()), std::move(data));
641 }
642 
643 armnn::LayerBindingId GenerateLayerBindingId(size_t subgraphIndex, size_t tensorIndex)
644 {
645  // generate the binding id by shifting the tensor id by 8 bit
646  // and add the subgraph id, which allows 256 subgraphs
647  return static_cast<armnn::LayerBindingId>((tensorIndex<<8)+subgraphIndex);
648 }
649 
650 bool CheckShape(const armnn::TensorShape& actual, const std::vector<int32_t>& expected)
651 {
652  const unsigned int actualSize = actual.GetNumDimensions();
653  if (actualSize != expected.size())
654  {
655  return false;
656  }
657 
658  for (unsigned int i = 0u; i < actualSize; i++)
659  {
660  if (expected[i] < 0 ||
661  actual[i] != static_cast<unsigned int>(expected[i]))
662  {
663  return false;
664  }
665  }
666 
667  return true;
668 }
669 
670 bool CheckShape(const armnn::TensorShape& actual, const armnn::TensorShape& expected)
671 {
672  std::vector<int32_t> expectedVec;
673  for (uint32_t i = 0; i < expected.GetNumDimensions(); i++)
674  {
675  expectedVec.push_back(expected[i]);
676  }
677  return CheckShape(actual, expectedVec);
678 }
679 
680 void CheckMatchingQuantization(const TensorInfo& first,
681  const TensorInfo& second,
682  const std::string& descName,
683  std::string const& firstName,
684  std::string const& secondName)
685 {
686  if (!first.IsQuantized() ||
687  !second.IsQuantized())
688  {
689  // Not a quantized type, ignore the validation
690  return;
691  }
692 
693  DataType firstDataType = first.GetDataType();
694  DataType secondDataType = second.GetDataType();
695 
696  if (firstDataType != secondDataType)
697  {
698  throw InvalidArgumentException(descName + ": " + firstName + " and " + secondName +
699  " must be of the same quantized type, " +
700  firstName + " is " + GetDataTypeName(firstDataType) + ", " +
701  secondName + " is " + GetDataTypeName(secondDataType));
702  }
703 
704  if (!first.IsTypeSpaceMatch(second))
705  {
706  throw InvalidArgumentException(descName + ": " + firstName + " and " + secondName +
707  " must have the same quantization space, " +
708  firstName + " has offset " + std::to_string(first.GetQuantizationOffset()) +
709  " and scale " + std::to_string(first.GetQuantizationScale()) + ", " +
710  secondName + " has offset " + std::to_string(second.GetQuantizationOffset()) +
711  " and scale " + std::to_string(second.GetQuantizationScale()));
712  }
713 }
714 
715 bool IsDynamic(TfLiteParserImpl::TensorRawPtr tensorPtr)
716 {
717  auto shape = tensorPtr->shape;
718 
719  if (shape.empty())
720  {
721  return true;
722  }
723  auto shapeSig = tensorPtr->shape_signature;
724 
725  if (shapeSig.empty())
726  {
727  return false;
728  }
729 
730  for (unsigned int i = 0; i < shapeSig.size() ; ++i)
731  {
732  if (shapeSig[i] == -1)
733  {
734  return true;
735  }
736  }
737  return false;
738 }
739 
740 } // <anonymous>
741 
742 TfLiteParserImpl::TfLiteParserImpl(const Optional<ITfLiteParser::TfLiteParserOptions>& options)
743 : m_Options(options)
744 , m_Network(nullptr, nullptr)
745 , m_ParserFunctions(tflite::BuiltinOperator_MAX+1, &TfLiteParserImpl::ParseUnsupportedOperator)
746 {
747  // register supported operators
748  m_ParserFunctions[tflite::BuiltinOperator_ABS] = &TfLiteParserImpl::ParseAbs;
749  m_ParserFunctions[tflite::BuiltinOperator_ADD] = &TfLiteParserImpl::ParseAdd;
750  m_ParserFunctions[tflite::BuiltinOperator_ARG_MIN] = &TfLiteParserImpl::ParseArgMin;
751  m_ParserFunctions[tflite::BuiltinOperator_ARG_MAX] = &TfLiteParserImpl::ParseArgMax;
752  m_ParserFunctions[tflite::BuiltinOperator_AVERAGE_POOL_2D] = &TfLiteParserImpl::ParseAveragePool2D;
753  m_ParserFunctions[tflite::BuiltinOperator_BATCH_TO_SPACE_ND] = &TfLiteParserImpl::ParseBatchToSpaceND;
754  m_ParserFunctions[tflite::BuiltinOperator_BATCH_MATMUL] = &TfLiteParserImpl::ParseBatchMatMul;
755  m_ParserFunctions[tflite::BuiltinOperator_CEIL] = &TfLiteParserImpl::ParseCeil;
756  m_ParserFunctions[tflite::BuiltinOperator_CAST] = &TfLiteParserImpl::ParseCast;
757  m_ParserFunctions[tflite::BuiltinOperator_CONCATENATION] = &TfLiteParserImpl::ParseConcatenation;
758  m_ParserFunctions[tflite::BuiltinOperator_CONV_2D] = &TfLiteParserImpl::ParseConv2D;
759  // Conv3D support was added in TF 2.5, so for backwards compatibility a hash define is needed.
760  #if defined(ARMNN_POST_TFLITE_2_4)
761  m_ParserFunctions[tflite::BuiltinOperator_CONV_3D] = &TfLiteParserImpl::ParseConv3D;
762  #endif
763  m_ParserFunctions[tflite::BuiltinOperator_CUSTOM] = &TfLiteParserImpl::ParseCustomOperator;
764  m_ParserFunctions[tflite::BuiltinOperator_DEPTH_TO_SPACE] = &TfLiteParserImpl::ParseDepthToSpace;
765  m_ParserFunctions[tflite::BuiltinOperator_DEPTHWISE_CONV_2D] = &TfLiteParserImpl::ParseDepthwiseConv2D;
766  m_ParserFunctions[tflite::BuiltinOperator_DEQUANTIZE] = &TfLiteParserImpl::ParseDequantize;
767  m_ParserFunctions[tflite::BuiltinOperator_DIV] = &TfLiteParserImpl::ParseDiv;
768  m_ParserFunctions[tflite::BuiltinOperator_ELU] = &TfLiteParserImpl::ParseElu;
769  m_ParserFunctions[tflite::BuiltinOperator_EQUAL] = &TfLiteParserImpl::ParseEqual;
770  m_ParserFunctions[tflite::BuiltinOperator_EXP] = &TfLiteParserImpl::ParseExp;
771  m_ParserFunctions[tflite::BuiltinOperator_EXPAND_DIMS] = &TfLiteParserImpl::ParseExpandDims;
772  m_ParserFunctions[tflite::BuiltinOperator_FLOOR_DIV] = &TfLiteParserImpl::ParseFloorDiv;
773  m_ParserFunctions[tflite::BuiltinOperator_FULLY_CONNECTED] = &TfLiteParserImpl::ParseFullyConnected;
774  m_ParserFunctions[tflite::BuiltinOperator_GATHER] = &TfLiteParserImpl::ParseGather;
775  m_ParserFunctions[tflite::BuiltinOperator_GATHER_ND] = &TfLiteParserImpl::ParseGatherNd;
776  m_ParserFunctions[tflite::BuiltinOperator_GREATER] = &TfLiteParserImpl::ParseGreater;
777  m_ParserFunctions[tflite::BuiltinOperator_GREATER_EQUAL] = &TfLiteParserImpl::ParseGreaterOrEqual;
778  m_ParserFunctions[tflite::BuiltinOperator_HARD_SWISH] = &TfLiteParserImpl::ParseHardSwish;
779  m_ParserFunctions[tflite::BuiltinOperator_LEAKY_RELU] = &TfLiteParserImpl::ParseLeakyRelu;
780  m_ParserFunctions[tflite::BuiltinOperator_LESS] = &TfLiteParserImpl::ParseLess;
781  m_ParserFunctions[tflite::BuiltinOperator_LESS_EQUAL] = &TfLiteParserImpl::ParseLessOrEqual;
782  m_ParserFunctions[tflite::BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION]
783  = &TfLiteParserImpl::ParseLocalResponseNormalization;
784  m_ParserFunctions[tflite::BuiltinOperator_LOG] = &TfLiteParserImpl::ParseLog;
785  m_ParserFunctions[tflite::BuiltinOperator_LOGICAL_NOT] = &TfLiteParserImpl::ParseLogicalNot;
786  m_ParserFunctions[tflite::BuiltinOperator_LOGISTIC] = &TfLiteParserImpl::ParseLogistic;
787  m_ParserFunctions[tflite::BuiltinOperator_LOG_SOFTMAX] = &TfLiteParserImpl::ParseLogSoftmax;
788  m_ParserFunctions[tflite::BuiltinOperator_L2_NORMALIZATION] = &TfLiteParserImpl::ParseL2Normalization;
789  m_ParserFunctions[tflite::BuiltinOperator_MAX_POOL_2D] = &TfLiteParserImpl::ParseMaxPool2D;
790  m_ParserFunctions[tflite::BuiltinOperator_MAXIMUM] = &TfLiteParserImpl::ParseMaximum;
791  m_ParserFunctions[tflite::BuiltinOperator_MEAN] = &TfLiteParserImpl::ParseMean;
792  m_ParserFunctions[tflite::BuiltinOperator_MINIMUM] = &TfLiteParserImpl::ParseMinimum;
793  m_ParserFunctions[tflite::BuiltinOperator_MIRROR_PAD] = &TfLiteParserImpl::ParseMirrorPad;
794  m_ParserFunctions[tflite::BuiltinOperator_MUL] = &TfLiteParserImpl::ParseMul;
795  m_ParserFunctions[tflite::BuiltinOperator_NEG] = &TfLiteParserImpl::ParseNeg;
796  m_ParserFunctions[tflite::BuiltinOperator_NOT_EQUAL] = &TfLiteParserImpl::ParseNotEqual;
797  m_ParserFunctions[tflite::BuiltinOperator_PACK] = &TfLiteParserImpl::ParsePack;
798  m_ParserFunctions[tflite::BuiltinOperator_PAD] = &TfLiteParserImpl::ParsePad;
799  m_ParserFunctions[tflite::BuiltinOperator_PADV2] = &TfLiteParserImpl::ParsePad;
800  m_ParserFunctions[tflite::BuiltinOperator_PRELU] = &TfLiteParserImpl::ParsePrelu;
801  m_ParserFunctions[tflite::BuiltinOperator_QUANTIZE] = &TfLiteParserImpl::ParseQuantize;
802  m_ParserFunctions[tflite::BuiltinOperator_RELU] = &TfLiteParserImpl::ParseRelu;
803  m_ParserFunctions[tflite::BuiltinOperator_RELU6] = &TfLiteParserImpl::ParseRelu6;
804  m_ParserFunctions[tflite::BuiltinOperator_REDUCE_MAX] = &TfLiteParserImpl::ParseReduceMax;
805  m_ParserFunctions[tflite::BuiltinOperator_REDUCE_MIN] = &TfLiteParserImpl::ParseReduceMin;
806  m_ParserFunctions[tflite::BuiltinOperator_REDUCE_PROD] = &TfLiteParserImpl::ParseReduceProd;
807  m_ParserFunctions[tflite::BuiltinOperator_RESHAPE] = &TfLiteParserImpl::ParseReshape;
808  m_ParserFunctions[tflite::BuiltinOperator_RESIZE_BILINEAR] = &TfLiteParserImpl::ParseResizeBilinear;
809  m_ParserFunctions[tflite::BuiltinOperator_RESIZE_NEAREST_NEIGHBOR] = &TfLiteParserImpl::ParseResizeNearestNeighbor;
810  m_ParserFunctions[tflite::BuiltinOperator_RSQRT] = &TfLiteParserImpl::ParseRsqrt;
811  m_ParserFunctions[tflite::BuiltinOperator_SQRT] = &TfLiteParserImpl::ParseSqrt;
812  m_ParserFunctions[tflite::BuiltinOperator_SHAPE] = &TfLiteParserImpl::ParseShape;
813  m_ParserFunctions[tflite::BuiltinOperator_SIN] = &TfLiteParserImpl::ParseSin;
814  m_ParserFunctions[tflite::BuiltinOperator_SLICE] = &TfLiteParserImpl::ParseSlice;
815  m_ParserFunctions[tflite::BuiltinOperator_SOFTMAX] = &TfLiteParserImpl::ParseSoftmax;
816  m_ParserFunctions[tflite::BuiltinOperator_SPACE_TO_BATCH_ND] = &TfLiteParserImpl::ParseSpaceToBatchND;
817  m_ParserFunctions[tflite::BuiltinOperator_SPACE_TO_DEPTH] = &TfLiteParserImpl::ParseSpaceToDepth;
818  m_ParserFunctions[tflite::BuiltinOperator_SPLIT] = &TfLiteParserImpl::ParseSplit;
819  m_ParserFunctions[tflite::BuiltinOperator_SPLIT_V] = &TfLiteParserImpl::ParseSplitV;
820  m_ParserFunctions[tflite::BuiltinOperator_SQUEEZE] = &TfLiteParserImpl::ParseSqueeze;
821  m_ParserFunctions[tflite::BuiltinOperator_STRIDED_SLICE] = &TfLiteParserImpl::ParseStridedSlice;
822  m_ParserFunctions[tflite::BuiltinOperator_SUB] = &TfLiteParserImpl::ParseSub;
823  m_ParserFunctions[tflite::BuiltinOperator_SUM] = &TfLiteParserImpl::ParseSum;
824  m_ParserFunctions[tflite::BuiltinOperator_TANH] = &TfLiteParserImpl::ParseTanH;
825  m_ParserFunctions[tflite::BuiltinOperator_TRANSPOSE] = &TfLiteParserImpl::ParseTranspose;
826  m_ParserFunctions[tflite::BuiltinOperator_TRANSPOSE_CONV] = &TfLiteParserImpl::ParseTransposeConv;
827  m_ParserFunctions[tflite::BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM]
828  = &TfLiteParserImpl::ParseUnidirectionalSequenceLSTM;
829  m_ParserFunctions[tflite::BuiltinOperator_UNPACK] = &TfLiteParserImpl::ParseUnpack;
830 
831  // register supported custom operators
832  m_CustomParserFunctions["TFLite_Detection_PostProcess"] = &TfLiteParserImpl::ParseDetectionPostProcess;
833 }
834 
835 armnn::TensorInfo TfLiteParserImpl::InputTensorInfo(size_t subgraphIndex,
836  size_t operatorIndex,
837  int input)
838 {
839  const auto& subgraphPtr = m_Model->subgraphs[subgraphIndex];
840  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
841 
842  uint32_t inputId = CHECKED_NON_NEGATIVE(operatorPtr->inputs[input]);
843  auto search = armnnTfLiteParser::TfLiteParserImpl::m_TensorInfos.find(inputId);
844 
845  if (search != m_TensorInfos.end())
846  {
847  return m_TensorInfos[inputId];
848  }
849  else
850  {
851  auto tensorInfo = ::armnnTfLiteParser::ToTensorInfo(subgraphPtr->tensors[inputId].get());
852  m_TensorInfos.insert({ inputId, tensorInfo });
853  return tensorInfo;
854  }
855 }
856 
857 armnn::TensorInfo TfLiteParserImpl::OutputTensorInfoFromInputs(size_t subgraphIndex,
858  size_t operatorIndex,
860  int output,
861  std::vector<int> inputs)
862 {
863  const auto& subgraphPtr = m_Model->subgraphs[subgraphIndex];
864  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
865 
866  uint32_t outputId = CHECKED_NON_NEGATIVE(operatorPtr->outputs[output]);
867 
868  auto outputSearch = armnnTfLiteParser::TfLiteParserImpl::m_TensorInfos.find(outputId);
869 
870  if (outputSearch != m_TensorInfos.end())
871  {
872  return m_TensorInfos[outputId];
873  }
874 
875  const auto& outputTensorPtr = subgraphPtr->tensors[outputId].get();
876  TensorInfo tensor = ::armnnTfLiteParser::ToTensorInfo(outputTensorPtr, true);
877 
878  if (IsDynamic(outputTensorPtr))
879  {
880  if (inputs.empty())
881  {
882  for (unsigned int i = 0; i < layer->GetNumInputSlots(); ++i)
883  {
884  inputs.emplace_back(i);
885  }
886  }
887  auto inputTensorIds = GetInputTensorIds(m_Model, subgraphIndex, operatorIndex);
888  std::vector<armnn::TensorShape> inputShapes;
889 
890  for (unsigned int i = 0; i < inputs.size(); ++i)
891  {
892  uint32_t inputId = CHECKED_NON_NEGATIVE(operatorPtr->inputs[inputs[i]]);
893  auto search = armnnTfLiteParser::TfLiteParserImpl::m_TensorInfos.find(inputId);
894 
895  if (search != m_TensorInfos.end())
896  {
897  auto &inputTensorInfo = m_TensorInfos[inputId];
898  inputShapes.push_back(inputTensorInfo.GetShape());
899  }
900  else
901  {
902  m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
903  auto inputTensorInfo = ::armnnTfLiteParser::ToTensorInfo(subgraphPtr->tensors[inputId].get());
904  m_TensorInfos.insert({ inputId, inputTensorInfo});
905  inputShapes.push_back(inputTensorInfo.GetShape());
906  }
907  }
908  const auto outputShape = layer->InferOutputShapes(inputShapes)[output];
909  tensor.SetShape(outputShape);
910  }
911  m_TensorInfos.insert({ outputId, tensor});
912  return tensor;
913 }
914 
915 armnn::TensorInfo TfLiteParserImpl::OutputTensorInfoFromShapes(size_t subgraphIndex,
916  size_t operatorIndex,
918  int output,
919  std::vector<armnn::TensorShape> inputShapes)
920 {
921  const auto& subgraphPtr = m_Model->subgraphs[subgraphIndex];
922  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
923 
924  uint32_t outputId = CHECKED_NON_NEGATIVE(operatorPtr->outputs[output]);
925  const auto& outputTensorPtr = subgraphPtr->tensors[outputId].get();
926  TensorInfo tensor = ::armnnTfLiteParser::ToTensorInfo(outputTensorPtr, true);
927 
928  if (IsDynamic(outputTensorPtr))
929  {
930  const auto outputShape = layer->InferOutputShapes(inputShapes)[output];
931  tensor.SetShape(outputShape);
932  }
933  m_TensorInfos.insert({ outputId, tensor});
934  return tensor;
935 }
936 
937 void TfLiteParserImpl::ResetParser()
938 {
939  m_Network = armnn::INetworkPtr(nullptr, nullptr);
940  m_Model = nullptr;
941  m_SubgraphConnections.clear();
942  m_OverriddenOutputShapes.clear();
943  m_ConstantsToDequantize.clear();
944  m_ConstantsToBeCreated.clear();
945  m_TensorInfos.clear();
946 }
947 
949 {
950  ResetParser();
951  m_Model = LoadModelFromFile(graphFile);
952  return CreateNetworkFromModel();
953 }
954 
955 INetworkPtr TfLiteParserImpl::CreateNetworkFromBinary(const std::vector<uint8_t>& binaryContent)
956 {
957  ResetParser();
958  m_Model = LoadModelFromBinary(binaryContent.data(), binaryContent.size());
959  return CreateNetworkFromModel();
960 }
961 
962 
963 armnn::INetworkPtr TfLiteParserImpl::LoadModel(std::unique_ptr<tflite::ModelT> model)
964 {
965  ResetParser();
966  m_Model = std::move(model);
967 
968  return CreateNetworkFromModel();
969 }
970 
971 INetworkPtr TfLiteParserImpl::CreateNetworkFromModel()
972 {
973 
974  using NetworkOptions = std::vector<BackendOptions>;
975  NetworkOptions networkOptions = {};
976  if (m_Options)
977  {
978  if (m_Options.value().m_InferAndValidate)
979  {
980  BackendOptions shapeInferenceMethodOption("ShapeInferenceMethod",
981  {
982  { "InferAndValidate", true }
983  });
984 
985  networkOptions.push_back(shapeInferenceMethodOption);
986  }
987  if (m_Options.value().m_AllowExpandedDims)
988  {
989  BackendOptions shapeInferenceMethodOption("AllowExpandedDims",
990  {
991  { "AllowExpandedDims", true }
992  });
993 
994  networkOptions.push_back(shapeInferenceMethodOption);
995  }
996  }
997  m_Network = INetwork::Create(networkOptions);
998  ARMNN_ASSERT(m_Model.get() != nullptr);
999 
1000  if (m_Model->subgraphs.size() != 1)
1001  {
1002  throw ParseException(
1003  fmt::format("Current TfLite parser only supports 1 subgraph. Current one has: {} {}",
1004  m_Model->subgraphs.size(),
1005  CHECK_LOCATION().AsString()));
1006  }
1007 
1008  size_t subgraphIndex = 0;
1009  size_t operatorIndex = 0;
1010  try
1011  {
1012  for (SubgraphPtr const& subgraph : m_Model->subgraphs)
1013  {
1014  SetupInputLayerTensorInfos(subgraphIndex);
1015  SetupConstantLayerTensorInfos(subgraphIndex);
1016 
1017  m_SubgraphConnections.emplace_back(subgraph->tensors.size());
1018  for (OperatorPtr const& op : subgraph->operators)
1019  {
1020  auto const& opCodePtr = m_Model->operator_codes[op->opcode_index];
1021 
1022 // work around the introduction of the deprecated_builtin_code introduced in 2.4 in a backwards compatible manner
1023 #if defined(ARMNN_POST_TFLITE_2_3)
1024  auto builtinCode = std::max(opCodePtr->builtin_code,
1025  static_cast<tflite::BuiltinOperator>(opCodePtr->deprecated_builtin_code));
1026 #else
1027  auto builtinCode = opCodePtr->builtin_code;
1028 #endif
1029 
1030  if (builtinCode > tflite::BuiltinOperator_MAX)
1031  {
1032  throw ParseException(fmt::format("Operator code {} is out of range 0-{}. "
1033  "subgraph:{} operator idx:{}. {}",
1034  builtinCode, tflite::BuiltinOperator_MAX, subgraphIndex,
1035  operatorIndex, CHECK_LOCATION().AsString()));
1036  }
1037 
1038  // lookup and call the parser function
1039  auto& parserFunction = m_ParserFunctions[builtinCode];
1040  (this->*parserFunction)(subgraphIndex, operatorIndex);
1041  ++operatorIndex;
1042  }
1043 
1044  SetupInputLayers(subgraphIndex);
1045  SetupOutputLayers(subgraphIndex);
1046  SetupConstantLayers(subgraphIndex);
1047 
1048  ++subgraphIndex;
1049  operatorIndex = 0;
1050  }
1051  }
1052  catch (const ParseException& e)
1053  {
1054  std::stringstream errorString;
1055  errorString << "Failed to parse operator #" << operatorIndex << " within subgraph #"
1056  << subgraphIndex << " error: " << e.what();
1057  ARMNN_LOG(error) << errorString.str();
1058  std::stringstream errors;
1059  errors << errorString.str() << "\n";
1060  throw ParseException(errors.str());
1061  }
1062 
1063  // establish the connections from the layer outputs to the inputs of the subsequent layers
1064  for (subgraphIndex = 0; subgraphIndex < m_SubgraphConnections.size(); ++subgraphIndex)
1065  {
1066  for (size_t tensorIndex = 0; tensorIndex < m_SubgraphConnections[subgraphIndex].size(); ++tensorIndex)
1067  {
1068  if (m_SubgraphConnections[subgraphIndex][tensorIndex].outputSlot != nullptr)
1069  {
1070  for (size_t inputSlotIdx = 0;
1071  inputSlotIdx < m_SubgraphConnections[subgraphIndex][tensorIndex].inputSlots.size();
1072  ++inputSlotIdx)
1073  {
1074  m_SubgraphConnections[subgraphIndex][tensorIndex].outputSlot->Connect(
1075  *(m_SubgraphConnections[subgraphIndex][tensorIndex].inputSlots[inputSlotIdx]));
1076  }
1077  }
1078  }
1079  }
1080  return std::move(m_Network);
1081 }
1082 
1083 bool TfLiteParserImpl::ShouldConstantTensorBeConverted(TfLiteParserImpl::TensorRawPtr tensorPtr,
1084  armnn::DataType inputDataType,
1085  armnn::DataType tensorDataType)
1086 {
1087  return (TfLiteParserImpl::IsConstTensor(tensorPtr) && inputDataType == DataType::Float32 &&
1088  (tensorDataType == DataType::QAsymmU8 ||
1089  tensorDataType == DataType::QAsymmS8 ||
1090  tensorDataType == DataType::QSymmS8 ||
1091  tensorDataType == DataType::Signed32 ||
1092  tensorDataType == DataType::Signed64));
1093 }
1094 
1095 void TfLiteParserImpl::RegisterProducerOfTensor(size_t subgraphIndex,
1096  size_t tensorIndex,
1097  armnn::IOutputSlot* slot)
1098 {
1099  CHECK_TENSOR(m_Model, subgraphIndex, tensorIndex);
1100  ARMNN_ASSERT(m_SubgraphConnections.size() > subgraphIndex);
1101  ARMNN_ASSERT(m_SubgraphConnections[subgraphIndex].size() > tensorIndex);
1102 
1103  TensorSlots & tensorSlots = m_SubgraphConnections[subgraphIndex][tensorIndex];
1104 
1105  if (slot->GetOwningIConnectableLayer().GetType() != LayerType::Constant)
1106  {
1107 
1108  // assuming there is only one producer for that tensor
1109  if (tensorSlots.outputSlot != nullptr)
1110  {
1111  throw ParseException(fmt::format("Another layer has already registered itself as the producer of "
1112  "subgraph:{} tensor:{} {}",
1113  subgraphIndex,
1114  tensorIndex,
1115  CHECK_LOCATION().AsString()));
1116  }
1117  }
1118  tensorSlots.outputSlot = slot;
1119 }
1120 
1121 void TfLiteParserImpl::RegisterConsumerOfTensor(size_t subgraphIndex,
1122  size_t tensorIndex,
1123  armnn::IInputSlot* slot)
1124 {
1125  CHECK_TENSOR(m_Model, subgraphIndex, tensorIndex);
1126  ARMNN_ASSERT(m_SubgraphConnections.size() > subgraphIndex);
1127  ARMNN_ASSERT(m_SubgraphConnections[subgraphIndex].size() > tensorIndex);
1128 
1129  TensorSlots& tensorSlots = m_SubgraphConnections[subgraphIndex][tensorIndex];
1130  tensorSlots.inputSlots.push_back(slot);
1131 }
1132 
1133 void TfLiteParserImpl::ParseCustomOperator(size_t subgraphIndex, size_t operatorIndex)
1134 {
1135  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1136 
1137  // NOTE: By default we presume the custom operator is not supported
1138  auto customParserFunction = &TfLiteParserImpl::ParseUnsupportedOperator;
1139 
1140  // Identify custom code defined for custom operator
1141  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1142  const auto& customCode = m_Model->operator_codes[operatorPtr->opcode_index]->custom_code;
1143 
1144  // Find parser function that corresponds to custom code (if any)
1145  auto iterator = m_CustomParserFunctions.find(customCode);
1146  if (iterator != m_CustomParserFunctions.end())
1147  {
1148  customParserFunction = iterator->second;
1149  }
1150 
1151  // Run parser function
1152  (this->*customParserFunction)(subgraphIndex, operatorIndex);
1153 }
1154 
1155 void TfLiteParserImpl::ParseUnsupportedOperator(size_t subgraphIndex, size_t operatorIndex)
1156 {
1157  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1158 
1159  const auto & operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1160 
1161  auto opcodeIndex = operatorPtr->opcode_index;
1162 
1163 // work around the introduction of the deprecated_builtin_code introduced in 2.4 in a backwards compatible manner
1164 #if defined(ARMNN_POST_TFLITE_2_3)
1165  auto opcode = std::max(m_Model->operator_codes[opcodeIndex]->builtin_code,
1166  static_cast<tflite::BuiltinOperator>(m_Model->operator_codes[opcodeIndex]->deprecated_builtin_code));
1167 #else
1168  auto opcode = m_Model->operator_codes[opcodeIndex]->builtin_code;
1169 #endif
1170 
1171  if (!m_Options || !m_Options.value().m_StandInLayerForUnsupported)
1172  {
1173  // Do not add StandInLayer, throw ParseException instead
1174  throw ParseException(
1175  fmt::format("Operator not supported. "
1176  "subgraph:{} operator:{} "
1177  "opcode_index:{} opcode:{} / {} {}",
1178  subgraphIndex,
1179  operatorIndex,
1180  opcodeIndex,
1181  opcode,
1182  tflite::EnumNameBuiltinOperator(opcode),
1183  CHECK_LOCATION().AsString()));
1184  }
1185 
1186  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1187  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1188 
1189  const unsigned int numInputs = armnn::numeric_cast<unsigned int>(inputs.size());
1190  const unsigned int numOutputs = armnn::numeric_cast<unsigned int>(outputs.size());
1191 
1192  StandInDescriptor descriptor(numInputs, numOutputs);
1193  auto layerName = fmt::format("StandIn:{}:{}:{}", subgraphIndex, operatorIndex, opcode);
1194 
1195  // Add a non-executable StandInLayer as a placeholder for any unsupported operator
1196  IConnectableLayer* layer = m_Network->AddStandInLayer(descriptor, layerName.c_str());
1197  ARMNN_ASSERT(layer != nullptr);
1198 
1199  for (unsigned int i = 0u; i < numOutputs; ++i)
1200  {
1201  layer->GetOutputSlot(i).SetTensorInfo(ToTensorInfo(outputs[0], true));
1202  }
1203 
1204  auto inputTensorIds = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1205  auto outputTensorIds = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1206 
1207  RegisterInputSlots(subgraphIndex, operatorIndex, layer, inputTensorIds);
1208  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIds);
1209 }
1210 
1211 void TfLiteParserImpl::ParseCast(size_t subgraphIndex, size_t operatorIndex)
1212 {
1213  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1214 
1215  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1216  CHECK_VALID_SIZE(inputs.size(), 1);
1217  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1218  CHECK_VALID_SIZE(outputs.size(), 1);
1219 
1220  auto layerName = fmt::format("Cast:{}:{}", subgraphIndex, operatorIndex);
1221 
1222  IConnectableLayer* layer = m_Network->AddCastLayer(layerName.c_str());
1223  ARMNN_ASSERT(layer != nullptr);
1224 
1225  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
1226  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1227 
1228  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1229  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1230 
1231  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1232  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
1233 }
1234 
1235 void TfLiteParserImpl::ParseConv2D(size_t subgraphIndex, size_t operatorIndex)
1236 {
1237  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1238 
1239  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1240  const auto* options = operatorPtr->builtin_options.AsConv2DOptions();
1241 
1242  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
1243 
1244  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1245  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1246  CHECK_VALID_SIZE(outputs.size(), 1);
1247 
1249  inputs.size() == 3 ?
1250  desc.m_BiasEnabled = true : desc.m_BiasEnabled = false;
1251  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1252  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1254  desc.m_DilationX = CHECKED_NON_NEGATIVE(options->dilation_w_factor);
1255  desc.m_DilationY = CHECKED_NON_NEGATIVE(options->dilation_h_factor);
1256 
1257  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1258  armnn::TensorInfo filterTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
1259 
1260  // assuming input is NHWC
1261  unsigned int inputHeight = inputTensorInfo.GetShape()[1];
1262  unsigned int inputWidth = inputTensorInfo.GetShape()[2];
1263 
1264  // assuming the filter is OHWI : Output, H, W, Input
1265  // which is essentially the same as NHWC
1266  unsigned int filterHeight = filterTensorInfo.GetShape()[1];
1267  unsigned int filterWidth = filterTensorInfo.GetShape()[2];
1268 
1269  CalcPadding(inputHeight, filterHeight, desc.m_StrideY,
1270  desc.m_DilationY, desc.m_PadTop, desc.m_PadBottom, options->padding);
1271  CalcPadding(inputWidth, filterWidth, desc.m_StrideX,
1272  desc.m_DilationX, desc.m_PadLeft, desc.m_PadRight, options->padding);
1273 
1274  // Add the first input and weights tensor to the registration list.
1275  // The constant weights will be added by SetupConstantLayers.
1276  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1277  std::vector<unsigned int> tensorIndexesToRegister = { inputTensorIndexes[0], inputTensorIndexes[1] };
1278 
1279  auto layerName = fmt::format("Conv2D:{}:{}", subgraphIndex, operatorIndex);
1280  armnn::IConnectableLayer* layer = m_Network->AddConvolution2dLayer(desc, layerName.c_str());
1281 
1282  if (ShouldConstantTensorBeConverted(inputs[1], inputTensorInfo.GetDataType(), filterTensorInfo.GetDataType()))
1283  {
1284  m_ConstantsToDequantize.emplace_back(inputs[1]->buffer);
1285  }
1286 
1287  if (desc.m_BiasEnabled)
1288  {
1289  armnn::TensorInfo biasTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
1290 
1291  // Add the biases input to the registration list, a constant layer will be added by SetupConstantLayers.
1292  tensorIndexesToRegister.emplace_back(inputTensorIndexes[2]);
1293 
1294  if (ShouldConstantTensorBeConverted(inputs[2], inputTensorInfo.GetDataType(), biasTensorInfo.GetDataType()))
1295  {
1296  m_ConstantsToDequantize.emplace_back(inputs[2]->buffer);
1297  }
1298  }
1299 
1300  ARMNN_ASSERT(layer != nullptr);
1301 
1302  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
1303  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1304 
1305  // register the input connection slots for the layer, connections are made after all layers have been created
1306  // only the tensors for the inputs are relevant, exclude the const tensors
1307  RegisterInputSlots(subgraphIndex, operatorIndex, layer, tensorIndexesToRegister);
1308 
1309  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
1310  // register the output connection slots for the layer, connections are made after all layers have been created
1311  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1312  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, { outputTensorIndexes[0] });
1313 }
1314 
1315 // Conv3D support was added in TF 2.5, so for backwards compatibility a hash define is needed.
1316 #if defined(ARMNN_POST_TFLITE_2_4)
1317 void TfLiteParserImpl::ParseConv3D(size_t subgraphIndex, size_t operatorIndex)
1318 {
1319  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1320 
1321  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1322  const auto* options = operatorPtr->builtin_options.AsConv3DOptions();
1323 
1324  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
1325 
1327  desc.m_BiasEnabled = false;
1329  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1330  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1331  desc.m_StrideZ = CHECKED_NON_NEGATIVE(options->stride_d);
1332  desc.m_DilationX = CHECKED_NON_NEGATIVE(options->dilation_w_factor);
1333  desc.m_DilationY = CHECKED_NON_NEGATIVE(options->dilation_h_factor);
1334  desc.m_DilationZ = CHECKED_NON_NEGATIVE(options->dilation_d_factor);
1335 
1336  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1337  CHECK_VALID_SIZE(inputs.size(), 2, 3);
1338 
1339  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1340  CHECK_VALID_SIZE(outputs.size(), 1);
1341 
1342  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1343  armnn::TensorInfo filterTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
1344 
1345  // Assuming input is NDHWC
1346  unsigned int inputDepth = inputTensorInfo.GetShape()[1];
1347  unsigned int inputHeight = inputTensorInfo.GetShape()[2];
1348  unsigned int inputWidth = inputTensorInfo.GetShape()[3];
1349 
1350  // Assuming the filter is DHWIO : Depth, Height, Width, OutputChannels, InputChannels
1351  unsigned int filterDepth = filterTensorInfo.GetShape()[0];
1352  unsigned int filterHeight = filterTensorInfo.GetShape()[1];
1353  unsigned int filterWidth = filterTensorInfo.GetShape()[2];
1354 
1355  CalcPadding(inputDepth, filterDepth, desc.m_StrideZ,
1356  desc.m_DilationZ, desc.m_PadFront, desc.m_PadBack, options->padding);
1357  CalcPadding(inputHeight, filterHeight, desc.m_StrideY,
1358  desc.m_DilationY, desc.m_PadTop, desc.m_PadBottom, options->padding);
1359  CalcPadding(inputWidth, filterWidth, desc.m_StrideX,
1360  desc.m_DilationX, desc.m_PadLeft, desc.m_PadRight, options->padding);
1361 
1362  auto filterTensorAndData = CreateConstTensorNonPermuted(inputs[1], filterTensorInfo, inputTensorInfo.GetDataType());
1363 
1364  auto layerName = fmt::format("Conv3D:{}:{}", subgraphIndex, operatorIndex);
1365 
1366  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1367  // Add the first input and weights tensor to the registration list.
1368  // The constant weights will be added by SetupConstantLayers.
1369  std::vector<unsigned int> tensorIndexesToRegister = {inputTensorIndexes[0], inputTensorIndexes[1]};
1370 
1371  if (inputs.size() == 3)
1372  {
1373  desc.m_BiasEnabled = true;
1374 
1375  // Add the biases input to the registration list, a constant layer will be added by SetupConstantLayers.
1376  tensorIndexesToRegister.emplace_back(inputTensorIndexes[2]);
1377  }
1378 
1379  armnn::IConnectableLayer* layer = m_Network->AddConvolution3dLayer(desc, layerName.c_str());
1380  ARMNN_ASSERT(layer != nullptr);
1381 
1382  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
1383  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1384 
1385  // Register the input connection slots for the layer, connections are made after all layers have been created
1386  RegisterInputSlots(subgraphIndex, operatorIndex, layer, tensorIndexesToRegister);
1387 
1388  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
1389  // Register the output connection slots for the layer, connections are made after all layers have been created
1390  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1391  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1392 }
1393 #endif
1394 
1395 void TfLiteParserImpl::ParseDepthwiseConv2D(size_t subgraphIndex, size_t operatorIndex)
1396 {
1397  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1398 
1399  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1400  const auto* options = operatorPtr->builtin_options.AsDepthwiseConv2DOptions();
1401 
1402  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
1403 
1405  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1406  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1408  CHECKED_NON_NEGATIVE(options->depth_multiplier);
1409 
1410  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1411  CHECK_VALID_SIZE(inputs.size(), 2, 3);
1412  if (inputs.size() == 3)
1413  {
1414  desc.m_BiasEnabled = true;
1415  }
1416 
1417  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1418  CHECK_VALID_SIZE(outputs.size(), 1);
1419  desc.m_DilationX = CHECKED_NON_NEGATIVE(options->dilation_w_factor);
1420  desc.m_DilationY = CHECKED_NON_NEGATIVE(options->dilation_h_factor);
1421 
1422  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1423  armnn::TensorInfo filterTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
1424 
1425  // Assuming input is NHWC
1426  unsigned int inputHeight = inputTensorInfo.GetShape()[1];
1427  unsigned int inputWidth = inputTensorInfo.GetShape()[2];
1428 
1429  // TensorflowLite weights come in the format [1, H, W, I * M]
1430  unsigned int filterHeight = filterTensorInfo.GetShape()[1];
1431  unsigned int filterWidth = filterTensorInfo.GetShape()[2];
1432 
1433  CalcPadding(inputHeight, filterHeight, desc.m_StrideY,
1434  desc.m_DilationY, desc.m_PadTop, desc.m_PadBottom, options->padding);
1435  CalcPadding(inputWidth, filterWidth, desc.m_StrideX,
1436  desc.m_DilationX, desc.m_PadLeft, desc.m_PadRight, options->padding);
1437 
1438  // ArmNN uses the same filter tensor layout at TfLite [1, H, W, O] no need for any permutation
1439  auto layerName = fmt::format("DepthwiseConv2D:{}:{}", subgraphIndex, operatorIndex);
1440 
1441  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1442  // Add the first input and weights tensor to the registration list.
1443  // The constant weights will be added by SetupConstantLayers.
1444  std::vector<unsigned int> tensorIndexesToRegister = {inputTensorIndexes[0], inputTensorIndexes[1]};
1445 
1446  armnn::IConnectableLayer* layer = m_Network->AddDepthwiseConvolution2dLayer(desc, layerName.c_str());
1447 
1448  if (desc.m_BiasEnabled)
1449  {
1450  desc.m_BiasEnabled = true;
1451  TensorInfo biasTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
1452 
1453  // Add the biases input to the registration list, a constant layer will be added by SetupConstantLayers.
1454  tensorIndexesToRegister.emplace_back(inputTensorIndexes[2]);
1455  }
1456  ARMNN_ASSERT(layer != nullptr);
1457 
1458  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
1459  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1460 
1461  // register the input connection slots for the layer, connections are made after all layers have been created
1462  // only the tensors for the inputs are relevant, exclude the const tensors
1463  RegisterInputSlots(subgraphIndex, operatorIndex, layer, tensorIndexesToRegister);
1464 
1465  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
1466  // register the output connection slots for the layer, connections are made after all layers have been created
1467  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1468  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1469 }
1470 
1471 void TfLiteParserImpl::ParseDequantize(size_t subgraphIndex, size_t operatorIndex)
1472 {
1473  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1474 
1475  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1476  CHECK_VALID_SIZE(inputs.size(), 1);
1477 
1478  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1479  CHECK_VALID_SIZE(outputs.size(), 1);
1480 
1481  auto layerName = fmt::format("Dequantize:{}:{}", subgraphIndex, operatorIndex);
1482 
1483  IConnectableLayer* layer = m_Network->AddDequantizeLayer(layerName.c_str());
1484  ARMNN_ASSERT(layer != nullptr);
1485 
1486  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
1487  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1488 
1489  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1490  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1491 
1492  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1493  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
1494 }
1495 
1496 void TfLiteParserImpl::ParseExpandDims(size_t subgraphIndex, size_t operatorIndex)
1497 {
1498  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1499 
1500  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1501  CHECK_VALID_SIZE(inputs.size(), 2);
1502 
1503  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1504  CHECK_VALID_SIZE(outputs.size(), 1);
1505 
1506  auto layerName = fmt::format("ExpandDims:{}:{}", subgraphIndex, operatorIndex);
1507 
1508  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1509  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1510 
1511  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1512 
1513  ReshapeDescriptor reshapeDesc;
1514 
1515  if (outputTensorInfo.GetShape().AreAllDimensionsSpecified())
1516  {
1517  reshapeDesc.m_TargetShape = outputTensorInfo.GetShape();
1518  }
1519  else
1520  {
1521  int32_t axis = inputs[1]->shape[0];
1522 
1523  int32_t inputDimSize = static_cast<int32_t>(inputTensorInfo.GetShape().GetNumDimensions());
1524 
1525  if (axis > inputDimSize || axis < 0 - (inputDimSize + 1))
1526  {
1527  throw ParseException("axis must be in range [0 - (inputDimSize + 1), inputDimSize] inclusive");
1528  }
1529 
1530  if(axis < 0)
1531  {
1532  axis = inputDimSize + axis + 1;
1533  }
1534 
1535  std::vector<unsigned int> shape(static_cast<unsigned int>(inputDimSize) + 1);
1536  unsigned int inputShapeIndex = 0;
1537  for (unsigned int i = 0; i < static_cast<unsigned int>(inputDimSize + 1); ++i)
1538  {
1539  if (i == static_cast<unsigned int>(axis))
1540  {
1541  shape[i] = 1;
1542  }
1543  else
1544  {
1545  shape[i] = inputTensorInfo.GetShape()[inputShapeIndex];
1546  ++inputShapeIndex;
1547  }
1548  }
1549 
1550  reshapeDesc.m_TargetShape = TensorShape(static_cast<unsigned int>(inputDimSize + 1), shape.data());
1551  }
1552 
1553  IConnectableLayer* layer = m_Network->AddReshapeLayer(reshapeDesc, layerName.c_str());
1554  ARMNN_ASSERT(layer != nullptr);
1555 
1556  reshapeDesc.m_TargetShape = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0}).GetShape();
1557  outputTensorInfo.SetShape(reshapeDesc.m_TargetShape);
1558 
1559  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1560 
1561  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1562  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1563 
1564  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1565  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1566 }
1567 
1568 void TfLiteParserImpl::ParseTranspose(size_t subgraphIndex, size_t operatorIndex)
1569 {
1570  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1571 
1572  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1573  CHECK_VALID_SIZE(inputs.size(), 1, 2);
1574 
1575  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1576  CHECK_VALID_SIZE(outputs.size(), 1);
1577 
1578  auto layerName = fmt::format("Transpose:{}:{}", subgraphIndex, operatorIndex);
1579  TransposeDescriptor desc;
1580 
1581  if (inputs.size() == 2)
1582  {
1583  armnn::TensorInfo permuteTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
1584  BufferRawPtr permuteBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
1585  auto numPermVecElements = permuteTensorInfo.GetNumElements();
1586  std::vector<unsigned int> permuteShape(numPermVecElements);
1587  ::memcpy(permuteShape.data(), permuteBufferPtr->data.data(), permuteTensorInfo.GetNumBytes());
1588  PermutationVector permutationVector(permuteShape.data(), permuteTensorInfo.GetNumElements());
1589 
1590  desc = TransposeDescriptor(permutationVector);
1591  }
1592  TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1593 
1594  IConnectableLayer* layer = m_Network->AddTransposeLayer(desc, layerName.c_str());
1595  ARMNN_ASSERT(layer != nullptr);
1596 
1597  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
1598  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1599  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1600 
1601  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1602  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1603 
1604  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1605  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1606 }
1607 
1608 void TfLiteParserImpl::ParseTransposeConv(size_t subgraphIndex, size_t operatorIndex)
1609 {
1610  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1611 
1612  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1613  const auto* options = operatorPtr->builtin_options.AsTransposeConvOptions();
1614 
1616  desc.m_BiasEnabled = false;
1617  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1618  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1620 
1621  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1622  if (inputs.size() == 4)
1623  {
1624  desc.m_BiasEnabled = true;
1625  }
1626  else
1627  {
1628  CHECK_VALID_SIZE(inputs.size(), 3);
1629  }
1630 
1631  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1632  CHECK_VALID_SIZE(outputs.size(), 1);
1633 
1634 
1635  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
1636  armnn::TensorInfo filterTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
1637 
1638  // TfLite uses NHWC tensors
1639  const unsigned int inputHeight = inputTensorInfo.GetShape()[1];
1640  const unsigned int inputWidth = inputTensorInfo.GetShape()[2];
1641 
1642  const unsigned int filterHeight = filterTensorInfo.GetShape()[1];
1643  const unsigned int filterWidth = filterTensorInfo.GetShape()[2];
1644 
1645  // This block determines the output shape of the transpose convolution. If the output shape tensor ptr is not null
1646  // And the tensor is a constant, we can access the data at load time and set the output shape of the
1647  // layer. If this is not constant, We do not have access to the shape data, so we have to use
1648  // infer output shape and skip this code block.
1649  if (inputs[0] && IsConstTensor(inputs[0]))
1650  {
1651  armnn::TensorInfo tensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1652  std::vector<int> output_shape(tensorInfo.GetNumElements());
1653 
1654  if (tensorInfo.GetDataType() == DataType::Signed32)
1655  {
1656  ::memcpy(output_shape.data(), GetBuffer(m_Model, inputs[0]->buffer)->data.data(), tensorInfo.GetNumBytes());
1657  }
1658  if (tensorInfo.GetDataType() == DataType::QAsymmU8)
1659  {
1660  for(unsigned int i=0; i < tensorInfo.GetNumElements(); i++)
1661  {
1662  output_shape[i] = GetBuffer(m_Model, inputs[0]->buffer)->data.data()[i];
1663  }
1664  }
1665  // Change from signed to unsigned int to store in TransposeConvolution2dDescriptor.
1666  for (int dimension : output_shape)
1667  {
1668  desc.m_OutputShape.push_back(static_cast<unsigned int>(dimension));
1669  }
1670  desc.m_OutputShapeEnabled = true;
1671 
1672  // TfLite uses NHWC tensors
1673  const unsigned int outputHeight = desc.m_OutputShape[1];
1674  const unsigned int outputWidth = desc.m_OutputShape[2];
1675 
1676  CalcPadding(inputHeight,
1677  filterHeight,
1678  desc.m_StrideY,
1679  1, // DilationY
1680  desc.m_PadTop,
1681  desc.m_PadBottom,
1682  options->padding,
1683  outputHeight);
1684 
1685  CalcPadding(inputWidth,
1686  filterWidth,
1687  desc.m_StrideX,
1688  1, // DilationX
1689  desc.m_PadLeft,
1690  desc.m_PadRight,
1691  options->padding,
1692  outputWidth);
1693  }
1694  else
1695  {
1696  CalcPadding(inputHeight,
1697  filterHeight,
1698  desc.m_StrideY,
1699  1, // DilationY
1700  desc.m_PadTop,
1701  desc.m_PadBottom,
1702  options->padding);
1703 
1704  CalcPadding(inputWidth,
1705  filterWidth,
1706  desc.m_StrideX,
1707  1, // DilationX
1708  desc.m_PadLeft,
1709  desc.m_PadRight,
1710  options->padding);
1711  }
1712 
1713  auto filterTensorAndData = CreateConstTensorNonPermuted(inputs[1], filterTensorInfo, inputTensorInfo.GetDataType());
1714 
1715  armnn::IConnectableLayer* layer = nullptr;
1716  auto layerName = fmt::format("TransposeConv:{}:{}", subgraphIndex, operatorIndex);
1717 
1718  if (desc.m_BiasEnabled)
1719  {
1720  auto biasTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 3);
1721  auto biasConstTensor = CreateConstTensorNonPermuted(inputs[3], biasTensorInfo, inputTensorInfo.GetDataType());
1722  layer = m_Network->AddTransposeConvolution2dLayer(desc,
1723  filterTensorAndData.first,
1724  biasConstTensor.first,
1725  layerName.c_str());
1726  }
1727  else
1728  {
1729  layer = m_Network->AddTransposeConvolution2dLayer(desc,
1730  filterTensorAndData.first,
1731  EmptyOptional(),
1732  layerName.c_str());
1733  }
1734 
1735  ARMNN_ASSERT(layer != nullptr);
1736 
1737  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0 , { 2, 1 });
1738  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1739 
1740  // only the tensors for the inputs are relevant, exclude the const (filter) tensor
1741  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1742  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[2]});
1743 
1744  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1745  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1746 }
1747 
1748 void TfLiteParserImpl::ParseAveragePool2D(size_t subgraphIndex, size_t operatorIndex)
1749 {
1750  ParsePool(subgraphIndex, operatorIndex, PoolingAlgorithm::Average);
1751 }
1752 
1753 void TfLiteParserImpl::ParseBatchMatMul(size_t subgraphIndex, size_t operatorIndex)
1754 {
1755  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1756 
1757  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1758  CHECK_VALID_SIZE(inputs.size(), 2);
1759 
1760  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1761  CHECK_VALID_SIZE(outputs.size(), 1);
1762 
1763  auto layerName = fmt::format("BatchMatMul:{}:{}", subgraphIndex, operatorIndex);
1764 
1765  TensorInfo inputXTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1766  TensorInfo inputYTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
1767 
1768  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1769  const auto* options = operatorPtr->builtin_options.AsBatchMatMulOptions();
1770 
1771  // Adjoint in tensorflow lite performs transpose operation
1772  BatchMatMulDescriptor descriptor(options->adj_x,
1773  options->adj_y,
1774  false,
1775  false);
1776  // Arbitrary DataLayout
1777 
1778  IConnectableLayer* layer = m_Network->AddBatchMatMulLayer(descriptor, layerName.c_str());
1779  ARMNN_ASSERT(layer != nullptr);
1780 
1781  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
1782  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1783 
1784  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1785  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
1786 
1787  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1788  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1789 }
1790 
1791 void TfLiteParserImpl::ParseBatchToSpaceND(size_t subgraphIndex, size_t operatorIndex)
1792 {
1793  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1794 
1795  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1796  CHECK_VALID_SIZE(inputs.size(), 3);
1797 
1798  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1799  CHECK_VALID_SIZE(outputs.size(), 1);
1800 
1801  armnn::TensorInfo blockShapeTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
1802  BufferRawPtr blockShapeBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
1803 
1804  armnn::TensorInfo cropsTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
1805  BufferRawPtr cropsBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
1806 
1807  std::vector<unsigned int> blockShape(blockShapeTensorInfo.GetNumElements());
1808  ::memcpy(blockShape.data(), blockShapeBufferPtr->data.data(), blockShapeTensorInfo.GetNumBytes());
1809 
1810  std::vector<unsigned int> cropsVector(cropsTensorInfo.GetNumElements());
1811  ::memcpy(cropsVector.data(), cropsBufferPtr->data.data(), cropsTensorInfo.GetNumBytes());
1812 
1813  size_t step = 2;
1814  std::vector<std::pair<unsigned int, unsigned int>> crops;
1815  for (unsigned int i = 0; i < cropsTensorInfo.GetNumElements() / step; ++i)
1816  {
1817  crops.emplace_back(cropsVector[i * step], cropsVector[i * step + 1]);
1818  }
1819 
1821  desc.m_BlockShape = blockShape;
1822  desc.m_Crops = crops;
1824 
1825  auto layerName = fmt::format("BatchToSpaceND:{}:{}", subgraphIndex, operatorIndex);
1826 
1827  TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1828 
1829  IConnectableLayer* layer = m_Network->AddBatchToSpaceNdLayer(desc, layerName.c_str());
1830  ARMNN_ASSERT(layer != nullptr);
1831 
1832  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
1833  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1834  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1835 
1836  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1837  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1838 
1839  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1840  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1841 }
1842 
1843 void TfLiteParserImpl::ParseL2Normalization(size_t subgraphIndex, size_t operatorIndex)
1844 {
1845  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1846 
1847  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1848  CHECK_VALID_SIZE(inputs.size(), 1);
1849 
1850  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1851  CHECK_VALID_SIZE(outputs.size(), 1);
1852 
1855  auto layerName = fmt::format("L2Normalization:{}:{}", subgraphIndex, operatorIndex);
1856  IConnectableLayer* layer = m_Network->AddL2NormalizationLayer(desc, layerName.c_str());
1857 
1858  ARMNN_ASSERT(layer != nullptr);
1859 
1860  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
1861  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1862 
1863  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1864  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1865 
1866  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1867  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1868 }
1869 
1870 void TfLiteParserImpl::ParseMaxPool2D(size_t subgraphIndex, size_t operatorIndex)
1871 {
1872  ParsePool(subgraphIndex, operatorIndex, PoolingAlgorithm::Max);
1873 }
1874 
1875 void TfLiteParserImpl::ParseMaximum(size_t subgraphIndex, size_t operatorIndex)
1876 {
1877  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1878 
1879  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1880  CHECK_VALID_SIZE(inputs.size(), 2);
1881 
1882  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1883  CHECK_VALID_SIZE(outputs.size(), 1);
1884 
1885  auto layerName = fmt::format("Maximum:{}:{}", subgraphIndex, operatorIndex);
1886 
1887  TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1888  TensorInfo input1TensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
1889  CheckMatchingQuantization(inputTensorInfo, input1TensorInfo, layerName, "Input 0", "Input 1");
1890 
1891  IConnectableLayer* layer = m_Network->AddElementwiseBinaryLayer(BinaryOperation::Maximum, layerName.c_str());
1892  ARMNN_ASSERT(layer != nullptr);
1893 
1894  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
1895  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1896  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1897 
1898  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1899  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
1900 
1901  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1902  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1903 }
1904 
1905 void TfLiteParserImpl::ParseMinimum(size_t subgraphIndex, size_t operatorIndex)
1906 {
1907  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1908 
1909  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1910  CHECK_VALID_SIZE(inputs.size(), 2);
1911 
1912  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1913  CHECK_VALID_SIZE(outputs.size(), 1);
1914 
1915  auto layerName = fmt::format("Minimum:{}:{}", subgraphIndex, operatorIndex);
1916 
1917  TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1918  TensorInfo input1TensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
1919  CheckMatchingQuantization(inputTensorInfo, input1TensorInfo, layerName, "Input 0", "Input 1");
1920 
1921  IConnectableLayer* layer = m_Network->AddElementwiseBinaryLayer(BinaryOperation::Minimum, layerName.c_str());
1922  ARMNN_ASSERT(layer != nullptr);
1923 
1924  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
1925  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1926  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1927 
1928  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1929  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
1930 
1931  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1932  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1933 }
1934 
1935 void TfLiteParserImpl::ParsePool(size_t subgraphIndex,
1936  size_t operatorIndex,
1937  PoolingAlgorithm algorithm)
1938 {
1939  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1940 
1941  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1942  const auto* options = operatorPtr->builtin_options.AsPool2DOptions();
1943 
1944  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
1945 
1946  std::string layerName;
1947 
1948  switch (algorithm)
1949  {
1950  case PoolingAlgorithm::Average:
1951  layerName =
1952  fmt::format("AveragePool2D:{}:{}", subgraphIndex, operatorIndex);
1953  break;
1954  case PoolingAlgorithm::Max:
1955  layerName =
1956  fmt::format("MaxPool2D:{}:{}", subgraphIndex, operatorIndex);
1957  break;
1958  default:
1959  ARMNN_ASSERT_MSG(false, "Unsupported Pooling Algorithm");
1960  }
1961 
1962  Pooling2dDescriptor desc;
1963 
1964  desc.m_PoolType = algorithm;
1965  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1966  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1967  desc.m_PoolWidth = CHECKED_NON_NEGATIVE(options->filter_width);
1968  desc.m_PoolHeight = CHECKED_NON_NEGATIVE(options->filter_height);
1969  desc.m_PaddingMethod = PaddingMethod::Exclude;
1970  desc.m_OutputShapeRounding = OutputShapeRounding::Floor;
1972 
1973  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1974  CHECK_VALID_SIZE(inputs.size(), 1);
1975  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
1976 
1977  // assuming input is NHWC
1978  unsigned int inputHeight = inputTensorInfo.GetShape()[1];
1979  unsigned int inputWidth = inputTensorInfo.GetShape()[2];
1980 
1981  CalcPadding(inputHeight, desc.m_PoolHeight, desc.m_StrideY, 1u,
1982  desc.m_PadTop, desc.m_PadBottom, options->padding);
1983  CalcPadding(inputWidth, desc.m_PoolWidth, desc.m_StrideX, 1u,
1984  desc.m_PadLeft, desc.m_PadRight, options->padding);
1985 
1986  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1987  CHECK_VALID_SIZE(outputs.size(), 1);
1988 
1989  IConnectableLayer* layer = m_Network->AddPooling2dLayer(desc, layerName.c_str());
1990  ARMNN_ASSERT(layer != nullptr);
1991 
1992  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
1993  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1994  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1995 
1996  // register the input connection slots for the layer, connections are made after all layers have been created
1997  // only the tensors for the inputs are relevant, exclude the const tensors
1998  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1999  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2000 
2001  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
2002  // register the output connection slots for the layer, connections are made after all layers have been created
2003  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2004  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2005 }
2006 
2007 void TfLiteParserImpl::ParseSlice(size_t subgraphIndex, size_t operatorIndex)
2008 {
2009  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2010 
2011  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2012  CHECK_VALID_SIZE(inputs.size(), 3);
2013  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2014  CHECK_VALID_SIZE(outputs.size(), 1);
2015 
2016  SliceDescriptor desc;
2017 
2018  // set begin tensor info for slice descriptor
2019  armnn::TensorInfo beginTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2020  BufferRawPtr beginBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2021 
2022  std::vector<unsigned int> begin(beginTensorInfo.GetNumElements());
2023  ::memcpy(begin.data(), beginBufferPtr->data.data(), beginTensorInfo.GetNumBytes());
2024 
2025  // set size tensor info for slice descriptor
2026  armnn::TensorInfo sizeTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
2027  BufferRawPtr sizeBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
2028 
2029  std::vector<int> signedSize(sizeTensorInfo.GetNumElements(), 1);
2030 
2031  // if size buffer data is not specified, all contents of size vector remain as values of 1
2032  if (sizeBufferPtr->data.data())
2033  {
2034  ::memcpy(signedSize.data(), sizeBufferPtr->data.data(), sizeTensorInfo.GetNumBytes());
2035  }
2036 
2037  std::vector<unsigned int> size(sizeTensorInfo.GetNumElements());
2038  TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2039 
2040  for (unsigned int i = 0; i < signedSize.size(); ++i)
2041  {
2042  int signedValue = signedSize[i];
2043 
2044  if (signedValue < -1 || signedValue > static_cast<int>(inputTensorInfo.GetShape()[i] - begin[i]))
2045  {
2046  throw ParseException(fmt::format("Invalid value for size {} size must be in range "
2047  "[-1, inputDimSize - begin] [-1, {}] inclusive {}",
2048  signedValue,
2049  inputTensorInfo.GetShape()[i] - begin[i],
2050  CHECK_LOCATION().AsString()));
2051  }
2052 
2053  if (signedValue == -1)
2054  {
2055  size[i] = inputTensorInfo.GetShape()[i] - begin[i];
2056  }
2057  else
2058  {
2059  size[i] = static_cast<unsigned int>(signedValue);
2060  }
2061  }
2062 
2063  desc = SliceDescriptor(begin, size);
2064 
2065  auto layerName = fmt::format("Slice:{}:{}", subgraphIndex, operatorIndex);
2066 
2067  IConnectableLayer* const layer = m_Network->AddSliceLayer(desc, layerName.c_str());
2068 
2069  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2070  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
2071  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2072 
2073  // register the input connection slots for the layer, connections are made after all layers have been created
2074  // only the tensors for the inputs are relevant, exclude the const tensors
2075  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2076  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2077 
2078  // register the output connection slots for the layer, connections are made after all layers have been created
2079  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2080  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2081 }
2082 
2083 void TfLiteParserImpl::ParseSoftmax(size_t subgraphIndex, size_t operatorIndex)
2084 {
2085  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2086  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2087  const auto* options = operatorPtr->builtin_options.AsSoftmaxOptions();
2088 
2089  SoftmaxDescriptor desc;
2090  desc.m_Beta = options->beta;
2091 
2092  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2093  CHECK_VALID_SIZE(inputs.size(), 1);
2094  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2095  CHECK_VALID_SIZE(outputs.size(), 1);
2096 
2097  auto layerName = fmt::format("Softmax:{}:{}", subgraphIndex, operatorIndex);
2098  IConnectableLayer* const layer = m_Network->AddSoftmaxLayer(desc, layerName.c_str());
2099 
2100  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2101  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2102 
2103  // register the input connection slots for the layer, connections are made after all layers have been created
2104  // only the tensors for the inputs are relevant, exclude the const tensors
2105  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2106  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2107 
2108  // register the output connection slots for the layer, connections are made after all layers have been created
2109  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2110  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2111 }
2112 
2113 void TfLiteParserImpl::ParseLogSoftmax(size_t subgraphIndex, size_t operatorIndex)
2114 {
2115  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2116 
2117  LogSoftmaxDescriptor desc;
2118 
2119  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2120  CHECK_VALID_SIZE(inputs.size(), 1);
2121  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2122  CHECK_VALID_SIZE(outputs.size(), 1);
2123 
2124  auto layerName = fmt::format("LogSoftmax:{}:{}", subgraphIndex, operatorIndex);
2125  IConnectableLayer* const layer = m_Network->AddLogSoftmaxLayer(desc, layerName.c_str());
2126 
2127  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2128  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2129 
2130  // register the input connection slots for the layer, connections are made after all layers have been created
2131  // only the tensors for the inputs are relevant, exclude the const tensors
2132  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2133  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2134 
2135  // register the output connection slots for the layer, connections are made after all layers have been created
2136  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2137  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2138 }
2139 
2140 void TfLiteParserImpl::ParseSpaceToBatchND(size_t subgraphIndex, size_t operatorIndex)
2141 {
2142  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2143 
2144  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2145  CHECK_VALID_SIZE(inputs.size(), 3);
2146 
2147  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2148  CHECK_VALID_SIZE(outputs.size(), 1);
2149 
2150  armnn::TensorInfo blockShapeTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2151  BufferRawPtr blockShapeBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2152 
2153  armnn::TensorInfo padListTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
2154  BufferRawPtr padListBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
2155 
2156  std::vector<unsigned int> blockShape(blockShapeTensorInfo.GetNumElements());
2157  ::memcpy(blockShape.data(), blockShapeBufferPtr->data.data(), blockShapeTensorInfo.GetNumBytes());
2158 
2159  std::vector<unsigned int> padListVector(padListTensorInfo.GetNumElements());
2160  ::memcpy(padListVector.data(), padListBufferPtr->data.data(), padListTensorInfo.GetNumBytes());
2161 
2162  size_t step = 2;
2163  std::vector<std::pair<unsigned int, unsigned int>> padList;
2164  for (unsigned int i = 0; i < padListTensorInfo.GetNumElements() / step; ++i)
2165  {
2166  padList.emplace_back(padListVector[i * step], padListVector[i * step + 1]);
2167  }
2168 
2170  desc.m_BlockShape = blockShape;
2171  desc.m_PadList = padList;
2173 
2174  auto layerName = fmt::format("SpaceToBatchND:{}:{}", subgraphIndex, operatorIndex);
2175 
2176  TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2177 
2178  IConnectableLayer* layer = m_Network->AddSpaceToBatchNdLayer(desc, layerName.c_str());
2179  ARMNN_ASSERT(layer != nullptr);
2180 
2181  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2182  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
2183  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2184 
2185  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2186  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2187 
2188  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2189  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2190 }
2191 
2192 void TfLiteParserImpl::ParseSpaceToDepth(size_t subgraphIndex, size_t operatorIndex)
2193 {
2194  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2195 
2196  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2197  CHECK_VALID_SIZE(inputs.size(), 1);
2198  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2199  CHECK_VALID_SIZE(outputs.size(), 1);
2200 
2201  armnn::SpaceToDepthDescriptor descriptor;
2202 
2203  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2204  const auto* options = operatorPtr->builtin_options.AsSpaceToDepthOptions();
2205  auto blockSize = options->block_size;
2206  if (blockSize < 2)
2207  {
2208  throw ParseException(
2209  fmt::format("Operation has invalid block size: {} Block size should be >= 2 {}",
2210  blockSize,
2211  CHECK_LOCATION().AsString()));
2212  }
2213  descriptor.m_BlockSize = armnn::numeric_cast<uint32_t>(blockSize);
2214 
2215  auto layerName = fmt::format("SpaceToDepth:{}:{}", subgraphIndex, operatorIndex);
2216  IConnectableLayer* layer = m_Network->AddSpaceToDepthLayer(descriptor, layerName.c_str());
2217  ARMNN_ASSERT(layer != nullptr);
2218  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2219  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2220 
2221  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2222  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2223 
2224  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2225  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2226 }
2227 
2229  const armnn::TensorInfo& inputTensorInfo)
2230 {
2231  CHECK_VALID_SIZE(squeezeDims.size(), 0, 1, 2, 3, 4);
2232  static const uint32_t dimensionSequence[] = { 0, 1, 2, 3 };
2233 
2234  if (inputTensorInfo.GetNumDimensions() > 4)
2235  {
2236  std::stringstream ss;
2237  ss << "Input tensor has unexpected number of dimensions:" << inputTensorInfo.GetNumDimensions()
2238  << " shape:" << inputTensorInfo.GetShape() << " "
2239  << CHECK_LOCATION().AsString();
2240  throw ParseException(ss.str());
2241  }
2242 
2243  if (squeezeDims.empty())
2244  {
2245  squeezeDims.assign(dimensionSequence,
2246  dimensionSequence+inputTensorInfo.GetNumDimensions());
2247  }
2248 
2249  std::vector<uint32_t> outputDims;
2250  for(unsigned int i = 0; i < inputTensorInfo.GetNumDimensions(); i++)
2251  {
2252  bool skipSqueeze = (std::find(squeezeDims.begin(), squeezeDims.end(), i) == squeezeDims.end());
2253  auto currentDimension = inputTensorInfo.GetShape()[i];
2254  if (skipSqueeze || currentDimension != 1)
2255  {
2256  outputDims.push_back(currentDimension);
2257  }
2258  }
2259 
2260  if (outputDims.size() > 4)
2261  {
2262  std::stringstream ss;
2263  ss << "Output tensor has unexpected number of dimensions:" << inputTensorInfo.GetNumDimensions()
2264  << " shape:" << inputTensorInfo.GetShape() << " "
2265  << CHECK_LOCATION().AsString();
2266  throw ParseException(ss.str());
2267  }
2268 
2269  TensorShape outShape = TensorShape(static_cast<unsigned int>(outputDims.size()),
2270  outputDims.data());
2271 
2272  // we need to preserve the tensor type and the quantization data as well
2273  TensorInfo outTensorInfo = inputTensorInfo;
2274  outTensorInfo.SetShape(outShape);
2275 
2276  return outTensorInfo;
2277 }
2278 
2279 void TfLiteParserImpl::ParseShape(size_t subgraphIndex, size_t operatorIndex)
2280 {
2281  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2282 
2283  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2284  CHECK_VALID_SIZE(inputs.size(), 1);
2285  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2286  CHECK_VALID_SIZE(outputs.size(), 1);
2287 
2288  auto layerName = fmt::format("Shape:{}:{}", subgraphIndex, operatorIndex);
2289 
2290  IConnectableLayer* layer = m_Network->AddShapeLayer(layerName.c_str());
2291  ARMNN_ASSERT(layer != nullptr);
2292 
2293  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2294  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2295 
2296  // Check if output tensor type is Signed32 or Signed64
2297  if (outputTensorInfo.GetDataType() != armnn::DataType::Signed32 &&
2298  outputTensorInfo.GetDataType() != armnn::DataType::Signed64)
2299  {
2300  throw ParseException(
2301  fmt::format(
2302  "Output tensor data type is not supported. (Supported types: Signed32 & Signed64) {}",
2303  CHECK_LOCATION().AsString()));
2304  }
2305 
2306  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2307  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2308 
2309  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2310  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
2311 }
2312 
2313 void TfLiteParserImpl::ParseSqueeze(size_t subgraphIndex, size_t operatorIndex)
2314 {
2315  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2316 
2317  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2318  CHECK_VALID_SIZE(inputs.size(), 1);
2319 
2320  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2321  CHECK_VALID_SIZE(outputs.size(), 1);
2322 
2323  const auto & operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2324  const auto * options = operatorPtr->builtin_options.AsSqueezeOptions();
2325  auto layerName = fmt::format("Squeeze:{}:{}", subgraphIndex, operatorIndex);
2326 
2327  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2328 
2329  std::vector<uint32_t> squeezeDim;
2330  // A single negative dim index is interpreted as a negative index in python
2331  // Meaning the index will be the shape size plus the negative index value
2332  if (options->squeeze_dims.size() == 1 && options->squeeze_dims[0] < 0)
2333  {
2334  int32_t dim = static_cast<int32_t>(inputTensorInfo.GetShape().GetNumDimensions()) + options->squeeze_dims[0];
2335  squeezeDim.push_back(static_cast<uint32_t>(dim));
2336  }
2337  else
2338  {
2339  squeezeDim = AsUnsignedVector(options->squeeze_dims);
2340  }
2341 
2342  armnn::TensorInfo outputTensorInfo = TfLiteParserImpl::OutputShapeOfSqueeze(squeezeDim, inputTensorInfo);
2343 
2344  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
2345 
2346  ReshapeDescriptor reshapeDesc;
2347  reshapeDesc.m_TargetShape = outputTensorInfo.GetShape();
2348 
2349  auto outputTensorIds = GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex);
2350  m_TensorInfos[outputTensorIds[0]] = outputTensorInfo;
2351 
2352  IConnectableLayer* layer = m_Network->AddReshapeLayer(reshapeDesc, layerName.c_str());
2353  ARMNN_ASSERT(layer != nullptr);
2354  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2355 
2356  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2357  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2358 
2359  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2360  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2361 }
2362 
2363 void TfLiteParserImpl::ParseStridedSlice(size_t subgraphIndex, size_t operatorIndex)
2364 {
2365  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2366 
2367  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2368  CHECK_VALID_SIZE(inputs.size(), 4);
2369 
2370  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2371  CHECK_VALID_SIZE(outputs.size(), 1);
2372 
2373  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2374  const auto* options = operatorPtr->builtin_options.AsStridedSliceOptions();
2375 
2377  desc.m_BeginMask = options->begin_mask;
2378  desc.m_EllipsisMask = options->ellipsis_mask;
2379  desc.m_EndMask = options->end_mask;
2380  desc.m_NewAxisMask = options->new_axis_mask;
2381  desc.m_ShrinkAxisMask = options->shrink_axis_mask;
2383 
2384  armnn::TensorInfo beginTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2385  BufferRawPtr beginBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2386 
2387  std::vector<int> begin(beginTensorInfo.GetNumElements());
2388  ::memcpy(begin.data(), beginBufferPtr->data.data(), beginTensorInfo.GetNumBytes());
2389 
2390  armnn::TensorInfo endTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
2391  BufferRawPtr endBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
2392 
2393  std::vector<int> end(endTensorInfo.GetNumElements());
2394  ::memcpy(end.data(), endBufferPtr->data.data(), endTensorInfo.GetNumBytes());
2395 
2396  armnn::TensorInfo strideTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 3);
2397  BufferRawPtr strideBufferPtr = GetBuffer(m_Model, inputs[3]->buffer);
2398 
2399  std::vector<int> stride(strideTensorInfo.GetNumElements());
2400  ::memcpy(stride.data(), strideBufferPtr->data.data(), strideTensorInfo.GetNumBytes());
2401 
2402  desc.m_Begin = begin;
2403  desc.m_End = end;
2404  desc.m_Stride = stride;
2405 
2406  auto layerName = fmt::format("StridedSlice:{}:{}", subgraphIndex, operatorIndex);
2407  IConnectableLayer* layer = m_Network->AddStridedSliceLayer(desc, layerName.c_str());
2408  ARMNN_ASSERT(layer != nullptr);
2409 
2410  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2411  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2412 
2413  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2414  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2415 
2416  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2417  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2418 }
2419 
2420 void TfLiteParserImpl::ParseSub(size_t subgraphIndex, size_t operatorIndex)
2421 {
2422  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2423 
2424  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2425  const auto* options = operatorPtr->builtin_options.AsSubOptions();
2426 
2427  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2428  CHECK_VALID_SIZE(inputs.size(), 2);
2429 
2430  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2431  CHECK_VALID_SIZE(outputs.size(), 1);
2432 
2433  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2434  armnn::TensorInfo input1TensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2435 
2436  auto layerName = fmt::format("Sub:{}:{}", subgraphIndex, operatorIndex);
2437  IConnectableLayer* layer = m_Network->AddElementwiseBinaryLayer(BinaryOperation::Sub, layerName.c_str());
2438  ARMNN_ASSERT(layer != nullptr);
2439 
2440  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
2441  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2442 
2443  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2444  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2445 
2446  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
2447 
2448  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2449  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2450 }
2451 
2452 void TfLiteParserImpl::ParseDiv(size_t subgraphIndex, size_t operatorIndex)
2453 {
2454  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2455 
2456  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2457  const auto* options = operatorPtr->builtin_options.AsDivOptions();
2458 
2459  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2460  CHECK_VALID_SIZE(inputs.size(), 2);
2461 
2462  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2463  CHECK_VALID_SIZE(outputs.size(), 1);
2464 
2465  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2466  armnn::TensorInfo input1TensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2467 
2468  auto layerName = fmt::format("Div:{}:{}", subgraphIndex, operatorIndex);
2469  IConnectableLayer* layer = m_Network->AddElementwiseBinaryLayer(BinaryOperation::Div, layerName.c_str());
2470  ARMNN_ASSERT(layer != nullptr);
2471 
2472  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
2473  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2474 
2475  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2476  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2477  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
2478 
2479  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2480  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2481 }
2482 
2483 void TfLiteParserImpl::ParseFloorDiv(size_t subgraphIndex, size_t operatorIndex)
2484 {
2485  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2486 
2487  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2488  CHECK_VALID_SIZE(inputs.size(), 2);
2489 
2490  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2491  CHECK_VALID_SIZE(outputs.size(), 1);
2492 
2493  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2494  armnn::TensorInfo input1TensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2495 
2496  auto layerName = fmt::format("Div:{}:{}", subgraphIndex, operatorIndex);
2497  IConnectableLayer* layer = m_Network->AddElementwiseBinaryLayer(BinaryOperation::Div, layerName.c_str());
2498  ARMNN_ASSERT(layer != nullptr);
2499 
2500  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
2501  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2502 
2503  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2504  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2505  layer = AddFusedFloorLayer(layer, 0);
2506 
2507  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2508  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2509 }
2510 
2511 void TfLiteParserImpl::ParseAdd(size_t subgraphIndex, size_t operatorIndex)
2512 {
2513  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2514 
2515  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2516  const auto* options = operatorPtr->builtin_options.AsAddOptions();
2517 
2518  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2519  CHECK_VALID_SIZE(inputs.size(), 2);
2520 
2521  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2522  CHECK_VALID_SIZE(outputs.size(), 1);
2523 
2524  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2525  armnn::TensorInfo input1TensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2526 
2527  auto layerName = fmt::format("Add:{}:{}", subgraphIndex, operatorIndex);
2528  IConnectableLayer* layer = m_Network->AddElementwiseBinaryLayer(BinaryOperation::Add, layerName.c_str());
2529  ARMNN_ASSERT(layer != nullptr);
2530 
2531  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
2532  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2533 
2534  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2535  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2536  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
2537 
2538  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2539  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2540 }
2541 
2542 void TfLiteParserImpl::ParseMul(size_t subgraphIndex, size_t operatorIndex)
2543 {
2544  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2545 
2546  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2547  const auto* options = operatorPtr->builtin_options.AsMulOptions();
2548 
2549  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2550  CHECK_VALID_SIZE(inputs.size(), 2);
2551 
2552  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2553  CHECK_VALID_SIZE(outputs.size(), 1);
2554 
2555  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2556  armnn::TensorInfo input1TensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2557 
2558  auto layerName = fmt::format("Mul:{}:{}", subgraphIndex, operatorIndex);
2559  IConnectableLayer* layer = m_Network->AddElementwiseBinaryLayer(BinaryOperation::Mul, layerName.c_str());
2560  ARMNN_ASSERT(layer != nullptr);
2561 
2562  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
2563  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2564 
2565  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2566  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2567  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
2568 
2569  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2570  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2571 }
2572 
2573 void TfLiteParserImpl::ParseMean(size_t subgraphIndex, size_t operatorIndex)
2574 {
2575  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2576 
2577  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2578 
2579  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2580  CHECK_VALID_SIZE(outputs.size(), 1);
2581 
2582  TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2583  TensorInfo dimTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2584 
2585  armnn::MeanDescriptor desc;
2586  BufferRawPtr axisBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2587  // Get const axis value from model and set it to descriptor.
2588  if (axisBufferPtr != nullptr)
2589  {
2590  std::vector<int32_t> axisData(dimTensorInfo.GetNumElements());
2591  ::memcpy(axisData.data(), axisBufferPtr->data.data(), dimTensorInfo.GetNumBytes());
2592 
2593  // Convert the axis to unsigned int and remove duplicates.
2594  auto rank = static_cast<int32_t>(inputTensorInfo.GetNumDimensions());
2595  std::set<unsigned int> uniqueAxis;
2596  std::transform(axisData.begin(),
2597  axisData.end(),
2598  std::inserter(uniqueAxis, uniqueAxis.begin()),
2599  [rank](int i)->unsigned int{
2600  return static_cast<uint32_t>(((i + rank) % rank)); });
2601  desc.m_Axis.assign(uniqueAxis.begin(), uniqueAxis.end());
2602  }
2603  else
2604  {
2605  for (uint32_t i = 0; i < inputTensorInfo.GetNumDimensions(); ++i)
2606  {
2607  desc.m_Axis.push_back(i);
2608  }
2609  }
2610 
2611  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2612 
2613  desc.m_KeepDims = inputTensorInfo.GetNumDimensions() == outputTensorInfo.GetNumDimensions() ? true : false;
2614 
2615  auto layerName = fmt::format("Mean:{}:{}", subgraphIndex, operatorIndex);
2616  IConnectableLayer* layer = m_Network->AddMeanLayer(desc, layerName.c_str());
2617  ARMNN_ASSERT(layer != nullptr);
2618 
2619  outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2620  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2621 
2622  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2623  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2624 
2625  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2626  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2627 }
2628 
2629 void TfLiteParserImpl::ParsePad(size_t subgraphIndex, size_t operatorIndex)
2630 {
2631  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2632 
2633  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2634 
2635  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2636  CHECK_VALID_SIZE(outputs.size(), 1);
2637 
2638  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2639  armnn::TensorInfo padTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2640 
2641  std::vector<unsigned int> padBuffer = GetUIntBuffer(padTensorInfo, m_Model, inputs[1]->buffer);
2642 
2643  size_t step = 2;
2644  armnn::PadDescriptor desc;
2645  auto opcode = GetOpCode(m_Model, subgraphIndex, operatorIndex);
2646 
2647  if (opcode == tflite::BuiltinOperator_PAD)
2648  {
2649  CHECK_VALID_SIZE(inputs.size(), 2);
2650 
2651  if (inputTensorInfo.IsQuantized())
2652  {
2653  desc.m_PadValue = static_cast<float>(inputTensorInfo.GetQuantizationOffset());
2654  }
2655  }
2656  else if (opcode == tflite::BuiltinOperator_PADV2)
2657  {
2658  CHECK_VALID_SIZE(inputs.size(), 3);
2659 
2660  armnn::TensorInfo padValueTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
2661 
2662  if (padValueTensorInfo.GetNumElements() != 1)
2663  {
2664  ARMNN_THROW_PARSE_EXCEPTION("Multiple padding values are not supported in PADV2");
2665  }
2666  BufferRawPtr padValueBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
2667 
2668  // Get the pad value from the input tensor
2669  if (padValueBufferPtr->data.size() > 0)
2670  {
2671  switch (padValueTensorInfo.GetDataType())
2672  {
2674  {
2675  std::vector<float> padValueBuffer(padValueTensorInfo.GetNumElements());
2676  ::memcpy(padValueBuffer.data(), padValueBufferPtr->data.data(), padValueBufferPtr->data.size());
2677  desc.m_PadValue = padValueBuffer[0];
2678  break;
2679  }
2681  {
2682  std::vector<uint8_t> padValueBuffer(padValueTensorInfo.GetNumElements());
2683  ::memcpy(padValueBuffer.data(), padValueBufferPtr->data.data(), padValueBufferPtr->data.size());
2684  desc.m_PadValue = armnn::Dequantize<uint8_t>(padValueBuffer[0],
2685  padValueTensorInfo.GetQuantizationScale(),
2686  padValueTensorInfo.GetQuantizationOffset());
2687  break;
2688  }
2691  {
2692  std::vector<int8_t> padValueBuffer(padValueTensorInfo.GetNumElements());
2693  ::memcpy(padValueBuffer.data(), padValueBufferPtr->data.data(), padValueBufferPtr->data.size());
2694  desc.m_PadValue = armnn::Dequantize<int8_t>(padValueBuffer[0],
2695  padValueTensorInfo.GetQuantizationScale(),
2696  padValueTensorInfo.GetQuantizationOffset());
2697  break;
2698  }
2699  default: ARMNN_THROW_PARSE_EXCEPTION("Unsupported DataType");
2700  }
2701  }
2702  else if (inputTensorInfo.IsQuantized())
2703  {
2704  desc.m_PadValue = static_cast<float>(inputTensorInfo.GetQuantizationOffset());
2705  }
2706  }
2707 
2708  for (unsigned int i = 0; i < padTensorInfo.GetNumElements() / step; ++i)
2709  {
2710  desc.m_PadList.emplace_back(padBuffer[i * step], padBuffer[i * step + 1]);
2711  }
2712 
2713  auto layerName = (opcode == tflite::BuiltinOperator_PAD) ? fmt::format("Pad:{}:{}", subgraphIndex, operatorIndex)
2714  : fmt::format("PadV2:{}:{}", subgraphIndex, operatorIndex);
2715 
2716  IConnectableLayer* layer = m_Network->AddPadLayer(desc, layerName.c_str());
2717  ARMNN_ASSERT(layer != nullptr);
2718  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2719  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2720 
2721  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2722  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2723 
2724  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2725  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2726 }
2727 
2728 void TfLiteParserImpl::ParseMirrorPad(size_t subgraphIndex, size_t operatorIndex)
2729 {
2730  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2731 
2732  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2733  CHECK_VALID_SIZE(inputs.size(), 2);
2734 
2735  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2736  CHECK_VALID_SIZE(outputs.size(), 1);
2737 
2738  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2739 
2740  armnn::TensorInfo padTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2741  BufferRawPtr bufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2742 
2743  std::vector<unsigned int> padBuffer(padTensorInfo.GetNumElements());
2744  ::memcpy(padBuffer.data(), bufferPtr->data.data(), padTensorInfo.GetNumBytes());
2745 
2746  size_t step = 2;
2747  armnn::PadDescriptor desc;
2748  for (unsigned int i = 0; i < padTensorInfo.GetNumElements() / step; ++i)
2749  {
2750  desc.m_PadList.emplace_back(padBuffer[i * step], padBuffer[i * step + 1]);
2751  }
2752 
2753  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2754  const auto* options = operatorPtr->builtin_options.AsMirrorPadOptions();
2755 
2756  if (options->mode == tflite::MirrorPadMode_REFLECT)
2757  {
2758  desc.m_PaddingMode = PaddingMode::Reflect;
2759  }
2760  else if (options->mode == tflite::MirrorPadMode_SYMMETRIC)
2761  {
2762  desc.m_PaddingMode = PaddingMode::Symmetric;
2763  }
2764  else
2765  {
2766  ARMNN_THROW_PARSE_EXCEPTION("PaddingMode must be either REFLECT or SYMMETRIC");
2767  }
2768 
2769  // If padding mode is Reflect then both paddings must be no greater than inputShape(i) - 1.
2770  // If padding mode is Symmetric then both paddings must be no greater than inputShape(i).
2771  auto inputShape = inputTensorInfo.GetShape();
2772  auto padList = desc.m_PadList;
2773 
2774  const unsigned int isReflect = static_cast<unsigned int>(desc.m_PaddingMode == PaddingMode::Reflect);
2775  for(unsigned int i = 0; i < padList.size(); ++i)
2776  {
2777  if(padList.at(i).first > (inputShape[i] - isReflect) ||
2778  padList.at(i).second > (inputShape[i] - isReflect))
2779  {
2780  ARMNN_THROW_PARSE_EXCEPTION("Padding values must be less (Reflect) or "
2781  "equal (Symmetric) to the dimension size.");
2782  }
2783  }
2784 
2785  auto layerName = fmt::format("MirrorPad:{}:{}", subgraphIndex, operatorIndex);
2786 
2787  IConnectableLayer* layer = m_Network->AddPadLayer(desc, layerName.c_str());
2788  ARMNN_ASSERT(layer != nullptr);
2789  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2790  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2791 
2792  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2793  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2794 
2795  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2796  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2797 }
2798 
2799 void TfLiteParserImpl::ParsePrelu(size_t subgraphIndex, size_t operatorIndex)
2800 {
2801  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2802 
2803  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2804  CHECK_VALID_SIZE(inputs.size(), 2);
2805 
2806  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2807  CHECK_VALID_SIZE(outputs.size(), 1);
2808 
2809  auto layerName = fmt::format("Prelu:{}:{}", subgraphIndex, operatorIndex);
2810 
2811  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
2812  armnn::TensorInfo alphaTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
2813 
2814  IConnectableLayer* layer = m_Network->AddPreluLayer(layerName.c_str());
2815  ARMNN_ASSERT(layer != nullptr);
2816 
2817 
2818  if (IsConstTensor(inputs[1]))
2819  {
2820  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2821  armnn::IInputSlot* slot = &(layer->GetInputSlot(0));
2822  RegisterConsumerOfTensor(subgraphIndex, inputTensorIndexes[0], slot);
2823 
2824  auto alphaTensorAndData = CreateConstTensorNonPermuted(inputs[1], alphaTensorInfo,
2825  inputTensorInfo.GetDataType());
2826  std::string constLayerName = fmt::format("Constant:{}", inputs[1]->name);
2827  IConnectableLayer* constLayer =
2828  m_Network->AddConstantLayer(alphaTensorAndData.first, constLayerName.c_str());
2829  ARMNN_ASSERT(constLayer != nullptr);
2830 
2831  constLayer->GetOutputSlot(0).SetTensorInfo(alphaTensorInfo);
2832  constLayer->GetOutputSlot(0).Connect(layer->GetInputSlot(1));
2833  RegisterOutputSlots(subgraphIndex,
2834  VIRTUAL_OPERATOR_ID,
2835  constLayer,
2836  { inputTensorIndexes[1] });
2837  }
2838  else
2839  {
2840  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2841  RegisterInputSlots(subgraphIndex, operatorIndex, layer, inputTensorIndexes);
2842  }
2843 
2844  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
2845  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
2846  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2847 
2848  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2849  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
2850 }
2851 
2852 void TfLiteParserImpl::ParseQuantize(size_t subgraphIndex, size_t operatorIndex)
2853 {
2854  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2855 
2856  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2857  CHECK_VALID_SIZE(inputs.size(), 1);
2858 
2859  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2860  CHECK_VALID_SIZE(outputs.size(), 1);
2861 
2862  auto layerName = fmt::format("Quantize:{}:{}", subgraphIndex, operatorIndex);
2863 
2864  IConnectableLayer* layer = m_Network->AddQuantizeLayer(layerName.c_str());
2865  ARMNN_ASSERT(layer != nullptr);
2866 
2867  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2868  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2869 
2870  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2871  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2872 
2873  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2874  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
2875 }
2876 
2877 void TfLiteParserImpl::ParseRelu(size_t subgraphIndex, size_t operatorIndex)
2878 {
2879  ParseActivation(subgraphIndex,operatorIndex, ActivationFunction::ReLu);
2880 }
2881 
2882 void TfLiteParserImpl::ParseRelu6(size_t subgraphIndex, size_t operatorIndex)
2883 {
2884  ParseActivation(subgraphIndex,operatorIndex, ActivationFunction::BoundedReLu);
2885 }
2886 
2887 void TfLiteParserImpl::ParseLeakyRelu(size_t subgraphIndex, size_t operatorIndex)
2888 {
2889  ParseActivation(subgraphIndex, operatorIndex, ActivationFunction::LeakyReLu);
2890 }
2891 
2892 void TfLiteParserImpl::ParseLogistic(size_t subgraphIndex, size_t operatorIndex)
2893 {
2894  ParseActivation(subgraphIndex,operatorIndex,ActivationFunction::Sigmoid);
2895 }
2896 
2897 void TfLiteParserImpl::ParseTanH(size_t subgraphIndex, size_t operatorIndex)
2898 {
2899  ParseActivation(subgraphIndex,operatorIndex,ActivationFunction::TanH);
2900 }
2901 
2902 void TfLiteParserImpl::ParseElu(size_t subgraphIndex, size_t operatorIndex)
2903 {
2904  ParseActivation(subgraphIndex, operatorIndex, ActivationFunction::Elu);
2905 }
2906 
2907 void TfLiteParserImpl::ParseHardSwish(size_t subgraphIndex, size_t operatorIndex)
2908 {
2909  ParseActivation(subgraphIndex, operatorIndex, ActivationFunction::HardSwish);
2910 }
2911 
2912 void TfLiteParserImpl::ParseActivation(size_t subgraphIndex, size_t operatorIndex, ActivationFunction activationType)
2913 {
2914  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2915  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2916  IgnoreUnused(operatorPtr);
2917 
2918  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2919  CHECK_VALID_SIZE(inputs.size(), 1);
2920 
2921  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2922  CHECK_VALID_SIZE(outputs.size(), 1);
2923 
2924  auto layerName = fmt::format("Activation:");
2925  ActivationDescriptor activationDesc;
2926  activationDesc.m_Function = activationType;
2927 
2928  switch (activationType)
2929  {
2930  case ActivationFunction::ReLu:
2931  {
2932  layerName += fmt::format("RELU:{}:{}", subgraphIndex, operatorIndex);
2933  break;
2934  }
2935  case ActivationFunction::BoundedReLu:
2936  {
2937  layerName += fmt::format("RELU6:{}:{}", subgraphIndex, operatorIndex);
2938  activationDesc.m_A = 6.0f;
2939  activationDesc.m_B = 0.0f;
2940  break;
2941  }
2942  case ActivationFunction::Sigmoid:
2943  {
2944  layerName += fmt::format("SIGMOID:{}:{}", subgraphIndex, operatorIndex);
2945  break;
2946  }
2947  case ActivationFunction::TanH:
2948  {
2949  layerName += fmt::format("TANH:{}:{}", subgraphIndex, operatorIndex);
2950  activationDesc.m_A = 1.0f;
2951  activationDesc.m_B = 1.0f;
2952  break;
2953  }
2954  case ActivationFunction::LeakyReLu:
2955  {
2956  layerName += fmt::format("LEAKYRELU:{}:{}", subgraphIndex, operatorIndex);
2957  const auto* options = operatorPtr->builtin_options.AsLeakyReluOptions();
2958  activationDesc.m_A = options->alpha;
2959  break;
2960  }
2961  case ActivationFunction::Elu:
2962  {
2963  layerName += fmt::format("ELU:{}:{}", subgraphIndex, operatorIndex);
2964  activationDesc.m_A = 1.0f;
2965  break;
2966  }
2967  case ActivationFunction::HardSwish:
2968  {
2969  layerName += fmt::format("HARDSWISH:{}:{}", subgraphIndex, operatorIndex);
2970  break;
2971  }
2972  default:
2973  {
2974  throw ParseException(
2975  fmt::format("Unexpected ActivationFunction[{}] when creating layerName {} ",
2976  static_cast<int>(activationType), CHECK_LOCATION().AsString()));
2977  }
2978  }
2979 
2980  IConnectableLayer* const layer = m_Network->AddActivationLayer(activationDesc, layerName.c_str());
2981 
2982  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
2983  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2984 
2985  // register the input connection slots for the layer, connections are made after all layers have been created
2986  // only the tensors for the inputs are relevant, exclude the const tensors
2987  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2988  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2989 
2990  // register the output connection slots for the layer, connections are made after all layers have been created
2991  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2992  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2993 }
2995  const std::vector<int32_t>& targetDimsIn)
2996 {
2997  std::vector<unsigned int> outputDims(targetDimsIn.begin(), targetDimsIn.end());
2998  const auto stretchDim = std::find(targetDimsIn.begin(), targetDimsIn.end(), -1);
2999 
3000  if (stretchDim != targetDimsIn.end())
3001  {
3002  if (std::find(std::next(stretchDim), targetDimsIn.end(), -1) != targetDimsIn.end())
3003  {
3004  throw ParseException(
3005  fmt::format("At most one component of shape can be -1 {}", CHECK_LOCATION().AsString()));
3006  }
3007 
3008  auto targetNumElements =
3009  armnn::numeric_cast<unsigned int>(
3010  std::accumulate(targetDimsIn.begin(), targetDimsIn.end(), -1, std::multiplies<int32_t>()));
3011 
3012  auto stretchIndex = static_cast<size_t>(std::distance(targetDimsIn.begin(), stretchDim));
3013  outputDims[stretchIndex] = inputTensorInfo.GetNumElements() / targetNumElements;
3014  }
3015 
3016  TensorShape outputShape = TensorShape(static_cast<unsigned int>(outputDims.size()), outputDims.data());
3017 
3018  TensorInfo reshapeInfo = inputTensorInfo;
3019  reshapeInfo.SetShape(outputShape);
3020 
3021  return reshapeInfo;
3022 }
3023 
3024 void TfLiteParserImpl::ParseReshape(size_t subgraphIndex, size_t operatorIndex)
3025 {
3026  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3027 
3028  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3029 
3030  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3031  CHECK_VALID_SIZE(outputs.size(), 1);
3032 
3033  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3034  const auto* options = operatorPtr->builtin_options.AsReshapeOptions();
3035  auto layerName = fmt::format("Reshape:{}:{}", subgraphIndex, operatorIndex);
3036 
3037  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
3038  armnn::TensorInfo actualOutputTensorInfo = ToTensorInfo(outputs[0]);
3039  CheckMatchingQuantization(inputTensorInfo, actualOutputTensorInfo, layerName, "Input 0", "Output 0");
3040 
3041  // Extracting new shape for the output
3042  // There are two ways it can be passed
3043  // * First is to define the target shape in the operator built-in options
3044  // * Second is to pass it as a second input tensor
3045  std::vector<int32_t> targetShape;
3046  bool targetShapeFound = false;
3047  // Check if built-in options were given
3048  if (options != nullptr)
3049  {
3050  // make sure the parameter is given
3051  if (options->new_shape.empty() == false)
3052  {
3053  targetShape = options->new_shape;
3054  targetShapeFound = true;
3055  }
3056  }
3057 
3058  // If there is no built-in option given or if the built-in new_shape parameter was empty
3059  if (!targetShapeFound)
3060  {
3061  // Check for a second input tensor
3062  if (inputs.size() > 1 && inputs[1] != nullptr)
3063  {
3064  if (inputs[1]->is_variable)
3065  {
3066  ARMNN_THROW_PARSE_EXCEPTION( "Target shapes defined in non-const input tensors is not supported");
3067  }
3068 
3069  if (inputs[1]->shape.size() != 1)
3070  {
3071  ARMNN_THROW_PARSE_EXCEPTION("Target 'shape' input is not a 1D tensor");
3072  }
3073 
3074  if (inputs[1]->type != tflite::TensorType_INT32)
3075  {
3076  ARMNN_THROW_PARSE_EXCEPTION("Target 'shape' input is not an int32 type");
3077  }
3078 
3079  // Extract target shape from input
3080  auto bufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
3081  auto values = reinterpret_cast<const int32_t*>(bufferPtr->data.data());
3082  if (values)
3083  {
3084  for (int i = 0; i < inputs[1]->shape[0]; ++i)
3085  {
3086  targetShape.push_back(values[i]);
3087  }
3088  }
3089  else
3090  {
3091  try
3092  {
3093  // We attempt to infer during Runtime.
3094  TensorShape reshapeShapes = ToTensorInfo(inputs[1]).GetShape();
3095 
3096  if (reshapeShapes[0] == actualOutputTensorInfo.GetNumDimensions())
3097  {
3098  for (unsigned int i = 0; i < actualOutputTensorInfo.GetShape().GetNumDimensions(); ++i)
3099  {
3100  targetShape.push_back(actualOutputTensorInfo.GetShape()[i]);
3101  }
3102  }
3103  // The parser only supports shape (batch, -1) or (-1) for non-constant shape input.
3104  else if (reshapeShapes[0] > 2)
3105  {
3106  throw ParseException(fmt::format("Invalid input shape '{}' in Reshape layer '{}' {}. "
3107  "When inferring during runtime, the parser only supports "
3108  "shape (batch, -1) or (-1) for target shape input.",
3109  reshapeShapes[0],
3110  layerName,
3111  CHECK_LOCATION().AsString()));
3112  }
3113  else
3114  {
3115  const int32_t numInputElements = inputTensorInfo.GetNumElements();
3116  const int32_t inputTensorShape = inputTensorInfo.GetShape()[0];
3117  if (reshapeShapes[0] == 1)
3118  {
3119  targetShape = {numInputElements};
3120  }
3121  else if (reshapeShapes[0] == 2)
3122  {
3123  targetShape = {inputTensorShape, numInputElements / inputTensorShape};
3124  }
3125  }
3126  }
3127  catch (const std::exception& exc)
3128  {
3129  ARMNN_THROW_PARSE_EXCEPTION("Failed attempt to infer during runtime the target shape input for "
3130  "Reshape operation. Reshape operator target shape input buffer data "
3131  "is null. " << exc.what());
3132  }
3133  }
3134  }
3135  else
3136  {
3137  ARMNN_THROW_PARSE_EXCEPTION("Target shape not defined in reshape parameters or input tensor. "
3138  "At least one method required");
3139  }
3140  }
3141 
3142  armnn::TensorInfo reshapeOutputTensorInfo =
3143  TfLiteParserImpl::OutputShapeOfReshape(inputTensorInfo, targetShape);
3144 
3145  // Check for valid input size and that reshape parameters equal output shape
3146  // The output shape can be provided to us in 2 ways:
3147  // 1. through the normal 'shape' parameter given by outputs[indx]->shape
3148  // 2. through additional parameter 'shape_signature' given by outputs[indx]->buffer.
3149  // This parameter can sometimes contain -1 value not visible in the 'shape' parameter.
3150  const armnn::TensorShape& reshapeOutputTensorShape = reshapeOutputTensorInfo.GetShape();
3151  if (inputs.size() > 1 && !CheckShape(reshapeOutputTensorShape, outputs[0]->shape))
3152  {
3153  // Attempt to extract output shape from secondary 'shape_signature'
3154  // parameter and try to CheckShape() with this param.
3155  std::vector<int32_t> secondaryOutputTargetShape = outputs[0]->shape_signature;
3156 
3157  // if outputs[0]->shape_signature contain a -1 value, we need to compute its actual value
3158  // from reshape input in order to correctly verify reshape parameters equal output shape
3159  armnn::TensorInfo secondaryReshapeOutputTensorInfo =
3160  TfLiteParserImpl::OutputShapeOfReshape(inputTensorInfo, secondaryOutputTargetShape);
3161 
3162  if (!CheckShape(reshapeOutputTensorShape, secondaryReshapeOutputTensorInfo.GetShape()))
3163  {
3164  std::stringstream ss;
3165  ss << "New shape defined in reshape parameters "
3166  << reshapeOutputTensorShape
3167  << " does not equal output shape "
3168  << actualOutputTensorInfo.GetShape()
3169  << ": "
3170  << CHECK_LOCATION().AsString();
3171  throw ParseException(ss.str());
3172  }
3173  }
3174  auto outputTensorIds = GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex);
3175 
3176  ReshapeDescriptor reshapeDesc;
3177  reshapeDesc.m_TargetShape = reshapeOutputTensorInfo.GetShape();
3178  m_TensorInfos[outputTensorIds[0]] = reshapeOutputTensorInfo;
3179 
3180  IConnectableLayer* layer = m_Network->AddReshapeLayer(reshapeDesc, layerName.c_str());
3181  ARMNN_ASSERT(layer != nullptr);
3182  layer->GetOutputSlot(0).SetTensorInfo(reshapeOutputTensorInfo);
3183 
3184  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3185  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
3186 
3187  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3188  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
3189 }
3190 
3191 void TfLiteParserImpl::ParseResizeBilinear(size_t subgraphIndex, size_t operatorIndex)
3192 {
3193  ParseResize(subgraphIndex, operatorIndex, ResizeMethod::Bilinear);
3194 }
3195 
3196 void TfLiteParserImpl::ParseResizeNearestNeighbor(size_t subgraphIndex, size_t operatorIndex)
3197 {
3198  ParseResize(subgraphIndex, operatorIndex, ResizeMethod::NearestNeighbor);
3199 }
3200 
3201 void TfLiteParserImpl::ParseResize(size_t subgraphIndex, size_t operatorIndex, ResizeMethod resizeMethod)
3202 {
3203  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3204 
3205  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3206  CHECK_VALID_SIZE(inputs.size(), 2);
3207 
3208  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3209  CHECK_VALID_SIZE(outputs.size(), 1);
3210 
3211  armnn::TensorInfo sizeTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
3212 
3213  // Data for the parsed tensor args (size) must be stored locally.
3214  std::vector<int32_t> sizeTensorData(sizeTensorInfo.GetNumElements());
3215 
3216  BufferRawPtr sizeBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
3217  ::memcpy(sizeTensorData.data(), sizeBufferPtr->data.data(), sizeTensorInfo.GetNumBytes());
3218 
3219  ResizeDescriptor desc;
3220  desc.m_Method = resizeMethod;
3221  desc.m_TargetHeight = static_cast<uint32_t> (sizeTensorData[0]);
3222  desc.m_TargetWidth = static_cast<uint32_t> (sizeTensorData[1]);
3224 
3225  auto layerName = fmt::format("Resize:");
3226 
3227  switch (resizeMethod)
3228  {
3229  case ResizeMethod::Bilinear:
3230  {
3231  layerName += fmt::format("BILINEAR:{}:{}", subgraphIndex, operatorIndex);
3232 
3233  const auto & operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3234  const auto * options = operatorPtr->builtin_options.AsResizeBilinearOptions();
3235 
3236  desc.m_AlignCorners = options->align_corners;
3237  break;
3238  }
3239  case ResizeMethod::NearestNeighbor:
3240  {
3241  layerName += fmt::format("NEARESTNEIGHBOR:{}:{}", subgraphIndex, operatorIndex);
3242  break;
3243  }
3244  default:
3245  {
3246  throw ParseException(
3247  fmt::format("Unexpected ResizeMethod[{}] when creating layerName {} ",
3248  static_cast<int>(resizeMethod), CHECK_LOCATION().AsString()));
3249  }
3250  }
3251 
3252  TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
3253 
3254  IConnectableLayer* layer = m_Network->AddResizeLayer(desc, layerName.c_str());
3255  ARMNN_ASSERT(layer != nullptr);
3256  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
3257  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
3258  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3259 
3260  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3261  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
3262 
3263  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3264  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
3265 }
3266 
3267 void TfLiteParserImpl::ParseConcatenation(size_t subgraphIndex, size_t operatorIndex)
3268 {
3269  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3270 
3271  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3272  const auto* options = operatorPtr->builtin_options.AsConcatenationOptions();
3273 
3274  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
3275 
3276  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3277  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3278  auto inputTensorIds = GetInputTensorIds(m_Model, subgraphIndex, operatorIndex);
3279 
3280  CHECK_VALID_SIZE(outputs.size(), 1);
3281 
3282  unsigned int numConcatView = static_cast<unsigned int>(inputs.size());
3283  uint32_t inputRank = InputTensorInfo(subgraphIndex, operatorIndex, 0).GetNumDimensions();
3284 
3285  const unsigned int concatDimInput = static_cast<unsigned int>(
3286  (static_cast<int>(inputRank) + options->axis) % static_cast<int>(inputRank));
3287 
3288  OriginsDescriptor concatDescriptor(static_cast<uint32_t>(numConcatView), inputRank);
3289  concatDescriptor.SetConcatAxis(concatDimInput);
3290  unsigned int mergeDimOrigin = 0;
3291 
3292  for (unsigned int viewIndex = 0; viewIndex < numConcatView; ++viewIndex)
3293  {
3294  TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, viewIndex);
3295 
3296  // This set up concatDescriptor view origin
3298  inputTensorInfo, concatDescriptor, concatDimInput, viewIndex, mergeDimOrigin);
3299  }
3300 
3301  auto layerName = fmt::format("Concatenation:{}:{}", subgraphIndex, operatorIndex);
3302 
3303  IConnectableLayer* layer = m_Network->AddConcatLayer(concatDescriptor, layerName.c_str());
3304  ARMNN_ASSERT(layer != nullptr);
3305  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {});
3306  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3307 
3308  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3309  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes});
3310 
3311  // add fused activation layer
3312  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
3313 
3314  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3315  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
3316 }
3317 
3318 void TfLiteParserImpl::ParseFullyConnected(size_t subgraphIndex, size_t operatorIndex)
3319 {
3320  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3321 
3322  const auto& operatorRfr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3323  const auto options = operatorRfr->builtin_options.AsFullyConnectedOptions();
3324 
3325  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
3326 
3328  desc.m_BiasEnabled = false;
3329  desc.m_TransposeWeightMatrix = true;
3330 
3331  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3332  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3333  CHECK_VALID_SIZE(outputs.size(), 1);
3334 
3335  armnn::TensorInfo filterTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
3336 
3337  // Fully Connected Layer accepts two dimensional weights input
3338  int32_t weightsDimension = static_cast<int32_t>(filterTensorInfo.GetNumDimensions());
3339  if (weightsDimension != 2)
3340  {
3341  throw ParseException(
3342  fmt::format("Dimension {} for Fully Connected weights is not supported by Armnn. "
3343  "Node {}",
3344  weightsDimension,
3345  CHECK_LOCATION().AsString()));
3346  }
3347 
3348  armnn::IConnectableLayer* layer = nullptr;
3349  auto layerName = fmt::format("FullyConnected:{}:{}", subgraphIndex, operatorIndex);
3350 
3351  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3352  // Add the first input tensor to the registration list
3353  std::vector<unsigned int> tensorIndexesToRegister = {inputTensorIndexes[0]};
3354  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
3355 
3356  desc.m_ConstantWeights = IsConstTensor(inputs[1]);
3357 
3358  // Add the weights input to the registration list, constant layers will be added by SetupConstantLayers if constant.
3359  tensorIndexesToRegister.emplace_back(inputTensorIndexes[1]);
3360 
3361  if (ShouldConstantTensorBeConverted(inputs[1], inputTensorInfo.GetDataType(), filterTensorInfo.GetDataType()))
3362  {
3363  m_ConstantsToDequantize.emplace_back(inputs[1]->buffer);
3364  }
3365 
3366  if (inputs.size() == 3)
3367  {
3368  desc.m_BiasEnabled = true;
3369  armnn::TensorInfo biasTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
3370 
3371  // Add the biases input to the registration list, constant layer will be added by SetupConstantLayers.
3372  tensorIndexesToRegister.emplace_back(inputTensorIndexes[2]);
3373 
3374  if (ShouldConstantTensorBeConverted(inputs[2], inputTensorInfo.GetDataType(), biasTensorInfo.GetDataType()))
3375  {
3376  m_ConstantsToDequantize.emplace_back(inputs[2]->buffer);
3377  }
3378  }
3379 
3380  // Filters and biases are always passed to fully connected as inputs
3381  layer = m_Network->AddFullyConnectedLayer(desc, layerName.c_str());
3382 
3383  ARMNN_ASSERT(layer != nullptr);
3384 
3385  unsigned int startingSlotIndex = 0;
3386  if (inputTensorInfo.GetNumDimensions() > 2)
3387  {
3388  // Add reshape to flatten to 2D [batch_size, input_size],
3389  // where "input_size" corresponds to the number of inputs to the layer,
3390  // matching the second dimension of weights,
3391  // and "batch_size" is calculated by dividing the number of elements by "input_size".
3392  std::vector<unsigned int> reshapedDimensions(2);
3393  reshapedDimensions[1] = filterTensorInfo.GetShape()[1];
3394  reshapedDimensions[0] = inputTensorInfo.GetNumElements() / reshapedDimensions[1];
3395 
3396  if (inputTensorInfo.GetNumElements() % reshapedDimensions[1] != 0)
3397  {
3398  throw ParseException(
3399  fmt::format("Failed to deduce input tensor shape from filter size {} {}",
3400  reshapedDimensions[1],
3401  CHECK_LOCATION().AsString()));
3402  }
3403 
3404  armnn::TensorInfo reshapedTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
3405  reshapedTensorInfo.SetShape(armnn::TensorShape{ 2, reshapedDimensions.data() });
3406  inputTensorInfo = reshapedTensorInfo;
3407 
3408  std::string reshapeLayerName = fmt::format("Reshape_for:{}", layer->GetName());
3409  armnn::ReshapeDescriptor reshapeDescriptor;
3410  reshapeDescriptor.m_TargetShape = reshapedTensorInfo.GetShape();
3411  armnn::IConnectableLayer* reshapeLayer = m_Network->AddReshapeLayer(reshapeDescriptor,
3412  reshapeLayerName.c_str());
3413 
3414  reshapeLayer->GetOutputSlot(0).SetTensorInfo(reshapedTensorInfo);
3415  reshapeLayer->GetOutputSlot(0).Connect(layer->GetInputSlot(0));
3416 
3417  RegisterInputSlots(subgraphIndex, operatorIndex, reshapeLayer, {inputTensorIndexes[0]});
3418  // Fc layer connects to the reshape layer, so we skip the first input slot when registering fc's input slots
3419  tensorIndexesToRegister.erase(tensorIndexesToRegister.begin());
3420  startingSlotIndex = 1;
3421  }
3422 
3423  RegisterInputSlots(subgraphIndex, operatorIndex, layer, tensorIndexesToRegister, startingSlotIndex);
3424 
3425  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromShapes(subgraphIndex, operatorIndex, layer, 0,
3426  { inputTensorInfo.GetShape(),
3427  filterTensorInfo.GetShape() });
3428 
3429  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3430 
3431  if (outputTensorInfo.GetNumDimensions() > 2)
3432  {
3433  // Calculate reshape to flatten to 2D [batch_size, input_size]
3434  std::vector<unsigned int> reshapedDimensions(2);
3435  reshapedDimensions[1] = filterTensorInfo.GetShape()[0];
3436  reshapedDimensions[0] = outputTensorInfo.GetNumElements() / reshapedDimensions[1];
3437  armnn::TensorInfo reshapedOutputTensorInfo = outputTensorInfo;
3438  if (outputTensorInfo.GetNumElements() % reshapedDimensions[1] != 0)
3439  {
3440  throw ParseException(
3441  fmt::format("Failed to deduce output tensor shape from filter size {} {}",
3442  reshapedDimensions[1],
3443  CHECK_LOCATION().AsString()));
3444  }
3445  reshapedOutputTensorInfo.SetShape(armnn::TensorShape{ 2, reshapedDimensions.data() });
3446  layer->GetOutputSlot(0).SetTensorInfo(reshapedOutputTensorInfo);
3447 
3448  std::string reshapeLayerName = fmt::format("ExpandDims:{}:{}", subgraphIndex, operatorIndex);
3449  layer = AddReshapeLayer(layer, 0, reshapeLayerName, outputTensorInfo);
3450  }
3451 
3452  // we need to add the activation layer and fortunately we don't need to care about the data layout
3453  armnn::IConnectableLayer* fusedActivationLayer = AddFusedActivationLayer(layer, 0,
3454  options->fused_activation_function);
3455 
3456  // register the output connection slots for the layer, connections are made after all layers have been created
3457  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3458  RegisterOutputSlots(subgraphIndex, operatorIndex, fusedActivationLayer, {outputTensorIndexes[0]});
3459 
3460  m_TensorInfos[outputTensorIndexes[0]] = layer->GetOutputSlot(0).GetTensorInfo();
3461 }
3462 
3463 void TfLiteParserImpl::ParseDetectionPostProcess(size_t subgraphIndex, size_t operatorIndex)
3464 {
3465  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3466 
3467  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3468 
3469  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3470  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3471  CHECK_VALID_SIZE(outputs.size(), 4);
3472 
3473  // Obtain custom options from flexbuffers
3474  auto custom_options = operatorPtr->custom_options;
3475  const flexbuffers::Map& m = flexbuffers::GetRoot(custom_options.data(), custom_options.size()).AsMap();
3476 
3477  // Obtain descriptor information from tf lite
3479  desc.m_MaxDetections = m["max_detections"].AsUInt32();
3480  desc.m_MaxClassesPerDetection = m["max_classes_per_detection"].AsUInt32();
3481  desc.m_NmsScoreThreshold = m["nms_score_threshold"].AsFloat();
3482  desc.m_NmsIouThreshold = m["nms_iou_threshold"].AsFloat();
3483  desc.m_NumClasses = m["num_classes"].AsUInt32();
3484  desc.m_ScaleH = m["h_scale"].AsFloat();
3485  desc.m_ScaleW = m["w_scale"].AsFloat();
3486  desc.m_ScaleX = m["x_scale"].AsFloat();
3487  desc.m_ScaleY = m["y_scale"].AsFloat();
3488 
3489  if (!(m["use_regular_nms"].IsNull()))
3490  {
3491  desc.m_UseRegularNms = m["use_regular_nms"].AsBool();
3492  }
3493  if (!(m["detections_per_class"].IsNull()))
3494  {
3495  desc.m_DetectionsPerClass = m["detections_per_class"].AsUInt32();
3496  }
3497 
3498  if (desc.m_NmsIouThreshold <= 0.0f || desc.m_NmsIouThreshold > 1.0f)
3499  {
3500  throw InvalidArgumentException("DetectionPostProcessTFLiteParser: Intersection over union threshold "
3501  "must be positive and less than or equal to 1.");
3502  }
3503 
3504  armnn::TensorInfo anchorTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 2);
3505  auto anchorTensorAndData = CreateConstTensorNonPermuted(inputs[2], anchorTensorInfo);
3506 
3507  auto layerName = fmt::format("DetectionPostProcess:{}:{}", subgraphIndex, operatorIndex);
3508  IConnectableLayer* layer = m_Network->AddDetectionPostProcessLayer(desc, anchorTensorAndData,
3509  layerName.c_str());
3510 
3511  ARMNN_ASSERT(layer != nullptr);
3512 
3513  // The model does not specify the output shapes.
3514  // The output shapes are calculated from the max_detection and max_classes_per_detection.
3515  unsigned int numDetectedBox = desc.m_MaxDetections * desc.m_MaxClassesPerDetection;
3516  m_OverriddenOutputShapes.push_back({ 1, numDetectedBox, 4 });
3517  m_OverriddenOutputShapes.push_back({ 1, numDetectedBox });
3518  m_OverriddenOutputShapes.push_back({ 1, numDetectedBox });
3519  m_OverriddenOutputShapes.push_back({ 1 });
3520 
3521  for (unsigned int i = 0 ; i < outputs.size() ; ++i)
3522  {
3523  armnn::TensorInfo detectionBoxOutputTensorInfo = ToTensorInfo(outputs[i], m_OverriddenOutputShapes[i]);
3524  layer->GetOutputSlot(i).SetTensorInfo(detectionBoxOutputTensorInfo);
3525  }
3526 
3527  // Register the input connection slots for the layer, connections are made after all layers have been created
3528  // only the tensors for the inputs are relevant, exclude the const tensors
3529  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3530  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
3531 
3532  // Register the output connection slots for the layer, connections are made after all layers have been created
3533  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3534  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0],
3535  outputTensorIndexes[1],
3536  outputTensorIndexes[2],
3537  outputTensorIndexes[3]});
3538 }
3539 
3540 /// The TfLite Pack operator is equivalent to the ArmNN Stack operator
3541 void TfLiteParserImpl::ParsePack(size_t subgraphIndex, size_t operatorIndex)
3542 {
3543  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3544 
3545  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3546  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3547  CHECK_VALID_SIZE(outputs.size(), 1);
3548 
3549  if (inputs.size() < 1)
3550  {
3551  throw ParseException("Pack must have at least one input.");
3552  }
3553 
3554  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3555  const auto* options = operatorPtr->builtin_options.AsPackOptions();
3556 
3557  StackDescriptor desc;
3558  desc.m_Axis = static_cast<uint32_t>(options->axis);
3559  desc.m_NumInputs = static_cast<uint32_t>(inputs.size());
3560 
3561  // Use the tensor shape of the first input as the "correct" input shape in the descriptor
3562  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
3563  desc.m_InputShape = inputTensorInfo.GetShape();
3564 
3565  auto layerName = fmt::format("Pack:{}:{}", subgraphIndex, operatorIndex);
3566  IConnectableLayer* layer = m_Network->AddStackLayer(desc, layerName.c_str());
3567 
3568  ARMNN_ASSERT(layer != nullptr);
3569 
3570  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {});
3571  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3572 
3573  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3574  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes});
3575 
3576  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3577  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
3578 }
3579 
3580 void TfLiteParserImpl::ParseUnidirectionalSequenceLSTM(size_t subgraphIndex, size_t operatorIndex)
3581 {
3582  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3583 
3584  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3585  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3586 
3587  if (inputs.size() < 2)
3588  {
3589  throw ParseException("UnidirectionalSequenceLSTM must have at least 2 input.");
3590  }
3591 
3592  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3593  const auto& subgraphPtr = m_Model->subgraphs[subgraphIndex];
3594  const auto nodeParams = operatorPtr->builtin_options.AsUnidirectionalSequenceLSTMOptions();
3595  CHECK_SUPPORTED_FUSED_ACTIVATION(nodeParams, subgraphIndex, operatorIndex);
3596  auto inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
3597  auto outputTensorInfo = ToTensorInfo(outputs[0]);
3598 
3599  // Set the params structure for the AddUnidirectionalSequenceLstmLayer call
3600  // Please refer to each operand at
3601  // https://www.tensorflow.org/mlir/tfl_ops#tflunidirectional_sequence_lstm_tflunidirectionalsequencelstmop
3602  armnn::LstmInputParams params;
3603 
3604  if (IsOptionalOperandPresent(operatorPtr->inputs[1]))
3605  {
3606  params.m_InputToInputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[1]].get(),
3607  inputTensorInfo).first;
3608  }
3609 
3610  params.m_InputToForgetWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[2]].get(),
3611  inputTensorInfo).first;
3612  params.m_InputToCellWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[3]].get(),
3613  inputTensorInfo).first;
3614  params.m_InputToOutputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[4]].get(),
3615  inputTensorInfo).first;
3616 
3617  // Recurrent weight tensors of size {n_cell, n_output}
3618  if (IsOptionalOperandPresent(operatorPtr->inputs[5]))
3619  {
3620  params.m_RecurrentToInputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[5]].get(),
3621  inputTensorInfo).first;
3622  }
3623 
3624  params.m_RecurrentToForgetWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[6]].get(),
3625  inputTensorInfo).first;
3626  params.m_RecurrentToCellWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[7]].get(),
3627  inputTensorInfo).first;
3628  params.m_RecurrentToOutputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[8]].get(),
3629  inputTensorInfo).first;
3630 
3631  // Peephole weights tensors of size {n_cell}, representing a diagonal matrix.
3632  if (IsOptionalOperandPresent(operatorPtr->inputs[9]))
3633  {
3634  params.m_CellToInputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[9]].get(),
3635  inputTensorInfo).first;
3636  }
3637 
3638  if (IsOptionalOperandPresent(operatorPtr->inputs[10]))
3639  {
3640  params.m_CellToForgetWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[10]].get(),
3641  inputTensorInfo).first;
3642  }
3643 
3644  if (IsOptionalOperandPresent(operatorPtr->inputs[11]))
3645  {
3646  params.m_CellToOutputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[11]].get(),
3647  inputTensorInfo).first;
3648  }
3649 
3650  // Gates bias tensors of size {n_cell}
3651  if (IsOptionalOperandPresent(operatorPtr->inputs[12]))
3652  {
3653  params.m_InputGateBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[12]].get(),
3654  inputTensorInfo).first;
3655  }
3656 
3657  params.m_ForgetGateBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[13]].get(),
3658  inputTensorInfo).first;
3659  params.m_CellBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[14]].get(),
3660  inputTensorInfo).first;
3661  params.m_OutputGateBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[15]].get(),
3662  inputTensorInfo).first;
3663 
3664  // Projection weight tensor of size {n_output, n_cell}
3665  if (IsOptionalOperandPresent(operatorPtr->inputs[16]))
3666  {
3667  params.m_ProjectionWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[16]].get(),
3668  inputTensorInfo).first;
3669  }
3670  // Projection bias tensor of size {n_output}
3671  if (IsOptionalOperandPresent(operatorPtr->inputs[17]))
3672  {
3673  params.m_ProjectionBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[17]].get(),
3674  inputTensorInfo).first;
3675  }
3676 
3677  // These state tensors are defined as variable tensors, and will be modified by this op.
3678  armnn::TensorInfo outputStateInInfo = ToTensorInfo(subgraphPtr->tensors[operatorPtr->inputs[18]].get());
3679  m_ConstantsToBeCreated.push_back(operatorPtr->inputs[18]);
3680  armnn::TensorInfo cellStateInInfo = ToTensorInfo(subgraphPtr->tensors[operatorPtr->inputs[19]].get());
3681  m_ConstantsToBeCreated.push_back(operatorPtr->inputs[19]);
3682 
3683  // Layer norm coefficient tensors of size {n_cell}, representing a diagonal matrix.
3684  if (inputs.size() >= 21 && IsOptionalOperandPresent(operatorPtr->inputs[20]))
3685  {
3686  params.m_InputLayerNormWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[20]].get(),
3687  inputTensorInfo).first;
3688  }
3689 
3690  if (inputs.size() >= 22 && IsOptionalOperandPresent(operatorPtr->inputs[21]))
3691  {
3692  params.m_ForgetLayerNormWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[21]].get(),
3693  inputTensorInfo).first;
3694  }
3695 
3696  if (inputs.size() >= 23 && IsOptionalOperandPresent(operatorPtr->inputs[22]))
3697  {
3698  params.m_CellLayerNormWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[22]].get(),
3699  inputTensorInfo).first;
3700  }
3701 
3702  if (inputs.size() >= 24 && IsOptionalOperandPresent(operatorPtr->inputs[23]))
3703  {
3704  params.m_OutputLayerNormWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[23]].get(),
3705  inputTensorInfo).first;
3706  }
3707 
3708  // set the layer descriptor
3710  desc.m_ActivationFunc = nodeParams->fused_activation_function;
3711  desc.m_ClippingThresCell = nodeParams->cell_clip;
3712  desc.m_ClippingThresProj = nodeParams->proj_clip;
3713  desc.m_CifgEnabled = (params.m_InputToInputWeights == nullptr
3714  || params.m_RecurrentToInputWeights == nullptr
3715  || params.m_InputGateBias == nullptr);
3716  desc.m_PeepholeEnabled = (params.m_CellToForgetWeights != nullptr || params.m_CellToOutputWeights != nullptr);
3717  desc.m_ProjectionEnabled = (params.m_ProjectionWeights != nullptr);
3718  desc.m_LayerNormEnabled = (params.m_InputLayerNormWeights != nullptr
3719  || params.m_ForgetLayerNormWeights != nullptr
3720  || params.m_CellLayerNormWeights != nullptr
3721  || params.m_OutputLayerNormWeights != nullptr);
3722  desc.m_TimeMajor = nodeParams->time_major;
3723 
3724  if (operatorPtr->intermediates.size() > 3 && desc.m_LayerNormEnabled)
3725  {
3726  auto inputIntermediate = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[0]].get(),
3727  inputTensorInfo).first;
3728  auto inputIntermediateTensorInfo = inputIntermediate->GetInfo();
3729  desc.m_InputIntermediateScale = inputIntermediateTensorInfo.GetQuantizationScale();
3730 
3731  auto forgetIntermediate = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[1]].get(),
3732  inputTensorInfo).first;
3733  auto forgetIntermediateTensorInfo = forgetIntermediate->GetInfo();
3734  desc.m_ForgetIntermediateScale = forgetIntermediateTensorInfo.GetQuantizationScale();
3735 
3736  auto cellIntermediate = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[2]].get(),
3737  inputTensorInfo).first;
3738  auto cellIntermediateTensorInfo = cellIntermediate->GetInfo();
3739  desc.m_CellIntermediateScale = cellIntermediateTensorInfo.GetQuantizationScale();
3740 
3741  auto outputIntermediate = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[3]].get(),
3742  inputTensorInfo).first;
3743  auto outputIntermediateTensorInfo = outputIntermediate->GetInfo();
3744  desc.m_OutputIntermediateScale = outputIntermediateTensorInfo.GetQuantizationScale();
3745  }
3746  else
3747  {
3748  float defaultIntermediate = std::pow(2, -12);
3749  desc.m_InputIntermediateScale = defaultIntermediate;
3750  desc.m_ForgetIntermediateScale = defaultIntermediate;
3751  desc.m_CellIntermediateScale = defaultIntermediate;
3752  desc.m_OutputIntermediateScale = defaultIntermediate;
3753  }
3754 
3755  if (operatorPtr->intermediates.size() > 4)
3756  {
3757  auto hiddentensor = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[4]].get(),
3758  inputTensorInfo).first;
3759 
3760  desc.m_HiddenStateScale = hiddentensor->GetInfo().GetQuantizationScale();
3761  desc.m_HiddenStateZeroPoint = hiddentensor->GetInfo().GetQuantizationOffset();
3762  }
3763  unsigned int batchSize = inputTensorInfo.GetShape()[0];
3764  unsigned int outputSize = outputTensorInfo.GetShape()[2];
3765  unsigned int numUnits = cellStateInInfo.GetShape()[1];
3766 
3767  armnn::DataType dataType = inputTensorInfo.GetDataType();
3768  float qScale = inputTensorInfo.GetQuantizationScale();
3769  float qOffset = inputTensorInfo.GetQuantizationOffset();
3770 
3771  armnn::TensorInfo scratchBufferTensorInfo({batchSize, numUnits * 3}, dataType, qScale, qOffset);
3772  if (!desc.m_CifgEnabled)
3773  {
3774  scratchBufferTensorInfo = armnn::TensorInfo({batchSize, numUnits * 4}, dataType, qScale, qOffset);
3775  }
3776  armnn::TensorInfo cellStateOutTensorInfo({batchSize, numUnits},
3777  cellStateInInfo.GetDataType(),
3778  cellStateInInfo.GetQuantizationScale(),
3779  cellStateInInfo.GetQuantizationOffset());
3780  armnn::TensorInfo outputStateOutTensorInfo({batchSize, outputSize}, dataType, qScale, qOffset);
3781 
3782  armnn::LstmInputParamsInfo paramsInfo;
3783  paramsInfo.m_InputToForgetWeights = &(params.m_InputToForgetWeights->GetInfo());
3784  paramsInfo.m_InputToCellWeights = &(params.m_InputToCellWeights->GetInfo());
3785  paramsInfo.m_InputToOutputWeights = &(params.m_InputToOutputWeights->GetInfo());
3786  paramsInfo.m_RecurrentToForgetWeights = &(params.m_RecurrentToForgetWeights->GetInfo());
3787  paramsInfo.m_RecurrentToCellWeights = &(params.m_RecurrentToCellWeights->GetInfo());
3788  paramsInfo.m_RecurrentToOutputWeights = &(params.m_RecurrentToOutputWeights->GetInfo());
3789  paramsInfo.m_ForgetGateBias = &(params.m_ForgetGateBias->GetInfo());
3790  paramsInfo.m_CellBias = &(params.m_CellBias->GetInfo());
3791  paramsInfo.m_OutputGateBias = &(params.m_OutputGateBias->GetInfo());
3792 
3793  if (!desc.m_CifgEnabled)
3794  {
3795  paramsInfo.m_InputToInputWeights = &(params.m_InputToInputWeights->GetInfo());
3796  paramsInfo.m_RecurrentToInputWeights = &(params.m_RecurrentToInputWeights->GetInfo());
3797  if (params.m_CellToInputWeights != nullptr)
3798  {
3799  paramsInfo.m_CellToInputWeights = &(params.m_CellToInputWeights->GetInfo());
3800  }
3801  paramsInfo.m_InputGateBias = &(params.m_InputGateBias->GetInfo());
3802  }
3803 
3804  if (desc.m_ProjectionEnabled)
3805  {
3806  paramsInfo.m_ProjectionWeights = &(params.m_ProjectionWeights->GetInfo());
3807  if (params.m_ProjectionBias != nullptr)
3808  {
3809  paramsInfo.m_ProjectionBias = &(params.m_ProjectionBias->GetInfo());
3810  }
3811  }
3812 
3813  if (desc.m_PeepholeEnabled)
3814  {
3815  paramsInfo.m_CellToForgetWeights = &(params.m_CellToForgetWeights->GetInfo());
3816  paramsInfo.m_CellToOutputWeights = &(params.m_CellToOutputWeights->GetInfo());
3817  }
3818 
3819  if (desc.m_LayerNormEnabled)
3820  {
3821  if(!desc.m_CifgEnabled)
3822  {
3823  paramsInfo.m_InputLayerNormWeights = &(params.m_InputLayerNormWeights->GetInfo());
3824  }
3825  paramsInfo.m_ForgetLayerNormWeights = &(params.m_ForgetLayerNormWeights->GetInfo());
3826  paramsInfo.m_CellLayerNormWeights = &(params.m_CellLayerNormWeights->GetInfo());
3827  paramsInfo.m_OutputLayerNormWeights = &(params.m_OutputLayerNormWeights->GetInfo());
3828  }
3829 
3830  auto layerName = fmt::format("UnidirectionalSequenceLSTM:{}:{}", subgraphIndex, operatorIndex);
3831  armnn::IConnectableLayer* layer = m_Network->AddUnidirectionalSequenceLstmLayer(desc, params);
3832  ARMNN_ASSERT(layer != nullptr);
3833 
3834  // register the input connection slots for the layer, connections are made after all layers have been created
3835  // only the tensors for the inputs are relevant, exclude the const tensors
3836  auto inputTensorIndexes = AsUnsignedVector({operatorPtr->inputs[0],
3837  operatorPtr->inputs[18],
3838  operatorPtr->inputs[19]});
3839  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0],
3840  inputTensorIndexes[1],
3841  inputTensorIndexes[2]});
3842 
3843  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3844 
3845  layer->GetOutputSlot(0).SetTensorInfo(outputStateOutTensorInfo);
3846  layer->GetOutputSlot(1).SetTensorInfo(cellStateOutTensorInfo);
3847  layer->GetOutputSlot(2).SetTensorInfo(outputTensorInfo);
3848 
3849  unsigned int tensorIndex = outputTensorIndexes[0];
3850  armnn::IOutputSlot* slot = &(layer->GetOutputSlot(2));
3851  RegisterProducerOfTensor(subgraphIndex, tensorIndex, slot);
3852 }
3853 
3854 void TfLiteParserImpl::ParseUnpack(size_t subgraphIndex, size_t operatorIndex)
3855 {
3856  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3857 
3858  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3859  const auto* options = operatorPtr->builtin_options.AsUnpackOptions();
3860 
3861  // This unpackAxis indicates the axis to unpack
3862  const unsigned int unpackAxis = CHECKED_NON_NEGATIVE(options->axis);
3863 
3864  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3865  CHECK_VALID_SIZE(inputs.size(), 1);
3866 
3867  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
3868 
3869  if (unpackAxis >= inputTensorInfo.GetNumDimensions())
3870  {
3871  throw ParseException(
3872  fmt::format("The unpack axis: {} cannot be greater than or equal to "
3873  "the number of input dimension {} {}",
3874  unpackAxis,
3875  inputTensorInfo.GetNumDimensions(),
3876  CHECK_LOCATION().AsString()));
3877  }
3878 
3879  unsigned int unpackNum = CHECKED_NON_NEGATIVE(options->num);
3880  // If num is not defined, automatically infer from the length of the dimension axis.
3881  if(unpackNum == 0)
3882  {
3883  unpackNum = inputTensorInfo.GetShape()[unpackAxis];
3884  }
3885 
3886  // If unpack number cannot be inferred and is still zero, throw ParseException.
3887  if(unpackNum == 0)
3888  {
3889  throw ParseException("Number to unpack must greater than zero.");
3890  }
3891 
3892  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3893  CHECK_VALID_SIZE(outputs.size(), unpackNum);
3894 
3895  auto inputDimSize = inputTensorInfo.GetNumDimensions();
3896  std::vector<unsigned int> unpackDimSizes(inputDimSize);
3897 
3898  // Add current input shape to unpackDimSizes
3899  for (unsigned int i = 0; i < inputDimSize; ++i)
3900  {
3901  unpackDimSizes[i] = inputTensorInfo.GetShape()[i];
3902  }
3903 
3904  if (unpackDimSizes[unpackAxis] != unpackNum)
3905  {
3906  throw ParseException("Number to unpack must be the same as length of the dimension to "
3907  "unpack along.");
3908  }
3909 
3910  unpackDimSizes[unpackAxis] /= unpackNum;
3911 
3912  SplitterDescriptor splitDesc(unpackNum, static_cast<unsigned int>(unpackDimSizes.size()));
3913  for (unsigned int j = 0; j < unpackNum; ++j)
3914  {
3915  // Set the size of the views.
3916  for (unsigned int dimIdx = 0; dimIdx < unpackDimSizes.size(); ++dimIdx)
3917  {
3918  splitDesc.SetViewSize(j, dimIdx, unpackDimSizes[dimIdx]);
3919  }
3920  splitDesc.SetViewOriginCoord(j, unpackAxis, unpackDimSizes[unpackAxis] * j);
3921  }
3922 
3923  auto layerName = fmt::format("Unpack:{}:{}", subgraphIndex, operatorIndex);
3924  IConnectableLayer* layer = m_Network->AddSplitterLayer(splitDesc, layerName.c_str());
3925  ARMNN_ASSERT(layer != nullptr);
3926 
3927  TensorShape splitOutShape = TensorShape(static_cast<unsigned int>(unpackDimSizes.size()),
3928  unpackDimSizes.data());
3929 
3930  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3931  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
3932 
3933  std::vector<unsigned int> reshapeDims;
3934  for (unsigned int axis = 0; axis < splitOutShape.GetNumDimensions(); ++axis)
3935  {
3936  if (axis != unpackAxis)
3937  {
3938  reshapeDims.push_back(splitOutShape[axis]);
3939  }
3940  }
3941 
3942  TensorShape reshapeOutputShape(splitOutShape.GetNumDimensions() -1, reshapeDims.data());
3943 
3944  // Create reshape to remove the unpacked dimension for unpack operator of each output from Splitter.
3945  for (unsigned int k = 0; k < layer->GetNumOutputSlots(); ++k)
3946  {
3947  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[k], true);
3948  std::string reshapeLayerName = fmt::format("Reshape_for:{}", layer->GetName());
3950  desc.m_TargetShape = reshapeOutputShape;
3951  armnn::IConnectableLayer* reshapeLayer = m_Network->AddReshapeLayer(desc, layerName.c_str());
3952 
3953  layer->GetOutputSlot(k).SetTensorInfo(armnn::TensorInfo(splitOutShape,
3954  outputTensorInfo.GetDataType(),
3955  outputTensorInfo.GetQuantizationScale(),
3956  outputTensorInfo.GetQuantizationOffset()));
3957  layer->GetOutputSlot(k).Connect(reshapeLayer->GetInputSlot(0));
3958 
3959  reshapeLayer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3960 
3961  uint32_t reshapedOutputId = CHECKED_NON_NEGATIVE(operatorPtr->outputs[k]);
3962  armnn::IOutputSlot* slot = &(reshapeLayer->GetOutputSlot(0));
3963  RegisterProducerOfTensor(subgraphIndex, reshapedOutputId, slot);
3964  }
3965 }
3966 
3967 void TfLiteParserImpl::ParseSplit(size_t subgraphIndex, size_t operatorIndex)
3968 {
3969  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3970 
3971  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3972  const auto* options = operatorPtr->builtin_options.AsSplitOptions();
3973 
3974  const unsigned int numSplits = CHECKED_NON_NEGATIVE(options->num_splits);
3975 
3976  // If number of splits cannot be inferred and is zero, throw ParseException.
3977  if(numSplits == 0)
3978  {
3979  throw ParseException("Number to splits must greater than zero.");
3980  }
3981 
3982  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3983  CHECK_VALID_SIZE(inputs.size(), 2);
3984  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3985  CHECK_VALID_SIZE(outputs.size(), numSplits);
3986 
3987  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
3988  armnn::TensorInfo axisTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
3989  ARMNN_ASSERT(axisTensorInfo.GetNumElements() == 1);
3990 
3991  BufferRawPtr axisBufferPtr = GetBuffer(m_Model, inputs[0]->buffer);
3992  if (axisBufferPtr == nullptr)
3993  {
3994  throw ParseException(
3995  fmt::format("Operation has invalid inputs. Failed to read axis. {}",
3996  CHECK_LOCATION().AsString()));
3997  }
3998 
3999  std::vector<int32_t> axisData(axisTensorInfo.GetNumElements());
4000  ::memcpy(axisData.data(), axisBufferPtr->data.data(), axisTensorInfo.GetNumBytes());
4001  int32_t axis = axisData[0];
4002 
4003  auto inputDimensions = static_cast<int32_t>(inputTensorInfo.GetNumDimensions());
4004  if (((axis < -inputDimensions) && (axis < 0)) || ((axis >= inputDimensions) && (axis > 0)))
4005  {
4006  // Square bracket denotes inclusive n while parenthesis denotes exclusive n
4007  // E.g. Rank 4 tensor can have axis in range [-4, 3)
4008  // -1 == 3, -2 == 2, -3 == 1, -4 == 0
4009  throw ParseException(
4010  fmt::format("Operation has invalid axis: {}. Axis must be in range [-n, n) {}",
4011  axis,
4012  CHECK_LOCATION().AsString()));
4013  }
4014 
4015  const unsigned int splitDim = armnnUtils::GetUnsignedAxis(inputTensorInfo.GetNumDimensions(), axis);
4016 
4017  auto inputDimSize = inputTensorInfo.GetNumDimensions();
4018  if (inputDimSize > MaxNumOfTensorDimensions)
4019  {
4020  throw ParseException(
4021  fmt::format("The number of dimensions: {} for input tensors of the split op cannot be greater than {} {}",
4022  inputTensorInfo.GetNumDimensions(),
4024  CHECK_LOCATION().AsString()));
4025  }
4026 
4027  std::vector<unsigned int> splitterDimSizes(inputDimSize);
4028 
4029  // Add current input shape to splitterDimSizes
4030  for (unsigned int i = 0; i < inputDimSize; ++i)
4031  {
4032  splitterDimSizes[i] = inputTensorInfo.GetShape()[i];
4033  }
4034 
4035  if (splitterDimSizes[splitDim] % numSplits != 0)
4036  {
4037  throw ParseException("Number of splits must evenly divide the dimension");
4038  }
4039  splitterDimSizes[splitDim] /= numSplits;
4040 
4041  SplitterDescriptor splitDesc(numSplits, inputDimSize);
4042  for (unsigned int j = 0; j < numSplits; ++j)
4043  {
4044  // Set the size of the views.
4045  for (unsigned int dimIdx = 0; dimIdx < splitterDimSizes.size(); ++dimIdx)
4046  {
4047  splitDesc.SetViewSize(j, dimIdx, splitterDimSizes[dimIdx]);
4048  }
4049  splitDesc.SetViewOriginCoord(j, splitDim, splitterDimSizes[splitDim] * j);
4050  }
4051 
4052  auto layerName = fmt::format("Split:{}:{}", subgraphIndex, operatorIndex);
4053  IConnectableLayer* layer = m_Network->AddSplitterLayer(splitDesc, layerName.c_str());
4054  ARMNN_ASSERT(layer != nullptr);
4055 
4056  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4057  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[1]});
4058 
4059  for (unsigned int k = 0; k < layer->GetNumOutputSlots(); ++k)
4060  {
4061  armnn::TensorInfo tensorInfo = ToTensorInfo(outputs[k], true);
4062  layer->GetOutputSlot(k).SetTensorInfo(tensorInfo);
4063  }
4064 
4065  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4066  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
4067 }
4068 
4069 unsigned int ComputeWrappedIndex(int idx, unsigned int numDimsIn)
4070 {
4071  int numDims = armnn::numeric_cast<int>(numDimsIn);
4072  int v = idx < 0 ? numDims + idx : idx;
4073  ARMNN_ASSERT(v >= 0);
4074  ARMNN_ASSERT(v < numDims);
4075 
4076  return static_cast<unsigned int>(v);
4077 }
4078 
4079 void TfLiteParserImpl::ParseSplitV(size_t subgraphIndex, size_t operatorIndex)
4080 {
4081  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4082 
4083  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
4084  const auto* options = operatorPtr->builtin_options.AsSplitVOptions();
4085 
4086  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4087  CHECK_VALID_SIZE(inputs.size(), 3);
4088 
4089  auto& inputTensor = inputs[0];
4090  auto& splitsTensor = inputs[1];
4091  auto& axisTensor = inputs[2];
4092 
4093  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputTensor);
4094  armnn::TensorInfo splitsInfo = ToTensorInfo(splitsTensor);
4095  armnn::TensorInfo axisTensorInfo = ToTensorInfo(axisTensor);
4096  ARMNN_ASSERT(axisTensorInfo.GetNumElements() == 1);
4097 
4098  // Inputs
4099  auto inputDimSize = inputTensorInfo.GetNumDimensions();
4100  if (inputDimSize > MaxNumOfTensorDimensions)
4101  {
4102  throw ParseException(
4103  fmt::format("The number of dimensions: {} for input tensors of the "
4104  "SplitV op cannot be greater than {} {}",
4105  inputTensorInfo.GetNumDimensions(),
4107  CHECK_LOCATION().AsString()));
4108  }
4109 
4110  // Get split axis
4111  BufferRawPtr axisBufferPtr = GetBuffer(m_Model, axisTensor->buffer);
4112  if (axisBufferPtr == nullptr)
4113  {
4114  throw ParseException(
4115  fmt::format("Operation has invalid inputs. Failed to read axis. {}",
4116  CHECK_LOCATION().AsString()));
4117  }
4118 
4119  std::vector<int> axisData(axisTensorInfo.GetNumElements());
4120  ::memcpy(axisData.data(), axisBufferPtr->data.data(), axisTensorInfo.GetNumBytes());
4121  int32_t axis = axisData[0];
4122 
4123  auto inputDimensions = static_cast<int32_t>(inputTensorInfo.GetNumDimensions());
4124  if (((axis < -inputDimensions) && (axis < 0)) || ((axis >= inputDimensions) && (axis > 0)))
4125  {
4126  // Square bracket denotes inclusive n while parenthesis denotes exclusive n
4127  // E.g. Rank 4 tensor can have axis in range [-4, 3)
4128  // -1 == 3, -2 == 2, -3 == 1, -4 == 0
4129  throw ParseException(
4130  fmt::format("Operation has invalid axis: {}. Axis must be in range [-n, n) {}",
4131  axis,
4132  CHECK_LOCATION().AsString()));
4133  }
4134  const unsigned int splitDim = ComputeWrappedIndex(axis, inputTensorInfo.GetNumDimensions());
4135 
4136  // Set split sizes
4137  CHECK_VALID_SIZE(splitsInfo.GetNumDimensions(), 1);
4138  unsigned int numSplits{0};
4139 
4140  if(options)
4141  {
4142  numSplits = CHECKED_NON_NEGATIVE(options->num_splits);
4143  }
4144  else
4145  {
4146  numSplits = splitsInfo.GetNumElements();
4147  }
4148 
4149  if (numSplits <=0)
4150  {
4151  throw ParseException("SplitV has invalid number of splits");
4152  }
4153 
4154  std::vector<int> splitsData(numSplits);
4155  BufferRawPtr splitsBufferPtr = GetBuffer(m_Model, splitsTensor->buffer);
4156  ::memcpy(splitsData.data(), splitsBufferPtr->data.data(), splitsInfo.GetNumBytes());
4157 
4158  unsigned int idx = 0;
4159  int numInferred{0};
4160  unsigned int inferIdx{0};
4161  int splitSum{0};
4162  for (auto split : splitsData)
4163  {
4164  if (split < 0)
4165  {
4166  numInferred++;
4167  inferIdx = idx;
4168  }
4169  else
4170  {
4171  splitSum += split;
4172  }
4173  idx++;
4174  }
4175  // Check for inferred Axis
4176  if (numInferred == 0)
4177  {
4178  if (splitSum != armnn::numeric_cast<int>(inputTensorInfo.GetShape()[splitDim]))
4179  {
4180  throw ParseException("SplitV split_sizes does not sum to the dimension of value along split_dim.");
4181  }
4182  }
4183  else if (numInferred == 1)
4184  {
4185  splitsData[inferIdx] = armnn::numeric_cast<int>(inputTensorInfo.GetShape()[splitDim]) - splitSum;
4186  }
4187  else
4188  {
4189  throw ParseException("Cannot infer split size for more than one split");
4190  }
4191 
4192  //Ouput size validation
4193  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4194  CHECK_VALID_SIZE(outputs.size(), numSplits);
4195 
4196  // Setup Armnn descriptor
4197  SplitterDescriptor splitDesc(numSplits, inputDimSize);
4198  unsigned int accumSplit = 0;
4199  for (unsigned int j = 0; j < numSplits; ++j)
4200  {
4201  unsigned int splitSize = armnn::numeric_cast<unsigned int>(splitsData[j]);
4202 
4203  // Set the size of the views.
4204  for (unsigned int dimIdx = 0; dimIdx < inputTensorInfo.GetNumDimensions(); ++dimIdx)
4205  {
4206  unsigned int dimSize = inputTensorInfo.GetShape()[dimIdx];
4207  if (dimIdx == splitDim)
4208  {
4209  dimSize = splitSize;
4210  }
4211  splitDesc.SetViewSize(j, dimIdx, dimSize);
4212  }
4213 
4214  splitDesc.SetViewOriginCoord(j, splitDim, accumSplit);
4215  accumSplit += splitSize;
4216  }
4217 
4218  auto layerName = fmt::format("SplitV:{}:{}", subgraphIndex, operatorIndex);
4219  IConnectableLayer* layer = m_Network->AddSplitterLayer(splitDesc, layerName.c_str());
4220  ARMNN_ASSERT(layer != nullptr);
4221 
4222  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4223  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4224 
4225  for (unsigned int k = 0; k < layer->GetNumOutputSlots(); ++k)
4226  {
4227  armnn::TensorInfo tensorInfo = ToTensorInfo(outputs[k], true);
4228  layer->GetOutputSlot(k).SetTensorInfo(tensorInfo);
4229  }
4230 
4231  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4232  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
4233 }
4234 
4235 void TfLiteParserImpl::ParseArgMin(size_t subgraphIndex, size_t operatorIndex)
4236 {
4237  ParseArgMinMax(subgraphIndex, operatorIndex, armnn::ArgMinMaxFunction::Min);
4238 }
4239 
4240 void TfLiteParserImpl::ParseArgMax(size_t subgraphIndex, size_t operatorIndex)
4241 {
4242  ParseArgMinMax(subgraphIndex, operatorIndex, armnn::ArgMinMaxFunction::Max);
4243 }
4244 
4245 void TfLiteParserImpl::ParseArgMinMax(size_t subgraphIndex, size_t operatorIndex, ArgMinMaxFunction argMinMaxFunction)
4246 {
4247  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4248  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4249  CHECK_VALID_SIZE(inputs.size(), 2);
4250 
4251  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4252  CHECK_VALID_SIZE(outputs.size(), 1);
4253 
4254  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
4255  armnn::TensorInfo axisTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
4256  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0]);
4257  ARMNN_ASSERT(axisTensorInfo.GetNumElements() == 1);
4258 
4259  // Check if output tensor type is Signed32 or Signed64
4260  if (outputTensorInfo.GetDataType() != armnn::DataType::Signed32 &&
4261  outputTensorInfo.GetDataType() != armnn::DataType::Signed64)
4262  {
4263  throw ParseException(
4264  fmt::format(
4265  "Output tensor data type is not supported. (Supported types: Signed32 & Signed64) {}",
4266  CHECK_LOCATION().AsString()));
4267  }
4268 
4269  // Get const axis value from model and set it to descriptor.
4270  BufferRawPtr axisBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
4271  if (axisBufferPtr == nullptr)
4272  {
4273  throw ParseException(
4274  fmt::format("Operation has invalid inputs. Failed to read axis. {}",
4275  CHECK_LOCATION().AsString()));
4276  }
4277 
4278  std::vector<int32_t> axisData(axisTensorInfo.GetNumElements());
4279  ::memcpy(axisData.data(), axisBufferPtr->data.data(), axisTensorInfo.GetNumBytes());
4280  int32_t axis = axisData.front();
4281 
4282  auto inputDimensions = static_cast<int32_t>(inputTensorInfo.GetNumDimensions());
4283  if (((axis < -inputDimensions) && (axis < 0)) || ((axis >= inputDimensions) && (axis > 0)))
4284  {
4285  // Square bracket denotes inclusive n while parenthesis denotes exclusive n
4286  // E.g. Rank 4 tensor can have axis in range [-4, 3)
4287  // -1 == 3, -2 == 2, -3 == 1, -4 == 0
4288  throw ParseException(
4289  fmt::format("Operation has invalid axis: {}. Axis must be in range [-n, n) {}",
4290  axis,
4291  CHECK_LOCATION().AsString()));
4292  }
4293 
4294  ArgMinMaxDescriptor desc;
4295  desc.m_Axis = axis;
4296  desc.m_Function = argMinMaxFunction;
4297 
4298  // Register a ArgMin/ArgMax layer.
4299  auto layerName = argMinMaxFunction == ArgMinMaxFunction::Max ? "ArgMax:{}:{}" : "ArgMin:{}:{}";
4300  auto layerNameFormatted = fmt::format(layerName, subgraphIndex, operatorIndex);
4301  IConnectableLayer *layer = m_Network->AddArgMinMaxLayer(desc, layerNameFormatted.c_str());
4302  ARMNN_ASSERT(layer != nullptr);
4303  outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
4304  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4305 
4306  // Register input tensor to the layer.
4307  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4308  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4309 
4310  // Register output tensor to the layer.
4311  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4312  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
4313 }
4314 
4315 void TfLiteParserImpl::ParseGather(size_t subgraphIndex, size_t operatorIndex)
4316 {
4317  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4318 
4319  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4320  CHECK_VALID_SIZE(inputs.size(), 2);
4321  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4322  CHECK_VALID_SIZE(outputs.size(), 1);
4323 
4324  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
4325  armnn::TensorInfo indicesTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
4326  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0]);
4327 
4328  armnn::GatherDescriptor gatherDescriptor;
4329 
4330  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
4331  const auto* options = operatorPtr->builtin_options.AsGatherOptions();
4332  auto axis = options->axis;
4333 
4334  auto layerName = fmt::format("Gather:{}:{}", subgraphIndex, operatorIndex);
4335 
4336  auto inputDimensions = static_cast<int32_t>(inputTensorInfo.GetNumDimensions());
4337  auto indicesDimensions = indicesTensorInfo.GetNumDimensions();
4338  auto outputDimensions = outputTensorInfo.GetNumDimensions();
4339  if (((axis < -inputDimensions) && (axis < 0)) || ((axis >= inputDimensions) && (axis > 0)))
4340  {
4341  throw ParseException(
4342  fmt::format("Operation has invalid axis: {} It is out of bounds [ -{}, {} ) {}",
4343  axis,
4344  inputDimensions, inputDimensions,
4345  CHECK_LOCATION().AsString()));
4346  }
4347  if (outputDimensions != static_cast<unsigned int>(inputDimensions) + indicesDimensions - 1)
4348  {
4349  throw ParseException(
4350  fmt::format("Operation has invalid output dimensions: {} Output must be an ({} + {} - 1) -D tensor {}",
4351  outputDimensions,
4352  inputDimensions, indicesDimensions,
4353  CHECK_LOCATION().AsString()));
4354  }
4355 
4356  gatherDescriptor.m_Axis = axis;
4357 
4358  IConnectableLayer* layer = m_Network->AddGatherLayer(gatherDescriptor, layerName.c_str());
4359  ARMNN_ASSERT(layer != nullptr);
4360  outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
4361  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4362 
4363  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4364  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
4365 
4366  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4367  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4368 }
4369 
4370 void TfLiteParserImpl::ParseGatherNd(size_t subgraphIndex, size_t operatorIndex)
4371 {
4372  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4373 
4374  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4375  CHECK_VALID_SIZE(inputs.size(), 2);
4376  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4377  CHECK_VALID_SIZE(outputs.size(), 1);
4378 
4379  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
4380  armnn::TensorInfo indicesTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
4381 
4382  auto layerName = fmt::format("GatherNd:{}:{}", subgraphIndex, operatorIndex);
4383  IConnectableLayer* layer = m_Network->AddGatherNdLayer(layerName.c_str());
4384  ARMNN_ASSERT(layer != nullptr);
4385  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
4386  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4387 
4388  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4389  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
4390 
4391  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4392  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4393 }
4394 
4395 void TfLiteParserImpl::ParseDepthToSpace(size_t subgraphIndex, size_t operatorIndex)
4396 {
4397  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4398 
4399  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4400  CHECK_VALID_SIZE(inputs.size(), 1);
4401  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4402  CHECK_VALID_SIZE(outputs.size(), 1);
4403 
4404  armnn::DepthToSpaceDescriptor descriptor;
4405 
4406  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
4407  const auto* options = operatorPtr->builtin_options.AsDepthToSpaceOptions();
4408  auto blockSize = options->block_size;
4409  if (blockSize < 2)
4410  {
4411  throw ParseException(
4412  fmt::format("Operation has invalid block size: {} Block size should be >= 2 {}",
4413  blockSize,
4414  CHECK_LOCATION().AsString()));
4415  }
4416  descriptor.m_BlockSize = armnn::numeric_cast<uint32_t>(blockSize);
4417 
4418  auto layerName = fmt::format("DepthToSpace:{}:{}", subgraphIndex, operatorIndex);
4419  IConnectableLayer* layer = m_Network->AddDepthToSpaceLayer(descriptor, layerName.c_str());
4420  ARMNN_ASSERT(layer != nullptr);
4421  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
4422  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4423 
4424  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4425  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4426 
4427  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4428  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4429 }
4430 
4431 void TfLiteParserImpl::ParseSum(size_t subgraphIndex, size_t operatorIndex)
4432 {
4433  ParseReduce(subgraphIndex, operatorIndex, armnn::ReduceOperation::Sum);
4434 }
4435 
4436 void TfLiteParserImpl::ParseReduceProd(size_t subgraphIndex, size_t operatorIndex)
4437 {
4438  ParseReduce(subgraphIndex, operatorIndex, armnn::ReduceOperation::Prod);
4439 }
4440 
4441 void TfLiteParserImpl::ParseReduceMax(size_t subgraphIndex, size_t operatorIndex)
4442 {
4443  ParseReduce(subgraphIndex, operatorIndex, armnn::ReduceOperation::Max);
4444 }
4445 
4446 void TfLiteParserImpl::ParseReduceMin(size_t subgraphIndex, size_t operatorIndex)
4447 {
4448  ParseReduce(subgraphIndex, operatorIndex, armnn::ReduceOperation::Min);
4449 }
4450 
4451 void TfLiteParserImpl::ParseReduce(size_t subgraphIndex, size_t operatorIndex, ReduceOperation reduceOperation)
4452 {
4453  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4454 
4455  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
4456  const auto* options = operatorPtr->builtin_options.AsReducerOptions();
4457 
4458  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4459  CHECK_VALID_SIZE(inputs.size(), 2);
4460 
4461  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4462  CHECK_VALID_SIZE(outputs.size(), 1);
4463 
4464  auto layerName = fmt::format("Reduce:{}:{}", subgraphIndex, operatorIndex);
4465 
4466  armnn::TensorInfo inputTensorInfo0 = InputTensorInfo(subgraphIndex, operatorIndex, 0);
4467  armnn::TensorInfo inputTensorInfo1 = InputTensorInfo(subgraphIndex, operatorIndex, 1);
4468 
4469  ReduceDescriptor desc;
4470  BufferRawPtr axisBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
4471  // Get const axis value from model and set it to descriptor.
4472  if (axisBufferPtr != nullptr)
4473  {
4474  std::vector<int32_t> axisData(inputTensorInfo1.GetNumElements());
4475  ::memcpy(axisData.data(), axisBufferPtr->data.data(), inputTensorInfo1.GetNumBytes());
4476 
4477  // Convert the axis to unsigned int and remove duplicates.
4478  auto rank = static_cast<int32_t>(inputTensorInfo0.GetNumDimensions());
4479  std::set<unsigned int> uniqueAxis;
4480  std::transform(axisData.begin(),
4481  axisData.end(),
4482  std::inserter(uniqueAxis, uniqueAxis.begin()),
4483  [rank](int i)->unsigned int{
4484  return static_cast<uint32_t>(((i + rank) % rank)); });
4485  desc.m_vAxis.assign(uniqueAxis.begin(), uniqueAxis.end());
4486  }
4487  else
4488  {
4489  for (uint32_t i = 0; i < inputTensorInfo0.GetNumDimensions(); ++i)
4490  {
4491  desc.m_vAxis.push_back(i);
4492  }
4493  }
4494 
4495  desc.m_KeepDims = options->keep_dims;
4496  desc.m_ReduceOperation = reduceOperation;
4497 
4498  // Register a new layer object, Sum.
4499  IConnectableLayer* layer = m_Network->AddReduceLayer(desc, layerName.c_str());
4500 
4501  armnn::TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
4502  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4503 
4504  // Register input tensor to the layer.
4505  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4506  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4507 
4508  // Register output tensor to the layer.
4509  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4510  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
4511 }
4512 
4513 void TfLiteParserImpl::ParseLocalResponseNormalization(size_t subgraphIndex, size_t operatorIndex)
4514 {
4515  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4516 
4517  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4518  CHECK_VALID_SIZE(inputs.size(), 1);
4519 
4520  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4521  CHECK_VALID_SIZE(outputs.size(), 1);
4522 
4523  auto layerName = fmt::format("LRN:{}:{}", subgraphIndex, operatorIndex);
4524  std::string layerNameFormatted = fmt::format(layerName, subgraphIndex, operatorIndex);
4525 
4526  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
4527 
4528  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
4529  const auto* options = operatorPtr->builtin_options.AsLocalResponseNormalizationOptions();
4530 
4531  armnn::NormalizationDescriptor descriptor;
4535  descriptor.m_NormSize = static_cast<uint32_t>(options->radius);
4536  descriptor.m_K = options->bias;
4537  descriptor.m_Alpha = options->alpha;
4538  descriptor.m_Beta = options->beta;
4539 
4540  // ArmNN expects normSize to be the full size of the normalization
4541  // window rather than the radius as in TfLite.
4542  descriptor.m_NormSize = 1 + (2 * descriptor.m_NormSize);
4543 
4544  IConnectableLayer* layer = m_Network->AddNormalizationLayer(descriptor, layerNameFormatted.c_str());
4545  ARMNN_ASSERT(layer != nullptr);
4546 
4547  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
4548  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4549 
4550  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4551  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4552 
4553  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4554  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4555 }
4556 
4557 void TfLiteParserImpl::ParseAbs(size_t subgraphIndex, size_t operatorIndex)
4558 {
4559  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Abs);
4560 }
4561 
4562 void TfLiteParserImpl::ParseCeil(size_t subgraphIndex, size_t operatorIndex)
4563 {
4564  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Ceil);
4565 }
4566 
4567 void TfLiteParserImpl::ParseExp(size_t subgraphIndex, size_t operatorIndex)
4568 {
4569  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Exp);
4570 }
4571 
4572 void TfLiteParserImpl::ParseLog(size_t subgraphIndex, size_t operatorIndex)
4573 {
4574  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Log);
4575 }
4576 
4577 void TfLiteParserImpl::ParseLogicalNot(size_t subgraphIndex, size_t operatorIndex)
4578 {
4579  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::LogicalNot);
4580 }
4581 
4582 void TfLiteParserImpl::ParseNeg(size_t subgraphIndex, size_t operatorIndex)
4583 {
4584  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Neg);
4585 }
4586 
4587 void TfLiteParserImpl::ParseRsqrt(size_t subgraphIndex, size_t operatorIndex)
4588 {
4589  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Rsqrt);
4590 }
4591 
4592 void TfLiteParserImpl::ParseSin(size_t subgraphIndex, size_t operatorIndex)
4593 {
4594  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Sin);
4595 }
4596 
4597 void TfLiteParserImpl::ParseSqrt(size_t subgraphIndex, size_t operatorIndex)
4598 {
4599  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Sqrt);
4600 }
4601 
4602 void TfLiteParserImpl::ParseElementwiseUnary(size_t subgraphIndex, size_t operatorIndex, UnaryOperation unaryOperation)
4603 {
4604  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4605 
4606  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4607  CHECK_VALID_SIZE(inputs.size(), 1);
4608 
4609  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4610  CHECK_VALID_SIZE(outputs.size(), 1);
4611 
4612  std::string layerName = std::string(GetUnaryOperationAsCString(unaryOperation)) + ":{}:{}";
4613  std::string layerNameFormatted = fmt::format(layerName, subgraphIndex, operatorIndex);
4614 
4616  desc.m_Operation = unaryOperation;
4617  IConnectableLayer* layer = m_Network->AddElementwiseUnaryLayer(desc, layerNameFormatted.c_str());
4618  ARMNN_ASSERT(layer != nullptr);
4619 
4620  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0});
4621  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4622 
4623  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4624  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4625 
4626  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4627  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
4628 }
4629 
4630 void TfLiteParserImpl::ParseEqual(size_t subgraphIndex, size_t operatorIndex)
4631 {
4632  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::Equal);
4633 }
4634 
4635 void TfLiteParserImpl::ParseNotEqual(size_t subgraphIndex, size_t operatorIndex)
4636 {
4637  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::NotEqual);
4638 }
4639 
4640 void TfLiteParserImpl::ParseGreater(size_t subgraphIndex, size_t operatorIndex)
4641 {
4642  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::Greater);
4643 }
4644 
4645 void TfLiteParserImpl::ParseGreaterOrEqual(size_t subgraphIndex, size_t operatorIndex)
4646 {
4647  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::GreaterOrEqual);
4648 }
4649 
4650 void TfLiteParserImpl::ParseLess(size_t subgraphIndex, size_t operatorIndex)
4651 {
4652  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::Less);
4653 }
4654 
4655 void TfLiteParserImpl::ParseLessOrEqual(size_t subgraphIndex, size_t operatorIndex)
4656 {
4657  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::LessOrEqual);
4658 }
4659 
4660 void TfLiteParserImpl::ParseComparison(size_t subgraphIndex, size_t operatorIndex,
4661  ComparisonOperation comparisonOperation)
4662 {
4663  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4664 
4665  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4666  CHECK_VALID_SIZE(inputs.size(), 2);
4667 
4668  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4669  CHECK_VALID_SIZE(outputs.size(), 1);
4670 
4671  auto layerName = std::string(GetComparisonOperationAsCString(comparisonOperation)) + ":{}:{}";
4672  std::string layerNameFormatted = fmt::format(layerName, subgraphIndex, operatorIndex);
4673 
4674  armnn::TensorInfo inputTensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 0);
4675  armnn::TensorInfo input1TensorInfo = InputTensorInfo(subgraphIndex, operatorIndex, 1);
4676  CheckMatchingQuantization(inputTensorInfo, input1TensorInfo, layerNameFormatted, "Input 0", "Input 1");
4677 
4678  ComparisonDescriptor desc;
4679  desc.m_Operation = comparisonOperation;
4680  IConnectableLayer* layer = m_Network->AddComparisonLayer(desc, layerNameFormatted.c_str());
4681  ARMNN_ASSERT(layer != nullptr);
4682 
4683  TensorInfo outputTensorInfo = OutputTensorInfoFromInputs(subgraphIndex, operatorIndex, layer, 0, {0, 1});
4684  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4685 
4686  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4687  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
4688 
4689  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4690  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4691 }
4692 
4693 armnn::IConnectableLayer* TfLiteParserImpl::AddReshapeLayer(armnn::IConnectableLayer* layer,
4694  unsigned int outputSlot,
4695  std::string reshapeLayerName,
4696  armnn::TensorInfo outputShape)
4697 {
4698  ReshapeDescriptor desc;
4699  desc.m_TargetShape = outputShape.GetShape();
4700 
4701  IConnectableLayer* reshapeLayer =
4702  m_Network->AddReshapeLayer(desc, reshapeLayerName.c_str());
4703 
4704  auto & prevOutputSlot = layer->GetOutputSlot(outputSlot);
4705  prevOutputSlot.Connect(reshapeLayer->GetInputSlot(0));
4706  reshapeLayer->GetOutputSlot(0).SetTensorInfo(outputShape);
4707  return reshapeLayer;
4708 }
4709 
4710 armnn::IConnectableLayer* TfLiteParserImpl::AddFusedActivationLayer(armnn::IConnectableLayer* prevLayer,
4711  unsigned int outputSlot,
4712  tflite::ActivationFunctionType activationType)
4713 {
4714  ActivationDescriptor activationDesc;
4715  std::string layerName = prevLayer->GetName();
4716 
4717  switch(activationType)
4718  {
4719  case tflite::ActivationFunctionType_NONE:
4720  {
4721  // this is a no-op: return previous layer
4722  return prevLayer;
4723  }
4724  case tflite::ActivationFunctionType_RELU:
4725  {
4726  activationDesc.m_Function = ActivationFunction::ReLu;
4727  layerName += ":RELU";
4728  break;
4729  }
4730  case tflite::ActivationFunctionType_RELU6:
4731  {
4732  activationDesc.m_Function = ActivationFunction::BoundedReLu;
4733  activationDesc.m_A = 6.0f;
4734  activationDesc.m_B = 0.0f;
4735  layerName += ":RELU6";
4736  break;
4737  }
4738  case tflite::ActivationFunctionType_TANH:
4739  {
4740  activationDesc.m_Function = ActivationFunction::TanH;
4741  activationDesc.m_A = 1.0f;
4742  activationDesc.m_B = 1.0f;
4743  layerName += ":TANH";
4744  break;
4745  }
4746 
4747  // I only put these here as a reminder what others we could support
4748  case tflite::ActivationFunctionType_RELU_N1_TO_1:
4749  case tflite::ActivationFunctionType_SIGN_BIT:
4750  default:
4751  {
4752  throw ParseException(
4753  fmt::format("TfLite parser doesn't support fused activation: "
4754  "{}/{} {} ",
4755  activationType,
4756  tflite::EnumNameActivationFunctionType(activationType),
4757  CHECK_LOCATION().AsString()));
4758 
4759  }
4760  }
4761 
4762  IConnectableLayer* activationLayer =
4763  m_Network->AddActivationLayer(activationDesc, layerName.c_str());
4764 
4765  auto & prevOutputSlot = prevLayer->GetOutputSlot(outputSlot);
4766  prevOutputSlot.Connect(activationLayer->GetInputSlot(0));
4767  activationLayer->GetOutputSlot(0).SetTensorInfo(prevOutputSlot.GetTensorInfo());
4768  return activationLayer;
4769 }
4770 
4771 armnn::IConnectableLayer* TfLiteParserImpl::AddFusedFloorLayer(armnn::IConnectableLayer* prevLayer,
4772  unsigned int outputSlot)
4773 {
4774 
4775  auto& prevOutputSlot = prevLayer->GetOutputSlot(outputSlot);
4776  DataType dataType = prevOutputSlot.GetTensorInfo().GetDataType();
4777 
4778  if (dataType == DataType::Signed32)
4779  {
4780  return prevLayer;
4781  }
4782 
4783  std::string layerName = prevLayer->GetName();
4784  IConnectableLayer* floorLayer = m_Network->AddFloorLayer(layerName.c_str());
4785 
4786  prevOutputSlot.Connect(floorLayer->GetInputSlot(0));
4787  floorLayer->GetOutputSlot(0).SetTensorInfo(prevOutputSlot.GetTensorInfo());
4788 
4789  return floorLayer;
4790 }
4791 
4793 {
4794  if (fileName == nullptr)
4795  {
4796  throw InvalidArgumentException(fmt::format("Invalid (null) file name {}",
4797  CHECK_LOCATION().AsString()));
4798  }
4799  std::error_code errorCode;
4800  fs::path pathToFile(fileName);
4801  if (!fs::exists(pathToFile, errorCode))
4802  {
4803  //fmt::format() could not be used here (format error)
4804  std::stringstream msg;
4805  msg << "Cannot find the file (" << fileName << ") errorCode: " << errorCode
4806  << " " << CHECK_LOCATION().AsString();
4807 
4808  throw FileNotFoundException(msg.str());
4809  }
4810  std::ifstream file(fileName, std::ios::binary);
4811  std::string fileContent((std::istreambuf_iterator<char>(file)), std::istreambuf_iterator<char>());
4812  return LoadModelFromBinary(reinterpret_cast<const uint8_t *>(fileContent.c_str()),
4813  fileContent.size());
4814 }
4815 
4817 {
4818  if (binaryContent == nullptr)
4819  {
4820  throw InvalidArgumentException(fmt::format("Invalid (null) binary content {}",
4821  CHECK_LOCATION().AsString()));
4822  }
4823  flatbuffers::Verifier verifier(binaryContent, len);
4824  if (verifier.VerifyBuffer<tflite::Model>() == false)
4825  {
4826  throw ParseException(
4827  fmt::format("Buffer doesn't conform to the expected Tensorflow Lite "
4828  "flatbuffers format. size:{} {}",
4829  len,
4830  CHECK_LOCATION().AsString()));
4831  }
4832  return tflite::UnPackModel(binaryContent);
4833 }
4834 
4836  size_t subgraphIndex,
4837  size_t operatorIndex)
4838 {
4839  CHECK_MODEL(model, subgraphIndex, operatorIndex);
4840 
4841  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4842  const auto& operatorPtr = subgraphPtr->operators[operatorIndex];
4843 
4844  size_t inputCount = operatorPtr->inputs.size();
4845  TensorRawPtrVector result;
4846  for (size_t i = 0; i < inputCount; ++i)
4847  {
4848  // If the input location is -1 then assume input is turned off.
4849  if (operatorPtr->inputs[i] == -1)
4850  {
4851  continue;
4852  }
4853  else
4854  {
4855  uint32_t inputId = CHECKED_NON_NEGATIVE(operatorPtr->inputs[i]);
4856  result.push_back(subgraphPtr->tensors[inputId].get());
4857  }
4858  }
4859  return result;
4860 }
4861 
4863  size_t subgraphIndex,
4864  size_t operatorIndex)
4865 {
4866  CHECK_MODEL(model, subgraphIndex, operatorIndex);
4867 
4868  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4869  const auto& operatorPtr = subgraphPtr->operators[operatorIndex];
4870 
4871  size_t outputCount = operatorPtr->outputs.size();
4872  TensorRawPtrVector result(outputCount);
4873  for (size_t i = 0; i < outputCount; ++i)
4874  {
4875  uint32_t outputId = CHECKED_NON_NEGATIVE(operatorPtr->outputs[i]);
4876  CHECK_TENSOR(model, subgraphIndex, outputId);
4877  result[i] = subgraphPtr->tensors[outputId].get();
4878  }
4879  return result;
4880 }
4881 
4883  size_t subgraphIndex)
4884 {
4885  CHECK_SUBGRAPH(model, subgraphIndex);
4886  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4887 
4888  size_t inputCount = subgraphPtr->inputs.size();
4889  TensorIdRawPtrVector result(inputCount);
4890  for (size_t i = 0; i < inputCount; ++i)
4891  {
4892  uint32_t inputId = CHECKED_NON_NEGATIVE(subgraphPtr->inputs[i]);
4893  CHECK_TENSOR(model, subgraphIndex, inputId);
4894  result[i] = std::make_pair(inputId, subgraphPtr->tensors[inputId].get());
4895  }
4896  return result;
4897 }
4898 
4900  size_t subgraphIndex)
4901 {
4902  CHECK_SUBGRAPH(model, subgraphIndex);
4903  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4904 
4905  size_t outputCount = subgraphPtr->outputs.size();
4906  TensorIdRawPtrVector result(outputCount);
4907  for (size_t i = 0; i < outputCount; ++i)
4908  {
4909  uint32_t outputId = CHECKED_NON_NEGATIVE(subgraphPtr->outputs[i]);
4910  result[i] = std::make_pair(outputId, subgraphPtr->tensors[outputId].get());
4911  }
4912  return result;
4913 }
4914 
4915 std::vector<int32_t>& TfLiteParserImpl::GetInputTensorIds(const ModelPtr& model,
4916  size_t subgraphIndex,
4917  size_t operatorIndex)
4918 {
4919  CHECK_MODEL(model, subgraphIndex, operatorIndex);
4920  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4921  const auto& operatorPtr = subgraphPtr->operators[operatorIndex];
4922  return operatorPtr->inputs;
4923 }
4924 
4925 std::vector<int32_t>& TfLiteParserImpl::GetOutputTensorIds(const ModelPtr& model,
4926  size_t subgraphIndex,
4927  size_t operatorIndex)
4928 {
4929  CHECK_MODEL(model, subgraphIndex, operatorIndex);
4930  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4931  const auto& operatorPtr = subgraphPtr->operators[operatorIndex];
4932  return operatorPtr->outputs;
4933 }
4934 
4935 void TfLiteParserImpl::RegisterInputSlots(size_t subgraphIndex,
4936  size_t operatorIndex,
4937  IConnectableLayer* layer,
4938  const std::vector<unsigned int>& tensorIndexes,
4939  unsigned int startingSlotIndex)
4940 {
4941  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4942  ARMNN_ASSERT(layer != nullptr);
4943 
4944  if (tensorIndexes.size() + startingSlotIndex != layer->GetNumInputSlots())
4945  {
4946  throw ParseException(
4947  fmt::format("The number of tensor inputs ({}) does not match the number expected ({})"
4948  " for subgraph:{} operator index:{} {}",
4949  tensorIndexes.size(),
4950  layer->GetNumInputSlots(),
4951  subgraphIndex,
4952  operatorIndex,
4953  CHECK_LOCATION().AsString()));
4954  }
4955 
4956  for (unsigned int index = 0; index < tensorIndexes.size() ; ++index)
4957  {
4958  unsigned int tensorIndex = tensorIndexes[index];
4959  armnn::IInputSlot* slot = &(layer->GetInputSlot(startingSlotIndex + index));
4960  RegisterConsumerOfTensor(subgraphIndex, tensorIndex, slot);
4961  }
4962 }
4963 
4964 void TfLiteParserImpl::RegisterOutputSlots(size_t subgraphIndex,
4965  size_t operatorIndex,
4966  IConnectableLayer* layer,
4967  const std::vector<unsigned int>& tensorIndexes)
4968 {
4969  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4970  ARMNN_ASSERT(layer != nullptr);
4971  if (tensorIndexes.size() != layer->GetNumOutputSlots())
4972  {
4973  throw ParseException(
4974  fmt::format("The number of tensor outputs ({}) does not match the number expected ({})"
4975  " for subgraph:{} operator index:{} {}",
4976  tensorIndexes.size(),
4977  layer->GetNumOutputSlots(),
4978  subgraphIndex,
4979  operatorIndex,
4980  CHECK_LOCATION().AsString()));
4981  }
4982 
4983  for (unsigned int slotIndex = 0; slotIndex < layer->GetNumOutputSlots(); ++slotIndex)
4984  {
4985  unsigned int tensorIndex = tensorIndexes[slotIndex];
4986  armnn::IOutputSlot* slot = &(layer->GetOutputSlot(slotIndex));
4987  RegisterProducerOfTensor(subgraphIndex, tensorIndex, slot);
4988  }
4989 }
4990 
4991 void TfLiteParserImpl::SetupInputLayerTensorInfos(size_t subgraphIndex)
4992 {
4993  CHECK_SUBGRAPH(m_Model, subgraphIndex);
4994 
4995  auto inputs = GetSubgraphInputs(m_Model, subgraphIndex);
4996  for (auto const& tensorIdAndPtr : inputs)
4997  {
4998  auto tensorInfo = ToTensorInfo(tensorIdAndPtr.second);
4999  m_TensorInfos.insert({tensorIdAndPtr.first, tensorInfo});
5000  }
5001 }
5002 
5003 void TfLiteParserImpl::SetupInputLayers(size_t subgraphIndex)
5004 {
5005  CHECK_SUBGRAPH(m_Model, subgraphIndex);
5006 
5007  auto inputs = GetSubgraphInputs(m_Model, subgraphIndex);
5008  for (auto const& tensorIdAndPtr : inputs)
5009  {
5010  auto bindingId = GenerateLayerBindingId(subgraphIndex, tensorIdAndPtr.first);
5011  IConnectableLayer* layer =
5012  m_Network->AddInputLayer(bindingId, tensorIdAndPtr.second->name.c_str());
5013 
5014  auto tensorInfo = ToTensorInfo(tensorIdAndPtr.second);
5015  layer->GetOutputSlot(0).SetTensorInfo(tensorInfo);
5016 
5017  RegisterOutputSlots(subgraphIndex,
5018  VIRTUAL_OPERATOR_ID,
5019  layer,
5020  { static_cast<uint32_t>(tensorIdAndPtr.first) });
5021  }
5022 }
5023 
5024 void TfLiteParserImpl::SetupOutputLayers(size_t subgraphIndex)
5025 {
5026  CHECK_SUBGRAPH(m_Model, subgraphIndex);
5027 
5028  auto outputs = GetSubgraphOutputs(m_Model, subgraphIndex);
5029  for (auto const& tensorIdAndPtr : outputs)
5030  {
5031  auto bindingId = GenerateLayerBindingId(subgraphIndex, tensorIdAndPtr.first);
5032  IConnectableLayer* layer =
5033  m_Network->AddOutputLayer(bindingId, tensorIdAndPtr.second->name.c_str());
5034 
5035  RegisterInputSlots(subgraphIndex,
5036  VIRTUAL_OPERATOR_ID,
5037  layer,
5038  { static_cast<uint32_t>(tensorIdAndPtr.first) });
5039  }
5040 }
5041 
5042 void TfLiteParserImpl::SetupConstantLayerTensorInfos(size_t subgraph)
5043 {
5044  CHECK_SUBGRAPH(m_Model, subgraph);
5045 
5046  const auto & subgraphPtr = m_Model->subgraphs[subgraph];
5047  for (unsigned int subgraphIndex = 0; subgraphIndex < m_SubgraphConnections.size(); ++subgraphIndex)
5048  {
5049  for (unsigned int tensorIndex = 0; tensorIndex < m_SubgraphConnections[subgraphIndex].size(); ++tensorIndex)
5050  {
5051  if (m_SubgraphConnections[subgraphIndex][tensorIndex].outputSlot == nullptr &&
5052  m_SubgraphConnections[subgraphIndex][tensorIndex].inputSlots.size() > 0)
5053  {
5054  TensorRawPtr tensorPtr = subgraphPtr->tensors[tensorIndex].get();
5055 
5056  armnn::TensorInfo tensorInfo = ToTensorInfo(tensorPtr);
5057 
5058  m_TensorInfos.insert({tensorIndex, tensorInfo});
5059  }
5060  }
5061  }
5062 }
5063 
5064 void TfLiteParserImpl::SetupConstantLayers(size_t subgraph)
5065 {
5066  CHECK_SUBGRAPH(m_Model, subgraph);
5067 
5068  const auto & subgraphPtr = m_Model->subgraphs[subgraph];
5069  for (unsigned int subgraphIndex = 0; subgraphIndex < m_SubgraphConnections.size(); ++subgraphIndex)
5070  {
5071  for (unsigned int tensorIndex = 0; tensorIndex < m_SubgraphConnections[subgraphIndex].size(); ++tensorIndex)
5072  {
5073  if (m_SubgraphConnections[subgraphIndex][tensorIndex].outputSlot == nullptr &&
5074  m_SubgraphConnections[subgraphIndex][tensorIndex].inputSlots.size() > 0)
5075  {
5076  TensorRawPtr tensorPtr = subgraphPtr->tensors[tensorIndex].get();
5077 
5078  if (IsConstTensor(tensorPtr))
5079  {
5080  armnn::TensorInfo tensorInfo = ToTensorInfo(tensorPtr);
5081  armnn::DataType dataType = tensorInfo.GetDataType();
5082 
5083  if (std::find(m_ConstantsToDequantize.begin(), m_ConstantsToDequantize.end(), tensorPtr->buffer)
5084  != m_ConstantsToDequantize.end())
5085  {
5086  dataType = DataType::Float32;
5087  }
5088  auto tensorAndData = CreateConstTensorNonPermuted(tensorPtr, tensorInfo, dataType);
5089 
5090  std::string layerName = fmt::format("Constant:{}", tensorPtr->name);
5091  IConnectableLayer *layer = m_Network->AddConstantLayer(tensorAndData.first, layerName.c_str());
5092 
5093  layer->GetOutputSlot(0).SetTensorInfo(tensorAndData.first.GetInfo());
5094  RegisterOutputSlots(subgraphIndex,
5095  VIRTUAL_OPERATOR_ID,
5096  layer,
5097  { tensorIndex });
5098  }
5099  else if (ShouldConstantTensorBeCreated(tensorIndex))
5100  {
5101  armnn::TensorInfo tensorInfo = ToTensorInfo(tensorPtr);
5102  armnn::DataType dataType = tensorInfo.GetDataType();
5103 
5104  if (std::find(m_ConstantsToDequantize.begin(), m_ConstantsToDequantize.end(), tensorPtr->buffer)
5105  != m_ConstantsToDequantize.end())
5106  {
5107  dataType = DataType::Float32;
5108  }
5109  // Make sure isConstant flag is set.
5110  tensorInfo.SetConstant();
5111  tensorInfo.SetDataType(dataType);
5112 
5113  auto tensorAndData = ConstTensor(tensorInfo, std::vector<uint8_t>(tensorInfo.GetNumBytes()));
5114 
5115  std::string layerName = fmt::format("Constant:{}", tensorPtr->name);
5116  IConnectableLayer* layer = m_Network->AddConstantLayer(tensorAndData, layerName.c_str());
5117 
5118  layer->GetOutputSlot(0).SetTensorInfo(tensorInfo);
5119  RegisterOutputSlots(subgraphIndex,
5120  VIRTUAL_OPERATOR_ID,
5121  layer,
5122  {tensorIndex});
5123  }
5124  else
5125  {
5126  throw ParseException(
5127  fmt::format("Invalid Tensor: Tensor should be constant. {}",
5128  CHECK_LOCATION().AsString()));
5129  }
5130  }
5131  }
5132  }
5133 }
5134 
5135 // example usage: BufferRawPtr bufferPtr = GetBuffer(m_Model, inputs[0]->buffer);
5137 {
5138  CHECK_BUFFER(model, bufferIndex);
5139  return model->buffers[bufferIndex].get();
5140 }
5141 
5142 template<typename T>
5143 std::pair<armnn::ConstTensor, TfLiteParserImpl::SupportedDataStorage>
5144 TfLiteParserImpl::CreateConstTensorAndStoreData(TfLiteParserImpl::BufferRawPtr bufferPtr,
5146  armnn::TensorInfo& tensorInfo,
5148 {
5149  // Make sure isConstant flag is set.
5150  tensorInfo.SetConstant();
5151 
5152  auto constData = CreateConstTensorImpl<T>(bufferPtr,
5153  tensorPtr,
5154  tensorInfo,
5155  permutationVector);
5156  TfLiteParserImpl::SupportedDataStorage storage(std::move(constData.second));
5157  return std::make_pair(constData.first, std::move(storage));
5158 }
5159 
5160 bool TfLiteParserImpl::ShouldConstantTensorBeCreated(unsigned int tensorIndex)
5161 {
5162  // If the TensorIndex appears in the list of ConstantsToBeCreated then return true
5163  return (std::find(m_ConstantsToBeCreated.begin(), m_ConstantsToBeCreated.end(), tensorIndex)
5164  != m_ConstantsToBeCreated.end());
5165 }
5166 
5167 bool TfLiteParserImpl::IsConstTensor(TensorRawPtr tensorPtr)
5168 {
5169  CHECK_TENSOR_PTR(tensorPtr);
5170  bool isConst = true;
5171 
5172  auto buffer = GetBuffer(m_Model, tensorPtr->buffer);
5173  if (buffer->data.size() == 0)
5174  {
5175  isConst = false;
5176  }
5177 
5178  return isConst;
5179 }
5180 
5181 std::pair<armnn::ConstTensor, TfLiteParserImpl::SupportedDataStorage>
5182 TfLiteParserImpl::CreateConstTensorPermuted(TensorRawPtr tensorPtr,
5183  armnn::TensorInfo& tensorInfo,
5185 {
5186  CHECK_TENSOR_PTR(tensorPtr);
5187  auto bufferPtr = GetBuffer(m_Model, tensorPtr->buffer);
5188  CHECK_BUFFER_SIZE(bufferPtr, tensorInfo, tensorPtr->buffer);
5189 
5190  // Make sure isConstant flag is set.
5191  tensorInfo.SetConstant();
5192 
5193  switch (tensorInfo.GetDataType())
5194  {
5196  return CreateConstTensorAndStoreData<float>(bufferPtr,
5197  tensorPtr,
5198  tensorInfo,
5199  permutationVector);
5201  return CreateConstTensorAndStoreData<uint8_t>(bufferPtr,
5202  tensorPtr,
5203  tensorInfo,
5204  permutationVector);
5206  return CreateConstTensorAndStoreData<int8_t>(bufferPtr,
5207  tensorPtr,
5208  tensorInfo,
5209  permutationVector);
5211  return CreateConstTensorAndStoreData<int8_t>(bufferPtr,
5212  tensorPtr,
5213  tensorInfo,
5214  permutationVector);
5216  return CreateConstTensorAndStoreData<int32_t>(bufferPtr,
5217  tensorPtr,
5218  tensorInfo,
5219  permutationVector);
5220  default:
5221  {
5222  std::stringstream errString;
5223  errString << "Unexpected datatype when creating const tensor: "
5224  << armnn::GetDataTypeName(tensorInfo.GetDataType())
5225  << " shape:" << tensorInfo.GetShape()
5226  << CHECK_LOCATION().AsString();
5227  throw ParseException(errString.str());
5228  }
5229  }
5230 }
5231 
5232 armnn::ConstTensor TfLiteParserImpl::CreateConstTensorNonPermuted(TensorRawPtr tensorPtr,
5233  armnn::TensorInfo& tensorInfo)
5234 {
5235  CHECK_TENSOR_PTR(tensorPtr);
5236  auto bufferPtr = GetBuffer(m_Model, tensorPtr->buffer);
5237  CHECK_BUFFER_SIZE(bufferPtr, tensorInfo, tensorPtr->buffer);
5238 
5239  // Make sure isConstant flag is set.
5240  tensorInfo.SetConstant();
5241 
5242  return ConstTensor(tensorInfo, bufferPtr->data.data());
5243 }
5244 
5245 std::pair<armnn::ConstTensor, std::unique_ptr<float[]>>
5246 TfLiteParserImpl::CreateConstTensorNonPermuted(TensorRawPtr tensorPtr,
5247  armnn::TensorInfo& tensorInfo,
5248  armnn::DataType inputDataType)
5249 {
5250  CHECK_TENSOR_PTR(tensorPtr);
5251  auto bufferPtr = GetBuffer(m_Model, tensorPtr->buffer);
5252  CHECK_BUFFER_SIZE(bufferPtr, tensorInfo, tensorPtr->buffer);
5253 
5254  // Make sure isConstant flag is set.
5255  tensorInfo.SetConstant();
5256 
5257  if (inputDataType == DataType::Float32 && tensorInfo.GetDataType() != DataType::Float32)
5258  {
5259  try
5260  {
5261  TensorInfo constTensorInfo(tensorInfo.GetShape(), DataType::Float32, 0.0f, 0, true);
5262  std::unique_ptr<float[]> data = armnnUtils::ToFloatArray(bufferPtr->data, tensorInfo);
5263  return std::make_pair(ConstTensor(constTensorInfo, data.get()), std::move(data));
5264  }
5265  catch (InvalidArgumentException&)
5266  {
5267  throw ParseException(
5268  fmt::format("Unsupported input/weights combination: Input {} not supported with Weights {}",
5269  GetDataTypeName(DataType::Float32),
5270  GetDataTypeName(tensorInfo.GetDataType()),
5271  CHECK_LOCATION().AsString()));
5272  }
5273  }
5274  else
5275  {
5276  return std::make_pair(ConstTensor(tensorInfo, bufferPtr->data.data()), std::unique_ptr<float[]>());
5277  }
5278 }
5279 
5280 std::pair<armnn::ConstTensor*, std::unique_ptr<float[]>>
5281 TfLiteParserImpl::CreateConstTensorPtr(TensorRawPtr tensorPtr, armnn::TensorInfo& inputTensorInfo)
5282 {
5283  CHECK_TENSOR_PTR(tensorPtr);
5284  armnn::TensorInfo tensorInfo = ToTensorInfo(tensorPtr);
5285  auto bufferPtr = GetBuffer(m_Model, tensorPtr->buffer);
5286  CHECK_BUFFER_SIZE(bufferPtr, tensorInfo, tensorPtr->buffer);
5287 
5288  // Make sure isConstant flag is set.
5289  tensorInfo.SetConstant();
5290 
5291  if (inputTensorInfo.GetDataType() == DataType::Float32 && tensorInfo.GetDataType() != DataType::Float32)
5292  {
5293  try
5294  {
5295  TensorInfo constTensorInfo(tensorInfo.GetShape(), DataType::Float32, 0.0f, 0, true);
5296  std::unique_ptr<float[]> data = armnnUtils::ToFloatArray(bufferPtr->data, tensorInfo);
5297  return std::make_pair(new ConstTensor(constTensorInfo, data.get()), std::move(data));
5298  }
5299  catch (InvalidArgumentException&)
5300  {
5301  throw ParseException(
5302  fmt::format("Unsupported input/weights combination: Input {} not supported with Weights {}",
5303  GetDataTypeName(DataType::Float32),
5304  GetDataTypeName(tensorInfo.GetDataType()),
5305  CHECK_LOCATION().AsString()));
5306  }
5307  }
5308  else
5309  {
5310  return std::make_pair(new ConstTensor(tensorInfo, bufferPtr->data.data()), std::unique_ptr<float[]>());
5311  }
5312 }
5313 
5315  const std::string& name) const
5316 {
5317  CHECK_SUBGRAPH(m_Model, subgraphId);
5318  auto inputs = GetSubgraphInputs(m_Model, subgraphId);
5319  for (auto const& input : inputs)
5320  {
5321  if (input.second->name == name)
5322  {
5323  auto bindingId = GenerateLayerBindingId(subgraphId, input.first);
5324  auto inputTensorInfo = ToTensorInfo(input.second);
5325  // Input tensors are always treated as constant tensors during network execution.
5326  inputTensorInfo.SetConstant(true);
5327  return std::make_pair(bindingId, inputTensorInfo);
5328  }
5329  }
5330 
5331  std::stringstream bindings;
5332  for (auto const& input : inputs)
5333  {
5334  bindings << "'" << input.second->name << "' ";
5335  }
5336 
5337  throw ParseException(
5338  fmt::format("No input binding found for subgraph:{} and name:{}. "
5339  "Possible inputs are: [{}] {}",
5340  subgraphId,
5341  name,
5342  bindings.str(),
5343  CHECK_LOCATION().AsString()));
5344 }
5345 
5347  const std::string& name) const
5348 {
5349  CHECK_SUBGRAPH(m_Model, subgraphId);
5350  auto outputs = GetSubgraphOutputs(m_Model, subgraphId);
5351  for (unsigned int i = 0; i < outputs.size(); ++i)
5352  {
5353  auto const output = outputs[i];
5354  if (output.second->name == name)
5355  {
5356  auto bindingId = GenerateLayerBindingId(subgraphId, output.first);
5357  std::vector<unsigned int> shape = m_OverriddenOutputShapes.size() > 0 ?
5358  m_OverriddenOutputShapes[i] : AsUnsignedVector(output.second->shape);
5359  return std::make_pair(bindingId, ToTensorInfo(output.second, shape));
5360  }
5361  }
5362 
5363  std::stringstream bindings;
5364  for (auto const& output : outputs)
5365  {
5366  bindings << "'" << output.second->name << "' ";
5367  }
5368 
5369  throw ParseException(
5370  fmt::format("No output binding found for subgraph:{} and name:{}. "
5371  "Possible outputs are: [{}] {}",
5372  subgraphId,
5373  name,
5374  bindings.str(),
5375  CHECK_LOCATION().AsString()));
5376 }
5377 
5379 {
5380  return m_Model->subgraphs.size();
5381 }
5382 
5383 std::vector<std::string> TfLiteParserImpl::GetSubgraphInputTensorNames(size_t subgraphId) const
5384 {
5385  CHECK_SUBGRAPH(m_Model, subgraphId);
5386  auto inputs = GetSubgraphInputs(m_Model, subgraphId);
5387  std::vector<std::string> result;
5388  result.reserve(inputs.size());
5389  for (auto const& input : inputs)
5390  {
5391  result.push_back(input.second->name);
5392  }
5393  return result;
5394 }
5395 
5396 std::vector<std::string> TfLiteParserImpl::GetSubgraphOutputTensorNames(size_t subgraphId) const
5397 {
5398  CHECK_SUBGRAPH(m_Model, subgraphId);
5399  auto outputs = GetSubgraphOutputs(m_Model, subgraphId);
5400  std::vector<std::string> result;
5401  result.reserve(outputs.size());
5402  for (auto const& output : outputs)
5403  {
5404  result.push_back(output.second->name);
5405  }
5406  return result;
5407 }
5408 
5409 const std::string TfLiteParserImpl::GetVersion()
5410 {
5411  return TFLITE_PARSER_VERSION;
5412 }
5413 
5414 TfLiteParserImpl::SupportedDataStorage::SupportedDataStorage(std::unique_ptr<float[]>&& data)
5415 : m_FloatData(std::move(data))
5416 , m_Uint8Data(nullptr)
5417 , m_Int8Data(nullptr)
5418 , m_Int32Data(nullptr)
5419 {
5420 }
5421 
5422 TfLiteParserImpl::SupportedDataStorage::SupportedDataStorage(std::unique_ptr<uint8_t[]>&& data)
5423 : m_FloatData(nullptr)
5424 , m_Uint8Data(std::move(data))
5425 , m_Int8Data(nullptr)
5426 , m_Int32Data(nullptr)
5427 {
5428 }
5429 
5430 TfLiteParserImpl::SupportedDataStorage::SupportedDataStorage(std::unique_ptr<int8_t[]>&& data)
5431 : m_FloatData(nullptr)
5432 , m_Uint8Data(nullptr)
5433 , m_Int8Data(std::move(data))
5434 , m_Int32Data(nullptr)
5435 {
5436 }
5437 
5438 TfLiteParserImpl::SupportedDataStorage::SupportedDataStorage(std::unique_ptr<int32_t[]>&& data)
5439 : m_FloatData(nullptr)
5440 , m_Uint8Data(nullptr)
5441 , m_Int8Data(nullptr)
5442 , m_Int32Data(std::move(data))
5443 {
5444 }
5445 
5446 } // armnnTfLiteParser
armnnTfLiteParser::TfLiteParserImpl::GetSubgraphOutputs
static TensorIdRawPtrVector GetSubgraphOutputs(const ModelPtr &model, size_t subgraphIndex)
Definition: TfLiteParser.cpp:4899
armnn::TransposeConvolution2dDescriptor::m_OutputShapeEnabled
bool m_OutputShapeEnabled
Output shape if it has been specified.
Definition: Descriptors.hpp:1452
TfLiteParser.hpp
armnn::LstmInputParams::m_CellToForgetWeights
const ConstTensor * m_CellToForgetWeights
Definition: LstmParams.hpp:49
armnn::Pooling2dDescriptor::m_StrideY
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
Definition: Descriptors.hpp:409
armnn::Convolution2dDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:572
armnn::LstmDescriptor::m_TimeMajor
bool m_TimeMajor
Enable/disable time major.
Definition: Descriptors.hpp:1121
armnnTfLiteParser
Definition: ITfLiteParser.hpp:17
armnn::IOutputSlot::GetOwningIConnectableLayer
virtual const IConnectableLayer & GetOwningIConnectableLayer() const =0
armnn::StackDescriptor::m_InputShape
TensorShape m_InputShape
Required shape of all input tensors.
Definition: Descriptors.hpp:1244
armnn::TensorInfo::GetQuantizationOffset
int32_t GetQuantizationOffset() const
Definition: Tensor.cpp:478
armnn::TransposeConvolution2dDescriptor::m_PadBottom
uint32_t m_PadBottom
Padding bottom value in the height dimension.
Definition: Descriptors.hpp:1442
armnn::IConnectableLayer::InferOutputShapes
virtual std::vector< TensorShape > InferOutputShapes(const std::vector< TensorShape > &inputShapes) const =0
Infer the shape of the output(s) based on the provided input shape(s)
armnn::TensorInfo::GetQuantizationScale
float GetQuantizationScale() const
Definition: Tensor.cpp:461
armnn::CheckLocation::FileLine
std::string FileLine() const
Definition: Exceptions.hpp:37
armnn::Convolution2dDescriptor::m_BiasEnabled
bool m_BiasEnabled
Enable/disable bias.
Definition: Descriptors.hpp:570
LstmParams.hpp
armnn::CheckLocation
Definition: Exceptions.hpp:14
armnnTfLiteParser::TfLiteParserImpl::LoadModelFromFile
static ModelPtr LoadModelFromFile(const char *fileName)
Definition: TfLiteParser.cpp:4792
armnn::LstmInputParamsInfo
Definition: LstmParams.hpp:63
CHECK_SUPPORTED_FUSED_ACTIVATION
#define CHECK_SUPPORTED_FUSED_ACTIVATION(OPTION, SUBGRAPH_INDEX, OPERATOR_INDEX)
Definition: TfLiteParser.cpp:352
armnn::TransposeConvolution2dDescriptor::m_PadLeft
uint32_t m_PadLeft
Padding left value in the width dimension.
Definition: Descriptors.hpp:1436
armnn::DataType::QAsymmU8
@ QAsymmU8
armnn::FullyConnectedDescriptor::m_BiasEnabled
bool m_BiasEnabled
Enable/disable bias.
Definition: Descriptors.hpp:514
armnn::GatherDescriptor
A GatherDescriptor for the GatherLayer.
Definition: Descriptors.hpp:932
armnn::NormalizationDescriptor
A NormalizationDescriptor for the NormalizationLayer.
Definition: Descriptors.hpp:757
armnn::TensorInfo::SetDataType
void SetDataType(DataType type)
Definition: Tensor.hpp:199
CHECK_BUFFER
#define CHECK_BUFFER(MODEL, BUFFER_INDEX)
Definition: TfLiteParser.cpp:260
armnn::ComparisonOperation::Equal
@ Equal
armnn::TransposeDescriptor
A TransposeDescriptor for the TransposeLayer.
Definition: Descriptors.hpp:1457
armnn::TransposeConvolution2dDescriptor::m_PadTop
uint32_t m_PadTop
Padding top value in the height dimension.
Definition: Descriptors.hpp:1440
armnn::ElementwiseUnaryDescriptor
A ElementwiseUnaryDescriptor for the ElementwiseUnaryLayer.
Definition: Descriptors.hpp:129
armnn::PadDescriptor
A PadDescriptor for the PadLayer.
Definition: Descriptors.hpp:1163
armnn::SoftmaxDescriptor
A SoftmaxDescriptor for the SoftmaxLayer.
Definition: Descriptors.hpp:177
armnn::Convolution2dDescriptor::m_DilationY
uint32_t m_DilationY
Dilation along y axis.
Definition: Descriptors.hpp:568
armnn::ComparisonDescriptor::m_Operation
ComparisonOperation m_Operation
Specifies the comparison operation to execute.
Definition: Descriptors.hpp:105
armnn::Convolution2dDescriptor::m_PadBottom
uint32_t m_PadBottom
Padding bottom value in the height dimension.
Definition: Descriptors.hpp:560
armnn::StackDescriptor
A StackDescriptor for the StackLayer.
Definition: Descriptors.hpp:1218
armnn::SliceDescriptor
A SliceDescriptor for the SliceLayer.
Definition: Descriptors.hpp:1195
armnn::BatchToSpaceNdDescriptor::m_Crops
std::vector< std::pair< unsigned int, unsigned int > > m_Crops
The values to crop from the input dimension.
Definition: Descriptors.hpp:888
CHECK_LOCATION
#define CHECK_LOCATION()
Definition: Exceptions.hpp:203
armnn::Convolution3dDescriptor::m_PadLeft
uint32_t m_PadLeft
Padding left value in the width dimension.
Definition: Descriptors.hpp:617
armnn::DataType::Float16
@ Float16
armnn::LayerBindingId
int LayerBindingId
Type of identifiers for bindable layers (inputs, outputs).
Definition: Types.hpp:301
armnn::ActivationDescriptor
An ActivationDescriptor for the ActivationLayer.
Definition: Descriptors.hpp:36
armnn::ReduceDescriptor::m_ReduceOperation
ReduceOperation m_ReduceOperation
Specifies the reduction operation to execute.
Definition: Descriptors.hpp:1525
armnn::LstmInputParams::m_RecurrentToOutputWeights
const ConstTensor * m_RecurrentToOutputWeights
Definition: LstmParams.hpp:47
armnn::IConnectableLayer
Interface for a layer that is connectable to other layers via InputSlots and OutputSlots.
Definition: INetwork.hpp:68
armnn::LstmDescriptor
An LstmDescriptor for the LstmLayer.
Definition: Descriptors.hpp:1069
armnnOnnxParser::ModelPtr
std::unique_ptr< onnx::ModelProto > ModelPtr
Definition: OnnxParser.hpp:23
armnn::FullyConnectedDescriptor
A FullyConnectedDescriptor for the FullyConnectedLayer.
Definition: Descriptors.hpp:495
armnn::StridedSliceDescriptor::m_BeginMask
int32_t m_BeginMask
Begin mask value.
Definition: Descriptors.hpp:1317
armnn::ComparisonOperation::NotEqual
@ NotEqual
armnnTfLiteParser::ITfLiteParser
Definition: ITfLiteParser.hpp:26
armnn::ParseException
Definition: Exceptions.hpp:92
armnn::LstmInputParamsInfo::m_InputToForgetWeights
const TensorInfo * m_InputToForgetWeights
Definition: LstmParams.hpp:90
armnn::Convolution3dDescriptor::m_DilationY
uint32_t m_DilationY
Dilation along y axis.
Definition: Descriptors.hpp:637
armnn::TransposeConvolution2dDescriptor::m_OutputShape
std::vector< unsigned int > m_OutputShape
Definition: Descriptors.hpp:1453
armnnUtils::ToFloatArray
std::unique_ptr< float[]> ToFloatArray(const std::vector< PrimitiveType > &data, const armnn::TensorInfo &tensorInfo)
Definition: TensorUtils.cpp:273
armnn::ArgMinMaxDescriptor::m_Axis
int m_Axis
Axis to reduce across the input tensor.
Definition: Descriptors.hpp:83
armnn::SpaceToBatchNdDescriptor::m_PadList
std::vector< std::pair< unsigned int, unsigned int > > m_PadList
Specifies the padding values for the input dimension: heightPad{top, bottom} widthPad{left,...
Definition: Descriptors.hpp:1036
armnn::BatchMatMulDescriptor
A BatchMatMulDescriptor for the BatchMatMul operator.
Definition: Descriptors.hpp:1551
armnn::ResizeDescriptor
A ResizeDescriptor for the ResizeLayer.
Definition: Descriptors.hpp:952
armnnTfLiteParser::TfLiteParserImpl
Definition: TfLiteParser.hpp:26
armnnTfLiteParser::TfLiteParserImpl::OutputShapeOfSqueeze
static armnn::TensorInfo OutputShapeOfSqueeze(std::vector< uint32_t > squeezeDims, const armnn::TensorInfo &inputTensorInfo)
Definition: TfLiteParser.cpp:2228
armnn::FullyConnectedDescriptor::m_ConstantWeights
bool m_ConstantWeights
Enable/disable constant weights and biases.
Definition: Descriptors.hpp:518
armnn::StridedSliceDescriptor
A StridedSliceDescriptor for the StridedSliceLayer.
Definition: Descriptors.hpp:1270
armnn::Pooling2dDescriptor::m_PoolHeight
uint32_t m_PoolHeight
Pooling height value.
Definition: Descriptors.hpp:405
armnn::StridedSliceDescriptor::m_Begin
std::vector< int > m_Begin
Begin values for the input that will be sliced.
Definition: Descriptors.hpp:1309
armnn::ConstTensor
A tensor defined by a TensorInfo (shape and data type) and an immutable backing store.
Definition: Tensor.hpp:327
armnn::LstmInputParams::m_CellBias
const ConstTensor * m_CellBias
Definition: LstmParams.hpp:53
armnn::UnaryOperation::Exp
@ Exp
armnn::ReduceDescriptor::m_vAxis
std::vector< uint32_t > m_vAxis
The indices of the dimensions to reduce.
Definition: Descriptors.hpp:1523
armnn::ReduceDescriptor
A ReduceDescriptor for the REDUCE operators.
Definition: Descriptors.hpp:1505
armnn::TransposeConvolution2dDescriptor::m_BiasEnabled
bool m_BiasEnabled
Enable/disable bias.
Definition: Descriptors.hpp:1448
armnn::BackendOptions
Struct for the users to pass backend specific options.
Definition: BackendOptions.hpp:22
TensorUtils.hpp
armnn::Convolution2dDescriptor::m_DilationX
uint32_t m_DilationX
Dilation along x axis.
Definition: Descriptors.hpp:566
armnn::LstmInputParams::m_OutputLayerNormWeights
const ConstTensor * m_OutputLayerNormWeights
Definition: LstmParams.hpp:60
armnn::DetectionPostProcessDescriptor::m_MaxDetections
uint32_t m_MaxDetections
Maximum numbers of detections.
Definition: Descriptors.hpp:733
armnn_driver::Model
::android::nn::Model Model
Helper classes.
Definition: ConversionUtils.hpp:43
armnn::ComparisonDescriptor
A ComparisonDescriptor for the ComparisonLayer.
Definition: Descriptors.hpp:89
armnn::IgnoreUnused
void IgnoreUnused(Ts &&...)
Definition: IgnoreUnused.hpp:14
armnn::UnaryOperation::Sqrt
@ Sqrt
armnn::DataType::Signed32
@ Signed32
armnnTfLiteParser::BindingPointInfo
armnn::BindingPointInfo BindingPointInfo
Definition: ITfLiteParser.hpp:20
armnn::StandInDescriptor
A StandInDescriptor for the StandIn layer.
Definition: Descriptors.hpp:1248
armnn::LstmDescriptor::m_CifgEnabled
bool m_CifgEnabled
Enable/disable cifg (coupled input & forget gate).
Definition: Descriptors.hpp:1113
armnn::Pooling2dDescriptor::m_PoolType
PoolingAlgorithm m_PoolType
The pooling algorithm to use (Max. Average, L2).
Definition: Descriptors.hpp:393
armnnTfLiteParser::TfLiteParserImpl::GetNetworkOutputBindingInfo
BindingPointInfo GetNetworkOutputBindingInfo(size_t subgraphId, const std::string &name) const
Retrieve binding info (layer id and tensor info) for the network output identified by the given layer...
Definition: TfLiteParser.cpp:5346
armnn::UnaryOperation::Neg
@ Neg
Assert.hpp
armnn::GetUnaryOperationAsCString
constexpr char const * GetUnaryOperationAsCString(UnaryOperation operation)
Definition: TypesUtils.hpp:89
armnn::LstmDescriptor::m_LayerNormEnabled
bool m_LayerNormEnabled
Enable/disable layer normalization.
Definition: Descriptors.hpp:1119
armnn::Exception::what
virtual const char * what() const noexcept override
Definition: Exceptions.cpp:32
armnn::ViewsDescriptor
A ViewsDescriptor for the SplitterLayer.
Definition: Descriptors.hpp:244
armnn::PermutationVector::GetSize
SizeType GetSize() const
Definition: Types.hpp:349
armnn::DepthwiseConvolution2dDescriptor::m_BiasEnabled
bool m_BiasEnabled
Enable/disable bias.
Definition: Descriptors.hpp:696
armnn::MeanDescriptor::m_Axis
std::vector< unsigned int > m_Axis
Values for the dimensions to reduce.
Definition: Descriptors.hpp:1157
armnn::DetectionPostProcessDescriptor::m_ScaleX
float m_ScaleX
Center size encoding scale x.
Definition: Descriptors.hpp:747
armnn::Convolution2dDescriptor::m_PadTop
uint32_t m_PadTop
Padding top value in the height dimension.
Definition: Descriptors.hpp:558
armnn::Pooling2dDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:415
armnn::StridedSliceDescriptor::m_NewAxisMask
int32_t m_NewAxisMask
New axis mask value.
Definition: Descriptors.hpp:1327
armnn::Convolution2dDescriptor::m_PadRight
uint32_t m_PadRight
Padding right value in the width dimension.
Definition: Descriptors.hpp:556
armnn::Convolution3dDescriptor::m_DilationX
uint32_t m_DilationX
Dilation along x axis.
Definition: Descriptors.hpp:635
armnnTfLiteParser::TfLiteParserImpl::ModelPtr
std::unique_ptr< tflite::ModelT > ModelPtr
Definition: TfLiteParser.hpp:30
armnnTfLiteParser::TfLiteParserImpl::OutputShapeOfReshape
static armnn::TensorInfo OutputShapeOfReshape(const armnn::TensorInfo &inputTensorInfo, const std::vector< int32_t > &targetDimsIn)
Definition: TfLiteParser.cpp:2994
armnn::ComparisonOperation::LessOrEqual
@ LessOrEqual
armnn::Convolution3dDescriptor::m_DilationZ
uint32_t m_DilationZ
Dilation along z axis.
Definition: Descriptors.hpp:639
armnn::IConnectableLayer::GetOutputSlot
virtual const IOutputSlot & GetOutputSlot(unsigned int index) const =0
Get the const output slot handle by slot index.
armnn::DataType::QAsymmS8
@ QAsymmS8
armnn::Pooling2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:407
armnn::DepthwiseConvolution2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:688
armnn::ArgMinMaxFunction
ArgMinMaxFunction
Definition: Types.hpp:102
armnn::DepthwiseConvolution2dDescriptor::m_DilationX
uint32_t m_DilationX
Dilation factor value for width dimension.
Definition: Descriptors.hpp:692
ARMNN_LOG
#define ARMNN_LOG(severity)
Definition: Logging.hpp:212
armnn::LstmInputParams::m_InputToOutputWeights
const ConstTensor * m_InputToOutputWeights
Definition: LstmParams.hpp:43
armnnTfLiteParser::TfLiteParserImpl::LoadModel
armnn::INetworkPtr LoadModel(std::unique_ptr< tflite::ModelT > model)
Definition: TfLiteParser.cpp:963
armnn::DetectionPostProcessDescriptor::m_NmsScoreThreshold
float m_NmsScoreThreshold
NMS score threshold.
Definition: Descriptors.hpp:739
armnnTfLiteParser::ComputeWrappedIndex
unsigned int ComputeWrappedIndex(int idx, unsigned int numDimsIn)
Definition: TfLiteParser.cpp:4069
armnn::IOutputSlot::Connect
virtual int Connect(IInputSlot &destination)=0
armnn::TensorInfo::SetConstant
void SetConstant(const bool IsConstant=true)
Marks the data corresponding to this tensor info as constant.
Definition: Tensor.cpp:514
armnn::LstmDescriptor::m_InputIntermediateScale
float m_InputIntermediateScale
Input intermediate quantization scale.
Definition: Descriptors.hpp:1123
CHECK_TENSOR
#define CHECK_TENSOR(MODEL, SUBGRAPH_INDEX, TENSOR_INDEX)
Definition: TfLiteParser.cpp:212
armnn::LstmInputParams::m_ForgetGateBias
const ConstTensor * m_ForgetGateBias
Definition: LstmParams.hpp:52
armnn::NormalizationDescriptor::m_NormMethodType
NormalizationAlgorithmMethod m_NormMethodType
Normalization method algorithm to use (LocalBrightness, LocalContrast).
Definition: Descriptors.hpp:783
armnn::DepthwiseConvolution2dDescriptor::m_PadLeft
uint32_t m_PadLeft
Padding left value in the width dimension.
Definition: Descriptors.hpp:680
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
armnn::LstmInputParams::m_CellLayerNormWeights
const ConstTensor * m_CellLayerNormWeights
Definition: LstmParams.hpp:59
armnn::Convolution3dDescriptor::m_PadTop
uint32_t m_PadTop
Padding top value in the height dimension.
Definition: Descriptors.hpp:621
armnn::IInputSlot
An input connection slot for a layer.
Definition: INetwork.hpp:25
armnn::LstmInputParams::m_CellToOutputWeights
const ConstTensor * m_CellToOutputWeights
Definition: LstmParams.hpp:50
armnn::DetectionPostProcessDescriptor::m_DetectionsPerClass
uint32_t m_DetectionsPerClass
Detections per classes, used in Regular NMS.
Definition: Descriptors.hpp:737
armnn::DetectionPostProcessDescriptor::m_ScaleH
float m_ScaleH
Center size encoding scale height.
Definition: Descriptors.hpp:753
armnn::NormalizationDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:793
armnn::DepthwiseConvolution2dDescriptor::m_PadTop
uint32_t m_PadTop
Padding top value in the height dimension.
Definition: Descriptors.hpp:684
armnn::BatchToSpaceNdDescriptor
A BatchToSpaceNdDescriptor for the BatchToSpaceNdLayer.
Definition: Descriptors.hpp:863
armnn::OptionalReferenceSwitch< std::is_reference< T >::value, T >::value
const T & value() const
Definition: Optional.hpp:146
armnn::Convolution3dDescriptor::m_PadFront
uint32_t m_PadFront
Padding front value in the depth dimension.
Definition: Descriptors.hpp:625
armnn::IConnectableLayer::GetInputSlot
virtual const IInputSlot & GetInputSlot(unsigned int index) const =0
Get a const input slot handle by slot index.
armnn::SpaceToDepthDescriptor
A SpaceToDepthDescriptor for the SpaceToDepthLayer.
Definition: Descriptors.hpp:1042
armnn::ReduceOperation::Min
@ Min
armnn::StridedSliceDescriptor::m_End
std::vector< int > m_End
End values for the input that will be sliced.
Definition: Descriptors.hpp:1311
armnn::CheckLocation::AsString
std::string AsString() const
Definition: Exceptions.hpp:29
armnnUtils::Permuted
armnn::TensorShape Permuted(const armnn::TensorShape &srcShape, const armnn::PermutationVector &mappings)
Definition: Permute.cpp:98
armnn::LstmDescriptor::m_CellIntermediateScale
float m_CellIntermediateScale
Cell intermediate quantization scale.
Definition: Descriptors.hpp:1127
armnn::NetworkOptions
std::vector< BackendOptions > NetworkOptions
Definition: BackendOptions.hpp:16
armnn::DetectionPostProcessDescriptor::m_ScaleW
float m_ScaleW
Center size encoding scale weight.
Definition: Descriptors.hpp:751
armnnDeserializer::CheckShape
bool CheckShape(const armnn::TensorShape &actual, const std::vector< uint32_t > &expected)
Definition: Deserializer.cpp:188
armnn::ResizeDescriptor::m_AlignCorners
bool m_AlignCorners
Aligned corners.
Definition: Descriptors.hpp:983
armnnTfLiteParser::TfLiteParserImpl::GetInputs
static TensorRawPtrVector GetInputs(const ModelPtr &model, size_t subgraphIndex, size_t operatorIndex)
Definition: TfLiteParser.cpp:4835
armnn::DetectionPostProcessDescriptor
Definition: Descriptors.hpp:701
armnn::ElementwiseUnaryDescriptor::m_Operation
UnaryOperation m_Operation
Specifies the elementwiseUnary operation to execute.
Definition: Descriptors.hpp:145
armnn::LstmInputParams::m_InputToForgetWeights
const ConstTensor * m_InputToForgetWeights
Definition: LstmParams.hpp:41
armnn::TensorShape
Definition: Tensor.hpp:20
armnn::Convolution3dDescriptor::m_StrideZ
uint32_t m_StrideZ
Stride value when proceeding through input for the depth dimension.
Definition: Descriptors.hpp:633
armnn::PoolingAlgorithm
PoolingAlgorithm
Definition: Types.hpp:147
armnnTfLiteParser::TfLiteParserImpl::LoadModelFromBinary
static ModelPtr LoadModelFromBinary(const uint8_t *binaryContent, size_t len)
Definition: TfLiteParser.cpp:4816
armnn::ResizeMethod
ResizeMethod
Definition: Types.hpp:163
armnn::ReduceOperation::Sum
@ Sum
armnn::PadDescriptor::m_PaddingMode
PaddingMode m_PaddingMode
Specifies the Padding mode (Constant, Reflect or Symmetric)
Definition: Descriptors.hpp:1191
armnn::ResizeDescriptor::m_TargetHeight
uint32_t m_TargetHeight
Target height value.
Definition: Descriptors.hpp:976
armnn::IOutputSlot::GetTensorInfo
virtual const TensorInfo & GetTensorInfo() const =0
armnn::DepthwiseConvolution2dDescriptor::m_DilationY
uint32_t m_DilationY
Dilation factor value for height dimension.
Definition: Descriptors.hpp:694
armnn::UnaryOperation::Ceil
@ Ceil
armnn::LstmInputParams::m_RecurrentToForgetWeights
const ConstTensor * m_RecurrentToForgetWeights
Definition: LstmParams.hpp:45
armnn::GatherDescriptor::m_Axis
int32_t m_Axis
The axis in params to gather indices from.
Definition: Descriptors.hpp:948
armnn::ReduceOperation::Max
@ Max
armnn::ReduceOperation
ReduceOperation
Definition: Types.hpp:154
armnn::ArgMinMaxDescriptor::m_Function
ArgMinMaxFunction m_Function
Specify if the function is to find Min or Max.
Definition: Descriptors.hpp:81
armnn::DepthwiseConvolution2dDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:698
armnn::LstmDescriptor::m_HiddenStateScale
float m_HiddenStateScale
Hidden State quantization scale.
Definition: Descriptors.hpp:1133
armnn::TensorInfo::IsQuantized
bool IsQuantized() const
Definition: Tensor.cpp:504
armnn::PadDescriptor::m_PadList
std::vector< std::pair< unsigned int, unsigned int > > m_PadList
Specifies the padding for input dimension.
Definition: Descriptors.hpp:1185
armnn::NormalizationAlgorithmChannel::Across
@ Across
armnn::Convolution2dDescriptor::m_PadLeft
uint32_t m_PadLeft
Padding left value in the width dimension.
Definition: Descriptors.hpp:554
armnn::DepthwiseConvolution2dDescriptor
A DepthwiseConvolution2dDescriptor for the DepthwiseConvolution2dLayer.
Definition: Descriptors.hpp:647
armnn::MeanDescriptor
A MeanDescriptor for the MeanLayer.
Definition: Descriptors.hpp:1139
armnn::NormalizationAlgorithmMethod::LocalBrightness
@ LocalBrightness
Krichevsky 2012: Local Brightness Normalization.
armnn::TensorInfo::GetNumDimensions
unsigned int GetNumDimensions() const
Definition: Tensor.hpp:195
armnn::LstmDescriptor::m_HiddenStateZeroPoint
int32_t m_HiddenStateZeroPoint
Hidden State zero point.
Definition: Descriptors.hpp:1131
CHECK_SUBGRAPH
#define CHECK_SUBGRAPH(MODEL, SUBGRAPH_INDEX)
Definition: TfLiteParser.cpp:141
armnn::IConnectableLayer::GetNumOutputSlots
virtual unsigned int GetNumOutputSlots() const =0
Returns the number of connectable output slots.
armnn::NormalizationDescriptor::m_NormSize
uint32_t m_NormSize
Depth radius value.
Definition: Descriptors.hpp:785
armnnOnnxParser::CreateConstTensorImpl
std::pair< armnn::ConstTensor, std::unique_ptr< T[]> > CreateConstTensorImpl(const T *bufferPtr, armnn::TensorInfo &tensorInfo, const armnn::Optional< armnn::PermutationVector & > permutationVector)
Definition: OnnxParser.cpp:578
armnn::ComparisonOperation::Greater
@ Greater
armnn::CheckLocation::m_Function
const char * m_Function
Definition: Exceptions.hpp:16
armnn::BatchToSpaceNdDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:890
ParserHelper.hpp
armnn::TensorInfo::IsTypeSpaceMatch
bool IsTypeSpaceMatch(const TensorInfo &other) const
Check that the types are the same and, if quantize, that the quantization parameters are the same.
Definition: Tensor.cpp:432
armnnTfLiteParser::TfLiteParserImpl::GetInputTensorIds
static std::vector< int32_t > & GetInputTensorIds(const ModelPtr &model, size_t subgraphIndex, size_t operatorIndex)
Definition: TfLiteParser.cpp:4915
armnnTfLiteParser::TfLiteParserImpl::CreateNetworkFromBinaryFile
armnn::INetworkPtr CreateNetworkFromBinaryFile(const char *graphFile)
Create the network from a flatbuffers binary file on disk.
Definition: TfLiteParser.cpp:948
armnn::Pooling2dDescriptor::m_PadBottom
uint32_t m_PadBottom
Padding bottom value in the height dimension.
Definition: Descriptors.hpp:401
armnn::ComparisonOperation::GreaterOrEqual
@ GreaterOrEqual
armnn::L2NormalizationDescriptor
A L2NormalizationDescriptor for the L2NormalizationLayer.
Definition: Descriptors.hpp:797
armnn::LstmInputParams::m_InputToCellWeights
const ConstTensor * m_InputToCellWeights
Definition: LstmParams.hpp:42
armnn::DataType::Float32
@ Float32
armnnTfLiteParser::TfLiteParserImpl::GetSubgraphCount
size_t GetSubgraphCount() const
Return the number of subgraphs in the parsed model.
Definition: TfLiteParser.cpp:5378
armnn::TensorInfo::GetNumElements
unsigned int GetNumElements() const
Definition: Tensor.hpp:196
armnn::IOutputSlot
An output connection slot for a layer.
Definition: INetwork.hpp:41
armnn::Convolution3dDescriptor
A Convolution3dDescriptor for the Convolution3dLayer.
Definition: Descriptors.hpp:576
armnn::LstmDescriptor::m_PeepholeEnabled
bool m_PeepholeEnabled
Enable/disable peephole.
Definition: Descriptors.hpp:1115
armnn::ArgMinMaxFunction::Min
@ Min
armnn::ComparisonOperation
ComparisonOperation
Definition: Types.hpp:108
armnn::TensorInfo
Definition: Tensor.hpp:152
armnn::DataType::Signed64
@ Signed64
armnn::SpaceToBatchNdDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:1038
armnn::ResizeDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:981
armnn::SpaceToDepthDescriptor::m_BlockSize
unsigned int m_BlockSize
Scalar specifying the input block size. It must be >= 1.
Definition: Descriptors.hpp:1059
LayerSupport.hpp
armnn::Convolution2dDescriptor
A Convolution2dDescriptor for the Convolution2dLayer.
Definition: Descriptors.hpp:522
armnn::UnaryOperation
UnaryOperation
Definition: Types.hpp:124
armnnTfLiteParser::TfLiteParserImpl::GetSubgraphOutputTensorNames
std::vector< std::string > GetSubgraphOutputTensorNames(size_t subgraphId) const
Return the output tensor names for a given subgraph.
Definition: TfLiteParser.cpp:5396
armnn::StackDescriptor::m_NumInputs
uint32_t m_NumInputs
Number of input tensors.
Definition: Descriptors.hpp:1242
armnn::Pooling2dDescriptor::m_PoolWidth
uint32_t m_PoolWidth
Pooling width value.
Definition: Descriptors.hpp:403
armnnTfLiteParser::TfLiteParserImpl::GetOutputs
static TensorRawPtrVector GetOutputs(const ModelPtr &model, size_t subgraphIndex, size_t operatorIndex)
Definition: TfLiteParser.cpp:4862
armnn::TransposeConvolution2dDescriptor::m_PadRight
uint32_t m_PadRight
Padding right value in the width dimension.
Definition: Descriptors.hpp:1438
Filesystem.hpp
Tensor.hpp
armnn::ActivationDescriptor::m_A
float m_A
Alpha upper bound value used by the activation functions. (BoundedReLu, Linear, TanH,...
Definition: Descriptors.hpp:61
CHECKED_NON_NEGATIVE
#define CHECKED_NON_NEGATIVE(VALUE)
Definition: VerificationHelpers.hpp:35
armnn::Convolution3dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:629
armnn::OptionalBase::has_value
bool has_value() const noexcept
Definition: Optional.hpp:53
Permute.hpp
armnnTfLiteParser::TfLiteParserImpl::OperatorPtr
std::unique_ptr< tflite::OperatorT > OperatorPtr
Definition: TfLiteParser.hpp:32
armnn::GetComparisonOperationAsCString
constexpr char const * GetComparisonOperationAsCString(ComparisonOperation operation)
Definition: TypesUtils.hpp:61
armnn::EmptyOptional
EmptyOptional is used to initialize the Optional class in case we want to have default value for an O...
Definition: Optional.hpp:32
armnn::ArgMinMaxFunction::Max
@ Max
armnn::SoftmaxDescriptor::m_Beta
float m_Beta
Exponentiation value.
Definition: Descriptors.hpp:190
armnn::LstmDescriptor::m_OutputIntermediateScale
float m_OutputIntermediateScale
Output intermediate quantization scale.
Definition: Descriptors.hpp:1129
armnn::ResizeDescriptor::m_Method
ResizeMethod m_Method
The Interpolation method to use (Bilinear, NearestNeighbor).
Definition: Descriptors.hpp:979
TFLITE_PARSER_VERSION
#define TFLITE_PARSER_VERSION
TFLITE_PARSER_VERSION: "X.Y.Z" where: X = Major version number Y = Minor version number Z = Patch ver...
Definition: Version.hpp:25
armnnTfLiteParser::ITfLiteParser::CreateNetworkFromBinaryFile
armnn::INetworkPtr CreateNetworkFromBinaryFile(const char *graphFile)
Create the network from a flatbuffers binary file on disk.
Definition: TfLiteParser.cpp:74
armnn::Convolution3dDescriptor::m_StrideY
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
Definition: Descriptors.hpp:631
armnn::Pooling2dDescriptor::m_PadLeft
uint32_t m_PadLeft
Padding left value in the width dimension.
Definition: Descriptors.hpp:395
armnnTfLiteParser::ITfLiteParserPtr
std::unique_ptr< ITfLiteParser, void(*)(ITfLiteParser *parser)> ITfLiteParserPtr
Definition: ITfLiteParser.hpp:24
armnn::TensorInfo::GetShape
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
armnn::Convolution3dDescriptor::m_PadRight
uint32_t m_PadRight
Padding right value in the width dimension.
Definition: Descriptors.hpp:619
armnn::LstmInputParams::m_RecurrentToInputWeights
const ConstTensor * m_RecurrentToInputWeights
Definition: LstmParams.hpp:44
armnn::StridedSliceDescriptor::m_Stride
std::vector< int > m_Stride
Stride values for the input that will be sliced.
Definition: Descriptors.hpp:1313
armnn::DataLayout::NHWC
@ NHWC
armnnDeserializer::TensorRawPtr
const armnnSerializer::TensorInfo * TensorRawPtr
Definition: Deserializer.hpp:20
ARMNN_ASSERT_MSG
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
armnn::LstmDescriptor::m_ForgetIntermediateScale
float m_ForgetIntermediateScale
Forget intermediate quantization scale.
Definition: Descriptors.hpp:1125
armnnTfLiteParser::TfLiteParserImpl::GetSubgraphInputTensorNames
std::vector< std::string > GetSubgraphInputTensorNames(size_t subgraphId) const
Return the input tensor names for a given subgraph.
Definition: TfLiteParser.cpp:5383
armnn::DetectionPostProcessDescriptor::m_NumClasses
uint32_t m_NumClasses
Number of classes.
Definition: Descriptors.hpp:743
armnn::Pooling2dDescriptor::m_PadTop
uint32_t m_PadTop
Padding top value in the height dimension.
Definition: Descriptors.hpp:399
armnn::ActivationDescriptor::m_Function
ActivationFunction m_Function
The activation function to use (Sigmoid, TanH, Linear, ReLu, BoundedReLu, SoftReLu,...
Definition: Descriptors.hpp:59
armnnTfLiteParser::TfLiteParserImpl::TensorRawPtrVector
std::vector< TensorRawPtr > TensorRawPtrVector
Definition: TfLiteParser.hpp:36
armnn::Convolution2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:562
armnn::NormalizationDescriptor::m_K
float m_K
Kappa value used for the across channel normalization equation.
Definition: Descriptors.hpp:791
armnn::Convolution3dDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NDHWC, NCDHW).
Definition: Descriptors.hpp:643
armnn::UnaryOperation::Abs
@ Abs
armnn::PadDescriptor::m_PadValue
float m_PadValue
Optional value to use for padding, defaults to 0.
Definition: Descriptors.hpp:1188
armnn::PermutationVector
Definition: Types.hpp:306
armnn::BatchToSpaceNdDescriptor::m_BlockShape
std::vector< unsigned int > m_BlockShape
Block shape values.
Definition: Descriptors.hpp:886
armnn::StridedSliceDescriptor::m_ShrinkAxisMask
int32_t m_ShrinkAxisMask
Shrink axis mask value. If set, the nth specification shrinks the dimensionality by 1.
Definition: Descriptors.hpp:1322
armnnTfLiteParser::TfLiteParserImpl::GetOutputTensorIds
static std::vector< int32_t > & GetOutputTensorIds(const ModelPtr &model, size_t subgraphIndex, size_t operatorIndex)
Definition: TfLiteParser.cpp:4925
armnn::SpaceToBatchNdDescriptor::m_BlockShape
std::vector< unsigned int > m_BlockShape
Block shape value.
Definition: Descriptors.hpp:1033
armnn::NormalizationDescriptor::m_Beta
float m_Beta
Beta value for the normalization equation.
Definition: Descriptors.hpp:789
armnn::LstmInputParams::m_RecurrentToCellWeights
const ConstTensor * m_RecurrentToCellWeights
Definition: LstmParams.hpp:46
armnn::LstmDescriptor::m_ClippingThresCell
float m_ClippingThresCell
Clipping threshold value for the cell state.
Definition: Descriptors.hpp:1109
CHECK_VALID_SIZE
#define CHECK_VALID_SIZE(ACTUAL,...)
Definition: VerificationHelpers.hpp:32
armnn::OriginsDescriptor
An OriginsDescriptor for the ConcatLayer.
Definition: Descriptors.hpp:201
armnn::ReshapeDescriptor
A ReshapeDescriptor for the ReshapeLayer.
Definition: Descriptors.hpp:990
armnn::TransposeConvolution2dDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:1450
armnn::TensorShape::GetNumDimensions
unsigned int GetNumDimensions() const
Function that returns the tensor rank.
Definition: Tensor.cpp:174
VerificationHelpers.hpp
armnn::LstmInputParams::m_ProjectionWeights
const ConstTensor * m_ProjectionWeights
Definition: LstmParams.hpp:55
armnn::DataType
DataType
Definition: Types.hpp:48
armnn::LstmInputParams::m_InputToInputWeights
const ConstTensor * m_InputToInputWeights
Definition: LstmParams.hpp:40
armnn::TransposeConvolution2dDescriptor
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Definition: Descriptors.hpp:1407
armnn::FullyConnectedDescriptor::m_TransposeWeightMatrix
bool m_TransposeWeightMatrix
Enable/disable transpose weight matrix.
Definition: Descriptors.hpp:516
armnn::L2NormalizationDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:812
armnn::FileNotFoundException
Definition: Exceptions.hpp:86
ARMNN_ASSERT
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
armnnTfLiteParser::TfLiteParserImpl::TensorIdRawPtrVector
std::vector< TensorIdRawPtr > TensorIdRawPtrVector
Definition: TfLiteParser.hpp:38
armnn::IOutputSlot::SetTensorInfo
virtual void SetTensorInfo(const TensorInfo &tensorInfo)=0
armnn::DepthwiseConvolution2dDescriptor::m_PadRight
uint32_t m_PadRight
Padding right value in the width dimension.
Definition: Descriptors.hpp:682
armnn::TensorInfo::GetNumBytes
unsigned int GetNumBytes() const
Definition: Tensor.cpp:427
armnn::Pooling2dDescriptor
A Pooling2dDescriptor for the Pooling2dLayer.
Definition: Descriptors.hpp:359
armnn::LstmDescriptor::m_ProjectionEnabled
bool m_ProjectionEnabled
Enable/disable the projection layer.
Definition: Descriptors.hpp:1117
armnnDeserializer::ToTensorInfo
armnn::TensorInfo ToTensorInfo(TensorRawPtr tensorPtr)
Definition: Deserializer.cpp:642
armnnTfLiteParser::TfLiteParserImpl::GetNetworkInputBindingInfo
BindingPointInfo GetNetworkInputBindingInfo(size_t subgraphId, const std::string &name) const
Retrieve binding info (layer id and tensor info) for the network input identified by the given layer ...
Definition: TfLiteParser.cpp:5314
armnn::UnaryOperation::LogicalNot
@ LogicalNot
armnn::UnaryOperation::Sin
@ Sin
Exceptions.hpp
armnn::StridedSliceDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
Definition: Descriptors.hpp:1330
armnn::MeanDescriptor::m_KeepDims
bool m_KeepDims
Enable/disable keep dimensions. If true, then the reduced dimensions that are of length 1 are kept.
Definition: Descriptors.hpp:1159
armnn::Optional
Definition: Optional.hpp:270
armnnTfLiteParser::TfLiteParserImpl::GetVersion
static const std::string GetVersion()
Retrieve version in X.Y.Z form.
Definition: TfLiteParser.cpp:5409
armnn::Pooling2dDescriptor::m_PadRight
uint32_t m_PadRight
Padding right value in the width dimension.
Definition: Descriptors.hpp:397
armnn::TransposeConvolution2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:1444
Logging.hpp
armnn::DetectionPostProcessDescriptor::m_ScaleY
float m_ScaleY
Center size encoding scale y.
Definition: Descriptors.hpp:749
armnn::DataType::QSymmS8
@ QSymmS8
Descriptors.hpp
armnn::DetectionPostProcessDescriptor::m_MaxClassesPerDetection
uint32_t m_MaxClassesPerDetection
Maximum numbers of classes per detection, used in Fast NMS.
Definition: Descriptors.hpp:735
armnn::StridedSliceDescriptor::m_EndMask
int32_t m_EndMask
End mask value.
Definition: Descriptors.hpp:1320
armnn::DepthwiseConvolution2dDescriptor::m_PadBottom
uint32_t m_PadBottom
Padding bottom value in the height dimension.
Definition: Descriptors.hpp:686
CHECK_BUFFER_SIZE
#define CHECK_BUFFER_SIZE(BUFFER_PTR, TENSOR_INFO, BUFFER_ID)
Definition: TfLiteParser.cpp:331
armnn::IConnectableLayer::GetName
virtual const char * GetName() const =0
Returns the name of the layer.
armnnUtils::ProcessConcatInputTensorInfo
void ProcessConcatInputTensorInfo(armnn::TensorInfo &inputTensorInfo, armnn::OriginsDescriptor &concatDescriptor, const unsigned int &concatAxis, unsigned int inputIndex, unsigned int &mergeDimOrigin)
Definition: ParserHelper.cpp:19
NumericCast.hpp
armnn::NormalizationDescriptor::m_NormChannelType
NormalizationAlgorithmChannel m_NormChannelType
Normalization channel algorithm to use (Across, Within).
Definition: Descriptors.hpp:781
armnn::Convolution3dDescriptor::m_BiasEnabled
bool m_BiasEnabled
Enable/disable bias.
Definition: Descriptors.hpp:641
armnn::INetworkPtr
std::unique_ptr< INetwork, void(*)(INetwork *network)> INetworkPtr
Definition: INetwork.hpp:327
armnn::LstmInputParams::m_CellToInputWeights
const ConstTensor * m_CellToInputWeights
Definition: LstmParams.hpp:48
armnn::LstmDescriptor::m_ActivationFunc
uint32_t m_ActivationFunc
The activation function to use.
Definition: Descriptors.hpp:1107
armnn::LstmDescriptor::m_ClippingThresProj
float m_ClippingThresProj
Clipping threshold value for the projection.
Definition: Descriptors.hpp:1111
armnn::ArgMinMaxDescriptor
An ArgMinMaxDescriptor for ArgMinMaxLayer.
Definition: Descriptors.hpp:67
armnn::UnaryOperation::Rsqrt
@ Rsqrt
armnn::DataType::QSymmS16
@ QSymmS16
armnnTfLiteParser::TfLiteParserImpl::GetSubgraphInputs
static TensorIdRawPtrVector GetSubgraphInputs(const ModelPtr &model, size_t subgraphIndex)
Definition: TfLiteParser.cpp:4882
armnn::TensorInfo::SetShape
void SetShape(const TensorShape &newShape)
Definition: Tensor.hpp:193
armnn::ReduceOperation::Prod
@ Prod
armnnTfLiteParser::TfLiteParserImpl::BufferRawPtr
const tflite::BufferT * BufferRawPtr
Definition: TfLiteParser.hpp:40
armnn::ActivationDescriptor::m_B
float m_B
Beta lower bound value used by the activation functions. (BoundedReLu, Linear, TanH).
Definition: Descriptors.hpp:63
armnn::IConnectableLayer::GetType
virtual LayerType GetType() const =0
Returns the armnn::LayerType of this layer.
armnn::DepthwiseConvolution2dDescriptor::m_StrideY
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
Definition: Descriptors.hpp:690
armnn::LstmInputParams::m_InputLayerNormWeights
const ConstTensor * m_InputLayerNormWeights
Definition: LstmParams.hpp:57
IgnoreUnused.hpp
ARMNN_THROW_PARSE_EXCEPTION
#define ARMNN_THROW_PARSE_EXCEPTION(msg)
Definition: TfLiteParser.cpp:42
TypesUtils.hpp
armnn::TransposeConvolution2dDescriptor::m_StrideY
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
Definition: Descriptors.hpp:1446
armnn::Convolution3dDescriptor::m_PadBack
uint32_t m_PadBack
Padding back value in the depth dimension.
Definition: Descriptors.hpp:627
armnn::Pooling2dDescriptor::m_PaddingMethod
PaddingMethod m_PaddingMethod
The padding method to be used. (Exclude, IgnoreValue).
Definition: Descriptors.hpp:413
armnn::LstmInputParams
Definition: LstmParams.hpp:13
armnn::ReduceDescriptor::m_KeepDims
bool m_KeepDims
if true then output shape has no change.
Definition: Descriptors.hpp:1521
CHECK_MODEL
#define CHECK_MODEL(MODEL, SUBGRAPH_INDEX, OPERATOR_INDEX)
Definition: TfLiteParser.cpp:183
std
Definition: BackendId.hpp:149
armnn::IsActivationSupported
bool IsActivationSupported(const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const ActivationDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
Deprecated in favor of IBackend and ILayerSupport interfaces.
armnn::Convolution2dDescriptor::m_StrideY
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
Definition: Descriptors.hpp:564
BackendOptions.hpp
armnn::DetectionPostProcessDescriptor::m_NmsIouThreshold
float m_NmsIouThreshold
Intersection over union threshold.
Definition: Descriptors.hpp:741
CHECK_TENSOR_PTR
#define CHECK_TENSOR_PTR(TENSOR_PTR)
Definition: TfLiteParser.cpp:225
armnn::IConnectableLayer::GetNumInputSlots
virtual unsigned int GetNumInputSlots() const =0
Returns the number of connectable input slots.
armnn::ReshapeDescriptor::m_TargetShape
TensorShape m_TargetShape
Target shape value.
Definition: Descriptors.hpp:1006
armnn::DataLayout::NDHWC
@ NDHWC
armnn::LstmInputParams::m_InputGateBias
const ConstTensor * m_InputGateBias
Definition: LstmParams.hpp:51
armnn::DataType::Boolean
@ Boolean
armnn::GetDataTypeName
constexpr const char * GetDataTypeName(DataType dataType)
Definition: TypesUtils.hpp:220
armnn::InvalidArgumentException
Definition: Exceptions.hpp:80
armnn::StackDescriptor::m_Axis
uint32_t m_Axis
0-based axis along which to stack the input tensors.
Definition: Descriptors.hpp:1240
armnn::LstmInputParams::m_ForgetLayerNormWeights
const ConstTensor * m_ForgetLayerNormWeights
Definition: LstmParams.hpp:58
armnn::ComparisonOperation::Less
@ Less
armnn::NormalizationDescriptor::m_Alpha
float m_Alpha
Alpha value for the normalization equation.
Definition: Descriptors.hpp:787
armnn::LstmInputParams::m_ProjectionBias
const ConstTensor * m_ProjectionBias
Definition: LstmParams.hpp:56
armnn::MaxNumOfTensorDimensions
constexpr unsigned int MaxNumOfTensorDimensions
Definition: Types.hpp:31
armnn::DetectionPostProcessDescriptor::m_UseRegularNms
bool m_UseRegularNms
Use Regular NMS.
Definition: Descriptors.hpp:745
Version.hpp
armnnTfLiteParser::TfLiteParserImpl::TensorRawPtr
const tflite::TensorT * TensorRawPtr
Definition: TfLiteParser.hpp:35
armnn::LstmInputParams::m_OutputGateBias
const ConstTensor * m_OutputGateBias
Definition: LstmParams.hpp:54
armnnTfLiteParser::TfLiteParserImpl::SubgraphPtr
std::unique_ptr< tflite::SubGraphT > SubgraphPtr
Definition: TfLiteParser.hpp:31
armnn::Convolution3dDescriptor::m_PadBottom
uint32_t m_PadBottom
Padding bottom value in the height dimension.
Definition: Descriptors.hpp:623
armnn::TensorInfo::GetDataType
DataType GetDataType() const
Definition: Tensor.hpp:198
armnn::TensorShape::AreAllDimensionsSpecified
bool AreAllDimensionsSpecified() const
Checks if there is at least one dimension not specified.
Definition: Tensor.cpp:241
armnn::BaseTensor::GetInfo
const TensorInfo & GetInfo() const
Definition: Tensor.hpp:295
armnn::StridedSliceDescriptor::m_EllipsisMask
int32_t m_EllipsisMask
Ellipsis mask value.
Definition: Descriptors.hpp:1324
armnn::UnaryOperation::Log
@ Log
armnnTfLiteParser::TfLiteParserImpl::CreateNetworkFromBinary
armnn::INetworkPtr CreateNetworkFromBinary(const std::vector< uint8_t > &binaryContent)
Create the network from a flatbuffers binary.
Definition: TfLiteParser.cpp:955
armnn::BoostLogSeverityMapping::info
@ info
armnnTfLiteParser::TfLiteParserImpl::GetBuffer
static BufferRawPtr GetBuffer(const ModelPtr &model, size_t bufferIndex)
Definition: TfLiteParser.cpp:5136
armnnUtils::Permute
void Permute(const armnn::TensorShape &dstShape, const armnn::PermutationVector &mappings, const void *src, void *dst, size_t dataTypeSize)
Definition: Permute.cpp:131
armnnUtils::GetUnsignedAxis
unsigned int GetUnsignedAxis(const unsigned int inputDimension, const int axis)
Definition: TensorUtils.cpp:221
armnn::ResizeDescriptor::m_TargetWidth
uint32_t m_TargetWidth
Target width value.
Definition: Descriptors.hpp:974
armnn::SpaceToBatchNdDescriptor
A SpaceToBatchNdDescriptor for the SpaceToBatchNdLayer.
Definition: Descriptors.hpp:1010
armnn::Pooling2dDescriptor::m_OutputShapeRounding
OutputShapeRounding m_OutputShapeRounding
The rounding method for the output shape. (Floor, Ceiling).
Definition: Descriptors.hpp:411
armnn::ActivationFunction
ActivationFunction
Definition: Types.hpp:86