ArmNN
 22.11
armnn Namespace Reference

Copyright (c) 2021 ARM Limited and Contributors. More...

Namespaces

 experimental
 
 optimizations
 
 profiling
 
 stringUtils
 
 timelinedecoder
 
 utility
 

Classes

struct  abs
 
class  AbsLayer
 
struct  AbsQueueDescriptor
 
struct  ActivationDescriptor
 An ActivationDescriptor for the ActivationLayer. More...
 
class  ActivationLayer
 This layer represents an activation operation with the specified activation function. More...
 
struct  ActivationQueueDescriptor
 
class  AddedLayerObservable
 
class  AdditionLayer
 This layer represents an addition operation. More...
 
struct  AdditionQueueDescriptor
 
struct  Allocator
 
struct  ArgMinMaxDescriptor
 An ArgMinMaxDescriptor for ArgMinMaxLayer. More...
 
class  ArgMinMaxLayer
 This layer represents a ArgMinMax operation. More...
 
struct  ArgMinMaxQueueDescriptor
 
class  ArmNNProfilingServiceInitialiser
 
class  BackendCapabilityException
 
class  BackendId
 
struct  BackendOptions
 Struct for the users to pass backend specific options. More...
 
class  BackendRegistry
 
struct  BackendSettings
 
class  BackendUnavailableException
 Class for non-fatal exceptions raised while initialising a backend. More...
 
struct  BackendVersion
 
class  BadOptionalAccessException
 
struct  BaseDescriptor
 Base class for all descriptors. More...
 
class  BaseIterator
 
class  BaseMemoryManager
 
class  BaseTensor
 
class  BaseWorkload
 
class  BatchMatMul
 
struct  BatchMatMulDescriptor
 A BatchMatMulDescriptor for the BatchMatMul operator. More...
 
class  BatchMatMulLayer
 
struct  BatchMatMulQueueDescriptor
 
struct  BatchNormalizationDescriptor
 A BatchNormalizationDescriptor for the BatchNormalizationLayer. More...
 
class  BatchNormalizationLayer
 This layer represents a batch normalization operation. More...
 
struct  BatchNormalizationQueueDescriptor
 
struct  BatchToSpaceNdDescriptor
 A BatchToSpaceNdDescriptor for the BatchToSpaceNdLayer. More...
 
class  BatchToSpaceNdLayer
 This layer represents a BatchToSpaceNd operation. More...
 
struct  BatchToSpaceNdQueueDescriptor
 
class  BFloat16
 
class  BFloat16Decoder
 
class  BFloat16Encoder
 
struct  BiasAndWeightsTypesCompatible
 
struct  BiasAndWeightsTypesMatch
 
class  BindableLayer
 
class  BooleanDecoder
 
class  BooleanDecoderBool
 
class  BooleanEncoder
 
struct  BroadcastLoop
 
struct  BufferStorage
 
struct  Capability
 Capability of the TensorHandleFactory. More...
 
class  CastLayer
 This layer represents a cast operation. More...
 
struct  CastQueueDescriptor
 
struct  ChannelShuffleDescriptor
 A ChannelShuffleDescriptor for the ChannelShuffle operator. More...
 
class  ChannelShuffleLayer
 
struct  ChannelShuffleQueueDescriptor
 
struct  CheckLocation
 
class  ClAbsWorkload
 
class  ClActivationWorkload
 
class  ClAdditionWorkload
 
class  ClArgMinMaxWorkload
 
class  ClBackend
 
class  ClBackendContext
 
class  ClBackendDefaultAllocator
 Default Memory Allocator class returned from IBackendInternal::GetDefaultAllocator(MemorySource) More...
 
class  ClBackendModelContext
 The ClBackendModelContext is used to pass in CL specific backend ModelOptions. More...
 
class  ClBaseWorkload
 
class  ClBatchNormalizationFloatWorkload
 
class  ClBatchToSpaceNdWorkload
 
class  ClCastWorkload
 
class  ClChannelShuffleWorkload
 
class  ClComparisonWorkload
 
class  ClConcatWorkload
 
class  ClConstantWorkload
 
struct  ClContextBuilder
 
class  ClContextControl
 
class  ClContextDeserializer
 
class  ClContextSerializer
 
class  ClConvertFp16ToFp32Workload
 
class  ClConvertFp32ToFp16Workload
 
class  ClConvolution2dWorkload
 
class  ClConvolution3dWorkload
 
class  ClDepthToSpaceWorkload
 
class  ClDepthwiseConvolutionWorkload
 
class  ClDequantizeWorkload
 
class  ClDivisionWorkload
 
class  ClExpWorkload
 
class  ClFillWorkload
 
class  ClFloorFloatWorkload
 
class  ClFullyConnectedWorkload
 
class  ClGatherNdWorkload
 
class  ClGatherWorkload
 
class  ClImportSubTensorHandle
 
class  ClImportTensorHandle
 
class  ClImportTensorHandleFactory
 This factory creates ClImportTensorHandles that refer to imported memory tensors. More...
 
class  ClInstanceNormalizationWorkload
 
class  ClL2NormalizationFloatWorkload
 
class  ClLayerSupport
 
class  ClLogicalAndWorkload
 
class  ClLogicalNotWorkload
 
class  ClLogicalOrWorkload
 
class  ClLogSoftmaxWorkload
 
class  ClLogWorkload
 
class  ClLstmFloatWorkload
 
class  ClMaximumWorkload
 
class  ClMeanWorkload
 
class  ClMemoryManager
 
class  ClMinimumWorkload
 
class  ClMultiplicationWorkload
 
class  ClNegWorkload
 
class  ClNormalizationFloatWorkload
 
class  ClPadWorkload
 
class  ClPermuteWorkload
 
class  ClPooling2dWorkload
 
class  ClPooling3dWorkload
 
class  ClPreluWorkload
 
class  ClQLstmWorkload
 
class  ClQuantizedLstmWorkload
 
class  ClQuantizeWorkload
 
struct  ClRankWorkload
 
class  ClReduceWorkload
 
class  ClReshapeWorkload
 
class  ClResizeWorkload
 
class  ClRsqrtWorkload
 
class  ClRuntimeUnavailableException
 
class  ClSinWorkload
 
class  ClSliceWorkload
 
class  ClSoftmaxWorkload
 
class  ClSpaceToBatchNdWorkload
 
class  ClSpaceToDepthWorkload
 
class  ClSplitterWorkload
 
class  ClSqrtWorkload
 
class  ClStackWorkload
 
class  ClStridedSliceWorkload
 
class  ClSubTensorHandle
 
class  ClSubtractionWorkload
 
class  ClTensorHandle
 
class  ClTensorHandleFactory
 
class  ClTransposeConvolution2dWorkload
 
class  ClTransposeWorkload
 
class  ClTunedParameters
 
class  ClUnidirectionalSequenceLstmFloatWorkload
 
class  ClWorkloadFactory
 
struct  ComparisonDescriptor
 A ComparisonDescriptor for the ComparisonLayer. More...
 
class  ComparisonLayer
 This layer represents a comparison operation. More...
 
struct  ComparisonQueueDescriptor
 
class  ConcatLayer
 This layer represents a merge operation. More...
 
struct  ConcatQueueDescriptor
 
class  ConstantLayer
 A layer that the constant data can be bound to. More...
 
class  ConstantMemoryStrategy
 
struct  ConstantQueueDescriptor
 
class  ConstPassthroughTensorHandle
 
struct  ConstructInPlace
 Disambiguation tag that can be passed to the constructor to indicate that the contained object should be constructed in-place. More...
 
class  ConstTensor
 A tensor defined by a TensorInfo (shape and data type) and an immutable backing store. More...
 
class  ConstTensorHandle
 
class  ConvertBf16ToFp32Layer
 This layer converts data type BFloat16 to Float32. More...
 
struct  ConvertBf16ToFp32QueueDescriptor
 
class  ConvertFp16ToFp32Layer
 This layer converts data type Float 16 to Float 32. More...
 
struct  ConvertFp16ToFp32QueueDescriptor
 
class  ConvertFp32ToBf16Layer
 This layer converts data type Float32 to BFloat16. More...
 
struct  ConvertFp32ToBf16QueueDescriptor
 
class  ConvertFp32ToFp16Layer
 This layer converts data type Float 32 to Float 16. More...
 
struct  ConvertFp32ToFp16QueueDescriptor
 
struct  Convolution2dDescriptor
 A Convolution2dDescriptor for the Convolution2dLayer. More...
 
class  Convolution2dLayer
 This layer represents a convolution 2d operation. More...
 
struct  Convolution2dQueueDescriptor
 
struct  Convolution3dDescriptor
 A Convolution3dDescriptor for the Convolution3dLayer. More...
 
class  Convolution3dLayer
 This layer represents a convolution 3d operation. More...
 
struct  Convolution3dQueueDescriptor
 
class  CopyMemGenericWorkload
 
class  DebugLayer
 This layer visualizes the data flowing through the network. More...
 
struct  DebugQueueDescriptor
 
class  Decoder
 
class  DefaultAllocator
 Default Memory Allocator class returned from IBackendInternal::GetDefaultAllocator(MemorySource) More...
 
class  DepthToSpaceLayer
 This layer represents a DepthToSpace operation. More...
 
struct  DepthToSpaceQueueDescriptor
 
struct  DepthwiseConvolution2dDescriptor
 A DepthwiseConvolution2dDescriptor for the DepthwiseConvolution2dLayer. More...
 
class  DepthwiseConvolution2dLayer
 This layer represents a depthwise convolution 2d operation. More...
 
struct  DepthwiseConvolution2dQueueDescriptor
 Depthwise Convolution 2D layer workload data. More...
 
class  DequantizeLayer
 This layer dequantizes the input tensor. More...
 
struct  DequantizeQueueDescriptor
 
struct  DetectionPostProcessDescriptor
 
class  DetectionPostProcessLayer
 This layer represents a detection postprocess operator. More...
 
struct  DetectionPostProcessQueueDescriptor
 
class  DeviceSpec
 
class  DivisionLayer
 This layer represents a division operation. More...
 
struct  DivisionQueueDescriptor
 
class  DotAttributeSet
 
class  DotBase
 
class  DotDefaults
 
class  DotEdge
 
class  DotGraph
 
class  DotNode
 
class  DynamicBackend
 
class  DynamicBackendUtils
 
class  ElementwiseBaseLayer
 NOTE: this is an abstract class to encapsulate the element wise operations, it does not implement: std::unique_ptr<IWorkload> Layer::CreateWorkload(const IWorkloadFactory& factory) const = 0; Layer* Clone(Graph& graph) const = 0;. More...
 
struct  ElementwiseBinaryFunction
 
struct  ElementwiseUnaryDescriptor
 A ElementwiseUnaryDescriptor for the ElementwiseUnaryLayer. More...
 
struct  ElementwiseUnaryFunction
 
class  ElementwiseUnaryLayer
 This layer represents a elementwiseUnary operation. More...
 
struct  ElementwiseUnaryQueueDescriptor
 
struct  EmptyOptional
 EmptyOptional is used to initialize the Optional class in case we want to have default value for an Optional in a function declaration. More...
 
class  Encoder
 
struct  EqualQueueDescriptor
 
class  ErasedLayerNamesObservable
 
class  Event
 Event class records measurements reported by BeginEvent()/EndEvent() and returns measurements when Event::GetMeasurements() is called. More...
 
class  Exception
 Base class for all ArmNN exceptions so that users can filter to just those. More...
 
class  ExecutionFrame
 
struct  exp
 
struct  FakeQuantizationDescriptor
 A FakeQuantizationDescriptor for the FakeQuantizationLayer. More...
 
class  FakeQuantizationLayer
 This layer represents a fake quantization operation. More...
 
struct  FakeQuantizationQueueDescriptor
 
class  FileNotFoundException
 
struct  FillDescriptor
 A FillDescriptor for the FillLayer. More...
 
class  FillLayer
 This layer represents a fill operation. More...
 
struct  FillQueueDescriptor
 
class  FirstInputTypedWorkload
 
struct  FLATBUFFERS_FINAL_CLASS
 
class  Float16Decoder
 
class  Float16Encoder
 
class  Float32Decoder
 
class  Float32Encoder
 
class  FloorLayer
 This layer represents a floor operation. More...
 
struct  FloorQueueDescriptor
 
struct  FullyConnectedDescriptor
 A FullyConnectedDescriptor for the FullyConnectedLayer. More...
 
class  FullyConnectedLayer
 This layer represents a fully connected operation. More...
 
struct  FullyConnectedQueueDescriptor
 
struct  GatherDescriptor
 A GatherDescriptor for the GatherLayer. More...
 
class  GatherLayer
 This layer represents a Gather operator. More...
 
class  GatherNdLayer
 This layer represents a GatherNd operator. More...
 
struct  GatherNdQueueDescriptor
 
struct  GatherQueueDescriptor
 
class  Graph
 
class  GraphObservable
 
class  GraphValidationException
 
struct  GreaterQueueDescriptor
 
class  HtmlBold
 
class  HtmlFont
 
class  HtmlSection
 
class  HtmlSimpleTag
 
class  IAclTensorHandle
 
class  IBackend
 Each backend should implement an IBackend. More...
 
class  IBackendContext
 
class  IBackendInternal
 
class  IBackendModelContext
 
class  IClTensorHandle
 
class  ICLTensorProxy
 
class  IConnectableLayer
 Interface for a layer that is connectable to other layers via InputSlots and OutputSlots. More...
 
class  ICustomAllocator
 Custom Allocator interface. More...
 
class  IDeviceSpec
 Device specific knowledge to be passed to the optimizer. More...
 
class  IExecutionFrame
 ExecutionFrame interface to enqueue a workload computation. More...
 
class  IGpuAccTunedParameters
 Manages a set of GpuAcc parameters which have been tuned for maximum performance. More...
 
class  IGraphObservable
 
class  IInputSlot
 An input connection slot for a layer. More...
 
class  ILayerSupport
 
class  IMemoryManager
 
class  IMemoryOptimizerStrategy
 
struct  IMemoryOptimizerStrategyFactory
 
class  ImportMemGenericWorkload
 
class  INetwork
 Main network class which provides the interface for building up a neural network. More...
 
struct  INetworkProperties
 
class  InputLayer
 A layer user-provided data can be bound to (e.g. inputs, outputs). More...
 
class  InputSlot
 
struct  InstanceNormalizationDescriptor
 An InstanceNormalizationDescriptor for InstanceNormalizationLayer. More...
 
class  InstanceNormalizationLayer
 This layer represents an instance normalization operation. More...
 
struct  InstanceNormalizationQueueDescriptor
 
class  Instrument
 
class  Int32Decoder
 
class  Int32Encoder
 
class  Int32ToInt32tDecoder
 
class  Int32ToInt32tEncoder
 
class  InvalidArgumentException
 
class  IOptimizedNetwork
 
class  IOutputSlot
 An output connection slot for a layer. More...
 
class  IProfiler
 
class  IRuntime
 
struct  IsHalfType
 
struct  IsMemorySource
 
struct  IsMemorySource< MemorySource >
 
class  IStrategy
 
class  ISubgraphViewConverter
 
class  ITensorHandle
 
class  ITensorHandleFactory
 
class  IWorkload
 Workload interface to enqueue a layer computation. More...
 
class  IWorkloadFactory
 
struct  JsonChildObject
 
class  JsonPrinter
 
class  JsonUtils
 
struct  L2NormalizationDescriptor
 A L2NormalizationDescriptor for the L2NormalizationLayer. More...
 
class  L2NormalizationLayer
 This layer represents a L2 normalization operation. More...
 
struct  L2NormalizationQueueDescriptor
 
class  Layer
 
class  LayerSupportBase
 
class  LayerSupportHandle
 
struct  LayerTypeOfImpl
 
struct  LayerTypeOfImpl< LayerType::Activation >
 
struct  LayerTypeOfImpl< LayerType::Addition >
 
struct  LayerTypeOfImpl< LayerType::ArgMinMax >
 
struct  LayerTypeOfImpl< LayerType::BatchMatMul >
 
struct  LayerTypeOfImpl< LayerType::BatchNormalization >
 
struct  LayerTypeOfImpl< LayerType::BatchToSpaceNd >
 
struct  LayerTypeOfImpl< LayerType::Cast >
 
struct  LayerTypeOfImpl< LayerType::ChannelShuffle >
 
struct  LayerTypeOfImpl< LayerType::Comparison >
 
struct  LayerTypeOfImpl< LayerType::Concat >
 
struct  LayerTypeOfImpl< LayerType::Constant >
 
struct  LayerTypeOfImpl< LayerType::ConvertBf16ToFp32 >
 
struct  LayerTypeOfImpl< LayerType::ConvertFp16ToFp32 >
 
struct  LayerTypeOfImpl< LayerType::ConvertFp32ToBf16 >
 
struct  LayerTypeOfImpl< LayerType::ConvertFp32ToFp16 >
 
struct  LayerTypeOfImpl< LayerType::Convolution2d >
 
struct  LayerTypeOfImpl< LayerType::Convolution3d >
 
struct  LayerTypeOfImpl< LayerType::Debug >
 
struct  LayerTypeOfImpl< LayerType::DepthToSpace >
 
struct  LayerTypeOfImpl< LayerType::DepthwiseConvolution2d >
 
struct  LayerTypeOfImpl< LayerType::Dequantize >
 
struct  LayerTypeOfImpl< LayerType::DetectionPostProcess >
 
struct  LayerTypeOfImpl< LayerType::Division >
 
struct  LayerTypeOfImpl< LayerType::ElementwiseUnary >
 
struct  LayerTypeOfImpl< LayerType::FakeQuantization >
 
struct  LayerTypeOfImpl< LayerType::Fill >
 
struct  LayerTypeOfImpl< LayerType::Floor >
 
struct  LayerTypeOfImpl< LayerType::FullyConnected >
 
struct  LayerTypeOfImpl< LayerType::Gather >
 
struct  LayerTypeOfImpl< LayerType::GatherNd >
 
struct  LayerTypeOfImpl< LayerType::Input >
 
struct  LayerTypeOfImpl< LayerType::InstanceNormalization >
 
struct  LayerTypeOfImpl< LayerType::L2Normalization >
 
struct  LayerTypeOfImpl< LayerType::LogicalBinary >
 
struct  LayerTypeOfImpl< LayerType::LogSoftmax >
 
struct  LayerTypeOfImpl< LayerType::Lstm >
 
struct  LayerTypeOfImpl< LayerType::Map >
 
struct  LayerTypeOfImpl< LayerType::Maximum >
 
struct  LayerTypeOfImpl< LayerType::Mean >
 
struct  LayerTypeOfImpl< LayerType::MemCopy >
 
struct  LayerTypeOfImpl< LayerType::MemImport >
 
struct  LayerTypeOfImpl< LayerType::Merge >
 
struct  LayerTypeOfImpl< LayerType::Minimum >
 
struct  LayerTypeOfImpl< LayerType::Multiplication >
 
struct  LayerTypeOfImpl< LayerType::Normalization >
 
struct  LayerTypeOfImpl< LayerType::Output >
 
struct  LayerTypeOfImpl< LayerType::Pad >
 
struct  LayerTypeOfImpl< LayerType::Permute >
 
struct  LayerTypeOfImpl< LayerType::Pooling2d >
 
struct  LayerTypeOfImpl< LayerType::Pooling3d >
 
struct  LayerTypeOfImpl< LayerType::PreCompiled >
 
struct  LayerTypeOfImpl< LayerType::Prelu >
 
struct  LayerTypeOfImpl< LayerType::QLstm >
 
struct  LayerTypeOfImpl< LayerType::Quantize >
 
struct  LayerTypeOfImpl< LayerType::QuantizedLstm >
 
struct  LayerTypeOfImpl< LayerType::Rank >
 
struct  LayerTypeOfImpl< LayerType::Reduce >
 
struct  LayerTypeOfImpl< LayerType::Reshape >
 
struct  LayerTypeOfImpl< LayerType::Resize >
 
struct  LayerTypeOfImpl< LayerType::Shape >
 
struct  LayerTypeOfImpl< LayerType::Slice >
 
struct  LayerTypeOfImpl< LayerType::Softmax >
 
struct  LayerTypeOfImpl< LayerType::SpaceToBatchNd >
 
struct  LayerTypeOfImpl< LayerType::SpaceToDepth >
 
struct  LayerTypeOfImpl< LayerType::Splitter >
 
struct  LayerTypeOfImpl< LayerType::Stack >
 
struct  LayerTypeOfImpl< LayerType::StandIn >
 
struct  LayerTypeOfImpl< LayerType::StridedSlice >
 
struct  LayerTypeOfImpl< LayerType::Subtraction >
 
struct  LayerTypeOfImpl< LayerType::Switch >
 
struct  LayerTypeOfImpl< LayerType::Transpose >
 
struct  LayerTypeOfImpl< LayerType::TransposeConvolution2d >
 
struct  LayerTypeOfImpl< LayerType::UnidirectionalSequenceLstm >
 
struct  LayerTypeOfImpl< LayerType::Unmap >
 
class  LayerValidationException
 
class  LayerWithParameters
 
class  LoadedNetwork
 
struct  log
 
struct  LogicalBinaryDescriptor
 A LogicalBinaryDescriptor for the LogicalBinaryLayer. More...
 
struct  LogicalBinaryFunction
 
class  LogicalBinaryLayer
 This layer represents a Logical Binary operation. More...
 
struct  LogicalBinaryQueueDescriptor
 
struct  LogicalUnaryFunction
 
class  LogSink
 
class  LogSoftmaxLayer
 This layer represents a log softmax operation. More...
 
struct  LogSoftmaxQueueDescriptor
 
struct  LstmBasicParameters
 
struct  LstmDescriptor
 An LstmDescriptor for the LstmLayer. More...
 
struct  LstmInputParams
 
struct  LstmInputParamsInfo
 
class  LstmLayer
 This layer represents a LSTM operation. More...
 
struct  LstmOptCifgParameters
 
struct  LstmOptLayerNormParameters
 
struct  LstmOptPeepholeParameters
 
struct  LstmOptProjectionParameters
 
struct  LstmQueueDescriptor
 
class  ManagedConstTensorHandle
 
class  MapLayer
 This layer represents a memory copy operation. More...
 
struct  MapQueueDescriptor
 
class  MapWorkload
 
struct  maximum
 
class  MaximumLayer
 This layer represents a maximum operation. More...
 
struct  MaximumQueueDescriptor
 
struct  MeanDescriptor
 A MeanDescriptor for the MeanLayer. More...
 
class  MeanLayer
 This layer represents a mean operation. More...
 
struct  MeanQueueDescriptor
 
struct  Measurement
 
struct  MemBin
 
struct  MemBlock
 
class  MemCopyLayer
 This layer represents a memory copy operation. More...
 
struct  MemCopyQueueDescriptor
 
class  MemImportLayer
 This layer represents a memory import operation. More...
 
struct  MemImportQueueDescriptor
 
class  MemoryExportException
 
class  MemoryImportException
 
struct  MemoryInfo
 
class  MemoryManager
 
struct  MemoryRequirements
 
class  MemoryValidationException
 
struct  MemSyncQueueDescriptor
 
class  MergeLayer
 This layer dequantizes the input tensor. More...
 
struct  MergeQueueDescriptor
 
struct  minimum
 
class  MinimumLayer
 This layer represents a minimum operation. More...
 
struct  MinimumQueueDescriptor
 
class  MockTensorHandleFactory
 
class  MultiplicationLayer
 This layer represents a multiplication operation. More...
 
struct  MultiplicationQueueDescriptor
 
class  MultiTypedWorkload
 
class  NeonAbsWorkload
 
class  NeonActivationWorkload
 
class  NeonAdditionWorkload
 
class  NeonArgMinMaxWorkload
 
class  NeonBackend
 
class  NeonBackendModelContext
 The NeonBackendModelContext is used to pass in Neon specific backend ModelOptions. More...
 
class  NeonBaseWorkload
 
class  NeonBatchMatMulWorkload
 
class  NeonBatchNormalizationWorkload
 
class  NeonBatchToSpaceNdWorkload
 
class  NeonCastWorkload
 
class  NeonChannelShuffleWorkload
 
class  NeonComparisonWorkload
 
class  NeonConcatWorkload
 
class  NeonConstantWorkload
 
class  NeonConvertBf16ToFp32Workload
 
class  NeonConvertFp16ToFp32Workload
 
class  NeonConvertFp32ToBf16Workload
 
class  NeonConvertFp32ToFp16Workload
 
class  NeonConvolution2dWorkload
 
class  NeonConvolution3dWorkload
 
class  NeonDepthToSpaceWorkload
 
class  NeonDepthwiseConvolutionWorkload
 
class  NeonDequantizeWorkload
 
class  NeonDetectionPostProcessWorkload
 
class  NeonDivisionWorkload
 
class  NeonExpWorkload
 
class  NeonFillWorkload
 
class  NeonFloorFloatWorkload
 
class  NeonFullyConnectedWorkload
 
class  NeonGatherNdWorkload
 
class  NeonGatherWorkload
 
class  NeonInstanceNormalizationWorkload
 
class  NeonInterceptorScheduler
 
class  NeonL2NormalizationFloatWorkload
 
class  NeonLayerSupport
 
class  NeonLogicalAndWorkload
 
class  NeonLogicalNotWorkload
 
class  NeonLogicalOrWorkload
 
class  NeonLogSoftmaxWorkload
 
class  NeonLogWorkload
 
class  NeonLstmFloatWorkload
 
class  NeonMaximumWorkload
 
class  NeonMeanWorkload
 
class  NeonMemoryManager
 
class  NeonMinimumWorkload
 
class  NeonMultiplicationWorkload
 
class  NeonNegWorkload
 
class  NeonNormalizationFloatWorkload
 
class  NeonPadWorkload
 
class  NeonPermuteWorkload
 
class  NeonPooling2dWorkload
 
class  NeonPooling3dWorkload
 
class  NeonPreluWorkload
 
class  NeonQLstmWorkload
 
class  NeonQuantizedLstmWorkload
 
class  NeonQuantizeWorkload
 
struct  NeonRankWorkload
 
class  NeonReduceWorkload
 
class  NeonReshapeWorkload
 
class  NeonResizeWorkload
 
class  NeonRsqrtWorkload
 
class  NeonSinWorkload
 
class  NeonSliceWorkload
 
class  NeonSoftmaxWorkload
 
class  NeonSpaceToBatchNdWorkload
 
class  NeonSpaceToDepthWorkload
 
class  NeonSplitterWorkload
 
class  NeonSqrtWorkload
 
class  NeonStackWorkload
 
class  NeonStridedSliceWorkload
 
class  NeonSubTensorHandle
 
class  NeonSubtractionWorkload
 
class  NeonTensorHandle
 
class  NeonTensorHandleFactory
 
class  NeonTimer
 
class  NeonTransposeConvolution2dWorkload
 
class  NeonTransposeWorkload
 
class  NeonUnidirectionalSequenceLstmFloatWorkload
 
class  NeonUnidirectionalSequenceLstmWorkload
 
class  NeonWorkloadFactory
 
class  NetworkImpl
 Private implementation of INetwork. More...
 
class  NodeContent
 
struct  NormalizationDescriptor
 A NormalizationDescriptor for the NormalizationLayer. More...
 
class  NormalizationLayer
 This layer represents a normalization operation. More...
 
struct  NormalizationQueueDescriptor
 
struct  NoThrowStrategy
 
struct  NullDescriptor
 Null Descriptor used as a return value from the IConnectableLayer GetParameters method by layers which do not have a descriptor. More...
 
class  NullPointerException
 
class  NullWorkload
 
class  OpenClTimer
 OpenClTimer instrument that times all OpenCl kernels executed between calls to Start() and Stop(). More...
 
class  Optimization
 
struct  OptimizationResult
 
class  OptimizationViews
 
class  OptimizedNetworkImpl
 
class  OptimizeForConnection
 
class  OptimizeForConnectionImpl
 Wrapper Optimization class that calls Wrapped::Run for every connection BaseType -> ChildType. More...
 
class  OptimizeForExclusiveConnection
 
class  OptimizeForExclusiveConnectionImpl
 Wrapper Optimization class that calls Wrapped::Run for every connection BaseType -> ChildType. More...
 
class  OptimizeForType
 
class  OptimizeForTypeImpl
 Wrapper Optimization base class that calls Wrapped::Run() for every layer of type BaseType. More...
 
class  OptimizeForTypeImpl< Layer, Wrapped >
 Specialization that calls Wrapped::Run() for any layer type. More...
 
class  Optimizer
 
struct  OptimizerOptions
 ArmNN performs an optimization on each model/network before it gets loaded for execution. More...
 
class  Optional
 
class  OptionalBase
 OptionalBase is the common functionality between reference and non-reference optional types. More...
 
class  OptionalReferenceSwitch
 The default implementation is the non-reference case. More...
 
class  OptionalReferenceSwitch< true, T >
 This is the special case for reference types. More...
 
struct  OriginsDescriptor
 An OriginsDescriptor for the ConcatLayer. More...
 
class  OutputHandler
 
class  OutputLayer
 A layer user-provided data can be bound to (e.g. inputs, outputs). More...
 
class  OutputSlot
 
struct  PadDescriptor
 A PadDescriptor for the PadLayer. More...
 
class  PadLayer
 This layer represents a pad operation. More...
 
struct  PadQueueDescriptor
 
class  ParseException
 
class  PassthroughTensorHandle
 
class  PerAxisIterator
 PerAxisIterator for per-axis quantization. More...
 
class  PermutationVector
 
struct  PermuteDescriptor
 A PermuteDescriptor for the PermuteLayer. More...
 
class  PermuteLayer
 This layer represents a permutation operation. More...
 
struct  PermuteQueueDescriptor
 
class  PolymorphicDowncastException
 
struct  Pooling2dDescriptor
 A Pooling2dDescriptor for the Pooling2dLayer. More...
 
class  Pooling2dLayer
 This layer represents a pooling 2d operation. More...
 
struct  Pooling2dQueueDescriptor
 
struct  Pooling3dDescriptor
 A Pooling3dDescriptor for the Pooling3dLayer. More...
 
class  Pooling3dLayer
 This layer represents a pooling 3d operation. More...
 
struct  Pooling3dQueueDescriptor
 
struct  PreCompiledDescriptor
 A PreCompiledDescriptor for the PreCompiledLayer. More...
 
class  PreCompiledLayer
 
struct  PreCompiledQueueDescriptor
 
class  PreluLayer
 
struct  PreluQueueDescriptor
 
class  ProfilerImpl
 
class  ProfilerManager
 
class  ProfilingDetails
 ProfilingDetails class records any details associated with the operator and passes on for outputting to the user. More...
 
struct  ProgramBuilder
 
class  QASymm8Decoder
 
class  QASymm8Encoder
 
class  QASymmS8Decoder
 
class  QASymmS8Encoder
 
struct  QLstmBasicParameters
 
struct  QLstmDescriptor
 A QLstmDescriptor for the QLstmLayer. More...
 
class  QLstmLayer
 This layer represents a QLstm operation. More...
 
struct  QLstmOptCifgParameters
 
struct  QLstmOptLayerNormParameters
 
struct  QLstmOptPeepholeParameters
 
struct  QLstmOptProjectionParameters
 
struct  QLstmQueueDescriptor
 
class  QSymm16Decoder
 
class  QSymm16Encoder
 
class  QSymm8PerAxisDecoder
 
class  QSymm8PerAxisEncoder
 
class  QSymmS8Decoder
 
class  QSymmS8Encoder
 
struct  QuantizationParametersAreEqual
 
struct  QuantizedLstmInputParams
 
struct  QuantizedLstmInputParamsInfo
 
class  QuantizedLstmLayer
 This layer represents a QuantizedLstm operation. More...
 
struct  QuantizedLstmParameters
 
struct  QuantizedLstmQueueDescriptor
 
struct  QuantizedMultiplierSmallerThanOne
 Performs multiplication of an integer with a multiplier which is less than one, using quantized integer arithmetic which is consistent with AndroidNN's CPU executor. More...
 
class  QuantizeLayer
 
struct  QuantizeQueueDescriptor
 
struct  QueueDescriptor
 
struct  QueueDescriptorWithParameters
 
class  RangeTracker
 
class  RankLayer
 
struct  RankQueueDescriptor
 
struct  ReduceDescriptor
 A ReduceDescriptor for the REDUCE operators. More...
 
class  ReduceLayer
 This layer represents a reduction operation. More...
 
struct  ReduceQueueDescriptor
 
class  RefActivationWorkload
 
class  RefArgMinMaxWorkload
 
class  RefBackend
 
class  RefBaseWorkload
 
class  RefBatchMatMulWorkload
 
class  RefBatchNormalizationWorkload
 
class  RefBatchToSpaceNdWorkload
 
class  RefCastWorkload
 
class  RefChannelShuffleWorkload
 
class  RefComparisonWorkload
 
class  RefConcatWorkload
 
class  RefConstantWorkload
 
class  RefConvertBf16ToFp32Workload
 
class  RefConvertFp16ToFp32Workload
 
class  RefConvertFp32ToBf16Workload
 
class  RefConvertFp32ToFp16Workload
 
class  RefConvolution2dWorkload
 
class  RefConvolution3dWorkload
 
class  RefDebugWorkload
 
class  RefDepthToSpaceWorkload
 
class  RefDepthwiseConvolution2dWorkload
 
class  RefDequantizeWorkload
 
class  RefDetectionPostProcessWorkload
 
class  RefElementwiseUnaryWorkload
 
class  RefElementwiseWorkload
 
class  RefFakeQuantizationFloat32Workload
 
class  RefFillWorkload
 
class  RefFloorWorkload
 
class  RefFullyConnectedWorkload
 
class  RefGatherNdWorkload
 
class  RefGatherWorkload
 
class  RefInstanceNormalizationWorkload
 
class  RefL2NormalizationWorkload
 
class  RefLayerSupport
 
class  RefLogicalBinaryWorkload
 
class  RefLogicalUnaryWorkload
 
class  RefLogSoftmaxWorkload
 
class  RefLstmWorkload
 
class  RefMeanWorkload
 
class  RefMemoryManager
 
class  RefNormalizationWorkload
 
class  RefPadWorkload
 
class  RefPermuteWorkload
 
class  RefPooling2dWorkload
 
class  RefPooling3dWorkload
 
class  RefPreluWorkload
 
class  RefQLstmWorkload
 
class  RefQuantizeWorkload
 
struct  RefRankWorkload
 
class  RefReduceWorkload
 
class  RefReshapeWorkload
 
class  RefResizeWorkload
 
struct  RefShapeWorkload
 
class  RefSliceWorkload
 
class  RefSoftmaxWorkload
 
class  RefSpaceToBatchNdWorkload
 
class  RefSpaceToDepthWorkload
 
class  RefSplitterWorkload
 
class  RefStackWorkload
 
class  RefStridedSliceWorkload
 
class  RefTensorHandle
 
class  RefTensorHandleFactory
 
class  RefTransposeConvolution2dWorkload
 
class  RefTransposeWorkload
 
class  RefUnidirectionalSequenceLstmWorkload
 
class  RefWorkloadFactory
 
struct  ReshapeDescriptor
 A ReshapeDescriptor for the ReshapeLayer. More...
 
class  ReshapeLayer
 This layer represents a reshape operation. More...
 
struct  ReshapeQueueDescriptor
 
struct  ResizeDescriptor
 A ResizeDescriptor for the ResizeLayer. More...
 
class  ResizeLayer
 This layer represents a resize operation. More...
 
struct  ResizeQueueDescriptor
 
struct  ResolveTypeImpl
 
struct  ResolveTypeImpl< DataType::BFloat16 >
 
struct  ResolveTypeImpl< DataType::Boolean >
 
struct  ResolveTypeImpl< DataType::Float16 >
 
struct  ResolveTypeImpl< DataType::Float32 >
 
struct  ResolveTypeImpl< DataType::QAsymmS8 >
 
struct  ResolveTypeImpl< DataType::QAsymmU8 >
 
struct  ResolveTypeImpl< DataType::QSymmS16 >
 
struct  ResolveTypeImpl< DataType::QSymmS8 >
 
struct  ResolveTypeImpl< DataType::Signed32 >
 
struct  ResolveTypeImpl< DataType::Signed64 >
 
struct  rsqrt
 
class  RsqrtLayer
 
struct  RsqrtQueueDescriptor
 
struct  Rule
 
class  RuntimeException
 
struct  RuntimeImpl
 
class  ScaledInt32Decoder
 
class  ScaledInt32PerAxisDecoder
 
class  ScopedProfilingEvent
 
struct  ScopedRecord
 
class  ScopedTensorHandle
 
class  ShapeLayer
 
struct  ShapeQueueDescriptor
 
struct  ShapesAreBroadcastCompatible
 
struct  ShapesAreSameRank
 
struct  ShapesAreSameTotalSize
 
class  SimpleLogger
 
struct  sin
 
class  SingleAxisPriorityList
 SingleAxisPriorityList sorts the MemBlocks according to some priority, then trys to place them into as few bins as possible. More...
 
struct  SliceDescriptor
 A SliceDescriptor for the SliceLayer. More...
 
class  SliceLayer
 
struct  SliceQueueDescriptor
 
struct  SoftmaxDescriptor
 A SoftmaxDescriptor for the SoftmaxLayer. More...
 
class  SoftmaxLayer
 This layer represents a softmax operation. More...
 
struct  SoftmaxQueueDescriptor
 
struct  SpaceToBatchNdDescriptor
 A SpaceToBatchNdDescriptor for the SpaceToBatchNdLayer. More...
 
class  SpaceToBatchNdLayer
 This layer represents a SpaceToBatchNd operation. More...
 
struct  SpaceToBatchNdQueueDescriptor
 
struct  SpaceToDepthDescriptor
 A SpaceToDepthDescriptor for the SpaceToDepthLayer. More...
 
class  SpaceToDepthLayer
 This layer represents a SpaceToDepth operation. More...
 
struct  SpaceToDepthQueueDescriptor
 
class  SplitterLayer
 This layer represents a split operation. More...
 
struct  SplitterQueueDescriptor
 
struct  sqrt
 
struct  StackDescriptor
 A StackDescriptor for the StackLayer. More...
 
class  StackLayer
 This layer represents a stack operation. More...
 
struct  StackQueueDescriptor
 
class  StandardOutputSink
 
struct  StandInDescriptor
 A StandInDescriptor for the StandIn layer. More...
 
class  StandInLayer
 This layer represents an unknown operation in the input graph. More...
 
class  StrategyBase
 Strategy base class with empty implementations. More...
 
struct  StrategyFactory
 
class  StrategyValidator
 
struct  StridedSliceDescriptor
 A StridedSliceDescriptor for the StridedSliceLayer. More...
 
class  StridedSliceLayer
 This layer represents a strided slice operation. More...
 
struct  StridedSliceQueueDescriptor
 
struct  StringifyLayerParameters
 StringifyLayerParameters allows serializing layer parameters to string. More...
 
struct  StringifyLayerParameters< ActivationDescriptor >
 
struct  StringifyLayerParameters< BatchNormalizationDescriptor >
 
struct  StringifyLayerParameters< BatchToSpaceNdDescriptor >
 
struct  StringifyLayerParameters< ChannelShuffleDescriptor >
 
struct  StringifyLayerParameters< ComparisonDescriptor >
 
struct  StringifyLayerParameters< Convolution2dDescriptor >
 
struct  StringifyLayerParameters< Convolution3dDescriptor >
 
struct  StringifyLayerParameters< DepthwiseConvolution2dDescriptor >
 
struct  StringifyLayerParameters< DetectionPostProcessDescriptor >
 
struct  StringifyLayerParameters< ElementwiseUnaryDescriptor >
 
struct  StringifyLayerParameters< FakeQuantizationDescriptor >
 
struct  StringifyLayerParameters< FullyConnectedDescriptor >
 
struct  StringifyLayerParameters< L2NormalizationDescriptor >
 
struct  StringifyLayerParameters< LstmDescriptor >
 
struct  StringifyLayerParameters< MeanDescriptor >
 
struct  StringifyLayerParameters< NormalizationDescriptor >
 
struct  StringifyLayerParameters< OriginsDescriptor >
 
struct  StringifyLayerParameters< PadDescriptor >
 
struct  StringifyLayerParameters< PermuteDescriptor >
 
struct  StringifyLayerParameters< Pooling2dDescriptor >
 
struct  StringifyLayerParameters< Pooling3dDescriptor >
 
struct  StringifyLayerParameters< PreCompiledDescriptor >
 
struct  StringifyLayerParameters< ReduceDescriptor >
 
struct  StringifyLayerParameters< ReshapeDescriptor >
 
struct  StringifyLayerParameters< ResizeDescriptor >
 
struct  StringifyLayerParameters< SoftmaxDescriptor >
 
struct  StringifyLayerParameters< SpaceToBatchNdDescriptor >
 
struct  StringifyLayerParameters< SpaceToDepthDescriptor >
 
struct  StringifyLayerParameters< StackDescriptor >
 
struct  StringifyLayerParameters< StridedSliceDescriptor >
 
struct  StringifyLayerParameters< TransposeConvolution2dDescriptor >
 
struct  StringifyLayerParameters< TransposeDescriptor >
 
struct  StringifyLayerParameters< ViewsDescriptor >
 
struct  StringMapping
 StringMapping is helper class to be able to use strings as template parameters, so this allows simplifying code which only differs in a string, such as a debug string literal. More...
 
class  SubgraphView
 The SubgraphView class represents a subgraph of a Graph. More...
 
class  SubgraphViewSelector
 Algorithm that splits a Graph into Subgraphs based on a filtering of layers (e.g. More...
 
class  SubtractionLayer
 This layer represents a subtraction operation. More...
 
struct  SubtractionQueueDescriptor
 
class  SwitchLayer
 This layer calculates both true and false outputs for input. More...
 
struct  SwitchQueueDescriptor
 
class  SyncMemGenericWorkload
 
class  Tensor
 A tensor defined by a TensorInfo (shape and data type) and a mutable backing store. More...
 
class  TensorBufferArrayView
 
class  TensorHandle
 
class  TensorHandleFactoryRegistry
 
class  TensorInfo
 
struct  TensorMemory
 
struct  TensorNumDimensionsAreCorrect
 
struct  TensorNumDimensionsAreGreaterOrEqualTo
 
class  TensorShape
 
struct  ThrowingStrategy
 
class  TimeoutException
 
class  TosaRefBackend
 
class  TosaRefBaseWorkload
 
class  TosaRefLayerSupport
 
class  TosaRefMemoryManager
 
class  TosaRefPreCompiledWorkload
 
class  TosaRefTensorHandle
 
class  TosaRefTensorHandleFactory
 
class  TosaRefWorkloadFactory
 
class  TransformIterator
 
struct  TransposeConvolution2dDescriptor
 A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer. More...
 
class  TransposeConvolution2dLayer
 This layer represents a 2D transpose convolution operation. More...
 
struct  TransposeConvolution2dQueueDescriptor
 
struct  TransposeDescriptor
 A TransposeDescriptor for the TransposeLayer. More...
 
class  TransposeLayer
 This layer represents a transpose operation. More...
 
struct  TransposeQueueDescriptor
 
struct  TypeAnyOf
 
class  TypedIterator
 
class  TypedWorkload
 
struct  TypeIs
 
struct  TypeNotPerAxisQuantized
 
struct  TypesAreEqual
 
class  UnidirectionalSequenceLstmLayer
 This layer represents a LSTM operation. More...
 
struct  UnidirectionalSequenceLstmQueueDescriptor
 
class  UnimplementedException
 
class  UnmapLayer
 This layer represents a memory copy operation. More...
 
struct  UnmapQueueDescriptor
 
class  UnmapWorkload
 
struct  ViewsDescriptor
 A ViewsDescriptor for the SplitterLayer. More...
 
class  WallClockTimer
 
class  WorkloadDataCollector
 
class  WorkloadFactoryBase
 
struct  WorkloadInfo
 Contains information about TensorInfos of a layer. More...
 

Typedefs

using BackendIdVector = std::vector< BackendId >
 
using BackendIdSet = std::unordered_set< BackendId >
 
using NetworkOptions = std::vector< BackendOptions >
 
using ModelOptions = std::vector< BackendOptions >
 
using BackendCapabilities = BackendOptions
 
using IBackendInternalUniquePtr = std::unique_ptr< IBackendInternal >
 
using MemoryOptimizerStrategiesMapRef = std::unordered_map< BackendId, std::shared_ptr< IMemoryOptimizerStrategy > >
 
using DynamicBackendPtr = std::unique_ptr< DynamicBackend >
 
using IBackendContextUniquePtr = std::unique_ptr< IBackendContext >
 
using ILayerSupportSharedPtr = std::shared_ptr< ILayerSupport >
 
using IMemoryManagerUniquePtr = std::unique_ptr< IMemoryManager >
 
template<typename QueueDescriptor >
using FloatWorkload = TypedWorkload< QueueDescriptor, armnn::DataType::Float16, armnn::DataType::Float32 >
 
template<typename QueueDescriptor >
using Float32Workload = TypedWorkload< QueueDescriptor, armnn::DataType::Float32 >
 
template<typename QueueDescriptor >
using Uint8Workload = TypedWorkload< QueueDescriptor, armnn::DataType::QAsymmU8 >
 
template<typename QueueDescriptor >
using Int32Workload = TypedWorkload< QueueDescriptor, armnn::DataType::Signed32 >
 
template<typename QueueDescriptor >
using BooleanWorkload = TypedWorkload< QueueDescriptor, armnn::DataType::Boolean >
 
template<typename QueueDescriptor >
using BaseFloat32ComparisonWorkload = MultiTypedWorkload< QueueDescriptor, armnn::DataType::Float32, armnn::DataType::Boolean >
 
template<typename QueueDescriptor >
using BaseUint8ComparisonWorkload = MultiTypedWorkload< QueueDescriptor, armnn::DataType::QAsymmU8, armnn::DataType::Boolean >
 
template<typename QueueDescriptor >
using BFloat16ToFloat32Workload = MultiTypedWorkload< QueueDescriptor, armnn::DataType::BFloat16, armnn::DataType::Float32 >
 
template<typename QueueDescriptor >
using Float32ToBFloat16Workload = MultiTypedWorkload< QueueDescriptor, armnn::DataType::Float32, armnn::DataType::BFloat16 >
 
template<typename QueueDescriptor >
using Float16ToFloat32Workload = MultiTypedWorkload< QueueDescriptor, armnn::DataType::Float16, armnn::DataType::Float32 >
 
template<typename QueueDescriptor >
using Float32ToFloat16Workload = MultiTypedWorkload< QueueDescriptor, armnn::DataType::Float32, armnn::DataType::Float16 >
 
template<typename QueueDescriptor >
using Uint8ToFloat32Workload = MultiTypedWorkload< QueueDescriptor, armnn::DataType::QAsymmU8, armnn::DataType::Float32 >
 
using InputQueueDescriptor = MemCopyQueueDescriptor
 
using OutputQueueDescriptor = MemCopyQueueDescriptor
 
using MergerQueueDescriptor = ConcatQueueDescriptor
 
using LogSoftmaxDescriptor = SoftmaxDescriptor
 A LogSoftmaxDescriptor for the LogSoftmaxLayer. More...
 
using DepthToSpaceDescriptor = SpaceToDepthDescriptor
 A DepthToSpaceDescriptor for the DepthToSpaceLayer. More...
 
using UnidirectionalSequenceLstmDescriptor = LstmDescriptor
 
using ConcatDescriptor = OriginsDescriptor
 
using MergerDescriptor = OriginsDescriptor
 MergerDescriptor is deprecated, use ConcatDescriptor instead. More...
 
using SplitterDescriptor = ViewsDescriptor
 
using INetworkPtr = std::unique_ptr< INetwork, void(*)(INetwork *network)>
 
using IOptimizedNetworkPtr = std::unique_ptr< IOptimizedNetwork, void(*)(IOptimizedNetwork *network)>
 
using CompiledBlobDeleter = std::function< void(const void *)>
 
using CompiledBlobPtr = std::unique_ptr< void, CompiledBlobDeleter >
 
using NetworkId = int
 
using IRuntimePtr = std::unique_ptr< IRuntime, void(*)(IRuntime *runtime)>
 
using IGpuAccTunedParametersPtr = std::shared_ptr< IGpuAccTunedParameters >
 The following API is replaced by the backend options API. More...
 
using MemorySourceFlags = unsigned int
 
using BindingPointInfo = std::pair< armnn::LayerBindingId, armnn::TensorInfo >
 
using InputTensors = std::vector< std::pair< LayerBindingId, class ConstTensor > >
 
using OutputTensors = std::vector< std::pair< LayerBindingId, class Tensor > >
 
using IBackendSharedPtr = std::shared_ptr< IBackend >
 
using IBackendUniquePtr = std::unique_ptr< IBackend, void(*)(IBackend *backend)>
 
using LayerBindingId = int
 Type of identifiers for bindable layers (inputs, outputs). More...
 
using ImportedInputId = unsigned int
 
using ImportedOutputId = unsigned int
 
using DebugCallbackFunction = std::function< void(LayerGuid guid, unsigned int slotIndex, ITensorHandle *tensorHandle)>
 Define the type of callback for the Debug layer to call. More...
 
using HighResolutionClock = std::chrono::high_resolution_clock::time_point
 Define a timer and associated inference ID for recording execution times. More...
 
using InferenceTimingPair = std::pair< HighResolutionClock, HighResolutionClock >
 
using TensorInfos = std::vector< TensorInfo >
 
using WorkloadQueue = std::vector< std::unique_ptr< IWorkload > >
 
using Coordinates = std::array< unsigned int, MaxNumOfTensorDimensions >
 
using Dimensions = std::array< unsigned int, MaxNumOfTensorDimensions >
 
using LayerPriority = unsigned int
 
using AdditionalInfoObjectPtr = std::shared_ptr< void >
 
using PreCompiledObjectDeleter = std::function< void(const void *)>
 
using PreCompiledObjectPtr = std::unique_ptr< void, PreCompiledObjectDeleter >
 
template<LayerType Type>
using LayerTypeOf = typename LayerTypeOfImpl< Type >::Type
 
using NetworkImplPtr = std::unique_ptr< NetworkImpl, void(*)(NetworkImpl *network)>
 
using BackendsMap = std::map< BackendId, std::unique_ptr< class IBackendInternal > >
 
template<DataType DT>
using ResolveType = typename ResolveTypeImpl< DT >::Type
 
using LoadedNetworks = std::unordered_map< NetworkId, std::unique_ptr< LoadedNetwork > >
 
using IReportStructure = arm::pipe::IReportStructure
 
using IInitialiseProfilingService = arm::pipe::IInitialiseProfilingService
 
using ParameterStringifyFunction = std::function< void(const std::string &name, const std::string &value)>
 
using FactoryId = ITensorHandleFactory::FactoryId
 
using Half = half_float::half
 
using CopyAndImportFactoryPairs = std::map< ITensorHandleFactory::FactoryId, ITensorHandleFactory::FactoryId >
 
using ACLMemManagerOnDemand = std::shared_ptr< arm_compute::MemoryManagerOnDemand >
 
using RefDebugBFloat16Workload = RefDebugWorkload< DataType::BFloat16 >
 
using RefDebugFloat16Workload = RefDebugWorkload< DataType::Float16 >
 
using RefDebugFloat32Workload = RefDebugWorkload< DataType::Float32 >
 
using RefDebugQAsymmU8Workload = RefDebugWorkload< DataType::QAsymmU8 >
 
using RefDebugQAsymmS8Workload = RefDebugWorkload< DataType::QAsymmS8 >
 
using RefDebugQSymmS16Workload = RefDebugWorkload< DataType::QSymmS16 >
 
using RefDebugQSymmS8Workload = RefDebugWorkload< DataType::QSymmS8 >
 
using RefDebugSigned32Workload = RefDebugWorkload< DataType::Signed32 >
 
template<typename DataType = float>
using RefAdditionWorkload = RefElementwiseWorkload< std::plus< DataType >, AdditionQueueDescriptor, StringMapping::RefAdditionWorkload_Execute >
 
template<typename DataType = float>
using RefSubtractionWorkload = RefElementwiseWorkload< std::minus< DataType >, SubtractionQueueDescriptor, StringMapping::RefSubtractionWorkload_Execute >
 
template<typename DataType = float>
using RefMultiplicationWorkload = RefElementwiseWorkload< std::multiplies< DataType >, MultiplicationQueueDescriptor, StringMapping::RefMultiplicationWorkload_Execute >
 
template<typename DataType = float>
using RefDivisionWorkload = RefElementwiseWorkload< std::divides< DataType >, DivisionQueueDescriptor, StringMapping::RefDivisionWorkload_Execute >
 
template<typename DataType = float>
using RefMaximumWorkload = RefElementwiseWorkload< armnn::maximum< DataType >, MaximumQueueDescriptor, StringMapping::RefMaximumWorkload_Execute >
 
template<typename DataType = float>
using RefMinimumWorkload = RefElementwiseWorkload< armnn::minimum< DataType >, MinimumQueueDescriptor, StringMapping::RefMinimumWorkload_Execute >
 
using RefPermuteBFloat16Workload = RefPermuteWorkload< DataType::BFloat16 >
 
using RefPermuteFloat16Workload = RefPermuteWorkload< DataType::Float16 >
 
using RefPermuteFloat32Workload = RefPermuteWorkload< DataType::Float32 >
 
using RefPermuteQAsymmS8Workload = RefPermuteWorkload< DataType::QAsymmS8 >
 
using RefPermuteQAsymm8Workload = RefPermuteWorkload< DataType::QAsymmU8 >
 
using RefPermuteQSymm16Workload = RefPermuteWorkload< DataType::QSymmS16 >
 
using RefTransposeBFloat16Workload = RefTransposeWorkload< DataType::BFloat16 >
 
using RefTransposeFloat16Workload = RefTransposeWorkload< DataType::Float16 >
 
using RefTransposeFloat32Workload = RefTransposeWorkload< DataType::Float32 >
 
using RefTransposeQAsymmS8Workload = RefTransposeWorkload< DataType::QAsymmS8 >
 
using RefTransposeQAsymm8Workload = RefTransposeWorkload< DataType::QAsymmU8 >
 
using RefTransposeQSymm16Workload = RefTransposeWorkload< DataType::QSymmS16 >
 

Enumerations

enum  Compute { Undefined = 0, CpuRef = 1, CpuAcc = 2, GpuAcc = 3 }
 The Compute enum is now deprecated and it is now being replaced by BackendId. More...
 
enum  CapabilityClass { PaddingRequired = 1, FallbackImportDisabled = 2, CapabilityClassMax = 254 }
 Capability class to calculate in the GetCapabilities function so that only the capability in the scope can be choose to calculate. More...
 
enum  EdgeStrategy { Undefined, DirectCompatibility, ExportToTarget, CopyToTarget }
 
enum  BoostLogSeverityMapping {
  trace, debug, info, warning,
  error, fatal
}
 
enum  Status { Success = 0, Failure = 1 }
 enumeration More...
 
enum  DataType {
  Float16 = 0, Float32 = 1, QAsymmU8 = 2, Signed32 = 3,
  Boolean = 4, QSymmS16 = 5, QSymmS8 = 6, QAsymmS8 = 7,
  BFloat16 = 8, Signed64 = 9
}
 
enum  DataLayout { NCHW = 1, NHWC = 2, NDHWC = 3, NCDHW = 4 }
 
enum  ProfilingDetailsMethod { Undefined = 0, DetailsWithEvents = 1, DetailsOnly = 2 }
 Define the behaviour of the internal profiler when outputting network details. More...
 
enum  QosExecPriority { Low = 0, Medium = 1, High = 2 }
 
enum  ActivationFunction {
  Sigmoid = 0, TanH = 1, Linear = 2, ReLu = 3,
  BoundedReLu = 4, SoftReLu = 5, LeakyReLu = 6, Abs = 7,
  Sqrt = 8, Square = 9, Elu = 10, HardSwish = 11
}
 
enum  ArgMinMaxFunction { Min = 0, Max = 1 }
 
enum  ComparisonOperation {
  Equal = 0, Greater = 1, GreaterOrEqual = 2, Less = 3,
  LessOrEqual = 4, NotEqual = 5
}
 
enum  LogicalBinaryOperation { LogicalAnd = 0, LogicalOr = 1 }
 
enum  UnaryOperation {
  Abs = 0, Exp = 1, Sqrt = 2, Rsqrt = 3,
  Neg = 4, LogicalNot = 5, Log = 6, Sin = 7
}
 
enum  PoolingAlgorithm { Max = 0, Average = 1, L2 = 2 }
 
enum  ReduceOperation {
  Sum = 0, Max = 1, Mean = 2, Min = 3,
  Prod = 4
}
 
enum  ResizeMethod { Bilinear = 0, NearestNeighbor = 1 }
 
enum  Dimensionality { NotSpecified = 0, Specified = 1, Scalar = 2 }
 
enum  PaddingMethod { IgnoreValue = 0, Exclude = 1 }
 The padding method modifies the output of pooling layers. More...
 
enum  PaddingMode { Constant = 0, Reflect = 1, Symmetric = 2 }
 The padding mode controls whether the padding should be filled with constant values (Constant), or reflect the input, either including the border values (Symmetric) or not (Reflect). More...
 
enum  NormalizationAlgorithmChannel { Across = 0, Within = 1 }
 
enum  NormalizationAlgorithmMethod { LocalBrightness = 0, LocalContrast = 1 }
 
enum  OutputShapeRounding { Floor = 0, Ceiling = 1 }
 
enum  ShapeInferenceMethod { ValidateOnly = 0, InferAndValidate = 1 }
 The ShapeInferenceMethod modify how the output shapes are treated. More...
 
enum  MemorySource : uint32_t {
  Undefined = 0, Malloc = 1, DmaBuf = 2, DmaBufProtected = 4,
  Gralloc = 5
}
 Define the Memory Source to reduce copies. More...
 
enum  MemBlockStrategyType { SingleAxisPacking = 0, MultiAxisPacking = 1 }
 
enum  BackendCapability : uint32_t { NonConstWeights, AsyncExecution }
 BackendCapability class. More...
 
enum  LayerType {
  X, Activation, Addition, ArgMinMax,
  BatchNormalization, BatchToSpaceNd, Comparison, Concat,
  Constant, ConvertBf16ToFp32, ConvertFp16ToFp32, ConvertFp32ToBf16,
  ConvertFp32ToFp16, Convolution2d, Debug, DepthToSpace,
  DepthwiseConvolution2d, Dequantize, DetectionPostProcess, Division,
  ElementwiseUnary, FakeQuantization, Fill, Floor,
  FullyConnected, Gather, Input, InstanceNormalization,
  L2Normalization, LogicalBinary, LogSoftmax, Lstm,
  QLstm, Map, Maximum, Mean,
  MemCopy, MemImport, Merge, Minimum,
  Multiplication, Normalization, Output, Pad,
  Permute, Pooling2d, PreCompiled, Prelu,
  Quantize, QuantizedLstm, Reshape, Rank,
  Resize, Reduce, Slice, Softmax,
  SpaceToBatchNd, SpaceToDepth, Splitter, Stack,
  StandIn, StridedSlice, Subtraction, Switch,
  Transpose, TransposeConvolution2d, Unmap, Cast,
  Shape, UnidirectionalSequenceLstm, ChannelShuffle, Convolution3d,
  Pooling3d, GatherNd, BatchMatMul, FirstLayer = Activation,
  LastLayer = UnidirectionalSequenceLstm
}
 When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below. More...
 
enum  LogSeverity {
  Trace, Debug, Info, Warning,
  Error, Fatal
}
 
enum  GraphEvent { LayerAdded, LayerErased }
 
enum  JsonObjectType { Measurement, Event, ExecObjectDesc }
 
enum  TuningLevel { None, Rapid, Normal, Exhaustive }
 

Functions

LayerSupportHandle GetILayerSupportByBackendId (const armnn::BackendId &backend)
 Convenience function to retrieve the ILayerSupportHandle for a backend. More...
 
bool HasCapability (const std::string &name, const BackendCapabilities &capabilities)
 Convenience function to check if a capability exists in a BackendCapabilites struct. More...
 
bool HasCapability (const std::string &name, const armnn::BackendId &backend)
 Convenience function to check if a capability exists in a backend. More...
 
bool HasCapability (const BackendOptions::BackendOption &capability, const BackendCapabilities &capabilities)
 Convenience function to check if a given capability matches a capability in a BackendCapabilities struct. More...
 
bool HasCapability (const BackendOptions::BackendOption &backendOption, const armnn::BackendId &backend)
 Convenience function to check if a given capability matches a capability in a backend. More...
 
Optional< const BackendOptions::BackendOptionGetCapability (const std::string &backendCapabilityName, const BackendCapabilities &capabilities)
 Returns a BackendCapability if the backend lists the capability The BackendCapability must then be inspected to check whether or not that BackendCapability is supported Otherwise returns an EmptyOptional if the BackendCapability is unlisted. More...
 
Optional< const BackendOptions::BackendOptionGetCapability (const std::string &backendCapabilityName, const armnn::BackendId &backend)
 Returns a BackendCapability if the backend lists the capability The BackendCapability must then be inspected to check whether or not that BackendCapability is supported Otherwise returns an EmptyOptional if the BackendCapability is unlisted. More...
 
unsigned int GetNumberOfCacheFiles (const armnn::BackendId &backend)
 Returns the number of cached files if backend supports caching. More...
 
constexpr char const * GetComputeDeviceAsCString (Compute compute)
 Deprecated function that will be removed together with the Compute enum. More...
 
std::ostream & operator<< (std::ostream &os, const std::vector< Compute > &compute)
 Deprecated function that will be removed together with the Compute enum. More...
 
std::ostream & operator<< (std::ostream &os, const std::set< Compute > &compute)
 Deprecated function that will be removed together with the Compute enum. More...
 
std::ostream & operator<< (std::ostream &os, const Compute &compute)
 Deprecated function that will be removed together with the Compute enum. More...
 
std::ostream & operator<< (std::ostream &os, const BackendId &id)
 
template<template< typename... > class TContainer, typename... TContainerTemplateArgs>
std::ostream & operator<< (std::ostream &os, const TContainer< BackendId, TContainerTemplateArgs... > &ids)
 
template<typename F >
void ParseOptions (const std::vector< BackendOptions > &options, BackendId backend, F f)
 
bool ParseBooleanBackendOption (const armnn::BackendOptions::Var &value, bool defaultValue)
 
std::string ParseStringBackendOption (const armnn::BackendOptions::Var &value, std::string defaultValue)
 
int ParseIntBackendOption (const armnn::BackendOptions::Var &value, int defaultValue)
 
BackendRegistryBackendRegistryInstance ()
 
std::ostream & operator<< (std::ostream &os, const BackendVersion &backendVersion)
 
TensorShape GetUnpaddedTensorStrides (const TensorInfo &tensorInfo)
 
DataType GetBiasDataType (DataType inputDataType)
 
template<typename TensorShapeIt >
OriginsDescriptor CreateDescriptorForConcatenation (TensorShapeIt first, TensorShapeIt last, unsigned int concatenationDimension)
 Convenience template to create an OriginsDescriptor to use when creating a ConcatLayer for performing concatenation of a number of input tensors. More...
 
template<typename ExceptionType >
void ConditionalThrow (bool condition, const std::string &message)
 
template<typename ExceptionType >
void ConditionalThrow (bool condition)
 
template<typename ExceptionType , typename ComparedType >
void ConditionalThrowIfNotEqual (const std::string &message, const ComparedType &leftHandSide, const ComparedType &rightHandSide)
 ComparedType must support: operator==(const ComparedType&) operator<<(ostream&, const ComparedType&) More...
 
IOptimizedNetworkPtr Optimize (const INetwork &network, const std::vector< BackendId > &backendPreferences, const IDeviceSpec &deviceSpec, const OptimizerOptions &options=OptimizerOptions(), Optional< std::vector< std::string > &> messages=EmptyOptional())
 Create an optimized version of the network. More...
 
IOptimizedNetworkPtr Optimize (const Graph &inGraph, const std::vector< BackendId > &backendPreferences, const IDeviceSpec &deviceSpec, const OptimizerOptions &options, Optional< std::vector< std::string > &> messages=EmptyOptional())
 Create an optimized version of the network. More...
 
bool IsActivationSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const ActivationDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsAdditionSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsBatchNormalizationSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const TensorInfo &mean, const TensorInfo &var, const TensorInfo &beta, const TensorInfo &gamma, const BatchNormalizationDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsBatchToSpaceNdSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const BatchToSpaceNdDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsConcatSupported (const BackendId &backend, const std::vector< const TensorInfo *> inputs, const TensorInfo &output, const OriginsDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsConstantSupported (const BackendId &backend, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsConvertFp16ToFp32Supported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsConvertFp32ToFp16Supported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsConvolution2dSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const Convolution2dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsDebugSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsDepthwiseConvolutionSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const DepthwiseConvolution2dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsDequantizeSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsDivisionSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsEqualSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsFakeQuantizationSupported (const BackendId &backend, const TensorInfo &input, const FakeQuantizationDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsFloorSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsFullyConnectedSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const TensorInfo &weights, const TensorInfo &biases, const FullyConnectedDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsGreaterSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsInputSupported (const BackendId &backend, const TensorInfo &input, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsL2NormalizationSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const L2NormalizationDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsLstmSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &outputStateIn, const TensorInfo &cellStateIn, const TensorInfo &scratchBuffer, const TensorInfo &outputStateOut, const TensorInfo &cellStateOut, const TensorInfo &output, const LstmDescriptor &descriptor, const LstmInputParamsInfo &paramsInfo, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsMaximumSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, char *reasonIfUnSupported=nullptr, size_t reasonIfUnSupportedMaxLength=0)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsMeanSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const MeanDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsMemCopySupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsMergeSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsMinimumSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsMultiplicationSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsNormalizationSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const NormalizationDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsOutputSupported (const BackendId &backend, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsPadSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const PadDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsPermuteSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const PermuteDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsPreCompiledSupported (const BackendId &backend, const TensorInfo &input, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsPreluSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &alpha, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsPooling2dSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const Pooling2dDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsQuantizedLstmSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &previousCellStateIn, const TensorInfo &previousOutputIn, const TensorInfo &cellStateOut, const TensorInfo &output, const QuantizedLstmInputParamsInfo &paramsInfo, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsReduceSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const ReduceDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsReshapeSupported (const BackendId &backend, const TensorInfo &input, const ReshapeDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsResizeSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const ResizeDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsRsqrtSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsSoftmaxSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const SoftmaxDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsSpaceToBatchNdSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const SpaceToBatchNdDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsSpaceToDepthSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const SpaceToDepthDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsSplitterSupported (const BackendId &backend, const TensorInfo &input, const std::vector< std::reference_wrapper< TensorInfo >> &outputs, const ViewsDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsStackSupported (const BackendId &backend, const std::vector< const TensorInfo *> inputs, const TensorInfo &output, const StackDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsStridedSliceSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const StridedSliceDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsSubtractionSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsSwitchSupported (const BackendId &backend, const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output0, const TensorInfo &output1, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
bool IsTransposeConvolution2dSupported (const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const TransposeConvolution2dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
 Deprecated in favor of IBackend and ILayerSupport interfaces. More...
 
std::string LevelToString (LogSeverity level)
 
LogSeverity StringToLogLevel (std::string level)
 
void SetLogFilter (LogSeverity level)
 
void SetAllLoggingSinks (bool standardOut, bool debugOut, bool coloured)
 
constexpr LogSeverity ConvertLogSeverity (BoostLogSeverityMapping severity)
 
template<typename Arg , typename std::enable_if< IsMemorySource< Arg >::value >::type * = nullptr>
MemorySourceFlags Combine (Arg sourceA, Arg sourceB)
 
template<typename Arg , typename ... Args, typename std::enable_if< IsMemorySource< Arg >::value >::type * = nullptr>
MemorySourceFlags Combine (Arg source, Args... rest)
 
bool CheckFlag (MemorySourceFlags flags, MemorySource source)
 
template<typename T , class... Args>
Optional< T > MakeOptional (Args &&... args)
 Utility template that constructs an object of type T in-place and wraps it inside an Optional<T> object. More...
 
const char * GetLayerTypeAsCString (LayerType type)
 
constexpr char const * GetStatusAsCString (Status status)
 
constexpr char const * GetActivationFunctionAsCString (ActivationFunction activation)
 
constexpr char const * GetArgMinMaxFunctionAsCString (ArgMinMaxFunction function)
 
constexpr char const * GetComparisonOperationAsCString (ComparisonOperation operation)
 
constexpr char const * GetUnaryOperationAsCString (UnaryOperation operation)
 
constexpr char const * GetLogicalBinaryOperationAsCString (LogicalBinaryOperation operation)
 
constexpr char const * GetPoolingAlgorithmAsCString (PoolingAlgorithm pooling)
 
constexpr char const * GetOutputShapeRoundingAsCString (OutputShapeRounding rounding)
 
constexpr char const * GetPaddingMethodAsCString (PaddingMethod method)
 
constexpr char const * GetPaddingModeAsCString (PaddingMode mode)
 
constexpr char const * GetReduceOperationAsCString (ReduceOperation reduce_operation)
 
constexpr unsigned int GetDataTypeSize (DataType dataType)
 
template<unsigned N>
constexpr bool StrEqual (const char *strA, const char(&strB)[N])
 
constexpr armnn::Compute ParseComputeDevice (const char *str)
 Deprecated function that will be removed together with the Compute enum. More...
 
constexpr const char * GetDataTypeName (DataType dataType)
 
constexpr const char * GetDataLayoutName (DataLayout dataLayout)
 
constexpr const char * GetNormalizationAlgorithmChannelAsCString (NormalizationAlgorithmChannel channel)
 
constexpr const char * GetNormalizationAlgorithmMethodAsCString (NormalizationAlgorithmMethod method)
 
constexpr const char * GetResizeMethodAsCString (ResizeMethod method)
 
constexpr const char * GetMemBlockStrategyTypeName (MemBlockStrategyType memBlockStrategyType)
 
template<typename T >
constexpr bool IsQuantizedType ()
 
constexpr bool IsQuantized8BitType (DataType dataType)
 
constexpr bool IsQuantizedType (DataType dataType)
 
std::ostream & operator<< (std::ostream &os, Status stat)
 
std::ostream & operator<< (std::ostream &os, const armnn::TensorShape &shape)
 
template<typename QuantizedType >
QuantizedType Quantize (float value, float scale, int32_t offset)
 Quantize a floating point data type into an 8-bit data type. More...
 
template<typename QuantizedType >
float Dequantize (QuantizedType value, float scale, int32_t offset)
 Dequantize an 8-bit data type into a floating point data type. More...
 
void VerifyTensorInfoDataType (const armnn::TensorInfo &info, armnn::DataType dataType)
 
template<typename ... Ts>
void IgnoreUnused (Ts &&...)
 
template<typename Dest , typename Source >
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast (Source source)
 
template<typename Dest , typename Source >
std::enable_if_t< std::is_signed< Source >::value &&std::is_integral< Source >::value &&std::is_signed< Dest >::value &&std::is_integral< Dest >::value, Dest > numeric_cast (Source source)
 
template<typename Dest , typename Source >
std::enable_if_t< std::is_floating_point< Source >::value &&std::is_floating_point< Dest >::value, Dest > numeric_cast (Source source)
 
template<typename Dest , typename Source >
std::enable_if_t< std::is_floating_point< Source >::value &&std::is_signed< Dest >::value &&std::is_integral< Dest >::value, Dest > numeric_cast (Source source)
 
template<typename Dest , typename Source >
std::enable_if_t< std::is_signed< Source >::value &&std::is_integral< Source >::value &&std::is_floating_point< Dest >::value, Dest > numeric_cast (Source source)
 
template<typename Dest , typename Source >
std::enable_if_t< std::is_signed< Dest >::value &&std::is_integral< Dest >::value &&std::is_unsigned< Source >::value, Dest > numeric_cast (Source sValue)
 
template<typename Dest , typename Source >
std::enable_if_t< std::is_floating_point< Dest >::value &&std::is_unsigned< Source >::value, Dest > numeric_cast (Source sValue)
 
template<typename Dest , typename Source >
std::enable_if_t< std::is_unsigned< Dest >::value &&std::is_signed< Source >::value &&std::is_integral< Source >::value, Dest > numeric_cast (Source sValue)
 
template<typename Dest , typename Source >
std::enable_if_t< std::is_unsigned< Dest >::value &&std::is_floating_point< Source >::value, Dest > numeric_cast (Source sValue)
 
template<typename DestType , typename SourceType >
DestType PolymorphicDowncast (SourceType *value)
 Polymorphic downcast for build in pointers only. More...
 
template<typename DestType , typename SourceType >
auto PolymorphicPointerDowncast (const SourceType &value)
 Polymorphic downcast for shared pointers and build in pointers. More...
 
std::chrono::high_resolution_clock::time_point GetTimeNow ()
 
std::chrono::duration< double, std::milli > GetTimeDuration (std::chrono::high_resolution_clock::time_point start_time)
 
template<typename Function , typename Iterator >
constexpr TransformIterator< Function, Iterator > MakeTransformIterator (Iterator i, Function f)
 
void ConfigureLogging (bool printToStandardOutput, bool printToDebugOutput, LogSeverity severity)
 Configures the logging behaviour of the ARMNN library. More...
 
bool NeonDetected ()
 
const std::string GetVersion ()
 
void swap (OriginsDescriptor &first, OriginsDescriptor &second)
 
void swap (ViewsDescriptor &first, ViewsDescriptor &second)
 
uint32_t GetNumInputs (bool biasEnabled)
 
void AssertNumberOfInputSlots (Layer &layer)
 
template<typename T >
constexpr LayerType LayerEnumOf (const T *=nullptr)
 
template<>
constexpr LayerType LayerEnumOf (const ActivationLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const AdditionLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ArgMinMaxLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const BatchMatMulLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const BatchNormalizationLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const BatchToSpaceNdLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const CastLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ChannelShuffleLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ComparisonLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ConcatLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ConstantLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ConvertBf16ToFp32Layer *)
 
template<>
constexpr LayerType LayerEnumOf (const ConvertFp16ToFp32Layer *)
 
template<>
constexpr LayerType LayerEnumOf (const ConvertFp32ToBf16Layer *)
 
template<>
constexpr LayerType LayerEnumOf (const ConvertFp32ToFp16Layer *)
 
template<>
constexpr LayerType LayerEnumOf (const Convolution2dLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const Convolution3dLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const DebugLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const DepthToSpaceLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const DepthwiseConvolution2dLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const DequantizeLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const DetectionPostProcessLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const DivisionLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ElementwiseUnaryLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const FakeQuantizationLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const FillLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const FloorLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const FullyConnectedLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const GatherLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const GatherNdLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const InputLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const InstanceNormalizationLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const L2NormalizationLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const LogicalBinaryLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const LogSoftmaxLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const LstmLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const MapLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const MaximumLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const MeanLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const MemCopyLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const MemImportLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const MergeLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const MinimumLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const MultiplicationLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const NormalizationLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const OutputLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const PadLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const PermuteLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const Pooling2dLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const Pooling3dLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const PreCompiledLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const PreluLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const QuantizeLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const QLstmLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const QuantizedLstmLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const RankLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ReduceLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ReshapeLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ResizeLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const ShapeLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const SliceLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const SoftmaxLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const SpaceToBatchNdLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const SpaceToDepthLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const SplitterLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const StackLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const StandInLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const StridedSliceLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const SubtractionLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const SwitchLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const TransposeLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const TransposeConvolution2dLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const UnidirectionalSequenceLstmLayer *)
 
template<>
constexpr LayerType LayerEnumOf (const UnmapLayer *)
 
template<typename T , typename V >
void SetValueChecked (Optional< T &> optionalRef, V &&val)
 
template<typename Float16Func , typename Float32Func , typename Uint8Func , typename Int32Func , typename BooleanFunc , typename ... Params>
bool IsSupportedForDataTypeGeneric (Optional< std::string &> reasonIfUnsupported, DataType dataType, Float16Func float16FuncPtr, Float32Func float32FuncPtr, Uint8Func uint8FuncPtr, Int32Func int32FuncPtr, BooleanFunc booleanFuncPtr, Params &&... params)
 
template<typename ... Params>
bool TrueFunc (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
template<typename ... Params>
bool FalseFunc (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
template<typename ... Params>
bool FalseFuncF16 (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
template<typename ... Params>
bool FalseFuncF32 (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
template<typename ... Params>
bool FalseFuncU8 (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
template<typename ... Params>
bool FalseFuncI32 (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
template<typename ... Params>
bool FalseInputFuncF32 (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
template<typename ... Params>
bool FalseInputFuncF16 (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
template<typename ... Params>
bool FalseOutputFuncF32 (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
template<typename ... Params>
bool FalseOutputFuncF16 (Optional< std::string &> reasonIfUnsupported, Params &&... params)
 
void ValidateSourcesMatchOptimizedNetwork (std::vector< BackendOptions > optimizedOptions, const INetworkProperties &networkProperties)
 This function performs a sanity check to ensure that the combination of input and output memory source matches the values for importEnabled and exportEnabled that were specified during optimization. More...
 
void CopyToOutputTensor (const Tensor &outputTensor, ITensorHandle *outputTensorHandle)
 
const armnn::ConstTensor GetInputTensor (const LayerBindingId layerId, const InputTensors &inputTensors)
 
const armnn::Tensor GetOutputTensor (const LayerBindingId layerId, const OutputTensors &outputTensors)
 
template<LogSeverity Level>
void SetLoggingSinks (bool standardOut, bool debugOut, bool coloured)
 
void ReportError (const std::string &errorMessage, Optional< std::vector< std::string > &> errorMessages)
 
void ReportWarning (const std::string &warningMessage, Optional< std::vector< std::string > &> warningMessages)
 
OptimizationResult ReturnWithError (OptimizationResult res, const Layer *layer, const BackendSettings &backendSettings, Optional< std::vector< std::string > &> errMessages)
 
bool CheckScaleSetOnQuantizedType (Layer *layer, Optional< std::vector< std::string > &> errMessages)
 
template<typename LayerT >
LayerT * ConvertBf16ToFp32Weight (Layer *l)
 
OptimizationResult AttemptBackendAssignment (BackendSettings &backendSettings, Graph &graph, Layer *layer, BackendId backend, DataType dataTypeIn, DataType dataTypeOut, const std::vector< BackendId > &availablePreferredBackends, std::string &reasonIfUnsupported, Optional< std::vector< std::string > &> errMessages)
 
void AssignBackendsIConnectable (OptimizedNetworkImpl *optNetObjPtr, IConnectableLayer *it, Optional< std::vector< std::string > &> errMessages, OptimizationResult &result, BackendSettings &backendSettings, std::vector< BackendId > &availablePreferredBackends)
 
OptimizationResult AssignBackends (OptimizedNetworkImpl *optNetObjPtr, BackendSettings &backendSettings, Graph::Iterator &firstLayer, Graph::Iterator &lastLayer, Optional< std::vector< std::string > &> errMessages)
 
OptimizationResult AssignBackends (OptimizedNetworkImpl *optNetObjPtr, BackendSettings &backendSettings, SubgraphView::IConnectableLayerIterator &firstLayer, SubgraphView::IConnectableLayerIterator &lastLayer, Optional< std::vector< std::string > &> errMessages)
 
OptimizationResult AssignBackends (OptimizedNetworkImpl *optNetObjPtr, BackendSettings &backendSettings, SubgraphView &subgraph, Optional< std::vector< std::string > &> errMessages)
 
BackendsMap CreateSupportedBackends (TensorHandleFactoryRegistry &handleFactoryRegistry, BackendSettings &backendSettings)
 
OptimizationResult ApplyBackendOptimizations (OptimizedNetworkImpl *optNetObjPtr, BackendSettings &backendSettings, BackendsMap &backends, const ModelOptions &modelOptions, Optional< std::vector< std::string > &> errMessages)
 
bool RequiresCopy (ITensorHandleFactory::FactoryId src, ITensorHandleFactory::FactoryId dst, TensorHandleFactoryRegistry &registry)
 
ITensorHandleFactory::FactoryId CalculateSlotOptionForInput (BackendsMap &backends, OutputSlot &slot, TensorHandleFactoryRegistry &registry, bool importEnabled)
 
ITensorHandleFactory::FactoryId CalculateSlotOptionForOutput (BackendsMap &backends, OutputSlot &slot, TensorHandleFactoryRegistry &registry)
 
ITensorHandleFactory::FactoryId CalculateSlotOption (BackendsMap &backends, OutputSlot &outputSlot, TensorHandleFactoryRegistry &registry, bool exportEnabled)
 
EdgeStrategy CalculateEdgeStrategy (BackendsMap &backends, ITensorHandleFactory::FactoryId srcFactoryId, const Layer &layer, const Layer &connectedLayer, TensorHandleFactoryRegistry &registry, bool importEnabled)
 
OptimizationResult SelectTensorHandleStrategy (Graph &optGraph, BackendsMap &backends, TensorHandleFactoryRegistry &registry, bool importEnabled, bool exportEnabled, Optional< std::vector< std::string > &> errMessages)
 
std::vector< ConvertBf16ToFp32Layer * > InsertConvertBf16ToFp32LayersBefore (Graph &graph, Layer &layer, bool expectCorrectInputType)
 
std::vector< ConvertFp32ToBf16Layer * > InsertConvertFp32ToBf16LayersBefore (Graph &graph, Layer &layer, bool expectCorrectInputType)
 
std::vector< ConvertFp16ToFp32Layer * > InsertConvertFp16ToFp32LayersBefore (Graph &graph, Layer &layer, bool expectCorrectInputType)
 
std::vector< ConvertFp32ToBf16Layer * > InsertConvertFp32ToBf16LayersAfter (Graph &graph, Layer &layer)
 
std::vector< ConvertFp32ToFp16Layer * > InsertConvertFp32ToFp16LayersAfter (Graph &graph, Layer &layer)
 
std::vector< DebugLayer * > InsertDebugLayerAfter (Graph &graph, Layer &layer, bool toFile)
 
bool RevertConstantWeightsToFP32 (Layer *layer)
 
template<typename T >
void Append (Optimizer::Optimizations &optimizations, T &&optimization)
 
template<typename Front , typename... Others>
void Append (Optimizer::Optimizations &optimizations, Front &&front, Others &&... others)
 
template<typename... Args>
Optimizer::Optimizations MakeOptimizations (Args &&... args)
 
Measurement FindMeasurement (const std::string &name, const Event *event)
 
std::vector< MeasurementFindKernelMeasurements (const Event *event)
 
const EventGetEventPtr (const Event *ptr)
 
const EventGetEventPtr (const std::unique_ptr< Event > &ptr)
 
int CalcLevel (const Event *eventPtr)
 
void ConfigureDetailsObject (JsonChildObject &detailsObject, std::string layerDetailsStr)
 
void ExtractJsonObjects (unsigned int inferenceIndex, const Event *parentEvent, JsonChildObject &parentObject, std::map< const Event *, std::vector< const Event *>> descendantsMap)
 
template<typename DescriptorType >
void ProfilingUpdateDescriptions (const std::string &name, const DescriptorType &desc, const WorkloadInfo &infos, const arm::pipe::ProfilingGuid guid)
 
template<typename Delegate >
void ForEachLayerInput (LayerSelectionInfo::LayerInfoContainer &layerInfos, LayerSelectionInfo &layerInfo, Delegate function)
 
template<typename Delegate >
void ForEachLayerOutput (LayerSelectionInfo::LayerInfoContainer &layerInfos, LayerSelectionInfo &layerInfo, Delegate function)
 
void AssignSplitId (LayerSelectionInfo::LayerInfoContainer &layerInfos, LayerSelectionInfo &layerInfo)
 
bool IsReadyForSplitAssignment (LayerSelectionInfo::LayerInfoContainer &layerInfos, LayerSelectionInfo &layerInfo)
 
bool IsLayerSupported (const armnn::Layer *layer)
 
bool IsLayerSupported (const armnn::Layer &layer)
 
bool IsLayerOptimizable (const armnn::Layer *layer)
 
bool IsLayerOptimizable (const armnn::Layer &layer)
 
constexpr const char * MockTensorHandleFactoryId ()
 
GraphGetGraphForTesting (IOptimizedNetwork *optNet)
 
ModelOptionsGetModelOptionsForTesting (IOptimizedNetwork *optNet)
 
arm::pipe::IProfilingService & GetProfilingService (armnn::RuntimeImpl *runtime)
 
std::ostream & operator<< (std::ostream &os, const BFloat16 &b)
 
template<typename LayerType >
LayerTypeFuseLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc)
 
template<typename LayerType >
LayerTypeFuseAdditionLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc, std::string name)
 
template<typename LayerType >
LayerTypeFuseSubtractionLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc, std::string name)
 
template<typename LayerType >
LayerTypeFuseDivisionLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc, std::string name)
 
template<typename LayerType >
LayerTypeFuseMultiplicationLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc, std::string name)
 
template<typename LayerType >
LayerTypeFuseBatchNormalizationLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc, std::string name)
 
template<typename LayerType >
LayerTypeFuseConvolution2dLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc, std::string name)
 
template<typename LayerType >
LayerTypeFuseDepthwiseConvolution2dLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc, std::string name)
 
template<typename LayerType >
LayerTypeFuseFullyConnectedLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc, std::string name)
 
template<typename LayerType >
std::vector< IConnectableLayer * > ChainReduceLayers (OptimizationViews &optimizationViews, LayerType *baseLayer, ReduceDescriptor &desc)
 
template<typename LayerType >
void ReplaceLayers (OptimizationViews &optimizationViews, LayerType *baseLayer, std::vector< IConnectableLayer *> &layers)
 
arm_compute::NormalizationLayerInfo CreateAclNormalizationLayerInfoForL2Normalization (const armnn::TensorInfo &tensorInfo, armnn::DataLayout dataLayout)
 
arm_compute::ActivationLayerInfo::ActivationFunction ConvertActivationFunctionToAclActivationFunction (ActivationFunction armnnFunction)
 
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo (const ActivationDescriptor &actDesc)
 
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo (const ActivationDescriptor *activationDescPtr)
 
arm_compute::ActivationLayerInfo ConvertAdditionalInfoToAclActivationLayerInfo (const QueueDescriptor &queueDescriptor)
 
arm_compute::ActivationLayerInfo ConvertLstmActivationFuncToAclLayerInfo (uint32_t activationFunction)
 
arm_compute::ComparisonOperation ConvertComparisonOperationToAcl (const ComparisonDescriptor &descriptor)
 
arm_compute::PoolingType ConvertPoolingAlgorithmToAclPoolingType (PoolingAlgorithm poolingAlgorithm)
 
arm_compute::DimensionRoundingType ConvertOutputShapeRoundingToAclDimensionRoundingType (OutputShapeRounding rounding)
 
arm_compute::NormType ConvertNormalizationAlgorithmChannelToAclNormType (NormalizationAlgorithmChannel channelType)
 
arm_compute::FullyConnectedLayerInfo ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo (const FullyConnectedDescriptor &fullyConnectedDesc, const ActivationDescriptor *activationDesc)
 
arm_compute::FullyConnectedLayerInfo ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo (const FullyConnectedDescriptor &fullyConnectedDesc, arm_compute::ActivationLayerInfo activationLayerInfo)
 
arm_compute::InterpolationPolicy ConvertResizeMethodToAclInterpolationPolicy (ResizeMethod resizeMethod)
 
template<typename T >
ComputeSoftmaxAclAxis (const SoftmaxDescriptor &softmaxDesc, const armnn::TensorInfo &tensor)
 
std::set< unsigned int > ComputeSplitAxis (const armnn::SplitterDescriptor &desc, const TensorShape &input)
 
int ComputeAclAxis (const int &armnnAxis, const armnn::TensorInfo &tensor)
 Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank, rank) More...
 
unsigned int ComputePositiveAxis (const int &axis, const armnn::TensorInfo &tensor)
 Function to convert axis to its positive equivalent value. More...
 
arm_compute::Conv3dInfo ComputeConv3DInfo (const armnn::Convolution3dDescriptor descriptor, bool isFastMathEnabled, const ActivationDescriptor *activationDescriptor)
 Utility function used to setup an arm_compute::Conv3dInfo object from convolution3d descriptor. More...
 
arm_compute::Conv3dInfo ComputeConv3DInfo (const armnn::Convolution3dQueueDescriptor queueDescriptor, bool isFastMathEnabled)
 
arm_compute::PaddingMode ConvertPaddingModeToAcl (const PaddingMode &paddingMode)
 
arm_compute::ReductionOperation ConvertReductionOperationToAcl (const ReduceDescriptor &descriptor)
 
const TensorInfo ComputeReductionTensorShape (const armnn::TensorInfo &input, const std::vector< uint32_t > &vAxis, const bool keepDims)
 Function to compute the output tensor shape based on the axes and if keepDims is set. More...
 
armnn::Optional< armnn::DataTypeGetBiasTypeFromWeightsType (armnn::Optional< armnn::DataType > weightsType)
 
template<typename F >
bool CheckSupportRule (F rule, Optional< std::string &> reasonIfUnsupported, const char *reason)
 
template<typename T >
bool AllTypesAreEqualImpl (T)
 
template<typename T , typename... Rest>
bool AllTypesAreEqualImpl (T t1, T t2, Rest... rest)
 
std::unique_ptr< IMemoryOptimizerStrategyGetMemoryOptimizerStrategy (const std::string &strategyName)
 
const std::vector< std::string > GetMemoryOptimizerStrategyNames ()
 
void ReportUntouchedLayers (OptimizationViews &optimizationViews, std::map< LayerGuid, Layer *> untouched)
 
template<typename LayerType >
LayerTypeFoldPadLayer (OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, PadLayer *padLayer)
 
template<typename LayerType >
LayerTypeFoldPadIntoAveragePool2d (OptimizationViews &optimizationViews, Pooling2dLayer *baseLayer, Pooling2dDescriptor &poolDescriptor, PadLayer *padLayer)
 
armnn::ConstTensor PermuteTensor (const ConstTensorHandle *tensor, const PermutationVector &permutationVector, void *permuteBuffer)
 
void ReshapeWeightsForAcl (TensorInfo &weightInfo, DataLayout dataLayout)
 
template<typename DataType >
ConstTensor ReorderWeightChannelsForAcl (const ConstTensor &weightHandle, DataLayout dataLayout, void *permuteBuffer)
 
TensorInfo ConvertWeightTensorInfoFromArmnnToAcl (const TensorInfo &weightInfo, DataLayout dataLayout)
 
std::tuple< ConstTensor, unsigned int > Convert1HWOTensorToAcl (const ConstTensorHandle *weightTensor, const TensorInfo &inputInfo, const DataLayout dataLayout, void *permuteBuffer)
 Weights for depthwise have a datalayout of [1,H,W,O] = [1,H,W,I*M] This function coverts a ConstCpuTensorHandle from [1,H,W,I*M] to [1,I*M,H,W] (if NCHW) or keeps it at [1,H,W,I*M] (if NHWC) as required by the compute library. More...
 
std::tuple< TensorInfo, unsigned int > Convert1HWOTensorInfoToAcl (const TensorInfo &weightInfo, const TensorInfo &inputInfo, const DataLayout dataLayout)
 Weights for depthwise have a datalayout of [1,H,W,O] = [1,H,W,I*M] This function coverts a TensorInfo from [1,H,W,I*M] to [1,I*M,H,W] (if NCHW) or keeps it at [1,H,W,I*M] (if NHWC) as required by the compute library Returns a tuple of converted weights tensor info and depth multiplier. More...
 
std::tuple< ConstTensor, unsigned int > Convert1HWOtoMIHW (const ConstTensorHandle *weightTensor, const TensorInfo &inputInfo, const DataLayout &dataLayout, void *permuteBuffer)
 Converts a (weights) tensor from [1, H, W, I*M] = [1, H, W, O] to [M, I, H, W]. More...
 
armnn::ConstTensor ConvertWeightTensorFromArmnnToAcl (const ConstTensorHandle *weightTensor, DataLayout dataLayout, void *permuteBuffer)
 
int32_t ConvertMaskToACLFormat (int32_t mask, int32_t numDim)
 
std::map< std::string, unsigned int > CalculateGatherNdKeyIndices (TensorInfo inputInfo0, TensorInfo inputInfo1)
 Calculates the key index values needed for GatherNd: N, ND, K, W, C (N is always 1) More...
 
armnn::PermutationVector GeneratePermutationVectorOnLastTwoDimensions (unsigned int rank)
 Generates a permutation vector of size rank that permutes the 2 most right dimensions. More...
 
template<typename CopyFunc >
void CopyTensorContentsGeneric (const ITensorHandle *srcTensor, ITensorHandle *dstTensor, CopyFunc copy)
 
template<typename SrcTensorHandleType , typename DstTensorHandleType , typename DescriptorType >
void GatherTensorHandlePairs (const DescriptorType &descriptor, std::vector< std::pair< SrcTensorHandleType *, DstTensorHandleType *>> &tensorHandlePairs)
 
std::string LowerString (std::string value)
 
TuningLevel ParseTuningLevel (const BackendOptions::Var &value, TuningLevel defaultValue)
 
bool ParseBoolean (const BackendOptions::Var &value, bool defaultValue)
 
std::string ParseFile (const BackendOptions::Var &value, std::string defaultValue)
 
void ConfigureTuner (arm_compute::CLTuner &tuner, TuningLevel level)
 
constexpr const char * ClBackendId ()
 
flatbuffers::Offset< ClContext > CreateClContext (flatbuffers::FlatBufferBuilder &_fbb, flatbuffers::Offset< flatbuffers::Vector< flatbuffers::Offset< armnn::Program >>> programs=0)
 
flatbuffers::Offset< ClContext > CreateClContextDirect (flatbuffers::FlatBufferBuilder &_fbb, const std::vector< flatbuffers::Offset< armnn::Program >> *programs=nullptr)
 
flatbuffers::Offset< Program > CreateProgram (flatbuffers::FlatBufferBuilder &_fbb, flatbuffers::Offset< flatbuffers::String > name=0, flatbuffers::Offset< flatbuffers::Vector< uint8_t >> binary=0)
 
flatbuffers::Offset< Program > CreateProgramDirect (flatbuffers::FlatBufferBuilder &_fbb, const char *name=nullptr, const std::vector< uint8_t > *binary=nullptr)
 
const armnn::ClContext * GetClContext (const void *buf)
 
const armnn::ClContext * GetSizePrefixedClContext (const void *buf)
 
const char * ClContextIdentifier ()
 
bool ClContextBufferHasIdentifier (const void *buf)
 
bool VerifyClContextBuffer (flatbuffers::Verifier &verifier)
 
bool VerifySizePrefixedClContextBuffer (flatbuffers::Verifier &verifier)
 
const char * ClContextExtension ()
 
void FinishClContextBuffer (flatbuffers::FlatBufferBuilder &fbb, flatbuffers::Offset< armnn::ClContext > root)
 
void FinishSizePrefixedClContextBuffer (flatbuffers::FlatBufferBuilder &fbb, flatbuffers::Offset< armnn::ClContext > root)
 
constexpr const char * ClImportTensorHandleFactoryId ()
 
constexpr const char * ClTensorHandleFactoryId ()
 
arm_compute::Status ClAbsWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClActivationWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const ActivationDescriptor &descriptor)
 
arm_compute::Status ClAdditionValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status ClArgMinMaxWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const ArgMinMaxDescriptor &descriptor)
 
arm_compute::Status ClBatchNormalizationValidate (const TensorInfo &input, const TensorInfo &output, const TensorInfo &mean, const TensorInfo &var, const TensorInfo &beta, const TensorInfo &gamma, const BatchNormalizationDescriptor &descriptor, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status ClBatchToSpaceNdWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const BatchToSpaceNdDescriptor &descriptor)
 
arm_compute::Status ClCastValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClChannelShuffleValidate (const TensorInfo &input, const TensorInfo &output, const ChannelShuffleDescriptor &descriptor)
 
arm_compute::Status ClComparisonWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ComparisonDescriptor &descriptor)
 
arm_compute::Status ClConcatWorkloadValidate (const std::vector< const TensorInfo *> &inputs, const TensorInfo &output, const OriginsDescriptor &descriptor)
 
arm_compute::Status ClConstantWorkloadValidate (const TensorInfo &output)
 
arm_compute::Status ClConvertFp16ToFp32WorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClConvertFp32ToFp16WorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClConvolution2dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const Convolution2dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases, bool isFastMathEnabled, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status ClConvolution3dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const Convolution3dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases, bool isFastMathEnabled, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status ClDepthToSpaceWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const DepthToSpaceDescriptor &descriptor)
 
arm_compute::Status ClDepthwiseConvolutionWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const DepthwiseConvolution2dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status ClDequantizeWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClDivisionWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status ClExpWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClFloorWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClFullyConnectedWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const TensorInfo &weights, const Optional< TensorInfo > &biases, const FullyConnectedDescriptor &descriptor, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status ClGatherNdWorkloadValidate (const TensorInfo &paramsInfo, const TensorInfo &indicesInfo, const TensorInfo &outputInfo)
 
arm_compute::Status ClGatherWorkloadValidate (const TensorInfo &input, const TensorInfo &indices, const TensorInfo &output, const GatherDescriptor &descriptor)
 
arm_compute::Status ClInstanceNormalizationWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const InstanceNormalizationDescriptor &descriptor)
 
arm_compute::Status ClL2NormalizationWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const L2NormalizationDescriptor &descriptor)
 
arm_compute::Status ClLogicalAndWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
 
arm_compute::Status ClLogicalNotWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClLogicalOrWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
 
arm_compute::Status ClLogSoftmaxWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const LogSoftmaxDescriptor &descriptor)
 
arm_compute::Status ClLogWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClLstmFloatWorkloadValidate (const TensorInfo &input, const TensorInfo &outputStateIn, const TensorInfo &cellStateIn, const TensorInfo &scratchBuffer, const TensorInfo &outputStateOut, const TensorInfo &cellStateOut, const TensorInfo &output, const LstmDescriptor &descriptor, const LstmInputParamsInfo &paramsInfo)
 
arm_compute::Status ClMaximumWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
 
arm_compute::Status ClMeanValidate (const TensorInfo &input, const TensorInfo &output, const MeanDescriptor &descriptor)
 
arm_compute::Status ClMinimumWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
 
arm_compute::Status ClMultiplicationWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status ClNegWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClNormalizationWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const NormalizationDescriptor &descriptor)
 
arm_compute::Status ClPadValidate (const TensorInfo &input, const TensorInfo &output, const PadDescriptor &descriptor)
 
arm_compute::Status ClPermuteWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const PermuteDescriptor &descriptor)
 
arm_compute::Status ClPooling2dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const Pooling2dDescriptor &descriptor)
 
arm_compute::Status ClPooling3dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const Pooling3dDescriptor &descriptor)
 
arm_compute::Status ClPreluWorkloadValidate (const TensorInfo &input, const TensorInfo &alpha, const TensorInfo &output)
 
arm_compute::Status ClQLstmWorkloadValidate (const TensorInfo &input, const TensorInfo &cellStateIn, const TensorInfo &outputStateIn, const TensorInfo &cellStateOut, const TensorInfo &outputStateOut, const TensorInfo &output, const QLstmDescriptor &descriptor, const LstmInputParamsInfo &paramsInfo)
 
arm_compute::Status ClQuantizedLstmWorkloadValidate (const TensorInfo &input, const TensorInfo &previousCellStateIn, const TensorInfo &previousOutputIn, const TensorInfo &cellStateOut, const TensorInfo &output, const QuantizedLstmInputParamsInfo &paramsInfo)
 
arm_compute::Status ClQuantizeWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClReduceWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const ReduceDescriptor &descriptor)
 
arm_compute::Status ClReshapeWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClResizeWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const ResizeDescriptor &descriptor)
 
arm_compute::Status ClRsqrtWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClSinWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClSliceWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const SliceDescriptor &descriptor)
 
arm_compute::Status ClSoftmaxWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const SoftmaxDescriptor &descriptor)
 
arm_compute::Status ClSpaceToBatchNdWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const SpaceToBatchNdDescriptor &descriptor)
 
arm_compute::Status ClSpaceToDepthWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const SpaceToDepthDescriptor &descriptor)
 
arm_compute::Status ClSplitterWorkloadValidate (const TensorInfo &input, const std::vector< std::reference_wrapper< TensorInfo >> &outputs, unsigned int splitAxis)
 
arm_compute::Status ClSqrtWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status ClStackWorkloadValidate (const std::vector< const TensorInfo *> &inputs, const TensorInfo &output, const StackDescriptor &descriptor)
 
arm_compute::Status ClStridedSliceWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const StridedSliceDescriptor &descriptor)
 
arm_compute::Status ClSubtractionValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status ClTransposeConvolution2dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const TransposeConvolution2dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases)
 
arm_compute::Status ClTransposeWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const TransposeDescriptor &descriptor)
 
arm_compute::Status ClUnidirectionalSequenceLstmFloatWorkloadValidate (const TensorInfo &input, const TensorInfo &outputStateIn, const TensorInfo &cellStateIn, const TensorInfo &output, const Optional< TensorInfo > &hiddenStateOutput, const Optional< TensorInfo > &cellStateOutput, const UnidirectionalSequenceLstmDescriptor &descriptor, const LstmInputParamsInfo &paramsInfo)
 
std::string GetConvolutionMethodString (arm_compute::ConvolutionMethod &convolutionMethod)
 
template<typename T >
void CopyArmComputeClTensorData (arm_compute::CLTensor &dstTensor, const T *srcData)
 
auto SetClStridedSliceData (const std::vector< int > &m_begin, const std::vector< int > &m_end, const std::vector< int > &m_stride)
 
auto SetClSliceData (const std::vector< unsigned int > &m_begin, const std::vector< unsigned int > &m_size)
 
void InitializeArmComputeClTensorData (arm_compute::CLTensor &clTensor, const ConstTensorHandle *handle)
 
RuntimeException WrapClError (const cl::Error &clError, const CheckLocation &location)
 
void RunClFunction (arm_compute::IFunction &function, const CheckLocation &location)
 
template<typename DataType , typename PayloadType >
DataTypeGetOutputTensorData (unsigned int idx, const PayloadType &data)
 
constexpr const char * NeonBackendId ()
 
constexpr const char * NeonTensorHandleFactoryId ()
 
arm_compute::Status NeonAbsWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonActivationWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const ActivationDescriptor &descriptor)
 
arm_compute::Status NeonAdditionWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status NeonArgMinMaxWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const ArgMinMaxDescriptor &descriptor)
 
arm_compute::Status NeonBatchMatMulValidate (const TensorInfo &inputX, const TensorInfo &inputY, const TensorInfo &output, const BatchMatMulDescriptor &descriptor)
 
arm_compute::Status NeonBatchNormalizationValidate (const TensorInfo &input, const TensorInfo &output, const TensorInfo &mean, const TensorInfo &var, const TensorInfo &beta, const TensorInfo &gamma, const BatchNormalizationDescriptor &descriptor, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status NeonBatchToSpaceNdWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const BatchToSpaceNdDescriptor &descriptor)
 
arm_compute::Status NeonCastValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonChannelShuffleValidate (const TensorInfo &input, const TensorInfo &output, const ChannelShuffleDescriptor &descriptor)
 
arm_compute::Status NeonComparisonWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ComparisonDescriptor &descriptor)
 
arm_compute::Status NeonConcatWorkloadValidate (const std::vector< const TensorInfo *> &inputs, const TensorInfo &output, const OriginsDescriptor &descriptor)
 
arm_compute::Status NeonConstantWorkloadValidate (const TensorInfo &output)
 
arm_compute::Status NeonConvolution2dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const Convolution2dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases, bool isFastMathEnabled, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status NeonConvolution3dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const Convolution3dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases, bool isFastMathEnabled, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status NeonDepthToSpaceWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const DepthToSpaceDescriptor &descriptor)
 
arm_compute::Status NeonDepthwiseConvolutionWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const DepthwiseConvolution2dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status NeonDequantizeWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::DetectionPostProcessLayerInfo MakeInfo (const DetectionPostProcessDescriptor &descriptor)
 
arm_compute::Status NeonDetectionPostProcessValidate (const TensorInfo &boxEncodings, const TensorInfo &scores, const TensorInfo &anchors, const TensorInfo &detectionBoxes, const TensorInfo &detectionClasses, const TensorInfo &detectionScores, const TensorInfo &numDetections, const DetectionPostProcessDescriptor &descriptor)
 
arm_compute::Status NeonDivisionWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status NeonExpWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonFullyConnectedWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const TensorInfo &weights, const Optional< TensorInfo > &biases, const FullyConnectedDescriptor &descriptor, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status NeonGatherNdWorkloadValidate (const TensorInfo &paramsInfo, const TensorInfo &indicesInfo, const TensorInfo &outputInfo)
 
arm_compute::Status NeonGatherWorkloadValidate (const TensorInfo &input, const TensorInfo &indices, const TensorInfo &output, const GatherDescriptor &descriptor)
 
arm_compute::Status NeonInstanceNormalizationWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const InstanceNormalizationDescriptor &descriptor)
 
arm_compute::Status NeonL2NormalizationWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const L2NormalizationDescriptor &descriptor)
 
arm_compute::Status NeonLogicalAndWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
 
arm_compute::Status NeonLogicalNotWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonLogicalOrWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
 
arm_compute::Status NeonLogSoftmaxWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const LogSoftmaxDescriptor &descriptor)
 
arm_compute::Status NeonLogWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonLstmFloatWorkloadValidate (const TensorInfo &input, const TensorInfo &outputStateIn, const TensorInfo &cellStateIn, const TensorInfo &scratchBuffer, const TensorInfo &outputStateOut, const TensorInfo &cellStateOut, const TensorInfo &output, const LstmDescriptor &descriptor, const LstmInputParamsInfo &paramsInfo)
 
arm_compute::Status NeonMaximumWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
 
arm_compute::Status NeonMeanWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const MeanDescriptor &descriptor)
 
arm_compute::Status NeonMinimumWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output)
 Validate function for validating the inputs and output. More...
 
arm_compute::Status NeonMultiplicationWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status NeonNegWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonNormalizationWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const NormalizationDescriptor &descriptor)
 
arm_compute::Status NeonPadWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const PadDescriptor &descriptor)
 
arm_compute::Status NeonPermuteWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const PermuteDescriptor &descriptor)
 
arm_compute::Status NeonPooling2dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const Pooling2dDescriptor &descriptor)
 
arm_compute::Status NeonPooling3dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const Pooling3dDescriptor &descriptor)
 
arm_compute::Status NeonPreluWorkloadValidate (const TensorInfo &input, const TensorInfo &alpha, const TensorInfo &output)
 
arm_compute::Status NeonQLstmWorkloadValidate (const TensorInfo &input, const TensorInfo &cellStateIn, const TensorInfo &outputStateIn, const TensorInfo &cellStateOut, const TensorInfo &outputStateOut, const TensorInfo &output, const QLstmDescriptor &descriptor, const LstmInputParamsInfo &paramsInfo)
 
arm_compute::Status NeonQuantizedLstmWorkloadValidate (const TensorInfo &input, const TensorInfo &cellStateIn, const TensorInfo &outputStateIn, const TensorInfo &cellStateOut, const TensorInfo &outputStateOut, const QuantizedLstmInputParamsInfo &paramsInfo)
 
arm_compute::Status NeonQuantizeWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonReduceWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const ReduceDescriptor &descriptor)
 
arm_compute::Status NeonReshapeWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonResizeWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const ResizeDescriptor &descriptor)
 
arm_compute::Status NeonRsqrtWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonSinWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonSliceWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const SliceDescriptor &descriptor)
 
arm_compute::Status NeonSoftmaxWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const SoftmaxDescriptor &descriptor)
 
arm_compute::Status NeonSpaceToBatchNdWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const SpaceToBatchNdDescriptor &descriptor)
 
arm_compute::Status NeonSpaceToDepthWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const SpaceToDepthDescriptor &descriptor)
 
arm_compute::Status NeonSplitterWorkloadValidate (const TensorInfo &input, const std::vector< std::reference_wrapper< TensorInfo >> &outputs, unsigned int splitAxis)
 
arm_compute::Status NeonSqrtWorkloadValidate (const TensorInfo &input, const TensorInfo &output)
 
arm_compute::Status NeonStackWorkloadValidate (const std::vector< const TensorInfo *> &inputs, const TensorInfo &output, const StackDescriptor &descriptor)
 
arm_compute::Status NeonStridedSliceWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const StridedSliceDescriptor &descriptor)
 
arm_compute::Status NeonSubtractionWorkloadValidate (const TensorInfo &input0, const TensorInfo &input1, const TensorInfo &output, const ActivationDescriptor *activationDescriptor)
 
arm_compute::Status NeonTransposeConvolution2dWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const TransposeConvolution2dDescriptor &descriptor, const TensorInfo &weights, const Optional< TensorInfo > &biases)
 
arm_compute::Status NeonTransposeWorkloadValidate (const TensorInfo &input, const TensorInfo &output, const TransposeDescriptor &descriptor)
 
arm_compute::Status NeonUnidirectionalSequenceLstmFloatWorkloadValidate (const TensorInfo &input, const TensorInfo &outputStateIn, const TensorInfo &cellStateIn, const TensorInfo &outputStateOut, const TensorInfo &cellStateOut, const TensorInfo &output, const UnidirectionalSequenceLstmDescriptor &descriptor, const LstmInputParamsInfo &paramsInfo)
 
arm_compute::Status NeonUnidirectionalSequenceLstmWorkloadValidate (const TensorInfo &input, const TensorInfo &outputStateIn, const TensorInfo &cellStateIn, const TensorInfo &outputStateOut, const TensorInfo &cellStateOut, const TensorInfo &output, const UnidirectionalSequenceLstmDescriptor &descriptor, const LstmInputParamsInfo &paramsInfo)
 
template<typename T >
void CopyArmComputeTensorData (arm_compute::Tensor &dstTensor, const T *srcData)
 
void InitializeArmComputeTensorData (arm_compute::Tensor &tensor, const ConstTensorHandle *handle)
 
auto SetNeonStridedSliceData (const std::vector< int > &m_begin, const std::vector< int > &m_end, const std::vector< int > &m_stride)
 
auto SetNeonSliceData (const std::vector< unsigned int > &m_begin, const std::vector< unsigned int > &m_size)
 
constexpr const char * RefBackendId ()
 
constexpr const char * RefTensorHandleFactoryId ()
 
template<DataType ArmnnType>
bool IsDataType (const WorkloadInfo &info)
 
bool IsSigned32 (const WorkloadInfo &info)
 
bool IsBFloat16 (const WorkloadInfo &info)
 
bool IsFloat16 (const WorkloadInfo &info)
 
bool IsQSymmS16 (const WorkloadInfo &info)
 
bool IsQSymmS8 (const WorkloadInfo &info)
 
bool IsQAsymmS8 (const WorkloadInfo &info)
 
bool IsQAsymmU8 (const WorkloadInfo &info)
 
template<typename QueueDescriptorType >
constexpr bool IsOperationQueueDescriptor (const QueueDescriptorType &)
 
template<>
constexpr bool IsOperationQueueDescriptor (const MemCopyQueueDescriptor &)
 
template<>
constexpr bool IsOperationQueueDescriptor (const ConstantQueueDescriptor &)
 
template<>
constexpr bool IsOperationQueueDescriptor (const PermuteQueueDescriptor &)
 
float Activation (float in, ActivationFunction function, float a, float b)
 
void Activation (Decoder< float > &in, Encoder< float > &out, const TensorInfo &tensorInfo, ActivationFunction function, float a, float b)
 
template<typename OUT >
void ArgMinMax (Decoder< float > &in, OUT *out, const TensorInfo &inputTensorInfo, const TensorInfo &outputTensorInfo, ArgMinMaxFunction function, int axis)
 
template void ArgMinMax (Decoder< float > &in, int32_t *out, const TensorInfo &inputTensorInfo, const TensorInfo &outputTensorInfo, ArgMinMaxFunction function, int axis)
 
template void ArgMinMax (Decoder< float > &in, int64_t *out, const TensorInfo &inputTensorInfo, const TensorInfo &outputTensorInfo, ArgMinMaxFunction function, int axis)
 
void BatchNormImpl (const BatchNormalizationQueueDescriptor &data, Decoder< float > &meanDecoder, Decoder< float > &varianceDecoder, Decoder< float > &betaDecoder, Decoder< float > &gammaDecoder, Decoder< float > &inputDecoder, Encoder< float > &outputEncoder)
 
unsigned int Offset (const TensorShape &shape, unsigned int batch, unsigned int height, unsigned int width, unsigned int channels, const DataLayoutIndexed &dataLayout)
 
void BatchToSpaceNd (const DataLayoutIndexed &dataLayout, const TensorInfo &inputTensorInfo, const TensorInfo &outputTensorInfo, const std::vector< unsigned int > &blockShape, const std::vector< std::pair< unsigned int, unsigned int >> &cropsData, Decoder< float > &inputDecoder, Encoder< float > &outputEncoder)
 
void Concatenate (const ConcatQueueDescriptor &data, std::vector< ITensorHandle *> inputs, std::vector< ITensorHandle *> outputs)
 
void Convolve3d (const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rFilterShape, Decoder< float > &rFilterDecoder, bool biasEnabled, Decoder< float > *pBiasDecoder, DataLayout dataLayout, unsigned int paddingTop, unsigned int paddingLeft, unsigned int paddingFront, unsigned int xStride, unsigned int yStride, unsigned int zStride, unsigned int xDilation, unsigned int yDilation, unsigned int zDilation)
 
void Convolve (const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rFilterShape, Decoder< float > &rFilterDecoder, bool biasEnabled, Decoder< float > *pBiasDecoder, DataLayout dataLayout, unsigned int paddingTop, unsigned int paddingLeft, unsigned int xStride, unsigned int yStride, unsigned int xDilation, unsigned int yDilation, bool depthwise)
 
template<typename T >
void PrintOutput (const TensorInfo &inputInfo, const T *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, std::ostream &os)
 
template<typename T >
void Debug (const TensorInfo &inputInfo, const T *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
 
template void Debug< BFloat16 > (const TensorInfo &inputInfo, const BFloat16 *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
 
template void Debug< Half > (const TensorInfo &inputInfo, const Half *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
 
template void Debug< float > (const TensorInfo &inputInfo, const float *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
 
template void Debug< uint8_t > (const TensorInfo &inputInfo, const uint8_t *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
 
template void Debug< int8_t > (const TensorInfo &inputInfo, const int8_t *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
 
template void Debug< int16_t > (const TensorInfo &inputInfo, const int16_t *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
 
template void Debug< int32_t > (const TensorInfo &inputInfo, const int32_t *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
 
template<typename T >
std::unique_ptr< Decoder< T > > MakeDecoder (const TensorInfo &info, const void *data=nullptr)
 
template<>
std::unique_ptr< Decoder< float > > MakeDecoder (const TensorInfo &info, const void *data)
 
template<>
std::unique_ptr< Decoder< bool > > MakeDecoder (const TensorInfo &info, const void *data)
 
template<>
std::unique_ptr< Decoder< int32_t > > MakeDecoder (const TensorInfo &info, const void *data)
 
void DepthToSpace (const TensorInfo &inputInfo, const DepthToSpaceDescriptor &descriptor, const void *inputData, void *outputData, unsigned int dataTypeSize)
 
void Dequantize (Decoder< float > &inputDecoder, Encoder< float > &outputEncoder, const TensorInfo &inputInfo, const TensorInfo &outputInfo)
 
std::vector< unsigned int > GenerateRangeK (unsigned int k)
 
void TopKSort (unsigned int k, unsigned int *indices, const float *values, unsigned int numElement)
 
float IntersectionOverUnion (const float *boxI, const float *boxJ)
 
std::vector< unsigned int > NonMaxSuppression (unsigned int numBoxes, const std::vector< float > &boxCorners, const std::vector< float > &scores, float nmsScoreThreshold, unsigned int maxDetection, float nmsIouThreshold)
 
void AllocateOutputData (unsigned int numOutput, unsigned int numSelected, const std::vector< float > &boxCorners, const std::vector< unsigned int > &outputIndices, const std::vector< unsigned int > &selectedBoxes, const std::vector< unsigned int > &selectedClasses, const std::vector< float > &selectedScores, float *detectionBoxes, float *detectionScores, float *detectionClasses, float *numDetections)
 
void DetectionPostProcess (const TensorInfo &boxEncodingsInfo, const TensorInfo &scoresInfo, const TensorInfo &anchorsInfo, const TensorInfo &detectionBoxesInfo, const TensorInfo &detectionClassesInfo, const TensorInfo &detectionScoresInfo, const TensorInfo &numDetectionsInfo, const DetectionPostProcessDescriptor &desc, Decoder< float > &boxEncodings, Decoder< float > &scores, Decoder< float > &anchors, float *detectionBoxes, float *detectionClasses, float *detectionScores, float *numDetections)
 
template<typename T >
std::unique_ptr< Encoder< T > > MakeEncoder (const TensorInfo &info, void *data=nullptr)
 
template<>
std::unique_ptr< Encoder< float > > MakeEncoder (const TensorInfo &info, void *data)
 
template<>
std::unique_ptr< Encoder< bool > > MakeEncoder (const TensorInfo &info, void *data)
 
template<>
std::unique_ptr< Encoder< int32_t > > MakeEncoder (const TensorInfo &info, void *data)
 
void Fill (Encoder< float > &output, const TensorShape &desiredOutputShape, const float value)
 Creates a tensor and fills it with a scalar value. More...
 
void FullyConnected (const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rWeightsShape, Decoder< float > &rWeightDecoder, Decoder< float > *rBiasDecoder, bool biasEnabled, unsigned int K, bool transposeWeights)
 Performs a matrix multiplication and optionally adds a bias. More...
 
void Gather (const TensorInfo &paramsInfo, const TensorInfo &indicesInfo, const TensorInfo &outputInfo, Decoder< float > &params, const int32_t *indices, Encoder< float > &output, const int32_t axis)
 
void InstanceNorm (const InstanceNormalizationQueueDescriptor &data, const TensorInfo &inputInfo, Decoder< float > &inputDecoder, Encoder< float > &outputEncoder)
 
void LogSoftmax (Decoder< float > &input, Encoder< float > &output, const TensorInfo &inputInfo, const LogSoftmaxDescriptor &descriptor)
 
void LstmImpl (const LstmDescriptor &descriptor, const TensorInfo &inputInfo, const TensorInfo &outputInfo, const TensorShape &inputToOutputWeightsShape, const TensorShape &recurrentToOutputWeightsShape, std::unique_ptr< Decoder< float >> &inputData, std::unique_ptr< Decoder< float >> &outputStateIn, std::unique_ptr< Decoder< float >> &cellStateIn, std::unique_ptr< Encoder< float >> &outputStateOut, std::unique_ptr< Encoder< float >> &cellStateOut, std::unique_ptr< Encoder< float >> &output, std::unique_ptr< Decoder< float >> &cellStateOutDecoder, std::unique_ptr< Decoder< float >> &outputDecoder, std::unique_ptr< Decoder< float >> &inputToInputWeightsTensor, std::unique_ptr< Decoder< float >> &inputToForgetWeightsTensor, std::unique_ptr< Decoder< float >> &inputToCellWeightsTensor, std::unique_ptr< Decoder< float >> &inputToOutputWeightsTensor, std::unique_ptr< Decoder< float >> &recurrentToInputWeightsTensor, std::unique_ptr< Decoder< float >> &recurrentToForgetWeightsTensor, std::unique_ptr< Decoder< float >> &recurrentToCellWeightsTensor, std::unique_ptr< Decoder< float >> &recurrentToOutputWeightsTensor, std::unique_ptr< Decoder< float >> &cellToInputWeightsTensor, std::unique_ptr< Decoder< float >> &cellToForgetWeightsTensor, std::unique_ptr< Decoder< float >> &cellToOutputWeightsTensor, std::unique_ptr< Decoder< float >> &inputGateBiasTensor, std::unique_ptr< Decoder< float >> &forgetGateBiasTensor, std::unique_ptr< Decoder< float >> &cellBiasTensor, std::unique_ptr< Decoder< float >> &outputGateBiasTensor, std::unique_ptr< Decoder< float >> &projectionWeightsTensor, std::unique_ptr< Decoder< float >> &projectionBiasTensor, std::unique_ptr< Decoder< float >> &inputLayerNormWeights, std::unique_ptr< Decoder< float >> &forgetLayerNormWeights, std::unique_ptr< Decoder< float >> &cellLayerNormWeights, std::unique_ptr< Decoder< float >> &outputLayerNormWeights, std::unique_ptr< Encoder< float >> &inputGateScratch, std::unique_ptr< Encoder< float >> &cellScratch, std::unique_ptr< Encoder< float >> &forgetGateScratch, std::unique_ptr< Encoder< float >> &outputGateScratch, std::unique_ptr< Decoder< float >> &inputGateScratchDecoder, std::unique_ptr< Decoder< float >> &cellScratchDecoder, std::unique_ptr< Decoder< float >> &forgetGateScratchDecoder, std::unique_ptr< Decoder< float >> &outputGateScratchDecoder, float layerNormEpsilon)
 
void MirrorPad (const TensorInfo &inputInfo, const TensorInfo &outputInfo, const ITensorHandle *inputHandle, ITensorHandle *outputHandle, const PadQueueDescriptor &data)
 
void Pad (const TensorInfo &inputInfo, const TensorInfo &outputInfo, const ITensorHandle *inputHandle, ITensorHandle *outputHandle, const PadQueueDescriptor &data)
 
void Pooling2d (Decoder< float > &rInputDecoder, Encoder< float > &rOutputEncoder, const TensorInfo &inputInfo, const TensorInfo &outputInfo, const Pooling2dDescriptor &params)
 Computes the Pooling2d operation. More...
 
void Pooling3d (Decoder< float > &rInputDecoder, Encoder< float > &rOutputEncoder, const TensorInfo &inputInfo, const TensorInfo &outputInfo, const Pooling3dDescriptor &params)
 Computes the Pooling3d operation. More...
 
void PreluImpl (const TensorInfo &inputInfo, const TensorInfo &alphaInfo, const TensorInfo &outputInfo, Decoder< float > &inputData, Decoder< float > &alphaData, Encoder< float > &outputData)
 
bool NextIndex (const unsigned int numDims, const armnn::TensorShape &dims, std::vector< unsigned int > &current)
 
unsigned int ReducedOutputOffset (const unsigned int numDims, const armnn::TensorShape &dims, std::vector< unsigned int > &index, const unsigned int numAxis, const std::vector< unsigned int > &axis)
 
void Reduce (const TensorInfo &inputInfo, const TensorInfo &outputInfo, Decoder< float > &input, Encoder< float > &output, const std::vector< uint32_t > axis, const ReduceOperation reduceOperation)
 
void FakeQuantization (const float *inputData, float *outputData, uint32_t numElements, float min, float max)
 
unsigned int GetNumActivations (const TensorInfo &inputInfo)
 
template<typename TensorHandleType = RefTensorHandle>
const TensorInfoGetTensorInfo (const ITensorHandle *tensorHandle)
 float32 helpers More...
 
template<typename DataType , typename PayloadType >
const DataTypeGetInputTensorData (unsigned int idx, const PayloadType &data)
 
template<typename DataType >
DataTypeGetOutputTensorData (ITensorHandle *tensorHandle)
 
template<typename PayloadType >
const float * GetInputTensorDataFloat (unsigned int idx, const PayloadType &data)
 
template<typename PayloadType >
float * GetOutputTensorDataFloat (unsigned int idx, const PayloadType &data)
 
template<typename PayloadType >
const HalfGetInputTensorDataHalf (unsigned int idx, const PayloadType &data)
 
template<typename PayloadType >
HalfGetOutputTensorDataHalf (unsigned int idx, const PayloadType &data)
 
template<typename PayloadType >
const BFloat16GetInputTensorDataBFloat16 (unsigned int idx, const PayloadType &data)
 
template<typename PayloadType >
BFloat16GetOutputTensorDataBFloat16 (unsigned int idx, const PayloadType &data)
 
template<typename T >
std::vector< float > Dequantize (const T *quant, const TensorInfo &info)
 u8 helpers More...
 
template<typename T >
void Dequantize (const T *inputData, float *outputData, const TensorInfo &info)
 
void Quantize (uint8_t *quant, const float *dequant, const TensorInfo &info)
 
void Resize (Decoder< float > &in, const TensorInfo &inputInfo, Encoder< float > &out, const TensorInfo &outputInfo, DataLayoutIndexed dataLayout, armnn::ResizeMethod resizeMethod, bool alignCorners, bool halfPixelCenters)
 
void Slice (const TensorInfo &inputInfo, const SliceDescriptor &descriptor, const void *inputData, void *outputData, unsigned int dataTypeSize)
 
void Softmax (Decoder< float > &in, Encoder< float > &out, const TensorInfo &inputTensorInfo, float beta, int axis)
 Computes the softmax function on some inputs, into outputs, with a shape given by tensorInfo. More...
 
unsigned int GetOffset (const TensorShape &shape, unsigned int b, unsigned int h, unsigned int w, unsigned int c, const DataLayoutIndexed &dataLayout)
 
void SpaceToBatchNd (const TensorInfo &inputInfo, const TensorInfo &outputInfo, const SpaceToBatchNdDescriptor &params, Decoder< float > &inputData, Encoder< float > &outputData)
 
void SpaceToDepth (const TensorInfo &inputInfo, const TensorInfo &outputInfo, const SpaceToDepthDescriptor &params, Decoder< float > &inputData, Encoder< float > &outputData)
 
void Split (const SplitterQueueDescriptor &data, std::vector< ITensorHandle *> inputs, std::vector< ITensorHandle *> outputs)
 
template<typename DataType >
void Splitter (const SplitterQueueDescriptor &data, std::vector< ITensorHandle *> inputs, std::vector< ITensorHandle *> outputs)
 
void Stack (const StackQueueDescriptor &data, std::vector< std::unique_ptr< Decoder< float >>> &inputs, Encoder< float > &output, const TensorInfo &inputInfo, const TensorInfo &outputInfo)
 
void StridedSlice (const TensorInfo &inputInfo, const StridedSliceDescriptor &params, const void *inputData, void *outputData, unsigned int dataTypeSize)
 
void TransposeConvolution2dImpl (const TransposeConvolution2dDescriptor &descriptor, const TensorShape &inputShape, Decoder< float > &inputDecoder, const TensorShape &outputShape, Encoder< float > &outputEncoder, const TensorShape &weightsShape, Decoder< float > &weightsDecoder, Decoder< float > *biasesDecoder)
 
template<typename T >
void DeleteAsType (const void *const blob)
 
constexpr const char * TosaRefBackendId ()
 
constexpr const char * TosaRefTensorHandleFactoryId ()
 
bool TosaRefPreCompiledWorkloadValidate (std::string *)
 

Variables

constexpr unsigned int MaxNumOfTensorDimensions = 5U
 
constexpr unsigned int LOWEST_CAPTURE_PERIOD = 10000u
 The lowest performance data capture interval we support is 10 miliseconds. More...
 
constexpr unsigned int EXPIRE_RATE = 3U
 Variable to control expire rate of priority queue. More...
 
constexpr std::size_t g_ProfilingEventCountHint = 1024
 
constexpr bool g_WriteProfilingEventSequence = true
 
constexpr bool g_AggregateProfilingEventsByInference = true
 
constexpr bool g_WriteReportToStdOutOnProfilerDestruction = false
 
thread_local IProfilertl_Profiler = nullptr
 
constexpr size_t wordSize = sizeof(size_t) * 8
 
const BackendCapabilities gpuAccCapabilities ("GpuAcc", { {"NonConstWeights", false}, {"AsyncExecution", false}, {"ProtectedContentAllocation", true}, {"ConstantTensorsAsInputs", true}, {"PreImportIOTensors", false}, {"ExternallyManagedMemory", true}, {"MultiAxisPacking", false}, {"SingleAxisPacking", true} })
 
const BackendCapabilities cpuAccCapabilities ("CpuAcc", { {"NonConstWeights", false}, {"AsyncExecution", false}, {"ProtectedContentAllocation", false}, {"ConstantTensorsAsInputs", true}, {"PreImportIOTensors", false}, {"ExternallyManagedMemory", true}, {"MultiAxisPacking", false}, {"SingleAxisPacking", true} })
 
const std::set< armnn::LayerTypepaddingRequiredLayers
 
const BackendCapabilities cpuRefCapabilities ("CpuRef", { {"NonConstWeights", true}, {"AsyncExecution", true}, {"ProtectedContentAllocation", false}, {"ConstantTensorsAsInputs", true}, {"PreImportIOTensors", true}, {"ExternallyManagedMemory", true}, {"MultiAxisPacking", false}, {"SingleAxisPacking", true} })
 
const std::set< armnn::BackendCapabilityoldCpuRefCapabilities
 

Detailed Description

Copyright (c) 2021 ARM Limited and Contributors.

Optional is a drop in replacement for std::optional until we migrate to c++-17.

Copyright (c) 2022 Arm Ltd and Contributors.

Copyright (c) 2022 ARM Limited and Contributors.

Create pages for each tool so they appear nicely in the doxygen tree-view.

All rights reserved.

SPDX-License-Identifier: MIT

Subpages are not listed there. Also we can overwrite the page name this way.

Subpages are not listed there.

Note: The parser, serializer and deserializer pages are created in 01_parsers.dox or 02_deserializer_serializer.dox

Only a subset of the optional features are implemented that we intend to use in ArmNN. There are two distinct implementations here:

1, for normal constructable/destructable types and reference types 2, for reference types The std::optional features we support are:

  • has_value() and operator bool() to tell if the optional has a value
  • value() returns a reference to the held object

Typedef Documentation

◆ ACLMemManagerOnDemand

using ACLMemManagerOnDemand = std::shared_ptr<arm_compute::MemoryManagerOnDemand>

Definition at line 22 of file NeonFullyConnectedWorkload.cpp.

◆ AdditionalInfoObjectPtr

using AdditionalInfoObjectPtr = std::shared_ptr<void>

Definition at line 215 of file Layer.hpp.

◆ BackendCapabilities

Definition at line 19 of file BackendOptions.hpp.

◆ BackendIdSet

using BackendIdSet = std::unordered_set<BackendId>

Definition at line 193 of file BackendId.hpp.

◆ BackendIdVector

using BackendIdVector = std::vector<BackendId>

Definition at line 192 of file BackendId.hpp.

◆ BackendsMap

using BackendsMap = std::map<BackendId, std::unique_ptr<class IBackendInternal> >

Definition at line 293 of file Network.hpp.

◆ BaseFloat32ComparisonWorkload

◆ BaseUint8ComparisonWorkload

◆ BFloat16ToFloat32Workload

◆ BindingPointInfo

Definition at line 274 of file Tensor.hpp.

◆ BooleanWorkload

◆ CompiledBlobDeleter

typedef std::function< void(const void *)> CompiledBlobDeleter

Definition at line 256 of file INetwork.hpp.

◆ CompiledBlobPtr

typedef std::unique_ptr< void, CompiledBlobDeleter > CompiledBlobPtr

Definition at line 257 of file INetwork.hpp.

◆ ConcatDescriptor

Definition at line 55 of file DescriptorsFwd.hpp.

◆ Coordinates

using Coordinates = std::array<unsigned int, MaxNumOfTensorDimensions>

Definition at line 15 of file InternalTypes.hpp.

◆ CopyAndImportFactoryPairs

◆ DebugCallbackFunction

using DebugCallbackFunction = std::function<void(LayerGuid guid, unsigned int slotIndex, ITensorHandle* tensorHandle)>

Define the type of callback for the Debug layer to call.

Parameters
guid- guid of layer connected to the input of the Debug layer
slotIndex- index of the output slot connected to the input of the Debug layer
tensorHandle- TensorHandle for the input tensor to the Debug layer

Definition at line 379 of file Types.hpp.

◆ DepthToSpaceDescriptor

A DepthToSpaceDescriptor for the DepthToSpaceLayer.

Definition at line 1039 of file Descriptors.hpp.

◆ Dimensions

using Dimensions = std::array<unsigned int, MaxNumOfTensorDimensions>

Definition at line 16 of file InternalTypes.hpp.

◆ DynamicBackendPtr

using DynamicBackendPtr = std::unique_ptr<DynamicBackend>

Definition at line 52 of file DynamicBackend.hpp.

◆ FactoryId

◆ Float16ToFloat32Workload

◆ Float32ToBFloat16Workload

◆ Float32ToFloat16Workload

◆ Float32Workload

◆ FloatWorkload

◆ Half

typedef half_float::half Half

Definition at line 22 of file Half.hpp.

◆ HighResolutionClock

using HighResolutionClock = std::chrono::high_resolution_clock::time_point

Define a timer and associated inference ID for recording execution times.

Definition at line 382 of file Types.hpp.

◆ IBackendContextUniquePtr

using IBackendContextUniquePtr = std::unique_ptr<IBackendContext>

Definition at line 34 of file IBackendContext.hpp.

◆ IBackendInternalUniquePtr

typedef std::unique_ptr< IBackendInternal > IBackendInternalUniquePtr

Definition at line 32 of file BackendRegistry.hpp.

◆ IBackendSharedPtr

using IBackendSharedPtr = std::shared_ptr<IBackend>

Definition at line 263 of file Types.hpp.

◆ IBackendUniquePtr

using IBackendUniquePtr = std::unique_ptr<IBackend, void(*)(IBackend* backend)>

Definition at line 264 of file Types.hpp.

◆ IGpuAccTunedParametersPtr

The following API is replaced by the backend options API.

Definition at line 307 of file IRuntime.hpp.

◆ IInitialiseProfilingService

using IInitialiseProfilingService = arm::pipe::IInitialiseProfilingService

Definition at line 28 of file Runtime.hpp.

◆ ILayerSupportSharedPtr

using ILayerSupportSharedPtr = std::shared_ptr<ILayerSupport>

Definition at line 572 of file ILayerSupport.hpp.

◆ IMemoryManagerUniquePtr

using IMemoryManagerUniquePtr = std::unique_ptr<IMemoryManager>

Definition at line 24 of file IMemoryManager.hpp.

◆ ImportedInputId

using ImportedInputId = unsigned int

Definition at line 291 of file Types.hpp.

◆ ImportedOutputId

using ImportedOutputId = unsigned int

Definition at line 292 of file Types.hpp.

◆ INetworkPtr

using INetworkPtr = std::unique_ptr<INetwork, void(*)(INetwork* network)>

Definition at line 253 of file INetwork.hpp.

◆ InferenceTimingPair

Definition at line 383 of file Types.hpp.

◆ InputQueueDescriptor

Definition at line 91 of file WorkloadData.hpp.

◆ InputTensors

using InputTensors = std::vector<std::pair<LayerBindingId, class ConstTensor> >

Definition at line 392 of file Tensor.hpp.

◆ Int32Workload

◆ IOptimizedNetworkPtr

using IOptimizedNetworkPtr = std::unique_ptr<IOptimizedNetwork, void(*)(IOptimizedNetwork* network)>

Definition at line 254 of file INetwork.hpp.

◆ IReportStructure

using IReportStructure = arm::pipe::IReportStructure

Definition at line 27 of file Runtime.hpp.

◆ IRuntimePtr

using IRuntimePtr = std::unique_ptr<IRuntime, void(*)(IRuntime* runtime)>

Definition at line 41 of file IRuntime.hpp.

◆ LayerBindingId

using LayerBindingId = int

Type of identifiers for bindable layers (inputs, outputs).

Definition at line 290 of file Types.hpp.

◆ LayerPriority

using LayerPriority = unsigned int

Definition at line 214 of file Layer.hpp.

◆ LayerTypeOf

using LayerTypeOf = typename LayerTypeOfImpl<Type>::Type

Definition at line 91 of file LayersFwd.hpp.

◆ LoadedNetworks

using LoadedNetworks = std::unordered_map<NetworkId, std::unique_ptr<LoadedNetwork> >

Definition at line 26 of file Runtime.hpp.

◆ LogSoftmaxDescriptor

A LogSoftmaxDescriptor for the LogSoftmaxLayer.

Definition at line 169 of file Descriptors.hpp.

◆ MemoryOptimizerStrategiesMapRef

using MemoryOptimizerStrategiesMapRef = std::unordered_map<BackendId, std::shared_ptr<IMemoryOptimizerStrategy> >

Definition at line 33 of file BackendRegistry.hpp.

◆ MemorySourceFlags

using MemorySourceFlags = unsigned int

Definition at line 15 of file MemorySources.hpp.

◆ MergerDescriptor

MergerDescriptor is deprecated, use ConcatDescriptor instead.

Definition at line 59 of file DescriptorsFwd.hpp.

◆ MergerQueueDescriptor

Definition at line 149 of file WorkloadData.hpp.

◆ ModelOptions

using ModelOptions = std::vector<BackendOptions>

Definition at line 18 of file BackendOptions.hpp.

◆ NetworkId

typedef int NetworkId

Definition at line 35 of file IRuntime.hpp.

◆ NetworkImplPtr

using NetworkImplPtr = std::unique_ptr<NetworkImpl, void (*)(NetworkImpl* network)>

Definition at line 28 of file Network.hpp.

◆ NetworkOptions

using NetworkOptions = std::vector<BackendOptions>

Definition at line 16 of file BackendOptions.hpp.

◆ OutputQueueDescriptor

Definition at line 92 of file WorkloadData.hpp.

◆ OutputTensors

using OutputTensors = std::vector<std::pair<LayerBindingId, class Tensor> >

Definition at line 393 of file Tensor.hpp.

◆ ParameterStringifyFunction

using ParameterStringifyFunction = std::function<void(const std::string& name, const std::string& value)>

Definition at line 14 of file SerializeLayerParameters.hpp.

◆ PreCompiledObjectDeleter

using PreCompiledObjectDeleter = std::function<void(const void*)>

Definition at line 19 of file PreCompiledLayer.hpp.

◆ PreCompiledObjectPtr

using PreCompiledObjectPtr = std::unique_ptr<void, PreCompiledObjectDeleter>

Definition at line 20 of file PreCompiledLayer.hpp.

◆ RefAdditionWorkload

◆ RefDebugBFloat16Workload

◆ RefDebugFloat16Workload

◆ RefDebugFloat32Workload

◆ RefDebugQAsymmS8Workload

◆ RefDebugQAsymmU8Workload

◆ RefDebugQSymmS16Workload

◆ RefDebugQSymmS8Workload

◆ RefDebugSigned32Workload

◆ RefDivisionWorkload

◆ RefMaximumWorkload

◆ RefMinimumWorkload

◆ RefMultiplicationWorkload

◆ RefPermuteBFloat16Workload

◆ RefPermuteFloat16Workload

◆ RefPermuteFloat32Workload

◆ RefPermuteQAsymm8Workload

◆ RefPermuteQAsymmS8Workload

◆ RefPermuteQSymm16Workload

◆ RefSubtractionWorkload

◆ RefTransposeBFloat16Workload

◆ RefTransposeFloat16Workload

◆ RefTransposeFloat32Workload

◆ RefTransposeQAsymm8Workload

◆ RefTransposeQAsymmS8Workload

◆ RefTransposeQSymm16Workload

◆ ResolveType

using ResolveType = typename ResolveTypeImpl<DT>::Type

Definition at line 79 of file ResolveType.hpp.

◆ SplitterDescriptor

Definition at line 60 of file DescriptorsFwd.hpp.

◆ TensorInfos

using TensorInfos = std::vector<TensorInfo>

Definition at line 135 of file BackendHelper.cpp.

◆ Uint8ToFloat32Workload

◆ Uint8Workload

◆ UnidirectionalSequenceLstmDescriptor

◆ WorkloadQueue

using WorkloadQueue = std::vector< std::unique_ptr<IWorkload> >

Definition at line 13 of file ExecutionFrame.hpp.

Enumeration Type Documentation

◆ ActivationFunction

enum ActivationFunction
strong
Enumerator
Sigmoid 
TanH 
Linear 
ReLu 
BoundedReLu 

min(a, max(b, input)) ReLu1 & ReLu6.

SoftReLu 
LeakyReLu 
Abs 
Sqrt 
Square 
Elu 
HardSwish 

Definition at line 86 of file Types.hpp.

◆ ArgMinMaxFunction

enum ArgMinMaxFunction
strong
Enumerator
Min 
Max 

Definition at line 102 of file Types.hpp.

◆ BackendCapability

enum BackendCapability : uint32_t
strong

BackendCapability class.

Enumerator
NonConstWeights 

Constant weights can be accessed through the descriptors, On the other hand, non-const weights can be accessed through inputs.

AsyncExecution 

Asynchronous Execution.

Definition at line 267 of file Types.hpp.

267  : uint32_t
268 {
269  /// Constant weights can be accessed through the descriptors,
270  /// On the other hand, non-const weights can be accessed through inputs.
272 
273  /// Asynchronous Execution.
275 
276  // add new enum values here
277 };
Constant weights can be accessed through the descriptors, On the other hand, non-const weights can be...

◆ BoostLogSeverityMapping

◆ CapabilityClass

enum CapabilityClass
strong

Capability class to calculate in the GetCapabilities function so that only the capability in the scope can be choose to calculate.

Enumerator
PaddingRequired 
FallbackImportDisabled 
CapabilityClassMax 

Definition at line 20 of file ITensorHandleFactory.hpp.

◆ ComparisonOperation

enum ComparisonOperation
strong
Enumerator
Equal 
Greater 
GreaterOrEqual 
Less 
LessOrEqual 
NotEqual 

Definition at line 108 of file Types.hpp.

◆ Compute

enum Compute
strong

The Compute enum is now deprecated and it is now being replaced by BackendId.

Enumerator
Undefined 
CpuRef 

CPU Execution: Reference C++ kernels.

CpuAcc 

CPU Execution: NEON: ArmCompute.

GpuAcc 

GPU Execution: OpenCL: ArmCompute.

Definition at line 21 of file BackendId.hpp.

22 {
23  Undefined = 0,
24  /// CPU Execution: Reference C++ kernels
25  CpuRef = 1,
26  /// CPU Execution: NEON: ArmCompute
27  CpuAcc = 2,
28  /// GPU Execution: OpenCL: ArmCompute
29  GpuAcc = 3
30 };
CPU Execution: Reference C++ kernels.
GPU Execution: OpenCL: ArmCompute.
CPU Execution: NEON: ArmCompute.

◆ DataLayout

enum DataLayout
strong
Enumerator
NCHW 
NHWC 
NDHWC 
NCDHW 

Definition at line 62 of file Types.hpp.

◆ DataType

enum DataType
strong
Enumerator
Float16 
Float32 
QAsymmU8 
Signed32 
Boolean 
QSymmS16 
QSymmS8 
QAsymmS8 
BFloat16 
Signed64 

Definition at line 48 of file Types.hpp.

◆ Dimensionality

enum Dimensionality
strong
Enumerator
NotSpecified 
Specified 
Scalar 

Definition at line 158 of file Types.hpp.

◆ EdgeStrategy

enum EdgeStrategy
strong
Enumerator
Undefined 
DirectCompatibility 

No strategy has been defined. Used internally to verify integrity of optimizations.

ExportToTarget 

Destination backend can work directly with tensors on source backend.

CopyToTarget 

Source backends tensor data can be exported to destination backend tensor without copy.

Copy contents from source backend tensor to destination backend tensor.

Definition at line 100 of file ITensorHandleFactory.hpp.

101 {
102  Undefined, /// No strategy has been defined. Used internally to verify integrity of optimizations.
103  DirectCompatibility, /// Destination backend can work directly with tensors on source backend.
104  ExportToTarget, /// Source backends tensor data can be exported to destination backend tensor without copy.
105  CopyToTarget /// Copy contents from source backend tensor to destination backend tensor.
106 };
No strategy has been defined. Used internally to verify integrity of optimizations.
Source backends tensor data can be exported to destination backend tensor without copy...
Destination backend can work directly with tensors on source backend.

◆ GraphEvent

enum GraphEvent
strong
Enumerator
LayerAdded 
LayerErased 

Definition at line 12 of file IGraphObservable.hpp.

◆ JsonObjectType

enum JsonObjectType
strong
Enumerator
Measurement 
Event 
ExecObjectDesc 

Definition at line 20 of file JsonPrinter.hpp.

◆ LayerType

enum LayerType
strong

When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below.

Enumerator
Activation 
Addition 
ArgMinMax 
BatchNormalization 
BatchToSpaceNd 
Comparison 
Concat 
Constant 
ConvertBf16ToFp32 
ConvertFp16ToFp32 
ConvertFp32ToBf16 
ConvertFp32ToFp16 
Convolution2d 
Debug 
DepthToSpace 
DepthwiseConvolution2d 
Dequantize 
DetectionPostProcess 
Division 
ElementwiseUnary 
FakeQuantization 
Fill 
Floor 
FullyConnected 
Gather 
Input 
InstanceNormalization 
L2Normalization 
LogicalBinary 
LogSoftmax 
Lstm 
QLstm 
Map 
Maximum 
Mean 
MemCopy 
MemImport 
Merge 
Minimum 
Multiplication 
Normalization 
Output 
Pad 
Permute 
Pooling2d 
PreCompiled 
Prelu 
Quantize 
QuantizedLstm 
Reshape 
Rank 
Resize 
Reduce 
Slice 
Softmax 
SpaceToBatchNd 
SpaceToDepth 
Splitter 
Stack 
StandIn 
StridedSlice 
Subtraction 
Switch 
Transpose 
TransposeConvolution2d 
Unmap 
Cast 
Shape 
UnidirectionalSequenceLstm 
ChannelShuffle 
Convolution3d 
Pooling3d 
GatherNd 
BatchMatMul 
FirstLayer 
LastLayer 

Definition at line 468 of file Types.hpp.

469 {
470 #define X(name) name,
472 #undef X
475 };
#define LIST_OF_LAYER_TYPE
This list uses X macro technique.
Definition: Types.hpp:388
float Activation(float in, ActivationFunction function, float a, float b)
Definition: Activation.cpp:13

◆ LogicalBinaryOperation

Enumerator
LogicalAnd 
LogicalOr 

Definition at line 118 of file Types.hpp.

◆ LogSeverity

enum LogSeverity
strong
Enumerator
Trace 
Debug 
Info 
Warning 
Error 
Fatal 

Definition at line 14 of file Utils.hpp.

15 {
16  Trace,
17  Debug,
18  Info,
19  Warning,
20  Error,
21  Fatal
22 };
void Debug(const TensorInfo &inputInfo, const T *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
Definition: Debug.cpp:97

◆ MemBlockStrategyType

enum MemBlockStrategyType
strong
Enumerator
SingleAxisPacking 
MultiAxisPacking 

Definition at line 239 of file Types.hpp.

240 {
241  // MemBlocks can be packed on the Y axis only, overlap allowed on X axis.
242  // In other words MemBlocks with overlapping lifetimes cannot use the same MemBin,
243  // equivalent to blob or pooling memory management.
244  SingleAxisPacking = 0,
245 
246  // MemBlocks can be packed on either Y or X axis but cannot overlap on both.
247  // In other words MemBlocks with overlapping lifetimes can use the same MemBin,
248  // equivalent to offset or slab memory management.
249  MultiAxisPacking = 1
250 };

◆ MemorySource

enum MemorySource : uint32_t
strong

Define the Memory Source to reduce copies.

Enumerator
Undefined 
Malloc 
DmaBuf 
DmaBufProtected 
Gralloc 

Definition at line 230 of file Types.hpp.

◆ NormalizationAlgorithmChannel

Enumerator
Across 
Within 

Definition at line 193 of file Types.hpp.

◆ NormalizationAlgorithmMethod

Enumerator
LocalBrightness 

Krichevsky 2012: Local Brightness Normalization.

LocalContrast 

Jarret 2009: Local Contrast Normalization.

Definition at line 199 of file Types.hpp.

200 {
201  /// Krichevsky 2012: Local Brightness Normalization
202  LocalBrightness = 0,
203  /// Jarret 2009: Local Contrast Normalization
204  LocalContrast = 1
205 };
Jarret 2009: Local Contrast Normalization.
Krichevsky 2012: Local Brightness Normalization.

◆ OutputShapeRounding

enum OutputShapeRounding
strong
Enumerator
Floor 
Ceiling 

Definition at line 207 of file Types.hpp.

◆ PaddingMethod

enum PaddingMethod
strong

The padding method modifies the output of pooling layers.

In both supported methods, the values are ignored (they are not even zeroes, which would make a difference for max pooling a tensor with negative values). The difference between IgnoreValue and Exclude is that the former counts the padding fields in the divisor of Average and L2 pooling, while Exclude does not.

Enumerator
IgnoreValue 

The padding fields count, but are ignored.

Exclude 

The padding fields don't count and are ignored.

Definition at line 174 of file Types.hpp.

175 {
176  /// The padding fields count, but are ignored
177  IgnoreValue = 0,
178  /// The padding fields don't count and are ignored
179  Exclude = 1
180 };
The padding fields don&#39;t count and are ignored.
The padding fields count, but are ignored.

◆ PaddingMode

enum PaddingMode
strong

The padding mode controls whether the padding should be filled with constant values (Constant), or reflect the input, either including the border values (Symmetric) or not (Reflect).

Enumerator
Constant 
Reflect 
Symmetric 

Definition at line 186 of file Types.hpp.

◆ PoolingAlgorithm

enum PoolingAlgorithm
strong
Enumerator
Max 
Average 
L2 

Definition at line 136 of file Types.hpp.

◆ ProfilingDetailsMethod

Define the behaviour of the internal profiler when outputting network details.

Enumerator
Undefined 
DetailsWithEvents 
DetailsOnly 

Definition at line 71 of file Types.hpp.

◆ QosExecPriority

enum QosExecPriority
strong
Enumerator
Low 
Medium 
High 

Definition at line 79 of file Types.hpp.

◆ ReduceOperation

enum ReduceOperation
strong
Enumerator
Sum 
Max 
Mean 
Min 
Prod 

Definition at line 143 of file Types.hpp.

◆ ResizeMethod

enum ResizeMethod
strong
Enumerator
Bilinear 
NearestNeighbor 

Definition at line 152 of file Types.hpp.

◆ ShapeInferenceMethod

enum ShapeInferenceMethod
strong

The ShapeInferenceMethod modify how the output shapes are treated.

When ValidateOnly is selected, the output shapes are inferred from the input parameters of the layer and any mismatch is reported. When InferAndValidate is selected 2 actions are performed: (1)infer output shape from inputs and (2)validate the shapes as in ValidateOnly. This option has been added to work with tensors which rank or dimension sizes are not specified explicitly, however this information can be calculated from the inputs.

Enumerator
ValidateOnly 

Validate all output shapes.

InferAndValidate 

Infer missing output shapes and validate all output shapes.

Definition at line 221 of file Types.hpp.

222 {
223  /// Validate all output shapes
224  ValidateOnly = 0,
225  /// Infer missing output shapes and validate all output shapes
226  InferAndValidate = 1
227 };
Validate all output shapes.
Infer missing output shapes and validate all output shapes.

◆ Status

enum Status
strong

enumeration

Enumerator
Success 
Failure 

Definition at line 42 of file Types.hpp.

◆ TuningLevel

enum TuningLevel
strong
Enumerator
None 
Rapid 
Normal 
Exhaustive 

Definition at line 70 of file ClBackendContext.cpp.

◆ UnaryOperation

enum UnaryOperation
strong
Enumerator
Abs 
Exp 
Sqrt 
Rsqrt 
Neg 
LogicalNot 
Log 
Sin 

Definition at line 124 of file Types.hpp.

Function Documentation

◆ Activation() [1/2]

float Activation ( float  in,
ActivationFunction  function,
float  a,
float  b 
)

Definition at line 13 of file Activation.cpp.

References Abs, BoundedReLu, Elu, HardSwish, LeakyReLu, Linear, ReLu, Sigmoid, SoftReLu, Sqrt, Square, and TanH.

Referenced by Activation(), and LstmImpl().

17 {
18  float output;
19 
20  // Compute the result of the activation function.
21  switch (function)
22  {
23  case ActivationFunction::Linear:
24  {
25  output = a * in + b;
26  break;
27  }
28  case ActivationFunction::Sigmoid:
29  {
30  output = 1.f / (1.f + expf(-in));
31  break;
32  }
33  case ActivationFunction::ReLu:
34  {
35  output = std::max(0.f, in);
36  break;
37  }
38  case ActivationFunction::BoundedReLu:
39  {
40  output = std::min(a, std::max(b, in));
41  break;
42  }
43  case ActivationFunction::SoftReLu:
44  {
45  output = logf(1.0f + expf(in));
46  break;
47  }
48  case ActivationFunction::LeakyReLu:
49  {
50  output = in > 0.0f ? in : (in * a);
51  break;
52  }
53  case ActivationFunction::Abs:
54  {
55  output = in < 0 ? -in : in;
56  break;
57  }
58  case ActivationFunction::Sqrt:
59  {
60  output = sqrtf(in);
61  break;
62  }
63  case ActivationFunction::Square:
64  {
65  output = in * in;
66  break;
67  }
68  case ActivationFunction::TanH:
69  {
70  output = a * tanhf(b * in);
71  break;
72  }
73  case ActivationFunction::Elu:
74  {
75  output = (in >= 0) ? in : a * (expf(in) - 1);
76  break;
77  }
78  case ActivationFunction::HardSwish:
79  {
80  // hard_swish(x) = x * relu6(x+3) / 6
81  // relu6(x) = min(max(x,0),6)
82  output = in * (std::min(std::max((in + 3),0.0f),6.0f)) / 6;
83  break;
84  }
85  default:
86  {
87  throw InvalidArgumentException("Unsupported activation function");
88  }
89  }
90 
91  return output;
92 }

◆ Activation() [2/2]

void Activation ( Decoder< float > &  in,
Encoder< float > &  out,
const TensorInfo tensorInfo,
ActivationFunction  function,
float  a,
float  b 
)

Definition at line 95 of file Activation.cpp.

References Activation(), Decoder< IType >::Get(), TensorInfo::GetNumElements(), and Encoder< IType >::Set().

101 {
102  unsigned int numElements = tensorInfo.GetNumElements();
103 
104  for (unsigned int i = 0; i < numElements; i++)
105  {
106  out.Set(Activation(in.Get(), function, a, b));
107  ++in;
108  ++out;
109  }
110  in -= numElements;
111  out -= numElements;
112 }
virtual void Set(IType right)=0
virtual IType Get() const =0
void Activation(Decoder< float > &in, Encoder< float > &out, const TensorInfo &tensorInfo, ActivationFunction function, float a, float b)
Definition: Activation.cpp:95

◆ AllocateOutputData()

void armnn::AllocateOutputData ( unsigned int  numOutput,
unsigned int  numSelected,
const std::vector< float > &  boxCorners,
const std::vector< unsigned int > &  outputIndices,
const std::vector< unsigned int > &  selectedBoxes,
const std::vector< unsigned int > &  selectedClasses,
const std::vector< float > &  selectedScores,
float *  detectionBoxes,
float *  detectionScores,
float *  detectionClasses,
float *  numDetections 
)

Definition at line 102 of file DetectionPostProcess.cpp.

References numeric_cast().

Referenced by DetectionPostProcess().

113 {
114  for (unsigned int i = 0; i < numOutput; ++i)
115  {
116  unsigned int boxIndex = i * 4;
117  if (i < numSelected)
118  {
119  unsigned int boxCornorIndex = selectedBoxes[outputIndices[i]] * 4;
120  detectionScores[i] = selectedScores[outputIndices[i]];
121  detectionClasses[i] = armnn::numeric_cast<float>(selectedClasses[outputIndices[i]]);
122  detectionBoxes[boxIndex] = boxCorners[boxCornorIndex];
123  detectionBoxes[boxIndex + 1] = boxCorners[boxCornorIndex + 1];
124  detectionBoxes[boxIndex + 2] = boxCorners[boxCornorIndex + 2];
125  detectionBoxes[boxIndex + 3] = boxCorners[boxCornorIndex + 3];
126  }
127  else
128  {
129  detectionScores[i] = 0.0f;
130  detectionClasses[i] = 0.0f;
131  detectionBoxes[boxIndex] = 0.0f;
132  detectionBoxes[boxIndex + 1] = 0.0f;
133  detectionBoxes[boxIndex + 2] = 0.0f;
134  detectionBoxes[boxIndex + 3] = 0.0f;
135  }
136  }
137  numDetections[0] = armnn::numeric_cast<float>(numSelected);
138 }
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ AllTypesAreEqualImpl() [1/2]

bool armnn::AllTypesAreEqualImpl ( )

Definition at line 59 of file LayerSupportRules.hpp.

Referenced by AllTypesAreEqualImpl(), and TypesAreEqual::TypesAreEqual().

60 {
61  return true;
62 }

◆ AllTypesAreEqualImpl() [2/2]

bool armnn::AllTypesAreEqualImpl ( t1,
t2,
Rest...  rest 
)

Definition at line 65 of file LayerSupportRules.hpp.

References AllTypesAreEqualImpl().

66 {
67  static_assert(std::is_same<T, TensorInfo>::value, "Type T must be a TensorInfo");
68 
69  return (t1.GetDataType() == t2.GetDataType()) && AllTypesAreEqualImpl(t2, rest...);
70 }
bool AllTypesAreEqualImpl(T t1, T t2, Rest... rest)

◆ Append() [1/2]

void armnn::Append ( Optimizer::Optimizations optimizations,
T &&  optimization 
)

Definition at line 30 of file Optimizer.hpp.

Referenced by Append(), and MakeOptimizations().

31 {
32  optimizations.emplace_back(new T(optimization));
33 };

◆ Append() [2/2]

void armnn::Append ( Optimizer::Optimizations optimizations,
Front &&  front,
Others &&...  others 
)

Definition at line 36 of file Optimizer.hpp.

References Append().

37 {
38  Append<Front>(optimizations, std::forward<Front>(front));
39  Append<Others...>(optimizations, std::forward<Others>(others)...);
40 };
void Append(Optimizer::Optimizations &optimizations, Front &&front, Others &&... others)
Definition: Optimizer.hpp:36

◆ ApplyBackendOptimizations()

OptimizationResult armnn::ApplyBackendOptimizations ( OptimizedNetworkImpl optNetObjPtr,
BackendSettings backendSettings,
BackendsMap backends,
const ModelOptions modelOptions,
Optional< std::vector< std::string > &>  errMessages 
)

Definition at line 1121 of file Network.cpp.

References ARMNN_ASSERT, ARMNN_SCOPED_PROFILING_EVENT, AssignBackends(), CpuAcc, Layer::GetBackendId(), OptimizedNetworkImpl::GetGraph(), SubgraphView::GetIConnectableLayers(), Layer::GetType(), GpuAcc, Input, OptimizationResult::m_Error, BackendSettings::m_SelectedBackends, MakeOptimizations(), Output, Optimizer::Pass(), ReportWarning(), SubgraphViewSelector::SelectSubgraphs(), Graph::SubstituteSubgraph(), and Undefined.

Referenced by Optimize().

1126 {
1127  ARMNN_ASSERT(optNetObjPtr);
1128  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Optimizer_ApplyBackendOptimizations")
1129  OptimizationResult result;
1130 
1131  // Get the optimized graph
1132  Graph& optGraph = optNetObjPtr->GetGraph();
1133 
1134  // Run backend specific optimizations
1135  for (auto&& selectedBackend : backendSettings.m_SelectedBackends)
1136  {
1137  auto backendObjPtr = backends.find(selectedBackend)->second.get();
1138  ARMNN_ASSERT(backendObjPtr);
1139 
1140  if(selectedBackend == armnn::Compute::GpuAcc || selectedBackend == armnn::Compute::CpuAcc)
1141  {
1143  Optimizer::Pass(optGraph, MakeOptimizations(optimizations::FusePermuteIntoConstLayer()));
1144  }
1145 
1146  // Select sub-graphs based on backend
1147  SubgraphViewSelector::Subgraphs subgraphs =
1148  SubgraphViewSelector::SelectSubgraphs(optGraph,
1149  // Select layers assigned to the requested backend
1150  [&backendObjPtr](const Layer& layer)
1151  {
1152 
1153  return layer.GetType() != LayerType::Input &&
1154  layer.GetType() != LayerType::Output &&
1155  layer.GetBackendId() == backendObjPtr->GetId();
1156  });
1157  if (subgraphs.empty())
1158  {
1159  // No sub-graphs found, try with next selected backend
1160  continue;
1161  }
1162 
1163  // Try to optimize each sub-graph
1164  for (auto& subgraph : subgraphs)
1165  {
1166  // Try to optimize the current sub-graph
1167  ARMNN_SCOPED_PROFILING_EVENT(backendObjPtr->GetId(), "Optimizer_OptimizeSubgraph");
1168  OptimizationViews optimizationViews = backendObjPtr->OptimizeSubgraphView(*subgraph, modelOptions);
1169  ARMNN_ASSERT(optimizationViews.Validate(*subgraph));
1170 
1171  // Optimization attempted, check the resulting optimized sub-graph
1172  for (auto& substitution : optimizationViews.GetSubstitutions())
1173  {
1174  // Sub-graph optimized, substitute the sub-graph with the new optimized one in the main optimized graph
1175  SubgraphView& replacementSubgraph = substitution.m_ReplacementSubgraph;
1176  SubgraphView& substitutableSubgraph = substitution.m_SubstitutableSubgraph;
1177  optGraph.SubstituteSubgraph(substitutableSubgraph, replacementSubgraph);
1178 
1179  // Assign the current backend to the optimized sub-graph
1180  const SubgraphView::IConnectableLayers& subgraphLayers = replacementSubgraph.GetIConnectableLayers();
1181  std::for_each(subgraphLayers.begin(), subgraphLayers.end(), [&selectedBackend](IConnectableLayer* l)
1182  {
1183  ARMNN_ASSERT(l);
1184  PolymorphicDowncast<Layer*>(l)->SetBackendId(selectedBackend);
1185  });
1186  }
1187 
1188  if (!optimizationViews.GetFailedSubgraphs().empty())
1189  {
1190  std::stringstream warningMsg;
1191  warningMsg << "Some sub-graph(s) failed to optimized on " << backendObjPtr->GetId() << " backend.";
1192  ReportWarning(warningMsg.str(), errMessages);
1193 
1194  // Failed to optimize the given sub-graph, re-assign the sub-graph layers to other available backends
1195  BackendSettings settingsCopy(backendSettings);
1196  if (!backendObjPtr->GetId().IsCpuRef())
1197  {
1198  // Add the current backend to the list of backends to ignore
1199  settingsCopy.m_IgnoredBackends.insert(backendObjPtr->GetId());
1200  }
1201 
1202  int count=0;
1203  for (auto& failedSubgraph : optimizationViews.GetFailedSubgraphs())
1204  {
1205  // An error occurred: the optimization was attempted but not performed, try different backends
1206  std::stringstream subgraphMsg;
1207  subgraphMsg << "Re-assigning backends to " << failedSubgraph.GetIConnectableLayers().size()
1208  << " layers inside sub-graph " << count++;
1209  ReportWarning(subgraphMsg.str(), errMessages);
1210 
1211  OptimizationResult reassignmentResult = AssignBackends(optNetObjPtr,
1212  settingsCopy,
1213  *subgraph,
1214  errMessages);
1215  if (reassignmentResult.m_Error)
1216  {
1217  // Failed to re-assign one of the remaining backends to each layer of the sub-graph
1218  result.m_Error = true;
1219  return result;
1220  }
1221  }
1222  }
1223  }
1224  }
1225 
1226  return result;
1227 }
OptimizeForType< Layer, PermuteDepthwiseConv2dWeightsImpl > PermuteDepthwiseConv2dWeights
Optimizer::Optimizations MakeOptimizations(Args &&... args)
Definition: Optimizer.hpp:43
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
OptimizeForConnection< ConstantLayer, PermuteLayer, ConvertConstPermuteLayersToConstLayers > FusePermuteIntoConstLayer
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
GPU Execution: OpenCL: ArmCompute.
CPU Execution: NEON: ArmCompute.
void ReportWarning(const std::string &warningMessage, Optional< std::vector< std::string > &> warningMessages)
Definition: Network.cpp:543
OptimizationResult AssignBackends(OptimizedNetworkImpl *optNetObjPtr, BackendSettings &backendSettings, SubgraphView &subgraph, Optional< std::vector< std::string > &> errMessages)
Definition: Network.cpp:1088

◆ ArgMinMax() [1/3]

void ArgMinMax ( Decoder< float > &  in,
OUT *  out,
const TensorInfo inputTensorInfo,
const TensorInfo outputTensorInfo,
ArgMinMaxFunction  function,
int  axis 
)

Definition at line 16 of file ArgMinMax.cpp.

References Decoder< IType >::Get(), TensorInfo::GetNumDimensions(), armnnUtils::GetNumElementsBetween(), TensorInfo::GetShape(), armnnUtils::GetUnsignedAxis(), IgnoreUnused(), Max, Min, and numeric_cast().

18 {
19  IgnoreUnused(outputTensorInfo);
20 
21  unsigned int uAxis = armnnUtils::GetUnsignedAxis(inputTensorInfo.GetNumDimensions(), axis);
22 
23  const unsigned int outerElements = armnnUtils::GetNumElementsBetween(inputTensorInfo.GetShape(), 0, uAxis);
24  const unsigned int axisSize = inputTensorInfo.GetShape()[uAxis];
25  const unsigned int innerElements = armnnUtils::GetNumElementsBetween(inputTensorInfo.GetShape(),
26  uAxis + 1,
27  inputTensorInfo.GetNumDimensions());
28 
29  for (unsigned int outer = 0; outer < outerElements; ++outer) {
30  for (unsigned int inner = 0; inner < innerElements; ++inner) {
31  in[outer * axisSize * innerElements + inner];
32  auto tmpValue = in.Get();
33  unsigned int tmpIndex = 0;
34  for (unsigned int i = 1; i < axisSize; ++i) {
35  in[(outer * axisSize * innerElements) + (i * innerElements) + inner];
36  const auto& value = in.Get();
37  if ((function == armnn::ArgMinMaxFunction::Min && value < tmpValue) ||
38  (function == armnn::ArgMinMaxFunction::Max && value > tmpValue)) {
39  tmpValue = value;
40  tmpIndex = i;
41  }
42  }
43 
44  out[outer * innerElements + inner] = armnn::numeric_cast<OUT>(tmpIndex);
45  }
46  }
47 }
unsigned int GetNumElementsBetween(const armnn::TensorShape &shape, unsigned int firstAxisInclusive, unsigned int lastAxisExclusive)
void IgnoreUnused(Ts &&...)
virtual IType Get() const =0
unsigned int GetUnsignedAxis(const unsigned int inputDimension, const int axis)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ ArgMinMax() [2/3]

template void armnn::ArgMinMax ( Decoder< float > &  in,
int32_t *  out,
const TensorInfo inputTensorInfo,
const TensorInfo outputTensorInfo,
ArgMinMaxFunction  function,
int  axis 
)

◆ ArgMinMax() [3/3]

template void armnn::ArgMinMax ( Decoder< float > &  in,
int64_t *  out,
const TensorInfo inputTensorInfo,
const TensorInfo outputTensorInfo,
ArgMinMaxFunction  function,
int  axis 
)

◆ AssertNumberOfInputSlots()

void armnn::AssertNumberOfInputSlots ( Layer layer)

Definition at line 28 of file Layer.cpp.

References ARMNN_ASSERT, Convolution2d, DepthwiseConvolution2d, FullyConnected, Layer::GetNumInputSlots(), and Layer::GetType().

Referenced by InputSlot::Insert().

29 {
30  switch (layer.GetType())
31  {
32  case LayerType::Convolution2d:
33  case LayerType::DepthwiseConvolution2d:
35  {
36  ARMNN_ASSERT(layer.GetNumInputSlots() == 2 ||
37  layer.GetNumInputSlots() == 3);
38  break;
39  }
40  default:
41  {
42  ARMNN_ASSERT(layer.GetNumInputSlots() == 1);
43  break;
44  }
45  }
46 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
void FullyConnected(const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rWeightsShape, Decoder< float > &rWeightDecoder, Decoder< float > *pBiasDecoder, const bool biasEnabled, const unsigned int K, const bool transposeWeights)
Performs a matrix multiplication and optionally adds a bias.

◆ AssignBackends() [1/3]

OptimizationResult AssignBackends ( OptimizedNetworkImpl optNetObjPtr,
BackendSettings backendSettings,
Graph::Iterator firstLayer,
Graph::Iterator lastLayer,
Optional< std::vector< std::string > &>  errMessages 
)

Definition at line 1000 of file Network.cpp.

References ARMNN_SCOPED_PROFILING_EVENT, AssignBackendsIConnectable(), BackendSettings::GetAvailablePreferredBackends(), Input, OptimizationResult::m_Error, ReportError(), and Undefined.

Referenced by ApplyBackendOptimizations(), AssignBackends(), and Optimize().

1005 {
1006  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Optimizer_AssignBackends");
1007  OptimizationResult result;
1008 
1009  auto availablePreferredBackends = backendSettings.GetAvailablePreferredBackends();
1010  if (availablePreferredBackends.empty())
1011  {
1012  std::stringstream failureMsg;
1013  failureMsg << "No preferred backends are available";
1014  ReportError(failureMsg.str(), errMessages);
1015 
1016  result.m_Error = true;
1017  return result;
1018  }
1019 
1020  for (auto it = firstLayer; it != lastLayer; ++it)
1021  {
1022  AssignBackendsIConnectable(optNetObjPtr,
1023  *it,
1024  errMessages,
1025  result,
1026  backendSettings,
1027  availablePreferredBackends);
1028  }
1029 
1030  for (auto it = firstLayer; it != lastLayer; ++it)
1031  {
1032  auto layer = PolymorphicDowncast<Layer*>(*it);
1033 
1034  if(layer->GetType() == LayerType::Input)
1035  {
1036  BackendId connectedBackendId = layer->GetOutputSlot(0).GetConnection(0)->GetOwningLayer().GetBackendId();
1037  layer->SetBackendId(connectedBackendId);
1038  }
1039  }
1040 
1041  return result;
1042 }
void ReportError(const std::string &errorMessage, Optional< std::vector< std::string > &> errorMessages)
Definition: Network.cpp:531
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
void AssignBackendsIConnectable(OptimizedNetworkImpl *optNetObjPtr, IConnectableLayer *it, Optional< std::vector< std::string > &> errMessages, OptimizationResult &result, BackendSettings &backendSettings, std::vector< BackendId > &availablePreferredBackends)
Definition: Network.cpp:887

◆ AssignBackends() [2/3]

OptimizationResult AssignBackends ( OptimizedNetworkImpl optNetObjPtr,
BackendSettings backendSettings,
SubgraphView::IConnectableLayerIterator firstLayer,
SubgraphView::IConnectableLayerIterator lastLayer,
Optional< std::vector< std::string > &>  errMessages 
)

Definition at line 1044 of file Network.cpp.

References ARMNN_SCOPED_PROFILING_EVENT, AssignBackendsIConnectable(), BackendSettings::GetAvailablePreferredBackends(), Input, OptimizationResult::m_Error, ReportError(), and Undefined.

1049 {
1050  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Optimizer_AssignBackends");
1051  OptimizationResult result;
1052 
1053  auto availablePreferredBackends = backendSettings.GetAvailablePreferredBackends();
1054  if (availablePreferredBackends.empty())
1055  {
1056  std::stringstream failureMsg;
1057  failureMsg << "No preferred backends are available";
1058  ReportError(failureMsg.str(), errMessages);
1059 
1060  result.m_Error = true;
1061  return result;
1062  }
1063 
1064  for (auto it = firstLayer; it != lastLayer; ++it)
1065  {
1066  AssignBackendsIConnectable(optNetObjPtr,
1067  *it,
1068  errMessages,
1069  result,
1070  backendSettings,
1071  availablePreferredBackends);
1072  }
1073 
1074  for (auto it = firstLayer; it != lastLayer; ++it)
1075  {
1076  auto layer = PolymorphicDowncast<Layer*>(*it);
1077 
1078  if(layer->GetType() == LayerType::Input)
1079  {
1080  BackendId connectedBackendId = layer->GetOutputSlot(0).GetConnection(0)->GetOwningLayer().GetBackendId();
1081  layer->SetBackendId(connectedBackendId);
1082  }
1083  }
1084 
1085  return result;
1086 }
void ReportError(const std::string &errorMessage, Optional< std::vector< std::string > &> errorMessages)
Definition: Network.cpp:531
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
void AssignBackendsIConnectable(OptimizedNetworkImpl *optNetObjPtr, IConnectableLayer *it, Optional< std::vector< std::string > &> errMessages, OptimizationResult &result, BackendSettings &backendSettings, std::vector< BackendId > &availablePreferredBackends)
Definition: Network.cpp:887

◆ AssignBackends() [3/3]

OptimizationResult armnn::AssignBackends ( OptimizedNetworkImpl optNetObjPtr,
BackendSettings backendSettings,
SubgraphView subgraph,
Optional< std::vector< std::string > &>  errMessages 
)

Definition at line 1088 of file Network.cpp.

References AssignBackends(), SubgraphView::beginIConnectable(), and SubgraphView::endIConnectable().

1092 {
1093  SubgraphView::IConnectableLayerIterator firstLayer = subgraph.beginIConnectable();
1094  SubgraphView::IConnectableLayerIterator lastLayer = subgraph.endIConnectable();
1095  return AssignBackends(optNetObjPtr,
1096  backendSettings,
1097  firstLayer,
1098  lastLayer,
1099  errMessages);
1100 }
OptimizationResult AssignBackends(OptimizedNetworkImpl *optNetObjPtr, BackendSettings &backendSettings, SubgraphView &subgraph, Optional< std::vector< std::string > &> errMessages)
Definition: Network.cpp:1088

◆ AssignBackendsIConnectable()

void armnn::AssignBackendsIConnectable ( OptimizedNetworkImpl optNetObjPtr,
IConnectableLayer it,
Optional< std::vector< std::string > &>  errMessages,
OptimizationResult result,
BackendSettings backendSettings,
std::vector< BackendId > &  availablePreferredBackends 
)

Definition at line 887 of file Network.cpp.

References ARMNN_ASSERT_MSG, AttemptBackendAssignment(), CheckScaleSetOnQuantizedType(), Constant, CpuRef, Float32, OptimizedNetworkImpl::GetGraph(), Input, BackendSettings::IsBackendSupported(), BackendSettings::IsCpuRefUsed(), OptimizationResult::IsError(), OptimizationResult::IsOk(), OptimizationResult::IsWarningOnly(), OptimizationResult::m_Error, BackendSettings::m_SelectedBackends, MemCopy, Permute, and ReturnWithError().

Referenced by AssignBackends().

893 {
894  auto ReturnError = [&](const Layer* layer)
895  {
896  return ReturnWithError(result, layer, backendSettings, errMessages);
897  };
898 
899  auto layer = PolymorphicDowncast<Layer*>(it);
900 
901  if (layer->GetType() == LayerType::Input)
902  {
903  return;
904  }
905 
906  DataType dataTypeIn = layer->GetNumInputSlots() == 0 ? DataType::Float32 :
907  layer->GetInputSlot(0).GetConnectedOutputSlot()->GetTensorInfo().GetDataType();
908  DataType dataTypeOut = layer->GetNumOutputSlots() == 0 ? DataType::Float32 :
909  layer->GetOutputSlot(0).GetTensorInfo().GetDataType();
910 
911  std::string reasonIfUnsupported;
912  bool found = false;
913  if (!CheckScaleSetOnQuantizedType(layer, errMessages))
914  {
915  // don't bomb immediately, find all the quantized outputs
916  // which haven't had a scale set and report them all back.
917  result.m_Error = true;
918  }
919 
920  // First try assign layer to hint backend
921  if (layer->GetBackendHint().has_value() &&
922  backendSettings.IsBackendSupported(layer->GetBackendHint().value()) &&
923  AttemptBackendAssignment(backendSettings,
924  optNetObjPtr->GetGraph(),
925  layer,
926  layer->GetBackendHint().value(),
927  dataTypeIn,
928  dataTypeOut,
929  availablePreferredBackends,
930  reasonIfUnsupported,
931  errMessages).IsOk())
932  {
933  found = true;
934  backendSettings.m_SelectedBackends.insert(layer->GetBackendHint().value());
935  }
936  else
937  {
938  // Try assign layer to prefered list of backends
939  for (const auto& backend : availablePreferredBackends)
940  {
941  if (layer->GetBackendHint().has_value() &&
942  layer->GetBackendHint().value() == backend)
943  {
944  continue; //Don't re-test the backend hint
945  }
946 
947  OptimizationResult res = AttemptBackendAssignment(backendSettings,
948  optNetObjPtr->GetGraph(),
949  layer,
950  backend,
951  dataTypeIn,
952  dataTypeOut,
953  availablePreferredBackends,
954  reasonIfUnsupported,
955  errMessages);
956 
957  if (res.IsOk())
958  {
959  found = true;
960  backendSettings.m_SelectedBackends.insert(backend);
961  break;
962  }
963  else if (res.IsError())
964  {
965  result = res; // Cannot continue.
966  // Note: we don't need to log the error as it would already
967  // be logged in AttemptBackendAssignment().
968  }
969  else
970  {
971  ARMNN_ASSERT_MSG(res.IsWarningOnly(), "OptimizationResult in unexpected state.");
972  }
973  }
974  }
975 
976  // If the layer is unsupported by any devices, log and return a null network.
977  if (!found)
978  {
979  // NOTE: if the layer is not an operation queue type AND we have not got CpuRef as a
980  // fallback we should set the compute device on the layer to CpuRef (these are not
981  // available as accelerated operations, or are only available under certain
982  // conditions, currently they comprise MemCopy, Constant, Permute)
983  armnn::LayerType layerType = layer->GetType();
984  if (!backendSettings.IsCpuRefUsed() && (layerType == armnn::LayerType::MemCopy ||
985  layerType == armnn::LayerType::Constant ||
986  layerType == armnn::LayerType::Permute))
987  {
988  BackendId cpuBackendId(armnn::Compute::CpuRef);
989  layer->SetBackendId(cpuBackendId);
990  backendSettings.m_SelectedBackends.insert(cpuBackendId);
991  }
992  else
993  {
994  result = ReturnError(layer);
995  }
996  }
997 
998 }
CPU Execution: Reference C++ kernels.
OptimizationResult ReturnWithError(OptimizationResult res, const Layer *layer, const BackendSettings &backendSettings, Optional< std::vector< std::string > &> errMessages)
Definition: Network.cpp:555
DataType
Definition: Types.hpp:48
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
bool CheckScaleSetOnQuantizedType(Layer *layer, Optional< std::vector< std::string > &> errMessages)
Definition: Network.cpp:570
OptimizationResult AttemptBackendAssignment(BackendSettings &backendSettings, Graph &graph, Layer *layer, BackendId backend, DataType dataTypeIn, DataType dataTypeOut, const std::vector< BackendId > &availablePreferredBackends, std::string &reasonIfUnsupported, Optional< std::vector< std::string > &> errMessages)
Definition: Network.cpp:631
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ AssignSplitId()

void armnn::AssignSplitId ( LayerSelectionInfo::LayerInfoContainer &  layerInfos,
LayerSelectionInfo &  layerInfo 
)

Definition at line 309 of file SubgraphViewSelector.cpp.

References ForEachLayerInput().

Referenced by SubgraphViewSelector::SelectSubgraphs().

310 {
311  // Check each input to see if we can attach ourselves to any of the subgraphs that have already been assigned.
312  ForEachLayerInput(layerInfos, layerInfo, [&](LayerSelectionInfo& parentInfo)
313  {
314  // We can only attach ourselves to the subgraph from this input if there isn't a cut here.
315  if (layerInfo.m_IsSelected == parentInfo.m_IsSelected)
316  {
317  // We also need to check that merging into this subgraph won't cause a dependency cycle between subgraphs.
318  // This will be the case if the subgraph that we will become part of is already a dependency
319  // of one of the subgraphs that are input to this layer, e.g:
320  //
321  // 0 | The numbers (0, 1) are the subgraph IDs of each layer and we are looking at layer X.
322  // / \ |
323  // 1 0 | We can't merge X into subgraph 0, because the left-hand input already depends on subgraph 0.
324  // \ / | We can however merge X into subgraph 1.
325  // X |
326  //
327  bool dependenciesOk = true;
328  ForEachLayerInput(layerInfos, layerInfo, [&](LayerSelectionInfo& otherParentInfo)
329  {
330  // We call HasAntecedent() ~ n^2 times, where n is the number of inputs to this layer.
331  // Hence it is important that this is efficient - see PartialSubgraph class description.
332  if (otherParentInfo.m_Subgraph->HasAntecedent(parentInfo.m_Subgraph.get()))
333  {
334  dependenciesOk = false;
335  }
336  });
337 
338  if (dependenciesOk)
339  {
340  // Merge into the subgraph of this input. If we have already been merged into another subgraph
341  // (from another input of this layer), then merge both of them together.
342  if (layerInfo.m_Subgraph == nullptr)
343  {
344  layerInfo.m_Subgraph = parentInfo.m_Subgraph;
345  }
346  else
347  {
348  // We call MergeWith() ~ n times, where n is the number of inputs to this layer.
349  // Therefore it does not need to be as performant as HasAntecedent().
350  layerInfo.m_Subgraph->MergeWith(parentInfo.m_Subgraph.get());
351  }
352  }
353  }
354  });
355 
356  // If we weren't able to merge into an existing subgraph then we need to make a new one
357  if (layerInfo.m_Subgraph == nullptr)
358  {
359  layerInfo.m_Subgraph = std::make_shared<PartialSubgraph>();
360  }
361 
362  // Record dependencies of the chosen subgraph based on the inputs of this layer.
363  ForEachLayerInput(layerInfos, layerInfo, [&](LayerSelectionInfo& parentInfo)
364  {
365  // These functions are called ~n times, where n is the number of inputs to this layer.
366  // Therefore it does not need to be as performant as HasAntecedent().
367  if (!layerInfo.m_Subgraph->IsMergedWith(parentInfo.m_Subgraph.get()))
368  {
369  layerInfo.m_Subgraph->AddDirectAntecedent(parentInfo.m_Subgraph.get());
370  }
371  });
372 }
void ForEachLayerInput(LayerSelectionInfo::LayerInfoContainer &layerInfos, LayerSelectionInfo &layerInfo, Delegate function)

◆ AttemptBackendAssignment()

OptimizationResult armnn::AttemptBackendAssignment ( BackendSettings backendSettings,
Graph graph,
Layer layer,
BackendId  backend,
DataType  dataTypeIn,
DataType  dataTypeOut,
const std::vector< BackendId > &  availablePreferredBackends,
std::string &  reasonIfUnsupported,
Optional< std::vector< std::string > &>  errMessages 
)

Definition at line 631 of file Network.cpp.

References BFloat16, Constant, ConvertBf16ToFp32, FloatingPointConverter::ConvertFloat16To32(), ConvertFp16ToFp32, ConvertFp32ToBf16, ConvertFp32ToFp16, Convolution2d, Float16, Float32, FullyConnected, BackendId::Get(), Layer::GetBackendId(), GetDataTypeName(), Layer::GetInputSlots(), GetLayerTypeAsCString(), Layer::GetOutputSlot(), Layer::GetType(), info, InsertConvertBf16ToFp32LayersBefore(), InsertConvertFp16ToFp32LayersBefore(), InsertConvertFp32ToBf16LayersAfter(), InsertConvertFp32ToFp16LayersAfter(), IWorkloadFactory::IsLayerSupported(), ConstantLayer::m_LayerOutput, ReportWarning(), ReturnWithError(), RevertConstantWeightsToFP32(), Layer::SetBackendId(), and OutputSlot::SetTensorInfo().

Referenced by AssignBackendsIConnectable().

640 {
641  OptimizationResult result;
642 
643  // Helper lambda to compose meaningful error message before returning with error
644  auto ReturnError = [&](const Layer* layer)
645  {
646  return ReturnWithError(result, layer, backendSettings, errMessages);
647  };
648 
649  // need to set the compute device on the layer
650  // before we can check if it is supported
651  layer->SetBackendId(backend);
652  if (!IWorkloadFactory::IsLayerSupported(*layer, EmptyOptional(), reasonIfUnsupported))
653  {
654  if (dataTypeIn == DataType::Float16 || dataTypeOut == DataType::Float16)
655  {
656  if (IWorkloadFactory::IsLayerSupported(*layer, DataType::Float32, reasonIfUnsupported)
657  && layer->GetType() != LayerType::ConvertFp32ToFp16
658  && layer->GetType() != LayerType::ConvertFp16ToFp32)
659  {
660  auto ConstantLayerFromFp16ToFp32 = [](Layer& layer)
661  {
662  if (layer.GetType() == LayerType::Constant)
663  {
664  ConstantLayer* constantLayer = PolymorphicDowncast<ConstantLayer*>(&layer);
665 
666  auto& info = constantLayer->m_LayerOutput->GetTensorInfo();
667 
668  if (info.GetDataType() == DataType::Float16)
669  {
670  std::vector<float> newValues(info.GetNumElements());
671 
673  constantLayer->m_LayerOutput->GetConstTensor<Half>(),
674  info.GetNumElements(),
675  newValues.data());
676 
677  TensorInfo newInfo(info);
678  newInfo.SetDataType(DataType::Float32);
679  ConstTensor newInput(newInfo, newValues);
680  constantLayer->m_LayerOutput.reset(new ScopedTensorHandle(newInput));
681 
682  layer.GetOutputSlot(0).SetTensorInfo(newInfo);
683  }
684  }
685  };
686 
687  bool checkType = false;
688 
689  for (auto inputSlot : layer->GetInputSlots())
690  {
691  auto connectedOutputSlot = inputSlot.GetConnectedOutputSlot();
692  if (connectedOutputSlot->GetOwningLayer().GetType() == LayerType::Constant)
693  {
694  if (connectedOutputSlot->GetNumConnections() == 1)
695  {
696  checkType = true;
697  ConstantLayerFromFp16ToFp32(connectedOutputSlot->GetOwningLayer());
698  }
699  }
700  }
701 
702  // Insert FP16 -> FP32 conversion layer before current layer
703  std::vector<ConvertFp16ToFp32Layer*> convertFp16ToFp32Layers;
704  if (dataTypeIn == DataType::Float16)
705  {
706  convertFp16ToFp32Layers =
707  InsertConvertFp16ToFp32LayersBefore(graph, *layer, checkType);
708  }
709 
710  // Insert FP32 -> FP16 conversion layer after current layer
711  std::vector<ConvertFp32ToFp16Layer*> convertFp32ToFp16Layers;
712  if (dataTypeOut == DataType::Float16)
713  {
714  convertFp32ToFp16Layers =
715  InsertConvertFp32ToFp16LayersAfter(graph, *layer);
716  }
717 
718  // Assign a supported backend to the newly introduced conversion layers
719  auto AssignFirstSupportedBackend = [&](Layer* layer, BackendId preferredBackend)
720  {
721  bool supportedBackendFound = false;
722  std::string reasonIfUnsupported;
723 
724  // Try preferred backend first
725  layer->SetBackendId(preferredBackend);
727  EmptyOptional(),
728  reasonIfUnsupported))
729  {
730  supportedBackendFound = true;
731  }
732  else
733  {
734  for (const auto& backend : availablePreferredBackends)
735  {
736  // Skip preferred backend (we already determined that it is not supported)
737  if (backend == preferredBackend)
738  {
739  continue;
740  }
741 
742  layer->SetBackendId(backend);
744  EmptyOptional(),
745  reasonIfUnsupported))
746  {
747  supportedBackendFound = true;
748  break;
749  }
750  }
751  }
752 
753  return supportedBackendFound;
754  };
755 
756  for (ConvertFp16ToFp32Layer* convertLayer : convertFp16ToFp32Layers)
757  {
758  if (!AssignFirstSupportedBackend(convertLayer, backend))
759  {
760  return ReturnError(convertLayer);
761  }
762  }
763 
764  for (ConvertFp32ToFp16Layer* convertLayer : convertFp32ToFp16Layers)
765  {
766  if (!AssignFirstSupportedBackend(convertLayer, backend))
767  {
768  return ReturnError(convertLayer);
769  }
770  }
771 
772  return result;
773  }
774  }
775  else if (dataTypeIn == DataType::BFloat16 || dataTypeOut == DataType::BFloat16)
776  {
777  const auto layerType = layer->GetType();
778  if (IWorkloadFactory::IsLayerSupported(*layer, DataType::Float32, reasonIfUnsupported)
779  && layerType != LayerType::ConvertFp32ToBf16
780  && layerType != LayerType::ConvertBf16ToFp32)
781  {
782  bool revertConstantWeightsConversion = RevertConstantWeightsToFP32(layer);
783 
784  // Insert BF16 -> FP32 conversion layer before current layer.
785  // Unless we have reverted Constant Weights Type above.
786  std::vector<ConvertBf16ToFp32Layer*> convertBf16ToFp32Layers;
787  if (dataTypeIn == DataType::BFloat16 && dataTypeOut != DataType::BFloat16
788  && !revertConstantWeightsConversion)
789  {
790  convertBf16ToFp32Layers =
792  if (layer->GetType() == LayerType::Convolution2d)
793  {
794  ConvertBf16ToFp32Weight<Convolution2dLayer>(layer);
795  }
796  else if (layer->GetType() == LayerType::FullyConnected)
797  {
798  ConvertBf16ToFp32Weight<FullyConnectedLayer>(layer);
799  }
800  }
801 
802  // Insert FP32 -> BF16 conversion layer after current layer
803  std::vector<ConvertFp32ToBf16Layer*> convertFp32ToBf16Layers;
804  if (dataTypeOut == DataType::BFloat16)
805  {
806  convertFp32ToBf16Layers =
807  InsertConvertFp32ToBf16LayersAfter(graph, *layer);
808  }
809 
810  // Assign a supported backend to the newly introduced conversion layers
811  auto AssignFirstSupportedBackend = [&](Layer* layer, BackendId preferredBackend)
812  {
813  bool supportedBackendFound = false;
814  std::string reasonIfUnsupported;
815 
816  // Try preferred backend first
817  layer->SetBackendId(preferredBackend);
819  EmptyOptional(),
820  reasonIfUnsupported))
821  {
822  supportedBackendFound = true;
823  }
824  else
825  {
826  for (const auto& backend : availablePreferredBackends)
827  {
828  // Skip preferred backend (we already determined that it is not supported)
829  if (backend == preferredBackend)
830  {
831  continue;
832  }
833 
834  layer->SetBackendId(backend);
836  EmptyOptional(),
837  reasonIfUnsupported))
838  {
839  supportedBackendFound = true;
840  break;
841  }
842  }
843  }
844 
845  return supportedBackendFound;
846  };
847 
848  for (ConvertBf16ToFp32Layer* convertLayer : convertBf16ToFp32Layers)
849  {
850  if (!AssignFirstSupportedBackend(convertLayer, backend))
851  {
852  return ReturnError(convertLayer);
853  }
854  }
855 
856  for (ConvertFp32ToBf16Layer* convertLayer : convertFp32ToBf16Layers)
857  {
858  if (!AssignFirstSupportedBackend(convertLayer, backend))
859  {
860  return ReturnError(convertLayer);
861  }
862  }
863 
864  return result;
865  }
866  }
867 
868  std::stringstream warningMsg;
869  warningMsg << "Layer of type " << GetLayerTypeAsCString(layer->GetType())
870  << " is not supported on requested backend " << layer->GetBackendId().Get()
871  << " for input data type " << GetDataTypeName(dataTypeIn)
872  << " and output data type " << GetDataTypeName(dataTypeOut)
873  << " (reason: " << reasonIfUnsupported
874  << "), falling back to the next backend.";
875  ReportWarning(warningMsg.str(), errMessages);
876 
877  return OptimizationResult(true, false);
878  }
879  else
880  {
881  return result;
882  }
883 }
bool IsLayerSupported(const armnn::Layer *layer)
Definition: MockBackend.cpp:60
std::vector< ConvertFp32ToFp16Layer * > InsertConvertFp32ToFp16LayersAfter(Graph &graph, Layer &layer)
std::vector< ConvertFp16ToFp32Layer * > InsertConvertFp16ToFp32LayersBefore(Graph &graph, Layer &layer, bool expectCorrectInputType)
OptimizationResult ReturnWithError(OptimizationResult res, const Layer *layer, const BackendSettings &backendSettings, Optional< std::vector< std::string > &> errMessages)
Definition: Network.cpp:555
constexpr const char * GetDataTypeName(DataType dataType)
Definition: TypesUtils.hpp:202
half_float::half Half
Definition: Half.hpp:22
bool RevertConstantWeightsToFP32(Layer *layer)
std::vector< ConvertBf16ToFp32Layer * > InsertConvertBf16ToFp32LayersBefore(Graph &graph, Layer &layer, bool expectCorrectInputType)
static void ConvertFloat16To32(const void *srcFloat16Buffer, size_t numElements, float *dstFloat32Buffer)
std::vector< ConvertFp32ToBf16Layer * > InsertConvertFp32ToBf16LayersAfter(Graph &graph, Layer &layer)
void ReportWarning(const std::string &warningMessage, Optional< std::vector< std::string > &> warningMessages)
Definition: Network.cpp:543
const char * GetLayerTypeAsCString(LayerType type)
void FullyConnected(const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rWeightsShape, Decoder< float > &rWeightDecoder, Decoder< float > *pBiasDecoder, const bool biasEnabled, const unsigned int K, const bool transposeWeights)
Performs a matrix multiplication and optionally adds a bias.

◆ BackendRegistryInstance()

◆ BatchNormImpl()

void BatchNormImpl ( const BatchNormalizationQueueDescriptor data,
Decoder< float > &  meanDecoder,
Decoder< float > &  varianceDecoder,
Decoder< float > &  betaDecoder,
Decoder< float > &  gammaDecoder,
Decoder< float > &  inputDecoder,
Encoder< float > &  outputEncoder 
)

Definition at line 18 of file BatchNormImpl.cpp.

References Decoder< IType >::Get(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetHeightIndex(), DataLayoutIndexed::GetIndex(), TensorInfo::GetShape(), GetTensorInfo(), DataLayoutIndexed::GetWidthIndex(), BatchNormalizationDescriptor::m_DataLayout, BatchNormalizationDescriptor::m_Eps, QueueDescriptor::m_Inputs, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, and Encoder< IType >::Set().

Referenced by RefBatchNormalizationWorkload::ExecuteAsync().

25 {
26  const TensorInfo& inputInfo = GetTensorInfo(data.m_Inputs[0]);
27  const TensorShape inputShape = inputInfo.GetShape();
28 
29  armnnUtils::DataLayoutIndexed dataLayout(data.m_Parameters.m_DataLayout);
30 
31  unsigned int inputBatches = inputShape[0];
32  unsigned int inputHeight = inputShape[dataLayout.GetHeightIndex()];
33  unsigned int inputWidth = inputShape[dataLayout.GetWidthIndex()];
34  unsigned int inputChannels = inputShape[dataLayout.GetChannelsIndex()];
35 
36  for (unsigned int c = 0; c < inputChannels; c++)
37  {
38  meanDecoder[c];
39  varianceDecoder[c];
40  betaDecoder[c];
41  gammaDecoder[c];
42  float mean = meanDecoder.Get();
43  float var = varianceDecoder.Get();
44  float beta = betaDecoder.Get();
45  float gamma = gammaDecoder.Get();
46 
47  float mult = gamma / sqrtf(var + data.m_Parameters.m_Eps);
48  float add = beta - mult * mean;
49 
50  for (unsigned int n = 0; n < inputBatches; n++)
51  {
52  for (unsigned int h = 0; h < inputHeight; h++)
53  {
54  for (unsigned int w = 0; w < inputWidth; w++)
55  {
56  unsigned int index = dataLayout.GetIndex(inputShape, n, c, h, w);
57  inputDecoder[index];
58  outputEncoder[index];
59  outputEncoder.Set(mult * inputDecoder.Get() + add);
60  }
61  }
62  }
63  }
64 }
virtual void Set(IType right)=0
virtual IType Get() const =0
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
armnn::TensorInfo GetTensorInfo(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout, const armnn::DataType dataType)
Definition: TensorUtils.cpp:38

◆ BatchToSpaceNd()

void BatchToSpaceNd ( const DataLayoutIndexed dataLayout,
const TensorInfo inputTensorInfo,
const TensorInfo outputTensorInfo,
const std::vector< unsigned int > &  blockShape,
const std::vector< std::pair< unsigned int, unsigned int >> &  cropsData,
Decoder< float > &  inputDecoder,
Encoder< float > &  outputEncoder 
)

Definition at line 35 of file BatchToSpaceNd.cpp.

References ARMNN_ASSERT_MSG, BatchToSpaceNd(), Decoder< IType >::Get(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetHeightIndex(), TensorShape::GetNumDimensions(), TensorInfo::GetShape(), DataLayoutIndexed::GetWidthIndex(), Offset(), and Encoder< IType >::Set().

Referenced by BatchToSpaceNd(), and BatchToSpaceNdLayer::BatchToSpaceNdLayer().

42 {
43  TensorShape inputShape = inputTensorInfo.GetShape();
44 
45  ARMNN_ASSERT_MSG(inputShape.GetNumDimensions() == 4, "Expected Input with 4 Dimensions");
46 
47  TensorShape outputShape = outputTensorInfo.GetShape();
48 
49  ARMNN_ASSERT_MSG(outputShape.GetNumDimensions() == 4, "Expected Output with 4 Dimensions");
50 
51  const unsigned int inputBatchSize = inputShape[0];
52  const unsigned int channels = inputShape[dataLayout.GetChannelsIndex()];
53 
54  const unsigned int outputBatchSize = outputShape[0];
55  const unsigned int outputHeight = outputShape[dataLayout.GetHeightIndex()];
56  const unsigned int outputWidth = outputShape[dataLayout.GetWidthIndex()];
57 
58  ARMNN_ASSERT_MSG(blockShape.size() > 0, "BlockShape must contain 1 or more entries");
59 
60  const unsigned int blockShapeHeight = blockShape[0];
61  const unsigned int blockShapeWidth = blockShape[1];
62 
63  ARMNN_ASSERT_MSG(cropsData.size() > 0, "Crops must contain 1 or more entries");
64 
65  const unsigned int cropsTop = cropsData[0].first;
66  const unsigned int cropsLeft = cropsData[1].first;
67 
68  for (unsigned int inBatch = 0; inBatch < inputBatchSize; ++inBatch)
69  {
70  const unsigned int outBatch = inBatch % outputBatchSize;
71  const unsigned int spatialOffset = inBatch / outputBatchSize;
72 
73  for (unsigned int inH = 0; inH < inputTensorInfo.GetShape()[dataLayout.GetHeightIndex()]; ++inH) {
74  const unsigned int outH = inH * blockShapeHeight + spatialOffset / blockShapeWidth - cropsTop;
75 
76  if (outH >= outputHeight)
77  {
78  continue;
79  }
80 
81  for (unsigned int inW = 0; inW < inputTensorInfo.GetShape()[dataLayout.GetWidthIndex()]; ++inW) {
82  const unsigned int outW = inW * blockShapeWidth + spatialOffset % blockShapeWidth - cropsLeft;
83 
84  if (outW >= outputWidth)
85  {
86  continue;
87  }
88 
89  for (unsigned int c = 0; c < channels; c++)
90  {
91  unsigned int outOffset = Offset(outputShape, outBatch, outH, outW, c, dataLayout);
92  unsigned int inOffset = Offset(inputShape, inBatch, inH, inW, c, dataLayout);
93 
94  outputEncoder[outOffset];
95  inputDecoder[inOffset];
96  outputEncoder.Set(inputDecoder.Get());
97  }
98  }
99  }
100  }
101 }
unsigned int GetWidthIndex() const
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
unsigned int Offset(const TensorShape &shape, unsigned int batch, unsigned int height, unsigned int width, unsigned int channels, const DataLayoutIndexed &dataLayout)
virtual void Set(IType right)=0
unsigned int GetHeightIndex() const
virtual IType Get() const =0
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
unsigned int GetNumDimensions() const
Function that returns the tensor rank.
Definition: Tensor.cpp:174
unsigned int GetChannelsIndex() const

◆ CalcLevel()

int armnn::CalcLevel ( const Event eventPtr)

Definition at line 246 of file Profiling.cpp.

References Event::GetParentEvent().

Referenced by ProfilerImpl::AnalyzeEventsAndWriteResults(), and ProfilerImpl::PopulateParent().

247 {
248  int level = 0;
249  while (eventPtr != nullptr)
250  {
251  eventPtr = eventPtr->GetParentEvent();
252  level++;
253  }
254  return level;
255 }

◆ CalculateEdgeStrategy()

EdgeStrategy armnn::CalculateEdgeStrategy ( BackendsMap backends,
ITensorHandleFactory::FactoryId  srcFactoryId,
const Layer layer,
const Layer connectedLayer,
TensorHandleFactoryRegistry registry,
bool  importEnabled 
)

Definition at line 1494 of file Network.cpp.

References ARMNN_ASSERT_MSG, CopyToTarget, DirectCompatibility, ExportToTarget, FallbackImportDisabled, Layer::GetBackendId(), ITensorHandleFactory::GetCapabilities(), ITensorHandleFactory::GetExportFlags(), TensorHandleFactoryRegistry::GetFactory(), ITensorHandleFactory::GetImportFlags(), Layer::GetType(), ITensorHandleFactory::LegacyFactoryId, Output, PaddingRequired, ITensorHandleFactory::SupportsMapUnmap(), and Undefined.

Referenced by SelectTensorHandleStrategy().

1500 {
1501  auto toBackend = backends.find(connectedLayer.GetBackendId());
1502  ARMNN_ASSERT_MSG(toBackend != backends.end(), "Backend id not found for the connected layer");
1503 
1504  auto dstPrefs = toBackend->second.get()->GetHandleFactoryPreferences();
1505 
1506  // Legacy API check for backward compatibility
1507  if (srcFactoryId == ITensorHandleFactory::LegacyFactoryId || dstPrefs.empty())
1508  {
1509  if (layer.GetBackendId() != connectedLayer.GetBackendId())
1510  {
1511  return EdgeStrategy::CopyToTarget;
1512  }
1513  else
1514  {
1515  return EdgeStrategy::DirectCompatibility;
1516  }
1517  }
1518 
1519  // TensorHandleFactory API present, so perform more sophisticated strategies.
1520  // Dst Output layers don't require copy because they use import or map/unmap
1521  if (connectedLayer.GetType() == LayerType::Output)
1522  {
1523  return EdgeStrategy::DirectCompatibility;
1524  }
1525 
1526  // Search for direct match in prefs
1527  for (auto&& pref : dstPrefs)
1528  {
1529  if (pref == srcFactoryId)
1530  {
1531  return EdgeStrategy::DirectCompatibility;
1532  }
1533  }
1534 
1535  // Search for export/import options
1536  ITensorHandleFactory* srcFactory = registry.GetFactory(srcFactoryId);
1537  if (srcFactory->GetExportFlags() != 0 && importEnabled)
1538  {
1539  for (auto&& pref : dstPrefs)
1540  {
1541  ITensorHandleFactory* dstFactory = registry.GetFactory(pref);
1542 
1543  // Handles cases when a destPref is not listed in TensorHandleFactoryRegistry
1544  if (!dstFactory) {
1545  continue;
1546  }
1547  if ((dstFactory->GetImportFlags() & srcFactory->GetExportFlags()) != 0)
1548  {
1549  auto srcCapability = srcFactory->GetCapabilities(&layer, &layer, CapabilityClass::PaddingRequired);
1550  auto dstCapability = dstFactory->GetCapabilities(&connectedLayer,
1551  &connectedLayer,
1552  CapabilityClass::PaddingRequired);
1553  auto srcFallback = srcFactory->GetCapabilities(&layer, &layer, CapabilityClass::FallbackImportDisabled);
1554  auto dstFallback = dstFactory->GetCapabilities(&connectedLayer,
1555  &connectedLayer,
1556  CapabilityClass::FallbackImportDisabled);
1557  // Do not require memory copy if the source and destination do not require padding.
1558  if (srcCapability.empty() && dstCapability.empty() && srcFallback.empty() && dstFallback.empty())
1559  {
1560  return EdgeStrategy::ExportToTarget;
1561  }
1562  }
1563  }
1564  }
1565 
1566  // Search for copy options via map/unmap
1567  if (srcFactory->SupportsMapUnmap())
1568  {
1569  for (auto&& pref : dstPrefs)
1570  {
1571  ITensorHandleFactory* dstFactory = registry.GetFactory(pref);
1572  if (dstFactory && dstFactory->SupportsMapUnmap())
1573  {
1574  return EdgeStrategy::CopyToTarget;
1575  }
1576  }
1577  }
1578 
1579  return EdgeStrategy::Undefined;
1580 }
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15

◆ CalculateGatherNdKeyIndices()

std::map< std::string, unsigned int > CalculateGatherNdKeyIndices ( TensorInfo  inputInfo0,
TensorInfo  inputInfo1 
)

Calculates the key index values needed for GatherNd: N, ND, K, W, C (N is always 1)

Parameters
inputInfo0- TensorInfo of the corresponding input tensor: params
inputInfo1- TensorInfo of the corresponding input tensor: indices
Returns
- A map with names and values for N, ND, K, W, C

Definition at line 300 of file WorkloadUtils.cpp.

References TensorInfo::GetNumDimensions(), and TensorInfo::GetShape().

Referenced by ClGatherNdWorkload::ClGatherNdWorkload(), ClGatherNdWorkloadValidate(), RefGatherNdWorkload::ExecuteAsync(), GatherTensorHandlePairs(), NeonGatherNdWorkload::NeonGatherNdWorkload(), and NeonGatherNdWorkloadValidate().

301 {
302  std::vector<unsigned int> paramsShape;
303  for (unsigned int i = 0; i < inputInfo0.GetNumDimensions(); ++i)
304  {
305  paramsShape.push_back(inputInfo0.GetShape()[i]);
306  }
307 
308  std::vector<unsigned int> indicesShape;
309  for (unsigned int i = 0; i < inputInfo1.GetNumDimensions(); ++i)
310  {
311  indicesShape.push_back(inputInfo1.GetShape()[i]);
312  }
313 
314  std::map<std::string, unsigned int> keyIndices;
315 
316  // N: number of batches
317  keyIndices["N"] = 1;
318 
319  // ND: number of dimensions that are sliced from params
320  keyIndices["ND"] = indicesShape.back();
321 
322  // W: number of indices in each batch (all but the last dimension)
323  keyIndices["W"] =
324  static_cast<unsigned int>(std::accumulate(std::begin(indicesShape),
325  std::end(indicesShape) - 1,
326  1,
327  std::multiplies<>() ));
328  // K: range of each index
329  keyIndices["K"] =
330  static_cast<unsigned int>(std::accumulate(std::begin(paramsShape),
331  std::begin(paramsShape) + static_cast<int>(keyIndices["ND"]),
332  1,
333  std::multiplies<>() ));
334  // C: number of channels for each index
335  keyIndices["C"] =
336  static_cast<unsigned int>(std::accumulate(std::begin(paramsShape) + static_cast<int>(keyIndices["ND"]),
337  std::end(paramsShape),
338  1,
339  std::multiplies<>() ));
340 
341  return keyIndices;
342 }

◆ CalculateSlotOption()

ITensorHandleFactory::FactoryId armnn::CalculateSlotOption ( BackendsMap backends,
OutputSlot outputSlot,
TensorHandleFactoryRegistry registry,
bool  exportEnabled 
)

Definition at line 1344 of file Network.cpp.

References ARMNN_ASSERT_MSG, FallbackImportDisabled, Layer::GetBackendId(), ITensorHandleFactory::GetCapabilities(), OutputSlot::GetConnections(), ITensorHandleFactory::GetExportFlags(), TensorHandleFactoryRegistry::GetFactory(), IBackendInternal::GetHandleFactoryPreferences(), Layer::GetInputSlots(), OutputSlot::GetOwningLayer(), Layer::GetType(), ITensorHandleFactory::LegacyFactoryId, Output, RequiresCopy(), and ITensorHandleFactory::SupportsMapUnmap().

Referenced by SelectTensorHandleStrategy().

1348 {
1349  // First ensure the from backends can support the TensorHandeAPI
1350  Layer& layer = outputSlot.GetOwningLayer();
1351  auto frmBackend = backends.find(layer.GetBackendId());
1352  if (frmBackend == backends.end() ||
1353  !frmBackend->second->SupportsTensorAllocatorAPI())
1354  {
1355  return ITensorHandleFactory::LegacyFactoryId;
1356  }
1357 
1358  bool outputConnection = false;
1359  for (auto&& connection : outputSlot.GetConnections())
1360  {
1361  const Layer& connectedLayer = connection->GetOwningLayer();
1362  if (connectedLayer.GetType() == LayerType::Output)
1363  {
1364  outputConnection = true;
1365  }
1366  }
1367 
1368  IBackendInternal* srcBackend = frmBackend->second.get();
1369  auto srcPrefs = srcBackend->GetHandleFactoryPreferences();
1370 
1371  // Initialize the scores
1372  std::map<ITensorHandleFactory::FactoryId, int> factoryScores;
1373  for (auto&& pref : srcPrefs)
1374  {
1375  if (exportEnabled)
1376  {
1377  ITensorHandleFactory* factory = registry.GetFactory(pref);
1378  if (outputConnection)
1379  {
1380  // Check if this is fallback case
1381  bool fallbackConnection = false;
1382  for (auto&& inputSlot : layer.GetInputSlots())
1383  {
1384  if (inputSlot.GetConnectedOutputSlot()->GetOwningLayer().GetBackendId() != layer.GetBackendId())
1385  {
1386  fallbackConnection = true;
1387  }
1388  }
1389  if (fallbackConnection)
1390  {
1391  auto factoryCap = factory->GetCapabilities(&layer, &layer, CapabilityClass::FallbackImportDisabled);
1392  // Cannot use factory import if fallback import is not supported.
1393  if (!factoryCap.empty())
1394  {
1395  continue;
1396  }
1397  }
1398  else if (factory->GetExportFlags() == 0)
1399  {
1400  continue;
1401  }
1402  }
1403  if (!outputConnection)
1404  {
1405  auto factoryCap = factory->GetCapabilities(&layer, &layer, CapabilityClass::FallbackImportDisabled);
1406  // Cannot use factory import if fallback import is not supported.
1407  if (!factoryCap.empty())
1408  {
1409  continue;
1410  }
1411  }
1412 
1413  }
1414  else
1415  {
1416  // Only consider factories that support map/unmap
1417  ITensorHandleFactory* factory = registry.GetFactory(pref);
1418  if (!factory->SupportsMapUnmap())
1419  {
1420  // The current tensor handle factory does not support the map/unmap strategy, move to the next one
1421  continue;
1422  }
1423  }
1424 
1425 
1426  auto it = factoryScores.find(pref);
1427  if (it == factoryScores.end())
1428  {
1429  // Add new score to the table
1430  factoryScores[pref] = 0;
1431  }
1432  }
1433 
1434  // Score each handle factory based on how many times it requires copies on the slot connections
1435  for (auto&& connection : outputSlot.GetConnections())
1436  {
1437  const Layer& connectedLayer = connection->GetOwningLayer();
1438 
1439  auto toBackend = backends.find(connectedLayer.GetBackendId());
1440  ARMNN_ASSERT_MSG(toBackend != backends.end(), "Backend id not found for the connected layer");
1441 
1442  auto dstPrefs = toBackend->second.get()->GetHandleFactoryPreferences();
1443  for (auto&& src : srcPrefs)
1444  {
1445  if (factoryScores.find(src) == factoryScores.end()) // Don't consider excluded factories
1446  {
1447  continue;
1448  }
1449 
1450  for (auto&& dst : dstPrefs)
1451  {
1452  if (RequiresCopy(src, dst, registry))
1453  {
1454  // Copy avoided, increase the score
1455  factoryScores[src]++;
1456  break;
1457  }
1458  }
1459  }
1460  }
1461 
1462  // Find the lowest score
1463  int minScore = std::numeric_limits<int>::max();
1464  for (auto it : factoryScores)
1465  {
1466  minScore = std::min(minScore, it.second);
1467  }
1468 
1469  // Collect factories matching the best(lowest) score
1470  std::vector<ITensorHandleFactory::FactoryId> optimalFactories;
1471  for (auto it : factoryScores)
1472  {
1473  if (it.second == minScore)
1474  {
1475  optimalFactories.push_back(it.first);
1476  }
1477  }
1478 
1479  // For all compatible Factories matching the best score, find the preferred one for the current layer.
1480  for (auto&& srcPref : srcPrefs)
1481  {
1482  for (auto&& comp : optimalFactories)
1483  {
1484  if (comp == srcPref)
1485  {
1486  return comp;
1487  }
1488  }
1489  }
1490 
1491  return ITensorHandleFactory::LegacyFactoryId;
1492 }
bool RequiresCopy(ITensorHandleFactory::FactoryId src, ITensorHandleFactory::FactoryId dst, TensorHandleFactoryRegistry &registry)
Definition: Network.cpp:1229
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15

◆ CalculateSlotOptionForInput()

ITensorHandleFactory::FactoryId armnn::CalculateSlotOptionForInput ( BackendsMap backends,
OutputSlot slot,
TensorHandleFactoryRegistry registry,
bool  importEnabled 
)

Definition at line 1249 of file Network.cpp.

References ARMNN_ASSERT, ARMNN_ASSERT_MSG, Layer::GetBackendId(), OutputSlot::GetConnections(), TensorHandleFactoryRegistry::GetFactory(), ITensorHandleFactory::GetImportFlags(), OutputSlot::GetOwningLayer(), Layer::GetType(), Input, ITensorHandleFactory::LegacyFactoryId, and ITensorHandleFactory::SupportsMapUnmap().

Referenced by SelectTensorHandleStrategy().

1253 {
1254  Layer& layer = slot.GetOwningLayer();
1255  ARMNN_ASSERT(layer.GetType() == LayerType::Input);
1256 
1257  // Explicitly select the tensorhandle factory for InputLayer because the rules for it are slightly different. It
1258  // doesn't matter which backend it is assigned to because they all use the same implementation, which
1259  // requires Map/Unmap support. This means that, so long as the handle type supports map/unmap semantics, we can
1260  // select a factory with maximum compatibility with the layers connected to the InputLayer.
1261 
1262  // First ensure the from backends can support the TensorHandeAPI
1263  auto frmBackend = backends.find(layer.GetBackendId());
1264  if (frmBackend == backends.end() ||
1265  !frmBackend->second->SupportsTensorAllocatorAPI())
1266  {
1267  return ITensorHandleFactory::LegacyFactoryId;
1268  }
1269 
1270  // Go through all connections to the output slot and determine the TensorHandleFactory which results in the
1271  // fewest copies.
1272  std::map<ITensorHandleFactory::FactoryId, int> factoryScores;
1273  int topScore = 0;
1274  ITensorHandleFactory::FactoryId topChoice = ITensorHandleFactory::LegacyFactoryId;
1275 
1276  for (auto&& connection : slot.GetConnections())
1277  {
1278 
1279  const Layer& connectedLayer = connection->GetOwningLayer();
1280 
1281  auto toBackend = backends.find(connectedLayer.GetBackendId());
1282  ARMNN_ASSERT_MSG(toBackend != backends.end(), "Backend id not found for the connected layer");
1283 
1284  if (!toBackend->second.get()->SupportsTensorAllocatorAPI())
1285  {
1286  // The destination backend does not support the tensor allocator API, move to the next one
1287  continue;
1288  }
1289 
1290  auto dstPrefs = toBackend->second.get()->GetHandleFactoryPreferences();
1291  for (auto&& dst : dstPrefs)
1292  {
1293  // Input layers use the mem copy workload or import, so the selected factory must
1294  // support either the map/unmap API or Import API
1295  ITensorHandleFactory* factory = registry.GetFactory(dst);
1296  if (importEnabled && factory->GetImportFlags() == 0)
1297  {
1298  continue;
1299  }
1300  else if (!importEnabled && !factory->SupportsMapUnmap())
1301  {
1302  continue;
1303  }
1304 
1305  auto it = factoryScores.find(dst);
1306  if (it == factoryScores.end())
1307  {
1308  // Add new score to the table
1309  factoryScores[dst] = 0;
1310  if (topChoice == ITensorHandleFactory::LegacyFactoryId)
1311  {
1312  topChoice = dst;
1313  }
1314  }
1315  else
1316  {
1317  // Increase the score
1318  factoryScores[dst]++;
1319 
1320  // Track the best option
1321  if (factoryScores[dst] > topScore)
1322  {
1323  topScore = factoryScores[dst];
1324  topChoice = dst;
1325  }
1326  }
1327  }
1328  }
1329 
1330  return topChoice;
1331 }
ITensorHandleFactory::FactoryId FactoryId
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ CalculateSlotOptionForOutput()

ITensorHandleFactory::FactoryId armnn::CalculateSlotOptionForOutput ( BackendsMap backends,
OutputSlot slot,
TensorHandleFactoryRegistry registry 
)

Definition at line 1334 of file Network.cpp.

References ITensorHandleFactory::DeferredFactoryId, and IgnoreUnused().

Referenced by SelectTensorHandleStrategy().

1337 {
1338  IgnoreUnused(backends, slot, registry);
1339  return ITensorHandleFactory::DeferredFactoryId;
1340 }
void IgnoreUnused(Ts &&...)

◆ ChainReduceLayers()

std::vector<IConnectableLayer*> armnn::ChainReduceLayers ( OptimizationViews optimizationViews,
LayerType baseLayer,
ReduceDescriptor desc 
)

Definition at line 256 of file ArmComputeSubgraphUtils.hpp.

References ARMNN_ASSERT, ComputeReductionTensorShape(), OptimizationViews::GetINetwork(), Layer::GetInputSlot(), Layer::GetOutputSlot(), ReduceDescriptor::m_KeepDims, ReduceDescriptor::m_vAxis, and OutputSlot::SetTensorInfo().

259 {
260  // Vector of new chained layers, used for substitution.
261  std::vector<IConnectableLayer*> layers;
262 
263  // Vector of axes so each layer is reshaped correctly.
264  std::vector<uint32_t> axes;
265  unsigned int recalulatedAxis = 0;
266 
267  for (unsigned int i = 0; i != desc.m_vAxis.size(); ++i)
268  {
269  // Get TensorInfo from base layer and reduce shape using axis.
270  TensorInfo layerInfo = baseLayer->GetInputSlot(0).GetConnectedOutputSlot()->GetTensorInfo();
271 
272  axes.emplace_back(desc.m_vAxis[i]);
273 
274  const TensorInfo& reducedTensorInfo = ComputeReductionTensorShape(layerInfo,
275  axes,
276  desc.m_KeepDims);
277 
278  // Create a vector for the single axis to be assigned to the descriptor.
279  // Update axis if keepDims is set reduce layers correctly.
280  std::vector<uint32_t> singleAxis(1, desc.m_vAxis[i] - recalulatedAxis);
281 
282  // Create a descriptor and assign single axis.
283  ReduceDescriptor newReduceDescriptor = baseLayer->GetParameters();
284  newReduceDescriptor.m_vAxis.assign(singleAxis.begin(), singleAxis.end());
285 
286  // Add new layer to graph.
287  std::string layerName = "reduce_layer_" + std::to_string(i);
288 
289  Layer* replacementLayer = PolymorphicDowncast<Layer*>(
290  optimizationViews.GetINetwork()->AddReduceLayer(newReduceDescriptor,
291  layerName.c_str()));
292 
293  // Connect previous layer with new layer.
294  // The first and last layer will be connected when the subgraph is replaced.
295  if (!layers.empty())
296  {
297  layers[i - 1]->GetOutputSlot(0).Connect(replacementLayer->GetInputSlot(0));
298  }
299 
300  // Set updated tensorInfo for new layer.
301  replacementLayer->GetOutputSlot(0).SetTensorInfo(reducedTensorInfo);
302 
303  if (!desc.m_KeepDims)
304  {
305  recalulatedAxis++;
306  }
307 
308  layers.emplace_back(replacementLayer);
309  }
310 
311  // Check if the TensorInfo from the last layer equals the inferred output from the original layer.
312  ARMNN_ASSERT(baseLayer->GetOutputSlot(0).GetTensorInfo() ==
313  PolymorphicDowncast<Layer*>(layers.back())->GetOutputSlot().GetTensorInfo());
314 
315  return layers;
316 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
const TensorInfo ComputeReductionTensorShape(const armnn::TensorInfo &input, const std::vector< uint32_t > &vAxis, const bool keepDims)
Function to compute the output tensor shape based on the axes and if keepDims is set.

◆ CheckFlag()

bool armnn::CheckFlag ( MemorySourceFlags  flags,
MemorySource  source 
)
inline

Definition at line 41 of file MemorySources.hpp.

Referenced by LoadedNetwork::FreeWorkingMemory(), LoadedNetwork::ImportInputs(), and LoadedNetwork::ImportOutputs().

42 {
43  return (static_cast<MemorySourceFlags>(source) & flags) != 0;
44 }

◆ CheckScaleSetOnQuantizedType()

bool armnn::CheckScaleSetOnQuantizedType ( Layer layer,
Optional< std::vector< std::string > &>  errMessages 
)

Definition at line 570 of file Network.cpp.

References ARMNN_LOG, TensorInfo::GetDataType(), GetLayerTypeAsCString(), Layer::GetNameStr(), Layer::GetNumOutputSlots(), Layer::GetOutputSlot(), TensorInfo::GetQuantizationOffset(), TensorInfo::GetQuantizationScale(), OutputSlot::GetTensorInfo(), Layer::GetType(), info, QAsymmU8, ReportError(), TensorInfo::SetQuantizationOffset(), TensorInfo::SetQuantizationScale(), OutputSlot::SetTensorInfo(), Softmax, and warning.

Referenced by AssignBackendsIConnectable().

571 {
572  bool noErrors = true;
573  unsigned int numOutputs = layer->GetNumOutputSlots();
574  for (unsigned int i = 0; i < numOutputs; i++) {
575  OutputSlot& outputSlot = layer->GetOutputSlot(i);
576  TensorInfo info = outputSlot.GetTensorInfo();
577  if (DataType::QAsymmU8 == info.GetDataType())
578  {
579  if (0.f == info.GetQuantizationScale())
580  {
581  noErrors = false;
582  std::stringstream ss;
583  ss << "output " << i << " of layer " << GetLayerTypeAsCString(layer->GetType())
584  << " (" << layer->GetNameStr() << ") is of type"
585  << " Quantized 8 bit but its scale parameter has not been set";
586  ReportError(ss.str(), errMessages);
587  }
588  // Softmax under QuantisedAsymm8 must always be scale (1.0f/256.0f) and offset 0
589  if ((info.GetQuantizationScale() != (1.0f / 256.0f) ||
590  info.GetQuantizationOffset() != 0) &&
591  layer->GetType() == armnn::LayerType::Softmax)
592  {
593  std::stringstream ss;
594  ss << "Quantization parameters for Softmax layer (Scale: " <<
595  info.GetQuantizationScale() << " and Offset: " << info.GetQuantizationOffset() <<
596  ") are incorrect and have been updated to Scale: 0.00390625 and Offset: 0";
597  ARMNN_LOG(warning) << ss.str();
598  info.SetQuantizationScale((1.0f /256.0f));
599  info.SetQuantizationOffset(0);
600  outputSlot.SetTensorInfo(info);
601  }
602  }
603  }
604  return noErrors;
605 }
void ReportError(const std::string &errorMessage, Optional< std::vector< std::string > &> errorMessages)
Definition: Network.cpp:531
#define ARMNN_LOG(severity)
Definition: Logging.hpp:205
const char * GetLayerTypeAsCString(LayerType type)

◆ CheckSupportRule()

bool armnn::CheckSupportRule ( rule,
Optional< std::string &>  reasonIfUnsupported,
const char *  reason 
)

Definition at line 38 of file LayerSupportRules.hpp.

References OptionalReferenceSwitch< std::is_reference< T >::value, T >::value().

Referenced by RefLayerSupport::IsActivationSupported(), RefLayerSupport::IsAdditionSupported(), RefLayerSupport::IsArgMinMaxSupported(), RefLayerSupport::IsBatchMatMulSupported(), RefLayerSupport::IsBatchNormalizationSupported(), RefLayerSupport::IsBatchToSpaceNdSupported(), RefLayerSupport::IsCastSupported(), RefLayerSupport::IsChannelShuffleSupported(), RefLayerSupport::IsComparisonSupported(), RefLayerSupport::IsConcatSupported(), RefLayerSupport::IsConstantSupported(), RefLayerSupport::IsConvertBf16ToFp32Supported(), RefLayerSupport::IsConvertFp32ToBf16Supported(), RefLayerSupport::IsConvolution2dSupported(), RefLayerSupport::IsConvolution3dSupported(), RefLayerSupport::IsDebugSupported(), RefLayerSupport::IsDepthToSpaceSupported(), RefLayerSupport::IsDepthwiseConvolutionSupported(), RefLayerSupport::IsDequantizeSupported(), RefLayerSupport::IsDetectionPostProcessSupported(), RefLayerSupport::IsDivisionSupported(), RefLayerSupport::IsElementwiseUnarySupported(), RefLayerSupport::IsFakeQuantizationSupported(), RefLayerSupport::IsFillSupported(), RefLayerSupport::IsFloorSupported(), RefLayerSupport::IsFullyConnectedSupported(), RefLayerSupport::IsGatherNdSupported(), RefLayerSupport::IsGatherSupported(), RefLayerSupport::IsInstanceNormalizationSupported(), RefLayerSupport::IsL2NormalizationSupported(), RefLayerSupport::IsLogicalBinarySupported(), RefLayerSupport::IsLogSoftmaxSupported(), RefLayerSupport::IsLstmSupported(), RefLayerSupport::IsMaximumSupported(), RefLayerSupport::IsMeanSupported(), RefLayerSupport::IsMemCopySupported(), RefLayerSupport::IsMinimumSupported(), RefLayerSupport::IsMultiplicationSupported(), RefLayerSupport::IsNormalizationSupported(), RefLayerSupport::IsPadSupported(), RefLayerSupport::IsPermuteSupported(), RefLayerSupport::IsPooling2dSupported(), RefLayerSupport::IsPooling3dSupported(), RefLayerSupport::IsPreluSupported(), RefLayerSupport::IsQuantizeSupported(), RefLayerSupport::IsRankSupported(), RefLayerSupport::IsReduceSupported(), RefLayerSupport::IsReshapeSupported(), RefLayerSupport::IsResizeSupported(), RefLayerSupport::IsShapeSupported(), RefLayerSupport::IsSliceSupported(), RefLayerSupport::IsSoftmaxSupported(), RefLayerSupport::IsSpaceToBatchNdSupported(), RefLayerSupport::IsSpaceToDepthSupported(), RefLayerSupport::IsSplitterSupported(), RefLayerSupport::IsStackSupported(), RefLayerSupport::IsStridedSliceSupported(), RefLayerSupport::IsSubtractionSupported(), RefLayerSupport::IsTransposeConvolution2dSupported(), RefLayerSupport::IsTransposeSupported(), and RefLayerSupport::IsUnidirectionalSequenceLstmSupported().

39 {
40  bool supported = rule();
41  if (!supported && reason)
42  {
43  reasonIfUnsupported.value() += std::string(reason) + "\n"; // Append the reason on a new line
44  }
45  return supported;
46 }

◆ ClAbsWorkloadValidate()

arm_compute::Status ClAbsWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 19 of file ClAbsWorkload.cpp.

Referenced by ClLayerSupport::IsElementwiseUnarySupported().

20 {
21  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  return arm_compute::CLAbsLayer::validate(&aclInput, &aclOutput);
25 }

◆ ClActivationWorkloadValidate()

arm_compute::Status ClActivationWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const ActivationDescriptor descriptor 
)

Definition at line 17 of file ClActivationWorkload.cpp.

Referenced by ClLayerSupport::IsActivationSupported().

20 {
21  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  const arm_compute::ActivationLayerInfo activationLayerInfo =
26 
27  return arm_compute::CLActivationLayer::validate(&aclInput,
28  &aclOutput,
29  activationLayerInfo);
30 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ ClAdditionValidate()

arm_compute::Status ClAdditionValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ActivationDescriptor activationDescriptor 
)

Definition at line 45 of file ClAdditionWorkload.cpp.

Referenced by ClLayerSupport::IsAdditionSupported(), and ClBackend::OptimizeSubgraphView().

49 {
50  const arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0);
51  const arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1);
52  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
53 
54  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
55  activationDescriptor);
56 
57  const arm_compute::Status aclStatus = arm_compute::CLArithmeticAddition::validate(&aclInput0Info,
58  &aclInput1Info,
59  &aclOutputInfo,
60  g_AclConvertPolicy,
61  activationInfo);
62 
63  return aclStatus;
64 }
Status
enumeration
Definition: Types.hpp:42
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ ClArgMinMaxWorkloadValidate()

arm_compute::Status ClArgMinMaxWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const ArgMinMaxDescriptor descriptor 
)

Definition at line 31 of file ClArgMinMaxWorkload.cpp.

Referenced by ClLayerSupport::IsArgMinMaxSupported().

34 {
35  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
36  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
37 
38  auto numDims = input.GetNumDimensions();
39  auto unsignedAxis = armnnUtils::GetUnsignedAxis(numDims, descriptor.m_Axis);
40  int aclAxis = armnn::numeric_cast<int>(CalcAclAxis(numDims, unsignedAxis));
41 
42  if (descriptor.m_Function == ArgMinMaxFunction::Max)
43  {
44  return arm_compute::CLArgMinMaxLayer::validate(&aclInput, aclAxis, &aclOutput,
45  arm_compute::ReductionOperation::ARG_IDX_MAX);
46  }
47  else
48  {
49  return arm_compute::CLArgMinMaxLayer::validate(&aclInput, aclAxis, &aclOutput,
50  arm_compute::ReductionOperation::ARG_IDX_MIN);
51  }
52 }
unsigned int GetUnsignedAxis(const unsigned int inputDimension, const int axis)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ ClBackendId()

constexpr const char* armnn::ClBackendId ( )

Definition at line 10 of file ClBackendId.hpp.

Referenced by ClBackend::GetIdStatic().

10 { return "GpuAcc"; }

◆ ClBatchNormalizationValidate()

arm_compute::Status ClBatchNormalizationValidate ( const TensorInfo input,
const TensorInfo output,
const TensorInfo mean,
const TensorInfo var,
const TensorInfo beta,
const TensorInfo gamma,
const BatchNormalizationDescriptor descriptor,
const ActivationDescriptor activationDescriptor 
)

Definition at line 19 of file ClBatchNormalizationFloatWorkload.cpp.

Referenced by ClLayerSupport::IsBatchNormalizationSupported(), and ClBackend::OptimizeSubgraphView().

27 {
28  const arm_compute::TensorInfo aclInputInfo =
29  armcomputetensorutils::BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
30  const arm_compute::TensorInfo aclOutputInfo =
31  armcomputetensorutils::BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
32  const arm_compute::TensorInfo aclMeanInfo =
33  armcomputetensorutils::BuildArmComputeTensorInfo(mean, descriptor.m_DataLayout);
34  const arm_compute::TensorInfo aclVarInfo =
35  armcomputetensorutils::BuildArmComputeTensorInfo(var, descriptor.m_DataLayout);
36  const arm_compute::TensorInfo aclBetaInfo =
37  armcomputetensorutils::BuildArmComputeTensorInfo(beta, descriptor.m_DataLayout);
38  const arm_compute::TensorInfo aclGammaInfo =
39  armcomputetensorutils::BuildArmComputeTensorInfo(gamma, descriptor.m_DataLayout);
40 
41  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
42  activationDescriptor);
43 
44  return arm_compute::CLBatchNormalizationLayer::validate(&aclInputInfo,
45  &aclOutputInfo,
46  &aclMeanInfo,
47  &aclVarInfo,
48  &aclBetaInfo,
49  &aclGammaInfo,
50  descriptor.m_Eps,
51  activationInfo);
52 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ ClBatchToSpaceNdWorkloadValidate()

arm_compute::Status ClBatchToSpaceNdWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const BatchToSpaceNdDescriptor descriptor 
)

Definition at line 57 of file ClBatchToSpaceNdWorkload.cpp.

References BatchToSpaceNdDescriptor::m_DataLayout.

Referenced by ClLayerSupport::IsBatchToSpaceNdSupported().

60 {
61  DataLayout dataLayout = descriptor.m_DataLayout;
62  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, dataLayout);
63 
64  // ArmNN blockShape is [H, W] Cl asks for W, H
65  int32_t blockHeight = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[0]);
66  int32_t blockWidth = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[1]);
67 
68  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, dataLayout);
69 
70  const arm_compute::Status aclStatus = arm_compute::CLBatchToSpaceLayer::validate(&aclInputInfo,
71  blockWidth,
72  blockHeight,
73  &aclOutputInfo);
74  return aclStatus;
75 }
DataLayout
Definition: Types.hpp:62
Status
enumeration
Definition: Types.hpp:42
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ ClCastValidate()

arm_compute::Status ClCastValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 20 of file ClCastWorkload.cpp.

Referenced by ClLayerSupport::IsCastSupported().

21 {
22  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
23  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
24 
25  return arm_compute::CLCast::validate(&aclInput, &aclOutput, g_AclConvertPolicy);
26 }

◆ ClChannelShuffleValidate()

arm_compute::Status ClChannelShuffleValidate ( const TensorInfo input,
const TensorInfo output,
const ChannelShuffleDescriptor descriptor 
)

Definition at line 20 of file ClChannelShuffleWorkload.cpp.

Referenced by ClLayerSupport::IsChannelShuffleSupported().

23 {
24  arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
25  arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
26 
27  // In Arm NN and in NNAPI, channel shuffle implementation is datalayout agnostic and it has axis as a parameter.
28  // The channel shuffle Implementation for Neon is dependent on datalayout and does not have axis as a parameter,
29  // it only supports channel shuffle for 4D tensors in dimension C (1 or 3).
30  arm_compute::DataLayout aclDataLayout;
31  if (input.GetNumDimensions() == 4)
32  {
33  switch (descriptor.m_Axis)
34  {
35  case 1:
36  aclDataLayout = ConvertDataLayout(armnn::DataLayout::NCHW);
37  break;
38  case 3:
39  aclDataLayout = ConvertDataLayout(armnn::DataLayout::NHWC);
40  break;
41  default:
42  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR, "Unsupported axis"};
43  }
44  aclInputInfo.set_data_layout(aclDataLayout);
45  aclOutputInfo.set_data_layout(aclDataLayout);
46  return arm_compute::CLChannelShuffleLayer::validate(&aclInputInfo, &aclOutputInfo, descriptor.m_NumGroups);
47  }
48  else
49  {
50  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR, "Unsupported number of dimensions"};
51  }
52 }
DataLayout
Definition: Types.hpp:62
Status
enumeration
Definition: Types.hpp:42

◆ ClComparisonWorkloadValidate()

arm_compute::Status ClComparisonWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ComparisonDescriptor descriptor 
)

Definition at line 24 of file ClComparisonWorkload.cpp.

Referenced by ClLayerSupport::IsComparisonSupported().

28 {
29  const arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0);
30  const arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1);
31  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
32 
33  const arm_compute::ComparisonOperation comparisonOperation = ConvertComparisonOperationToAcl(descriptor);
34 
35  const arm_compute::Status aclStatus = arm_compute::CLComparison::validate(&aclInput0Info,
36  &aclInput1Info,
37  &aclOutputInfo,
38  comparisonOperation);
39  return aclStatus;
40 }
ComparisonOperation
Definition: Types.hpp:108
Status
enumeration
Definition: Types.hpp:42
arm_compute::ComparisonOperation ConvertComparisonOperationToAcl(const ComparisonDescriptor &descriptor)

◆ ClConcatWorkloadValidate()

arm_compute::Status ClConcatWorkloadValidate ( const std::vector< const TensorInfo *> &  inputs,
const TensorInfo output,
const OriginsDescriptor descriptor 
)

Definition at line 27 of file ClConcatWorkload.cpp.

Referenced by ClLayerSupport::IsConcatSupported().

30 {
31  std::vector<arm_compute::TensorInfo> aclInputs;
32  for (const TensorInfo* input : inputs)
33  {
34  arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(*input, armnn::DataLayout::NCHW);
35  aclInputs.emplace_back(aclInputInfo);
36  }
37  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
38  std::vector<const arm_compute::ITensorInfo*> aclInputPtrs;
39  for (arm_compute::ITensorInfo& input : aclInputs)
40  {
41  aclInputPtrs.emplace_back(&input);
42  }
43 
44  size_t aclAxis = CalcAxis(descriptor);
45  return arm_compute::CLConcatenateLayer::validate(aclInputPtrs, &aclOutputInfo, aclAxis);
46 }

◆ ClConstantWorkloadValidate()

arm_compute::Status ClConstantWorkloadValidate ( const TensorInfo output)

Definition at line 18 of file ClConstantWorkload.cpp.

Referenced by ClLayerSupport::IsConstantSupported().

19 {
20  const arm_compute::TensorInfo neonOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
21 
22  std::array<arm_compute::DataType,8> supportedTypes = {
23  arm_compute::DataType::F16,
24  arm_compute::DataType::F32,
25  arm_compute::DataType::QASYMM8,
26  arm_compute::DataType::QASYMM8_SIGNED,
27  arm_compute::DataType::QSYMM16,
28  arm_compute::DataType::QSYMM8,
29  arm_compute::DataType::QSYMM8_PER_CHANNEL,
30  arm_compute::DataType::S32
31  };
32  auto it = std::find(begin(supportedTypes), end(supportedTypes), neonOutputInfo.data_type());
33 
34  if (it != end(supportedTypes))
35  {
36  return arm_compute::Status{};
37  }
38  else
39  {
40  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR, "Unsupported DataType"};
41  }
42 }
Status
enumeration
Definition: Types.hpp:42

◆ ClContextBufferHasIdentifier()

bool armnn::ClContextBufferHasIdentifier ( const void *  buf)
inline

Definition at line 152 of file ClContextSchema_generated.h.

References ClContextIdentifier().

152  {
153  return flatbuffers::BufferHasIdentifier(
154  buf, ClContextIdentifier());
155 }
const char * ClContextIdentifier()

◆ ClContextExtension()

const char* armnn::ClContextExtension ( )
inline

Definition at line 167 of file ClContextSchema_generated.h.

167  {
168  return "armnn";
169 }

◆ ClContextIdentifier()

const char* armnn::ClContextIdentifier ( )
inline

◆ ClConvertFp16ToFp32WorkloadValidate()

arm_compute::Status ClConvertFp16ToFp32WorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 44 of file ClConvertFp16ToFp32Workload.cpp.

References Float16, Float32, and TensorInfo::GetDataType().

Referenced by ClLayerSupport::IsConvertFp16ToFp32Supported(), and ClConvertFp16ToFp32Workload::SupportsTensorHandleReplacement().

45 {
46  if (input.GetDataType() != DataType::Float16)
47  {
48  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR, "Input should be Float16");
49  }
50  if (output.GetDataType() != DataType::Float32)
51  {
52  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR, "Output should be Float32");
53  }
54 
55  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
56  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
57 
58  const arm_compute::Status aclStatus = arm_compute::CLDepthConvertLayer::validate(
59  &aclInputInfo, &aclOutputInfo, g_AclConvertPolicy, 0);
60 
61  return aclStatus;
62 }
Status
enumeration
Definition: Types.hpp:42

◆ ClConvertFp32ToFp16WorkloadValidate()

arm_compute::Status ClConvertFp32ToFp16WorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 44 of file ClConvertFp32ToFp16Workload.cpp.

References Float16, Float32, and TensorInfo::GetDataType().

Referenced by ClLayerSupport::IsConvertFp32ToFp16Supported(), and ClConvertFp32ToFp16Workload::SupportsTensorHandleReplacement().

45 {
46  if (input.GetDataType() != DataType::Float32)
47  {
48  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR, "Input should be Float32");
49  }
50  if (output.GetDataType() != DataType::Float16)
51  {
52  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR, "Output should be Float16");
53  }
54 
55  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
56  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
57 
58  const arm_compute::Status aclStatus = arm_compute::CLDepthConvertLayer::validate(
59  &aclInputInfo, &aclOutputInfo, g_AclConvertPolicy, 0);
60 
61  return aclStatus;
62 }
Status
enumeration
Definition: Types.hpp:42

◆ ClConvolution2dWorkloadValidate()

arm_compute::Status ClConvolution2dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const Convolution2dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
bool  isFastMathEnabled,
const ActivationDescriptor activationDescriptor 
)

Definition at line 23 of file ClConvolution2dWorkload.cpp.

Referenced by ClLayerSupport::IsConvolution2dSupported(), and ClBackend::OptimizeSubgraphView().

30 {
31  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
32  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
33  arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights, descriptor.m_DataLayout);
34  aclWeightsInfo.set_are_values_constant(weights.IsConstant());
35 
36  const arm_compute::Size2D aclDilationInfo = BuildArmComputeSize2D(descriptor.m_DilationX,
37  descriptor.m_DilationY);
38 
39  arm_compute::TensorInfo aclBiasesInfo;
40  arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr;
41 
42  if (descriptor.m_BiasEnabled)
43  {
44  ARMNN_ASSERT(biases.has_value());
45  // Same for bias as weights. We don't currently support non const.
46  if (!biases.value().IsConstant())
47  {
48  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR,
49  "ArmNN ClConvolution2dWorkload does not support non constant bias."};
50  }
51  aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout);
52  aclBiasesInfo.set_are_values_constant(biases.value().IsConstant());
53  optionalAclBiasesInfo = &aclBiasesInfo;
54  }
55 
56  arm_compute::PadStrideInfo layerInfo = BuildArmComputePadStrideInfo(descriptor);
57 
58  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
59  activationDescriptor);
60 
61  return arm_compute::CLConvolutionLayer::validate(&aclInputInfo,
62  &aclWeightsInfo,
63  optionalAclBiasesInfo,
64  &aclOutputInfo,
65  layerInfo,
66  arm_compute::WeightsInfo(),
67  aclDilationInfo,
68  activationInfo,
69  isFastMathEnabled);
70 }
Status
enumeration
Definition: Types.hpp:42
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ ClConvolution3dWorkloadValidate()

arm_compute::Status ClConvolution3dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const Convolution3dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
bool  isFastMathEnabled,
const ActivationDescriptor activationDescriptor 
)

Definition at line 23 of file ClConvolution3dWorkload.cpp.

Referenced by ClLayerSupport::IsConvolution3dSupported().

30 {
31  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
32  const arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights, descriptor.m_DataLayout);
33 
34  arm_compute::TensorInfo aclBiasesInfo;
35  arm_compute::TensorInfo* optionalAclBiasesInfo = nullptr;
36  if (descriptor.m_BiasEnabled)
37  {
38  ARMNN_ASSERT(biases.has_value());
39  aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout);
40  optionalAclBiasesInfo = &aclBiasesInfo;
41  }
42 
43  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
44 
45  const arm_compute::Conv3dInfo aclConv3DInfo = ComputeConv3DInfo(descriptor,
46  isFastMathEnabled,
47  activationDescriptor);
48 
49  return arm_compute::CLConv3D::validate(&aclInputInfo,
50  &aclWeightsInfo,
51  optionalAclBiasesInfo,
52  &aclOutputInfo,
53  aclConv3DInfo);
54 }
arm_compute::Conv3dInfo ComputeConv3DInfo(const armnn::Convolution3dDescriptor descriptor, bool isFastMathEnabled, const ActivationDescriptor *activationDescriptor)
Utility function used to setup an arm_compute::Conv3dInfo object from convolution3d descriptor...
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ ClDepthToSpaceWorkloadValidate()

arm_compute::Status ClDepthToSpaceWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const DepthToSpaceDescriptor descriptor 
)

Definition at line 22 of file ClDepthToSpaceWorkload.cpp.

References SpaceToDepthDescriptor::m_DataLayout.

Referenced by ClLayerSupport::IsDepthToSpaceSupported().

25 {
26  DataLayout dataLayout = descriptor.m_DataLayout;
27  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, dataLayout);
28 
29  int32_t blockSize = armnn::numeric_cast<int32_t>(descriptor.m_BlockSize);
30 
31  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, dataLayout);
32 
33  const arm_compute::Status aclStatus = arm_compute::CLDepthToSpaceLayer::validate(&aclInputInfo,
34  &aclOutputInfo,
35  blockSize);
36  return aclStatus;
37 }
DataLayout
Definition: Types.hpp:62
Status
enumeration
Definition: Types.hpp:42
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ ClDepthwiseConvolutionWorkloadValidate()

arm_compute::Status ClDepthwiseConvolutionWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const DepthwiseConvolution2dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
const ActivationDescriptor activationDescriptor 
)

Definition at line 26 of file ClDepthwiseConvolutionWorkload.cpp.

Referenced by ClLayerSupport::IsDepthwiseConvolutionSupported(), ClLayerSupport::IsDilatedDepthwiseConvolutionSupported(), and ClBackend::OptimizeSubgraphView().

32 {
33  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
34  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
35 
36  // ArmNN format for weights for depthwise is [1, H, W, C] independently of the input/output layout
37  //
38  // ACL format for weights for depthwise is:
39  // - [1, H, W, C] for [N, H, W, C] input/output layout (matches with ArmNN)
40  // - [1, C, H, W] for [N, C, H, W] input/output layout
41  //
42  // Therefore ArmNN weights have to be permuted when input/output layout is [N, C, H, W] to pass them to ACL.
43  // The PermuteDepthwiseConv2dWeights backend optimization takes care of this, but it has not been performed yet,
44  // so we do the permute here for the TensorInfo weights.
45  unsigned int aclDepthMultiplier;
46  TensorInfo weightsPermuted;
47  std::tie(weightsPermuted, aclDepthMultiplier) = Convert1HWOTensorInfoToAcl(weights, input,descriptor.m_DataLayout);
48 
49  // Convert the weights into the compute library format
50  arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weightsPermuted, descriptor.m_DataLayout);
51  aclWeightsInfo.set_are_values_constant(weights.IsConstant());
52 
53  arm_compute::TensorInfo aclBiasesInfo;
54  arm_compute::TensorInfo* optionalAclBiasesInfo = nullptr;
55  if (descriptor.m_BiasEnabled)
56  {
57  ARMNN_ASSERT(biases.has_value());
58  // Same for bias as weights. We don't currently support non const.
59  if (!biases.value().IsConstant())
60  {
61  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR,
62  "ArmNN ClDepthwiseConv2dWorkload does not support non constant bias."};
63  }
64  aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout);
65  aclBiasesInfo.set_are_values_constant(biases.value().IsConstant());
66  optionalAclBiasesInfo = &aclBiasesInfo;
67  }
68 
69  const arm_compute::PadStrideInfo aclPadStrideInfo = BuildArmComputePadStrideInfo(descriptor);
70  const arm_compute::Size2D aclDilationInfo = BuildArmComputeSize2D(
71  descriptor.m_DilationX,
72  descriptor.m_DilationY);
73 
74  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
75  activationDescriptor);
76 
77  return arm_compute::CLDepthwiseConvolutionLayer::validate(&aclInputInfo,
78  &aclWeightsInfo,
79  optionalAclBiasesInfo,
80  &aclOutputInfo,
81  aclPadStrideInfo,
82  aclDepthMultiplier,
83  activationInfo,
84  aclDilationInfo);
85 
86 }
Status
enumeration
Definition: Types.hpp:42
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
std::tuple< TensorInfo, unsigned int > Convert1HWOTensorInfoToAcl(const TensorInfo &weightInfo, const TensorInfo &inputInfo, const DataLayout dataLayout)
Weights for depthwise have a datalayout of [1,H,W,O] = [1,H,W,I*M] This function coverts a TensorInfo...
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ ClDequantizeWorkloadValidate()

arm_compute::Status ClDequantizeWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 22 of file ClDequantizeWorkload.cpp.

Referenced by ClLayerSupport::IsDequantizeSupported().

23 {
24  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
25  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
26 
27  return arm_compute::CLDequantizationLayer::validate(&aclInputInfo, &aclOutputInfo);
28 }

◆ ClDivisionWorkloadValidate()

arm_compute::Status ClDivisionWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ActivationDescriptor activationDescriptor 
)

Definition at line 18 of file ClDivisionWorkload.cpp.

Referenced by ClLayerSupport::IsDivisionSupported(), and ClBackend::OptimizeSubgraphView().

22 {
23  const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input0);
24  const arm_compute::TensorInfo aclInput2 = armcomputetensorutils::BuildArmComputeTensorInfo(input1);
25  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
26 
27  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
28  activationDescriptor);
29 
30  return arm_compute::CLArithmeticDivision::validate(&aclInput1, &aclInput2, &aclOutput, activationInfo);
31 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ ClExpWorkloadValidate()

arm_compute::Status ClExpWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 18 of file ClExpWorkload.cpp.

Referenced by ClLayerSupport::IsElementwiseUnarySupported().

19 {
20  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  return arm_compute::CLExpLayer::validate(&aclInput, &aclOutput);
24 }

◆ ClFloorWorkloadValidate()

arm_compute::Status ClFloorWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 14 of file ClFloorFloatWorkload.cpp.

Referenced by ClLayerSupport::IsFloorSupported().

16 {
17  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
18  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
19 
20  return arm_compute::CLFloor::validate(&aclInput, &aclOutput);
21 }

◆ ClFullyConnectedWorkloadValidate()

arm_compute::Status ClFullyConnectedWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
const FullyConnectedDescriptor descriptor,
const ActivationDescriptor activationDescriptor 
)

Definition at line 19 of file ClFullyConnectedWorkload.cpp.

Referenced by ClLayerSupport::IsFullyConnectedSupported(), and ClBackend::OptimizeSubgraphView().

25 {
26  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input);
27  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output);
28  arm_compute::TensorInfo aclWeights = BuildArmComputeTensorInfo(weights);
29  aclWeights.set_are_values_constant(weights.IsConstant());
30 
31  arm_compute::TensorInfo aclBiases;
32  arm_compute::TensorInfo* optionalAclBiases = nullptr;
33  if (descriptor.m_BiasEnabled)
34  {
35  ARMNN_ASSERT(biases.has_value());
36  // Same for bias as weights. We don't currently support non const.
37  if (!biases.value().IsConstant())
38  {
39  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR,
40  "Arm NN ClFullyConnectedWorkload does not support non constant bias."};
41  }
42  aclBiases = BuildArmComputeTensorInfo(biases.value());
43  aclBiases.set_are_values_constant(biases.value().IsConstant());
44  optionalAclBiases = &aclBiases;
45  }
46 
47  const arm_compute::FullyConnectedLayerInfo fullyConnectedLayerInfo =
48  ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo(descriptor, activationDescriptor);
49  return arm_compute::CLFullyConnectedLayer::validate(&aclInput,
50  &aclWeights,
51  optionalAclBiases,
52  &aclOutput,
53  fullyConnectedLayerInfo);
54 }
arm_compute::FullyConnectedLayerInfo ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo(const FullyConnectedDescriptor &fullyConnectedDesc, const ActivationDescriptor *activationDesc)
Status
enumeration
Definition: Types.hpp:42
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ ClGatherNdWorkloadValidate()

arm_compute::Status ClGatherNdWorkloadValidate ( const TensorInfo paramsInfo,
const TensorInfo indicesInfo,
const TensorInfo outputInfo 
)

Validate Mul

Validate ReduceSum

Validate Gather

Validate Reshape

Return OK if all the layers are valid

Definition at line 16 of file ClGatherNdWorkload.cpp.

References CalculateGatherNdKeyIndices(), and TensorInfo::SetShape().

Referenced by ClLayerSupport::IsGatherNdSupported().

19 {
20  // Calculate ND, K, W, C.
21  std::map<std::string, unsigned int> keyIndices = CalculateGatherNdKeyIndices(paramsInfo, indicesInfo);
22 
23  /// Validate Mul
24  // Indices with shape { W, ND }
25  armnn::TensorInfo indices_W_ND_Info = indicesInfo;
26  indices_W_ND_Info.SetShape({ keyIndices["W"], keyIndices["ND"] });
27  const arm_compute::TensorInfo aclIndicesInfo = BuildArmComputeTensorInfo(indices_W_ND_Info);
28 
29  // Flattened coefficients with shape { ND }
30  armnn::TensorInfo flattenedCoeff_Info = indicesInfo;
31  flattenedCoeff_Info.SetShape({ keyIndices["ND"] });
32  const arm_compute::TensorInfo aclFlattenedCoeffInfo = BuildArmComputeTensorInfo(flattenedCoeff_Info);
33 
34  // Output of Mul with shape { W, ND }
35  const arm_compute::TensorInfo aclOutputMulInfo = BuildArmComputeTensorInfo(indices_W_ND_Info);
36 
37  auto statusMul = arm_compute::CLPixelWiseMultiplication::validate(&aclIndicesInfo,
38  &aclFlattenedCoeffInfo,
39  &aclOutputMulInfo,
40  1.0f,
41  arm_compute::ConvertPolicy::WRAP,
42  arm_compute::RoundingPolicy::TO_ZERO,
43  arm_compute::ActivationLayerInfo());
44 
45  /// Validate ReduceSum
46  // Flattened indices with shape { W }
47  armnn::TensorInfo flattenedIndices_Info = indicesInfo;
48  flattenedIndices_Info.SetShape({ keyIndices["W"] });
49  const arm_compute::TensorInfo aclFlattenedIndicesInfo = BuildArmComputeTensorInfo(flattenedIndices_Info);
50 
51  const std::vector<unsigned int> armnnReduceAxes(1, 1);
52  arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(aclOutputMulInfo.num_dimensions(),
53  indices_W_ND_Info.GetNumDimensions(),
54  armnnReduceAxes);
55 
56  auto statusReduceSum = arm_compute::CLReductionOperation::validate(&aclOutputMulInfo,
57  &aclFlattenedIndicesInfo,
58  static_cast<unsigned int>(coords[0]),
59  arm_compute::ReductionOperation::SUM,
60  false);
61 
62  /// Validate Gather
63  // Params with shape { K, C }
64  armnn::TensorInfo params_K_C_Info = paramsInfo;
65  params_K_C_Info.SetShape({ keyIndices["K"], keyIndices["C"] });
66  const arm_compute::TensorInfo aclParamsInfo = BuildArmComputeTensorInfo(params_K_C_Info);
67 
68  // Output of gather with shape { W, C }
69  armnn::TensorInfo outputGather_Info = outputInfo;
70  outputGather_Info.SetShape({ keyIndices["W"], keyIndices["C"] });
71  const arm_compute::TensorInfo aclOutputGatherInfo = BuildArmComputeTensorInfo(outputGather_Info);
72 
73  auto aclAxis = ComputeAclAxis(0, params_K_C_Info);
74  auto statusGather =
75  arm_compute::CLGather::validate(&aclParamsInfo, &aclFlattenedIndicesInfo, &aclOutputGatherInfo, aclAxis);
76 
77  /// Validate Reshape
78  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(outputInfo);
79 
80  auto statusReshape = arm_compute::CLReshapeLayer::validate(&aclOutputGatherInfo, &aclOutputInfo);
81 
82  /// Return OK if all the layers are valid
83  auto okCode = arm_compute::ErrorCode::OK;
84  if (statusMul.error_code() == okCode &&
85  statusReduceSum.error_code() == okCode &&
86  statusGather.error_code() == okCode &&
87  statusReshape.error_code() == okCode)
88  {
89  return arm_compute::Status(arm_compute::ErrorCode::OK,
90  "All GatherND layers validate status OK.");
91  }
92  else
93  {
94  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR,
95  "GatherND layer validate status failed.");
96  }
97 }
int ComputeAclAxis(const int &armnnAxis, const armnn::TensorInfo &tensor)
Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank...
std::map< std::string, unsigned int > CalculateGatherNdKeyIndices(TensorInfo inputInfo0, TensorInfo inputInfo1)
Calculates the key index values needed for GatherNd: N, ND, K, W, C (N is always 1) ...
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates
void SetShape(const TensorShape &newShape)
Definition: Tensor.hpp:193
Status
enumeration
Definition: Types.hpp:42
unsigned int GetNumDimensions() const
Definition: Tensor.hpp:195

◆ ClGatherWorkloadValidate()

arm_compute::Status ClGatherWorkloadValidate ( const TensorInfo input,
const TensorInfo indices,
const TensorInfo output,
const GatherDescriptor descriptor 
)

Definition at line 15 of file ClGatherWorkload.cpp.

Referenced by ClLayerSupport::IsGatherSupported().

19 {
20  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclIndices = BuildArmComputeTensorInfo(indices);
22  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output);
23 
24  int aclAxis = ComputeAclAxis(descriptor.m_Axis, input);
25 
26  return arm_compute::CLGather::validate(&aclInput, &aclIndices, &aclOutput, aclAxis);
27 }
int ComputeAclAxis(const int &armnnAxis, const armnn::TensorInfo &tensor)
Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank...

◆ ClImportTensorHandleFactoryId()

constexpr const char* armnn::ClImportTensorHandleFactoryId ( )

Definition at line 15 of file ClImportTensorHandleFactory.hpp.

Referenced by ClImportTensorHandleFactory::GetIdStatic().

16 {
17  return "Arm/Cl/ImportTensorHandleFactory";
18 }

◆ ClInstanceNormalizationWorkloadValidate()

arm_compute::Status ClInstanceNormalizationWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const InstanceNormalizationDescriptor descriptor 
)

Definition at line 18 of file ClInstanceNormalizationWorkload.cpp.

Referenced by ClLayerSupport::IsInstanceNormalizationSupported().

21 {
22  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
23  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
24 
25  return arm_compute::CLInstanceNormalizationLayer::validate(&aclInputInfo,
26  &aclOutputInfo,
27  descriptor.m_Gamma,
28  descriptor.m_Beta,
29  descriptor.m_Eps);
30 }

◆ ClL2NormalizationWorkloadValidate()

arm_compute::Status ClL2NormalizationWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const L2NormalizationDescriptor descriptor 
)

Definition at line 17 of file ClL2NormalizationFloatWorkload.cpp.

Referenced by ClLayerSupport::IsL2NormalizationSupported().

20 {
21  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
22  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
23 
24  int axis = (descriptor.m_DataLayout == DataLayout::NCHW) ? 2 : 0;
25 
26  return arm_compute::CLL2NormalizeLayer::validate(&aclInput, &aclOutput, axis, descriptor.m_Eps);
27 }

◆ ClLogicalAndWorkloadValidate()

arm_compute::Status ClLogicalAndWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output 
)

Definition at line 20 of file ClLogicalAndWorkload.cpp.

Referenced by ClLayerSupport::IsLogicalBinarySupported().

23 {
24  const arm_compute::TensorInfo aclInputInfo0 = BuildArmComputeTensorInfo(input0);
25  const arm_compute::TensorInfo aclInputInfo1 = BuildArmComputeTensorInfo(input1);
26  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
27 
28  const arm_compute::Status aclStatus = arm_compute::CLLogicalAnd::validate(&aclInputInfo0,
29  &aclInputInfo1,
30  &aclOutputInfo);
31  return aclStatus;
32 }
Status
enumeration
Definition: Types.hpp:42

◆ ClLogicalNotWorkloadValidate()

arm_compute::Status ClLogicalNotWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 20 of file ClLogicalNotWorkload.cpp.

Referenced by ClLayerSupport::IsElementwiseUnarySupported().

22 {
23  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
24  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
25 
26  const arm_compute::Status aclStatus = arm_compute::CLLogicalNot::validate(&aclInputInfo,
27  &aclOutputInfo);
28  return aclStatus;
29 }
Status
enumeration
Definition: Types.hpp:42

◆ ClLogicalOrWorkloadValidate()

arm_compute::Status ClLogicalOrWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output 
)

Definition at line 20 of file ClLogicalOrWorkload.cpp.

Referenced by ClLayerSupport::IsLogicalBinarySupported().

23 {
24  const arm_compute::TensorInfo aclInputInfo0 = BuildArmComputeTensorInfo(input0);
25  const arm_compute::TensorInfo aclInputInfo1 = BuildArmComputeTensorInfo(input1);
26  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
27 
28  const arm_compute::Status aclStatus = arm_compute::CLLogicalOr::validate(&aclInputInfo0,
29  &aclInputInfo1,
30  &aclOutputInfo);
31  return aclStatus;
32 }
Status
enumeration
Definition: Types.hpp:42

◆ ClLogSoftmaxWorkloadValidate()

arm_compute::Status ClLogSoftmaxWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const LogSoftmaxDescriptor descriptor 
)

Definition at line 17 of file ClLogSoftmaxWorkload.cpp.

Referenced by ClLayerSupport::IsLogSoftmaxSupported().

20 {
21  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  int aclAxis = ComputeAclAxis(descriptor.m_Axis, input);
25  return arm_compute::CLLogSoftmaxLayer::validate(&aclInputInfo, &aclOutputInfo, descriptor.m_Beta, aclAxis);
26 }
int ComputeAclAxis(const int &armnnAxis, const armnn::TensorInfo &tensor)
Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank...

◆ ClLogWorkloadValidate()

arm_compute::Status ClLogWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 18 of file ClLogWorkload.cpp.

Referenced by ClLayerSupport::IsElementwiseUnarySupported().

19 {
20  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  return arm_compute::CLLogLayer::validate(&aclInput, &aclOutput);
24 }

◆ ClLstmFloatWorkloadValidate()

arm_compute::Status ClLstmFloatWorkloadValidate ( const TensorInfo input,
const TensorInfo outputStateIn,
const TensorInfo cellStateIn,
const TensorInfo scratchBuffer,
const TensorInfo outputStateOut,
const TensorInfo cellStateOut,
const TensorInfo output,
const LstmDescriptor descriptor,
const LstmInputParamsInfo paramsInfo 
)

Definition at line 244 of file ClLstmFloatWorkload.cpp.

Referenced by ClLayerSupport::IsLstmSupported().

249 {
250  arm_compute::LSTMParams<arm_compute::ITensorInfo> lstm_params_info;
251 
252  // The inputs and the outputs
253  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
254  const arm_compute::TensorInfo aclOutputStateInInfo = BuildArmComputeTensorInfo(outputStateIn);
255  const arm_compute::TensorInfo aclCellStateInInfo = BuildArmComputeTensorInfo(cellStateIn);
256  const arm_compute::TensorInfo aclScratchBufferInfo = BuildArmComputeTensorInfo(scratchBuffer);
257  const arm_compute::TensorInfo aclOutputStateOutInfo = BuildArmComputeTensorInfo(outputStateOut);
258  const arm_compute::TensorInfo aclCellStateOutInfo = BuildArmComputeTensorInfo(cellStateOut);
259  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
260 
261  // Basic parameters
262  const arm_compute::TensorInfo aclInputToForgetWeightsInfo
263  = BuildArmComputeTensorInfo(paramsInfo.GetInputToForgetWeights());
264  const arm_compute::TensorInfo aclInputToCellWeightsInfo
265  = BuildArmComputeTensorInfo(paramsInfo.GetInputToCellWeights());
266  const arm_compute::TensorInfo aclInputToOutputWeightsInfo
267  = BuildArmComputeTensorInfo(paramsInfo.GetInputToOutputWeights());
268  const arm_compute::TensorInfo aclRecurrentToForgetWeightsInfo
269  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToForgetWeights());
270  const arm_compute::TensorInfo aclRecurrentToCellWeightsInfo
271  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToCellWeights());
272  const arm_compute::TensorInfo aclRecurrentToOutputWeightsInfo
273  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToOutputWeights());
274  const arm_compute::TensorInfo aclForgetGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetForgetGateBias());
275  const arm_compute::TensorInfo aclCellBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellBias());
276  const arm_compute::TensorInfo aclOutputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetOutputGateBias());
277 
278  arm_compute::TensorInfo aclInputToInputWeightsInfo;
279  arm_compute::TensorInfo aclRecurrentToInputWeightsInfo;
280  arm_compute::TensorInfo aclCellToInputWeightsInfo;
281  arm_compute::TensorInfo aclInputGateBiasInfo;
282  arm_compute::TensorInfo aclProjectionWeightsInfo;
283  arm_compute::TensorInfo aclProjectionBiasInfo;
284  arm_compute::TensorInfo aclCellToForgetWeightsInfo;
285  arm_compute::TensorInfo aclCellToOutputWeightsInfo;
286  arm_compute::TensorInfo aclInputLayerNormWeightsInfo;
287  arm_compute::TensorInfo aclForgetLayerNormWeightsInfo;
288  arm_compute::TensorInfo aclCellLayerNormWeightsInfo;
289  arm_compute::TensorInfo aclOutputLayerNormWeightsInfo;
290 
291  if (!descriptor.m_CifgEnabled)
292  {
293  aclInputToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputToInputWeights());
294  aclRecurrentToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToInputWeights());
295 
296  if (paramsInfo.m_CellToInputWeights != nullptr)
297  {
298  aclCellToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToInputWeights());
299  }
300  aclInputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputGateBias());
301  lstm_params_info.set_cifg_params(&aclInputToInputWeightsInfo, &aclRecurrentToInputWeightsInfo,
302  paramsInfo.m_CellToInputWeights != nullptr ?
303  &aclCellToInputWeightsInfo: nullptr,
304  &aclInputGateBiasInfo);
305  }
306 
307  if (descriptor.m_ProjectionEnabled)
308  {
309  aclProjectionWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionWeights());
310 
311  if (paramsInfo.m_ProjectionBias != nullptr)
312  {
313  aclProjectionBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionBias());
314  }
315  lstm_params_info.set_projection_params(&aclProjectionWeightsInfo,
316  paramsInfo.m_ProjectionBias != nullptr ?
317  &aclProjectionBiasInfo: nullptr);
318  }
319 
320  if (descriptor.m_PeepholeEnabled)
321  {
322  aclCellToForgetWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToForgetWeights());
323  aclCellToOutputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToOutputWeights());
324  lstm_params_info.set_peephole_params(&aclCellToForgetWeightsInfo, &aclCellToOutputWeightsInfo);
325  }
326 
327  float cell_threshold = descriptor.m_ClippingThresCell;
328  float projection_threshold = descriptor.m_ClippingThresProj;
329 
330  // for preparing the object for the class ActivationLayerInfo, we need to consider 5 situations
331  arm_compute::ActivationLayerInfo activationLayerInfo =
332  ConvertLstmActivationFuncToAclLayerInfo(descriptor.m_ActivationFunc);
333 
334  if (descriptor.m_LayerNormEnabled)
335  {
336  if (!descriptor.m_CifgEnabled)
337  {
338  aclInputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputLayerNormWeights());
339  }
340 
341  aclForgetLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetForgetLayerNormWeights());
342 
343  aclCellLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellLayerNormWeights());
344 
345  aclOutputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetOutputLayerNormWeights());
346 
347  lstm_params_info.set_layer_normalization_params(descriptor.m_CifgEnabled ?
348  nullptr : &aclInputLayerNormWeightsInfo,
349  &aclForgetLayerNormWeightsInfo,
350  &aclCellLayerNormWeightsInfo,
351  &aclOutputLayerNormWeightsInfo);
352  }
353 
354  return arm_compute::CLLSTMLayer::validate(&aclInputInfo, &aclInputToForgetWeightsInfo,
355  &aclInputToCellWeightsInfo,
356  &aclInputToOutputWeightsInfo,
357  &aclRecurrentToForgetWeightsInfo,
358  &aclRecurrentToCellWeightsInfo,
359  &aclRecurrentToOutputWeightsInfo,
360  &aclForgetGateBiasInfo,
361  &aclCellBiasInfo,
362  &aclOutputGateBiasInfo,
363  &aclOutputStateInInfo, &aclCellStateInInfo,
364  &aclScratchBufferInfo, &aclOutputStateOutInfo,
365  &aclCellStateOutInfo, &aclOutputInfo,
366  lstm_params_info, activationLayerInfo,
367  cell_threshold, projection_threshold);
368 }
arm_compute::ActivationLayerInfo ConvertLstmActivationFuncToAclLayerInfo(uint32_t activationFunction)

◆ ClMaximumWorkloadValidate()

arm_compute::Status ClMaximumWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output 
)

Definition at line 24 of file ClMaximumWorkload.cpp.

Referenced by ClLayerSupport::IsMaximumSupported().

27 {
28  const arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0);
29  const arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1);
30  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
31 
32  const arm_compute::Status aclStatus = arm_compute::CLElementwiseMax::validate(&aclInput0Info,
33  &aclInput1Info,
34  &aclOutputInfo);
35 
36  return aclStatus;
37 }
Status
enumeration
Definition: Types.hpp:42

◆ ClMeanValidate()

arm_compute::Status ClMeanValidate ( const TensorInfo input,
const TensorInfo output,
const MeanDescriptor descriptor 
)

Definition at line 17 of file ClMeanWorkload.cpp.

Referenced by ClLayerSupport::IsMeanSupported().

20 {
21  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(aclInputInfo.num_dimensions(),
25  input.GetNumDimensions(),
26  descriptor.m_Axis);
27 
28  return arm_compute::CLReduceMean::validate(&aclInputInfo, coords, descriptor.m_KeepDims, &aclOutputInfo);
29 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates

◆ ClMinimumWorkloadValidate()

arm_compute::Status ClMinimumWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output 
)

Definition at line 24 of file ClMinimumWorkload.cpp.

Referenced by ClLayerSupport::IsMinimumSupported().

27 {
28  const arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0);
29  const arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1);
30  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
31 
32  const arm_compute::Status aclStatus = arm_compute::CLElementwiseMin::validate(&aclInput0Info,
33  &aclInput1Info,
34  &aclOutputInfo);
35 
36  return aclStatus;
37 }
Status
enumeration
Definition: Types.hpp:42

◆ ClMultiplicationWorkloadValidate()

arm_compute::Status ClMultiplicationWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ActivationDescriptor activationDescriptor 
)

Definition at line 18 of file ClMultiplicationWorkload.cpp.

Referenced by ClLayerSupport::IsMultiplicationSupported(), and ClBackend::OptimizeSubgraphView().

22 {
23  const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input0);
24  const arm_compute::TensorInfo aclInput2 = armcomputetensorutils::BuildArmComputeTensorInfo(input1);
25  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
26 
27  auto convertPolicy = (IsQuantizedType(input0.GetDataType()) || IsQuantizedType(input1.GetDataType())) ?
28  arm_compute::ConvertPolicy::SATURATE :
29  arm_compute::ConvertPolicy::WRAP;
30 
31  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
32  activationDescriptor);
33 
34  // At the time of writing, configure() will fail if a rounding policy other than TO_ZERO is supplied to it,
35  // when providing a scale of 1.0 for F32 tensors, even though the provided rounding policy appears to be
36  // ignored for F32 tensors.
37  return arm_compute::CLPixelWiseMultiplication::validate(&aclInput1,
38  &aclInput2,
39  &aclOutput,
40  1.0f,
41  convertPolicy,
42  arm_compute::RoundingPolicy::TO_ZERO,
43  activationInfo);
44 }
constexpr bool IsQuantizedType()
Definition: TypesUtils.hpp:280
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ ClNegWorkloadValidate()

arm_compute::Status ClNegWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 18 of file ClNegWorkload.cpp.

Referenced by ClLayerSupport::IsElementwiseUnarySupported().

19 {
20  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  return arm_compute::CLNegLayer::validate(&aclInput, &aclOutput);
24 }

◆ ClNormalizationWorkloadValidate()

arm_compute::Status ClNormalizationWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const NormalizationDescriptor descriptor 
)

Definition at line 19 of file ClNormalizationFloatWorkload.cpp.

Referenced by ClLayerSupport::IsNormalizationSupported().

22 {
23  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
24  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
25 
26  arm_compute::NormalizationLayerInfo layerInfo = BuildArmComputeNormalizationLayerInfo(descriptor);
27 
28  return arm_compute::CLNormalizationLayer::validate(&aclInputInfo, &aclOutputInfo, layerInfo);
29 }

◆ ClPadValidate()

arm_compute::Status ClPadValidate ( const TensorInfo input,
const TensorInfo output,
const PadDescriptor descriptor 
)

Definition at line 62 of file ClPadWorkload.cpp.

Referenced by ClLayerSupport::IsPadSupported().

65 {
66  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
67  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
68 
69  std::vector<std::pair<unsigned int, unsigned int>> reversed_PadList(descriptor.m_PadList.size());
70 
71  std::reverse_copy(std::begin(descriptor.m_PadList),
72  std::end(descriptor.m_PadList),
73  std::begin(reversed_PadList));
74 
75  arm_compute::PaddingList padList = static_cast<arm_compute::PaddingList>(reversed_PadList);
76 
77  // PixelValue is currently unused when validating, but it's required to pass in PaddingMode.
78  arm_compute::PixelValue pixelValue = GetPixelValue(&aclInputInfo, descriptor.m_PadValue);
79  const arm_compute::Status aclStatus =
80  arm_compute::CLPadLayer::validate(&aclInputInfo,
81  &aclOutputInfo,
82  padList,
83  pixelValue,
84  ConvertPaddingModeToAcl(descriptor.m_PaddingMode));
85 
86  return aclStatus;
87 }
Status
enumeration
Definition: Types.hpp:42
arm_compute::PaddingMode ConvertPaddingModeToAcl(const PaddingMode &paddingMode)

◆ ClPermuteWorkloadValidate()

arm_compute::Status ClPermuteWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const PermuteDescriptor descriptor 
)

Definition at line 17 of file ClPermuteWorkload.cpp.

Referenced by ClLayerSupport::IsPermuteSupported().

20 {
21  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23  const armnn::PermutationVector& mappings = descriptor.m_DimMappings;
24 
25  return arm_compute::CLPermute::validate(&aclInputInfo, &aclOutputInfo,
26  armcomputetensorutils::BuildArmComputePermutationVector(mappings));
27 }

◆ ClPooling2dWorkloadValidate()

arm_compute::Status ClPooling2dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const Pooling2dDescriptor descriptor 
)

Definition at line 18 of file ClPooling2dWorkload.cpp.

Referenced by ClLayerSupport::IsPooling2dSupported().

21 {
22  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
23  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
24 
25  arm_compute::PoolingLayerInfo layerInfo = BuildArmComputePoolingLayerInfo(descriptor);
26 
27  return arm_compute::CLPoolingLayer::validate(&aclInputInfo, &aclOutputInfo, layerInfo);
28 }

◆ ClPooling3dWorkloadValidate()

arm_compute::Status ClPooling3dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const Pooling3dDescriptor descriptor 
)

Definition at line 18 of file ClPooling3dWorkload.cpp.

Referenced by ClLayerSupport::IsPooling3dSupported().

21  {
22  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
23  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
24 
25  arm_compute::Pooling3dLayerInfo layerInfo = BuildArmComputePooling3dLayerInfo(descriptor);
26 
27  return arm_compute::CLPooling3dLayer::validate(&aclInputInfo, &aclOutputInfo, layerInfo);
28  }

◆ ClPreluWorkloadValidate()

arm_compute::Status ClPreluWorkloadValidate ( const TensorInfo input,
const TensorInfo alpha,
const TensorInfo output 
)

Definition at line 16 of file ClPreluWorkload.cpp.

Referenced by ClLayerSupport::IsPreluSupported().

19 {
20  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclAlpha = armcomputetensorutils::BuildArmComputeTensorInfo(alpha);
22  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  return arm_compute::CLPReluLayer::validate(&aclInput,
25  &aclAlpha,
26  &aclOutput);
27 }

◆ ClQLstmWorkloadValidate()

arm_compute::Status ClQLstmWorkloadValidate ( const TensorInfo input,
const TensorInfo cellStateIn,
const TensorInfo outputStateIn,
const TensorInfo cellStateOut,
const TensorInfo outputStateOut,
const TensorInfo output,
const QLstmDescriptor descriptor,
const LstmInputParamsInfo paramsInfo 
)

Definition at line 247 of file ClQLstmWorkload.cpp.

Referenced by ClLayerSupport::IsQLstmSupported().

255 {
256  arm_compute::LSTMParams<arm_compute::ITensorInfo> aclParamsInfo;
257 
258  // Input/Output tensor info
259  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
260  const arm_compute::TensorInfo aclOutputStateInInfo = BuildArmComputeTensorInfo(outputStateIn);
261  const arm_compute::TensorInfo aclCellStateInInfo = BuildArmComputeTensorInfo(cellStateIn);
262 
263  const arm_compute::TensorInfo aclOutputStateOutInfo = BuildArmComputeTensorInfo(outputStateOut);
264  const arm_compute::TensorInfo aclCellStateOutInfo = BuildArmComputeTensorInfo(cellStateOut);
265  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
266 
267  // Mandatory tensor info
268  const arm_compute::TensorInfo aclInputToForgetWeightsInfo
269  = BuildArmComputeTensorInfo(paramsInfo.GetInputToForgetWeights());
270  const arm_compute::TensorInfo aclInputToCellWeightsInfo
271  = BuildArmComputeTensorInfo(paramsInfo.GetInputToCellWeights());
272  const arm_compute::TensorInfo aclInputToOutputWeightsInfo
273  = BuildArmComputeTensorInfo(paramsInfo.GetInputToOutputWeights());
274  const arm_compute::TensorInfo aclRecurrentToForgetWeightsInfo
275  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToForgetWeights());
276  const arm_compute::TensorInfo aclRecurrentToCellWeightsInfo
277  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToCellWeights());
278  const arm_compute::TensorInfo aclRecurrentToOutputWeightsInfo
279  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToOutputWeights());
280  const arm_compute::TensorInfo aclForgetGateBiasInfo
281  = BuildArmComputeTensorInfo(paramsInfo.GetForgetGateBias());
282  const arm_compute::TensorInfo aclCellBiasInfo
283  = BuildArmComputeTensorInfo(paramsInfo.GetCellBias());
284  const arm_compute::TensorInfo aclOutputGateBiasInfo
285  = BuildArmComputeTensorInfo(paramsInfo.GetOutputGateBias());
286 
287  // Optional tensor info
288  arm_compute::TensorInfo aclInputToInputWeightsInfo;
289  arm_compute::TensorInfo aclRecurrentToInputWeightsInfo;
290 
291  arm_compute::TensorInfo aclCellToInputWeightsInfo;
292  arm_compute::TensorInfo aclCellToForgetWeightsInfo;
293  arm_compute::TensorInfo aclCellToOutputWeightsInfo;
294 
295  arm_compute::TensorInfo aclInputGateBiasInfo;
296 
297  arm_compute::TensorInfo aclProjectionWeightsInfo;
298  arm_compute::TensorInfo aclProjectionBiasInfo;
299 
300  arm_compute::TensorInfo aclInputLayerNormWeightsInfo;
301  arm_compute::TensorInfo aclForgetLayerNormWeightsInfo;
302  arm_compute::TensorInfo aclCellLayerNormWeightsInfo;
303  arm_compute::TensorInfo aclOutputLayerNormWeightsInfo;
304 
305  // Create tensor info for optional params if they are enabled
306  if (descriptor.m_PeepholeEnabled)
307  {
308  if (!descriptor.m_CifgEnabled)
309  {
310  aclCellToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToInputWeights());
311  }
312 
313  aclCellToForgetWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToForgetWeights());
314  aclCellToOutputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToOutputWeights());
315 
316  // Set peephole params info
317  aclParamsInfo.set_peephole_params(&aclCellToForgetWeightsInfo,
318  &aclCellToOutputWeightsInfo);
319  }
320 
321  if (descriptor.m_ProjectionEnabled)
322  {
323  aclProjectionWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionWeights());
324 
325  if (paramsInfo.m_ProjectionBias != nullptr)
326  {
327  aclProjectionBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionBias());
328  }
329 
330  // Set projection params info
331  aclParamsInfo.set_projection_params(
332  &aclProjectionWeightsInfo,
333  paramsInfo.m_ProjectionBias != nullptr ? &aclProjectionBiasInfo : nullptr);
334  }
335 
336  if (descriptor.m_LayerNormEnabled)
337  {
338  if (!descriptor.m_CifgEnabled)
339  {
340  aclInputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputLayerNormWeights());
341  }
342 
343  aclForgetLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetForgetLayerNormWeights());
344  aclCellLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellLayerNormWeights());
345  aclOutputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetOutputLayerNormWeights());
346 
347  // Set layer norm params info
348  aclParamsInfo.set_layer_normalization_params(
349  paramsInfo.m_InputLayerNormWeights != nullptr ? &aclInputLayerNormWeightsInfo : nullptr,
350  &aclForgetLayerNormWeightsInfo,
351  &aclCellLayerNormWeightsInfo,
352  &aclOutputLayerNormWeightsInfo);
353  }
354 
355  if (!descriptor.m_CifgEnabled)
356  {
357  aclInputToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputToInputWeights());
358  aclRecurrentToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToInputWeights());
359  aclInputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputGateBias());
360 
361  // Set CIFG params info
362  aclParamsInfo.set_cifg_params(
363  &aclInputToInputWeightsInfo,
364  &aclRecurrentToInputWeightsInfo,
365  paramsInfo.m_CellToInputWeights != nullptr ? &aclCellToInputWeightsInfo : nullptr,
366  &aclInputGateBiasInfo);
367  }
368 
369  // Set scalar descriptor params
370  aclParamsInfo.set_cell_clip_params(descriptor.m_CellClip);
371  aclParamsInfo.set_projection_clip_params(descriptor.m_ProjectionClip);
372  aclParamsInfo.set_hidden_state_params(descriptor.m_HiddenStateZeroPoint, descriptor.m_HiddenStateScale);
373  aclParamsInfo.set_matmul_scale_params(descriptor.m_InputIntermediateScale,
374  descriptor.m_ForgetIntermediateScale,
375  descriptor.m_CellIntermediateScale,
376  descriptor.m_OutputIntermediateScale);
377 
378  // QLSTM CL validate
379  return arm_compute::CLQLSTMLayer::validate(&aclInputInfo,
380  &aclInputToForgetWeightsInfo,
381  &aclInputToCellWeightsInfo,
382  &aclInputToOutputWeightsInfo,
383  &aclRecurrentToForgetWeightsInfo,
384  &aclRecurrentToCellWeightsInfo,
385  &aclRecurrentToOutputWeightsInfo,
386  &aclForgetGateBiasInfo,
387  &aclCellBiasInfo,
388  &aclOutputGateBiasInfo,
389  &aclCellStateInInfo,
390  &aclOutputStateInInfo,
391  &aclCellStateOutInfo,
392  &aclOutputStateOutInfo,
393  &aclOutputInfo,
394  aclParamsInfo);
395 }

◆ ClQuantizedLstmWorkloadValidate()

arm_compute::Status ClQuantizedLstmWorkloadValidate ( const TensorInfo input,
const TensorInfo previousCellStateIn,
const TensorInfo previousOutputIn,
const TensorInfo cellStateOut,
const TensorInfo output,
const QuantizedLstmInputParamsInfo paramsInfo 
)

Definition at line 18 of file ClQuantizedLstmWorkload.cpp.

Referenced by ClLayerSupport::IsQuantizedLstmSupported().

22 {
23  // Inputs
24  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
25  const arm_compute::TensorInfo aclPreviousCellStateInInfo = BuildArmComputeTensorInfo(previousCellStateIn);
26  const arm_compute::TensorInfo aclPreviousOutputInInfo = BuildArmComputeTensorInfo(previousOutputIn);
27 
28  // Outputs
29  const arm_compute::TensorInfo aclCellStateOutInfo = BuildArmComputeTensorInfo(cellStateOut);
30  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
31 
32  // Basic parameters
33  const arm_compute::TensorInfo aclInputToInputWeightsInfo
34  = BuildArmComputeTensorInfo(paramsInfo.GetInputToInputWeights());
35  const arm_compute::TensorInfo aclInputToForgetWeightsInfo
36  = BuildArmComputeTensorInfo(paramsInfo.GetInputToForgetWeights());
37  const arm_compute::TensorInfo aclInputToCellWeightsInfo
38  = BuildArmComputeTensorInfo(paramsInfo.GetInputToCellWeights());
39  const arm_compute::TensorInfo aclInputToOutputWeightsInfo
40  = BuildArmComputeTensorInfo(paramsInfo.GetInputToOutputWeights());
41  const arm_compute::TensorInfo aclRecurrentToInputWeightsInfo
42  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToInputWeights());
43  const arm_compute::TensorInfo aclRecurrentToForgetWeightsInfo
44  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToForgetWeights());
45  const arm_compute::TensorInfo aclRecurrentToCellWeightsInfo
46  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToCellWeights());
47  const arm_compute::TensorInfo aclRecurrentToOutputWeightsInfo
48  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToOutputWeights());
49  const arm_compute::TensorInfo aclInputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputGateBias());
50  const arm_compute::TensorInfo aclForgetGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetForgetGateBias());
51  const arm_compute::TensorInfo aclCellBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellBias());
52  const arm_compute::TensorInfo aclOutputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetOutputGateBias());
53 
54  return arm_compute::CLLSTMLayerQuantized::validate(&aclInputInfo, &aclInputToInputWeightsInfo,
55  &aclInputToForgetWeightsInfo, &aclInputToCellWeightsInfo,
56  &aclInputToOutputWeightsInfo, &aclRecurrentToInputWeightsInfo,
57  &aclRecurrentToForgetWeightsInfo, &aclRecurrentToCellWeightsInfo,
58  &aclRecurrentToOutputWeightsInfo, &aclInputGateBiasInfo,
59  &aclForgetGateBiasInfo, &aclCellBiasInfo, &aclOutputGateBiasInfo,
60  &aclPreviousCellStateInInfo, &aclPreviousOutputInInfo,
61  &aclCellStateOutInfo, &aclOutputInfo);
62 }

◆ ClQuantizeWorkloadValidate()

arm_compute::Status ClQuantizeWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 22 of file ClQuantizeWorkload.cpp.

Referenced by ClLayerSupport::IsQuantizeSupported().

24 {
25  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
26  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
27 
28  return arm_compute::CLQuantizationLayer::validate(&aclInputInfo,
29  &aclOutputInfo);
30 }

◆ ClReduceWorkloadValidate()

arm_compute::Status ClReduceWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const ReduceDescriptor descriptor 
)

Definition at line 18 of file ClReduceWorkload.cpp.

References ReduceDescriptor::m_vAxis.

Referenced by ClLayerSupport::IsReduceSupported().

21 {
22  if (descriptor.m_vAxis.size() == 1 || descriptor.m_vAxis.empty())
23  {
24  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
25  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
26 
27  arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(aclInputInfo.num_dimensions(),
28  input.GetNumDimensions(),
29  descriptor.m_vAxis);
30 
31  return arm_compute::CLReductionOperation::validate(&aclInputInfo,
32  &aclOutputInfo,
33  static_cast<unsigned int>(coords[0]),
35  descriptor.m_KeepDims);
36  }
37  else
38  {
39  // Validate layer if there are multiple axes.
40  arm_compute::Status status;
41  IS_MULTI_AXES_REDUCE_SUPPORTED(ClReduceWorkloadValidate, input, descriptor, status);
42  return status;
43  }
44 }
#define IS_MULTI_AXES_REDUCE_SUPPORTED(func, input, desc, status)
Macro function check if layer with multiple axes is supported on each backend.
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates
arm_compute::ReductionOperation ConvertReductionOperationToAcl(const ReduceDescriptor &descriptor)
Status
enumeration
Definition: Types.hpp:42
arm_compute::Status ClReduceWorkloadValidate(const TensorInfo &input, const TensorInfo &output, const ReduceDescriptor &descriptor)

◆ ClReshapeWorkloadValidate()

arm_compute::Status ClReshapeWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 15 of file ClReshapeWorkload.cpp.

Referenced by ClLayerSupport::IsReshapeSupported().

17 {
18  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
19  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
20 
21  return arm_compute::CLReshapeLayer::validate(&aclInputInfo, &aclOutputInfo);
22 }

◆ ClResizeWorkloadValidate()

arm_compute::Status ClResizeWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const ResizeDescriptor descriptor 
)

Definition at line 22 of file ClResizeWorkload.cpp.

Referenced by ClLayerSupport::IsResizeSupported().

25 {
26  arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
27  arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
28 
29  arm_compute::DataLayout aclDataLayout = ConvertDataLayout(descriptor.m_DataLayout);
30  aclInputInfo.set_data_layout(aclDataLayout);
31  aclOutputInfo.set_data_layout(aclDataLayout);
32 
33  arm_compute::InterpolationPolicy aclInterpolationPolicy =
35 
36  arm_compute::SamplingPolicy samplingPolicy = descriptor.m_HalfPixelCenters ? arm_compute::SamplingPolicy::CENTER :
37  arm_compute::SamplingPolicy::TOP_LEFT;
38 
39  return arm_compute::CLScale::validate(&aclInputInfo,
40  &aclOutputInfo,
41  arm_compute::ScaleKernelInfo(aclInterpolationPolicy,
42  arm_compute::BorderMode::REPLICATE,
43  arm_compute::PixelValue(0.f),
44  samplingPolicy,
45  true,
46  descriptor.m_AlignCorners));
47 }
arm_compute::InterpolationPolicy ConvertResizeMethodToAclInterpolationPolicy(ResizeMethod resizeMethod)
DataLayout
Definition: Types.hpp:62

◆ ClRsqrtWorkloadValidate()

arm_compute::Status ClRsqrtWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 18 of file ClRsqrtWorkload.cpp.

Referenced by ClLayerSupport::IsElementwiseUnarySupported().

19 {
20  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  return arm_compute::CLRsqrtLayer::validate(&aclInput, &aclOutput);
24 }

◆ ClSinWorkloadValidate()

arm_compute::Status ClSinWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 18 of file ClSinWorkload.cpp.

Referenced by ClLayerSupport::IsElementwiseUnarySupported().

19 {
20  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  return arm_compute::CLSinLayer::validate(&aclInput, &aclOutput);
24 }

◆ ClSliceWorkloadValidate()

arm_compute::Status ClSliceWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const SliceDescriptor descriptor 
)

Definition at line 18 of file ClSliceWorkload.cpp.

Referenced by ClLayerSupport::IsSliceSupported().

21 {
22  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
23  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
24 
27 
28  std::tie(starts, ends) = SetClSliceData(descriptor.m_Begin, descriptor.m_Size);
29 
30  return arm_compute::CLSlice::validate(&aclInput, &aclOutput, starts, ends);
31 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates
auto SetClSliceData(const std::vector< unsigned int > &m_begin, const std::vector< unsigned int > &m_size)

◆ ClSoftmaxWorkloadValidate()

arm_compute::Status ClSoftmaxWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const SoftmaxDescriptor descriptor 
)

Definition at line 17 of file ClSoftmaxWorkload.cpp.

Referenced by ClLayerSupport::IsSoftmaxSupported().

20 {
21  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  int aclAxis = ComputeAclAxis(descriptor.m_Axis, input);
25  return arm_compute::CLSoftmaxLayer::validate(&aclInputInfo, &aclOutputInfo, descriptor.m_Beta, aclAxis);
26 }
int ComputeAclAxis(const int &armnnAxis, const armnn::TensorInfo &tensor)
Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank...

◆ ClSpaceToBatchNdWorkloadValidate()

arm_compute::Status ClSpaceToBatchNdWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const SpaceToBatchNdDescriptor descriptor 
)

Definition at line 23 of file ClSpaceToBatchNdWorkload.cpp.

Referenced by ClLayerSupport::IsSpaceToBatchNdSupported().

26 {
27  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
28  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
29 
30  // ArmNN blockShape is [H, W] Cl asks for W, H
31  int32_t blockHeight = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[0]);
32  int32_t blockWidth = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[1]);
33 
34  arm_compute::Size2D paddingLeftTop = BuildArmComputeSize2D(
35  descriptor.m_PadList[1].first, descriptor.m_PadList[0].first);
36  arm_compute::Size2D paddingRightBottom = BuildArmComputeSize2D(
37  descriptor.m_PadList[1].second, descriptor.m_PadList[0].second);
38 
39  return arm_compute::CLSpaceToBatchLayer::validate(&aclInputInfo,
40  blockWidth,
41  blockHeight,
42  paddingLeftTop,
43  paddingRightBottom,
44  &aclOutputInfo);
45 }
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ ClSpaceToDepthWorkloadValidate()

arm_compute::Status ClSpaceToDepthWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const SpaceToDepthDescriptor descriptor 
)

Definition at line 54 of file ClSpaceToDepthWorkload.cpp.

References SpaceToDepthDescriptor::m_DataLayout.

Referenced by ClLayerSupport::IsSpaceToDepthSupported().

57 {
58  DataLayout dataLayout = descriptor.m_DataLayout;
59  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, dataLayout);
60 
61  int32_t blockSize = armnn::numeric_cast<int32_t>(descriptor.m_BlockSize);
62 
63  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, dataLayout);
64 
65  const arm_compute::Status aclStatus = arm_compute::CLSpaceToDepthLayer::validate(&aclInputInfo,
66  &aclOutputInfo,
67  blockSize);
68  return aclStatus;
69 }
DataLayout
Definition: Types.hpp:62
Status
enumeration
Definition: Types.hpp:42
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ ClSplitterWorkloadValidate()

arm_compute::Status ClSplitterWorkloadValidate ( const TensorInfo input,
const std::vector< std::reference_wrapper< TensorInfo >> &  outputs,
unsigned int  splitAxis 
)

Definition at line 31 of file ClSplitterWorkload.cpp.

Referenced by ClLayerSupport::IsSplitterSupported().

34 {
35  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
36 
37  size_t numOutputs = outputs.size();
38 
39  std::vector<arm_compute::TensorInfo> aclOutputs;
40  aclOutputs.reserve(numOutputs);
41 
42  std::vector<arm_compute::ITensorInfo*> aclOutputPtr;
43  aclOutputPtr.reserve(numOutputs);
44 
45  for (size_t i = 0u; i < outputs.size(); ++i)
46  {
47  aclOutputs.emplace_back(BuildArmComputeTensorInfo(outputs[i]));
48  aclOutputPtr.emplace_back(&aclOutputs.back());
49  }
50 
51  unsigned int aclAxis = CalcAclAxis(input.GetNumDimensions(), splitAxis);
52  return arm_compute::CLSplit::validate(&aclInputInfo, aclOutputPtr, aclAxis);
53 }

◆ ClSqrtWorkloadValidate()

arm_compute::Status ClSqrtWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 19 of file ClSqrtWorkload.cpp.

Referenced by ClLayerSupport::IsElementwiseUnarySupported().

20 {
21  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  ActivationDescriptor descriptor;
25  descriptor.m_Function = ActivationFunction::Sqrt;
26  const arm_compute::ActivationLayerInfo activationLayerInfo =
28 
29  return arm_compute::CLActivationLayer::validate(&aclInput, &aclOutput, activationLayerInfo);
30 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ ClStackWorkloadValidate()

arm_compute::Status ClStackWorkloadValidate ( const std::vector< const TensorInfo *> &  inputs,
const TensorInfo output,
const StackDescriptor descriptor 
)

Definition at line 29 of file ClStackWorkload.cpp.

Referenced by ClLayerSupport::IsStackSupported().

32 {
33  std::vector<arm_compute::ITensorInfo*> aclInputPtrs;
34  arm_compute::TensorInfo aclInputInfo;
35  for (const TensorInfo* input : inputs)
36  {
37  aclInputInfo = BuildArmComputeTensorInfo(*input);
38  aclInputPtrs.emplace_back(&aclInputInfo);
39  }
40  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
41 
42  int aclAxis = CalcAxis(descriptor.m_Axis, descriptor.m_InputShape.GetNumDimensions());
43 
44  return arm_compute::CLStackLayer::validate(aclInputPtrs, aclAxis, &aclOutputInfo);
45 }

◆ ClStridedSliceWorkloadValidate()

arm_compute::Status ClStridedSliceWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const StridedSliceDescriptor descriptor 
)

Definition at line 27 of file ClStridedSliceWorkload.cpp.

Referenced by ClLayerSupport::IsStridedSliceSupported().

30 {
31  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
32  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
33 
37 
38  std::tie(starts, ends, strides) = SetClStridedSliceData(descriptor.m_Begin, descriptor.m_End, descriptor.m_Stride);
39 
40  auto numDimensions = armnn::numeric_cast<int>(input.GetNumDimensions());
41  int32_t begin_mask = ConvertMaskToACLFormat(descriptor.m_BeginMask, numDimensions);
42  int32_t end_mask = ConvertMaskToACLFormat(descriptor.m_EndMask, numDimensions);
43  int32_t shrink_axis_mask = ConvertMaskToACLFormat(descriptor.m_ShrinkAxisMask, numDimensions);
44 
45  return arm_compute::CLStridedSlice::validate(&aclInputInfo,
46  &aclOutputInfo,
47  starts,
48  ends,
49  strides,
50  begin_mask,
51  end_mask,
52  shrink_axis_mask);
53 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates
int32_t ConvertMaskToACLFormat(int32_t mask, int32_t numDim)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35
auto SetClStridedSliceData(const std::vector< int > &m_begin, const std::vector< int > &m_end, const std::vector< int > &m_stride)

◆ ClSubtractionValidate()

arm_compute::Status ClSubtractionValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ActivationDescriptor activationDescriptor 
)

Definition at line 46 of file ClSubtractionWorkload.cpp.

Referenced by ClLayerSupport::IsSubtractionSupported(), and ClBackend::OptimizeSubgraphView().

50 {
51  const arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0);
52  const arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1);
53  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
54 
55  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
56  activationDescriptor);
57 
58  const arm_compute::Status aclStatus = arm_compute::CLArithmeticSubtraction::validate(&aclInput0Info,
59  &aclInput1Info,
60  &aclOutputInfo,
61  g_AclConvertPolicy,
62  activationInfo);
63 
64  return aclStatus;
65 }
Status
enumeration
Definition: Types.hpp:42
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ ClTensorHandleFactoryId()

constexpr const char* armnn::ClTensorHandleFactoryId ( )

Definition at line 15 of file ClTensorHandleFactory.hpp.

Referenced by ClTensorHandleFactory::GetIdStatic().

16 {
17  return "Arm/Cl/TensorHandleFactory";
18 }

◆ ClTransposeConvolution2dWorkloadValidate()

arm_compute::Status ClTransposeConvolution2dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const TransposeConvolution2dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases 
)

Definition at line 26 of file ClTransposeConvolution2dWorkload.cpp.

Referenced by ClLayerSupport::IsTransposeConvolution2dSupported().

31 {
32  arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
33  arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
34  arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights, descriptor.m_DataLayout);
35 
36  arm_compute::TensorInfo aclBiasesInfo;
37  arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr;
38 
39  if (descriptor.m_BiasEnabled)
40  {
41  ARMNN_ASSERT(biases.has_value());
42 
43  aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout);
44  optionalAclBiasesInfo = &aclBiasesInfo;
45  }
46 
47  arm_compute::PadStrideInfo padStrideInfo = BuildArmComputePadStrideInfo(descriptor);
48 
49  return arm_compute::CLDeconvolutionLayer::validate(&aclInputInfo,
50  &aclWeightsInfo,
51  optionalAclBiasesInfo,
52  &aclOutputInfo,
53  padStrideInfo);
54 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ ClTransposeWorkloadValidate()

arm_compute::Status ClTransposeWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const TransposeDescriptor descriptor 
)

Definition at line 17 of file ClTransposeWorkload.cpp.

Referenced by ClLayerSupport::IsTransposeSupported().

20 {
21  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23  const armnn::PermutationVector& mappings = descriptor.m_DimMappings;
24 
25  return arm_compute::CLPermute::validate(&aclInputInfo, &aclOutputInfo,
26  armcomputetensorutils::BuildArmComputeTransposeVector(mappings));
27 }

◆ ClUnidirectionalSequenceLstmFloatWorkloadValidate()

arm_compute::Status ClUnidirectionalSequenceLstmFloatWorkloadValidate ( const TensorInfo input,
const TensorInfo outputStateIn,
const TensorInfo cellStateIn,
const TensorInfo output,
const Optional< TensorInfo > &  hiddenStateOutput,
const Optional< TensorInfo > &  cellStateOutput,
const UnidirectionalSequenceLstmDescriptor descriptor,
const LstmInputParamsInfo paramsInfo 
)

Definition at line 508 of file ClUnidirectionalSequenceLstmFloatWorkload.cpp.

References TensorInfo::GetShape(), IgnoreUnused(), and LstmDescriptor::m_TimeMajor.

Referenced by ClLayerSupport::IsUnidirectionalSequenceLstmSupported().

516 {
517  IgnoreUnused(hiddenStateOutput, cellStateOutput);
518 
519  TensorShape inputLayerShape = input.GetShape();
520  TensorShape outputLayerShape = outputStateIn.GetShape();
521 
522  unsigned int maxTime = descriptor.m_TimeMajor?inputLayerShape[0]:inputLayerShape[1];
523  unsigned int batchSize = descriptor.m_TimeMajor?inputLayerShape[1]:inputLayerShape[0];
524  unsigned int inputSize = inputLayerShape[2];
525  unsigned int outputSize = outputLayerShape[2];
526 
527  const TensorShape timeMajorShapeInput({maxTime, batchSize, inputSize});
528  const TensorShape timeMajorShapeOutput({maxTime, batchSize, outputSize});
529 
530  arm_compute::Status statusPermute1 = arm_compute::Status(arm_compute::ErrorCode::OK,
531  "Permute1 status");
532  arm_compute::Status statusSplit = arm_compute::Status(arm_compute::ErrorCode::OK,
533  "Split status");
534  arm_compute::Status statusLSTM = arm_compute::Status(arm_compute::ErrorCode::OK,
535  "LSTM status");
536  arm_compute::Status statusConcat = arm_compute::Status(arm_compute::ErrorCode::OK,
537  "Concat status");
538  arm_compute::Status statusPermute2 = arm_compute::Status(arm_compute::ErrorCode::OK,
539  "Permute2 status");
540 
541  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
542  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
543 
544  //
545  // Permute validate
546  //
547  TensorInfo permuteOutInfo = TensorInfo(input);
548  arm_compute::TensorInfo aclPermuteOutInfo = armcomputetensorutils::BuildArmComputeTensorInfo(permuteOutInfo);
549  if (!descriptor.m_TimeMajor)
550  {
551  statusPermute1 = arm_compute::CLPermute::validate(&aclInputInfo,
552  &aclPermuteOutInfo,
553  arm_compute::PermutationVector(0U, 2U, 1U));
554  }
555 
556  //
557  // Split and Concat Tensors validate
558  //
559  std::vector<arm_compute::TensorInfo> splitterOutputsTensorInfos;
560  std::vector<arm_compute::TensorInfo> concatInputsTensorInfos;
561  std::vector<arm_compute::ITensorInfo*> splitterOutputsTensorInfosPtr;
562  std::vector<const arm_compute::ITensorInfo*> concatInputsTensorInfosPtr;
563  splitterOutputsTensorInfos.reserve(maxTime);
564  concatInputsTensorInfos.reserve(maxTime);
565  for (unsigned int i = 0; i < maxTime; ++i)
566  {
567  arm_compute::TensorInfo splitter_out;
568  arm_compute::TensorInfo concat_in;
569 
570  auto splitterTensorInfo = TensorInfo(input);
571  auto concatTensorInfo = TensorInfo(output);
572  splitterTensorInfo.SetShape({batchSize, inputSize});
573  concatTensorInfo.SetShape({batchSize, outputSize});
574 
575  arm_compute::TensorInfo aclSplitterTensorInfo
576  = armcomputetensorutils::BuildArmComputeTensorInfo(splitterTensorInfo);
577  arm_compute::TensorInfo aclConcatTensorInfo
578  = armcomputetensorutils::BuildArmComputeTensorInfo(concatTensorInfo);
579 
580  splitterOutputsTensorInfos.emplace_back(aclSplitterTensorInfo);
581  concatInputsTensorInfos.emplace_back(aclConcatTensorInfo);
582  splitterOutputsTensorInfosPtr.emplace_back(&splitterOutputsTensorInfos[i]);
583  concatInputsTensorInfosPtr.emplace_back(&concatInputsTensorInfos[i]);
584  }
585 
586  //
587  // Split validate
588  //
589  unsigned int numberDimensions = 3;
590  unsigned int dimension = 0; // splitting on 0-dimension (i.e. maxTime dimension)
591  unsigned int aclAxisSplit = CalcAclAxis(numberDimensions, dimension);
592 
593  if (maxTime != 1) // ACL split does not work with only one element to split.
594  {
595  if (!descriptor.m_TimeMajor)
596  {
597  statusSplit = arm_compute::CLSplit::validate(&aclPermuteOutInfo,
598  splitterOutputsTensorInfosPtr,
599  aclAxisSplit);
600  }
601  else
602  {
603  statusSplit = arm_compute::CLSplit::validate(&aclInputInfo, splitterOutputsTensorInfosPtr, aclAxisSplit);
604  }
605  }
606 
607  //
608  // LSTM validate
609  //
610 
611  arm_compute::LSTMParams<arm_compute::ITensorInfo> lstm_params_info;
612 
613  const TensorInfo& scratchBuffer = TensorInfo(cellStateIn.GetShape(), input.GetDataType());
614  const TensorInfo& outputStateOut = TensorInfo(outputStateIn.GetShape(), input.GetDataType());
615  const TensorInfo& cellStateOut = TensorInfo(cellStateIn.GetShape(), input.GetDataType());
616 
617  // The inputs and outputs
618  const arm_compute::TensorInfo aclOutputStateInInfo = BuildArmComputeTensorInfo(outputStateIn);
619  const arm_compute::TensorInfo aclCellStateInInfo = BuildArmComputeTensorInfo(cellStateIn);
620  const arm_compute::TensorInfo aclScratchBufferInfo = BuildArmComputeTensorInfo(scratchBuffer);
621  const arm_compute::TensorInfo aclOutputStateOutInfo = BuildArmComputeTensorInfo(outputStateOut);
622  const arm_compute::TensorInfo aclCellStateOutInfo = BuildArmComputeTensorInfo(cellStateOut);
623 
624  // Basic parameters
625  const arm_compute::TensorInfo aclInputToForgetWeightsInfo
626  = BuildArmComputeTensorInfo(paramsInfo.GetInputToForgetWeights());
627  const arm_compute::TensorInfo aclInputToCellWeightsInfo
628  = BuildArmComputeTensorInfo(paramsInfo.GetInputToCellWeights());
629  const arm_compute::TensorInfo aclInputToOutputWeightsInfo
630  = BuildArmComputeTensorInfo(paramsInfo.GetInputToOutputWeights());
631  const arm_compute::TensorInfo aclRecurrentToForgetWeightsInfo
632  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToForgetWeights());
633  const arm_compute::TensorInfo aclRecurrentToCellWeightsInfo
634  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToCellWeights());
635  const arm_compute::TensorInfo aclRecurrentToOutputWeightsInfo
636  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToOutputWeights());
637  const arm_compute::TensorInfo aclForgetGateBiasInfo
638  = BuildArmComputeTensorInfo(paramsInfo.GetForgetGateBias());
639  const arm_compute::TensorInfo aclCellBiasInfo
640  = BuildArmComputeTensorInfo(paramsInfo.GetCellBias());
641  const arm_compute::TensorInfo aclOutputGateBiasInfo
642  = BuildArmComputeTensorInfo(paramsInfo.GetOutputGateBias());
643 
644  arm_compute::TensorInfo aclInputToInputWeightsInfo;
645  arm_compute::TensorInfo aclRecurrentToInputWeightsInfo;
646  arm_compute::TensorInfo aclCellToInputWeightsInfo;
647  arm_compute::TensorInfo aclInputGateBiasInfo;
648  arm_compute::TensorInfo aclProjectionWeightsInfo;
649  arm_compute::TensorInfo aclProjectionBiasInfo;
650  arm_compute::TensorInfo aclCellToForgetWeightsInfo;
651  arm_compute::TensorInfo aclCellToOutputWeightsInfo;
652 
653  arm_compute::TensorInfo aclInputLayerNormWeightsInfo;
654  arm_compute::TensorInfo aclForgetLayerNormWeightsInfo;
655  arm_compute::TensorInfo aclCellLayerNormWeightsInfo;
656  arm_compute::TensorInfo aclOutputLayerNormWeightsInfo;
657 
658 
659  if (!descriptor.m_CifgEnabled)
660  {
661  if (descriptor.m_PeepholeEnabled)
662  {
663  aclCellToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToInputWeights());
664  }
665  aclInputToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputToInputWeights());
666  aclRecurrentToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToInputWeights());
667  aclInputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputGateBias());
668 
669  lstm_params_info.set_cifg_params(&aclInputToInputWeightsInfo,
670  &aclRecurrentToInputWeightsInfo,
671  descriptor.m_PeepholeEnabled ? &aclCellToInputWeightsInfo : nullptr,
672  &aclInputGateBiasInfo);
673  }
674 
675  if (descriptor.m_ProjectionEnabled)
676  {
677  if (paramsInfo.m_ProjectionBias != nullptr)
678  {
679  aclProjectionBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionBias());
680  }
681  aclProjectionWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionWeights());
682 
683  lstm_params_info.set_projection_params(&aclProjectionWeightsInfo,
684  paramsInfo.m_ProjectionBias ? &aclProjectionBiasInfo : nullptr);
685  }
686 
687  if (descriptor.m_PeepholeEnabled)
688  {
689  aclCellToForgetWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToForgetWeights());
690  aclCellToOutputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToOutputWeights());
691 
692  lstm_params_info.set_peephole_params(&aclCellToForgetWeightsInfo, &aclCellToOutputWeightsInfo);
693  }
694 
695  if (descriptor.m_LayerNormEnabled)
696  {
697  if (!descriptor.m_CifgEnabled)
698  {
699  aclInputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputLayerNormWeights());
700  }
701  aclForgetLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetForgetLayerNormWeights());
702  aclCellLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellLayerNormWeights());
703  aclOutputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetOutputLayerNormWeights());
704 
705  lstm_params_info.set_layer_normalization_params(descriptor.m_CifgEnabled ? nullptr :
706  &aclInputLayerNormWeightsInfo,
707  &aclForgetLayerNormWeightsInfo,
708  &aclCellLayerNormWeightsInfo,
709  &aclOutputLayerNormWeightsInfo);
710  }
711 
712  // Need to be set at negative threshold to be compatible for ACL
713  float cell_threshold = descriptor.m_ClippingThresCell;
714  float projection_threshold = descriptor.m_ClippingThresProj;
715 
716  arm_compute::ActivationLayerInfo activationLayerInfo =
717  ConvertLstmActivationFuncToAclLayerInfo(descriptor.m_ActivationFunc);
718 
719  for (unsigned int i = 0; i != maxTime; ++i)
720  {
721 
722  // Set LSTM input and output ITensors depending on:
723  // input format (timeMajor) & number of LSTM batches (maxTime).
724  arm_compute::ITensorInfo* outputLSTM;
725  arm_compute::ITensorInfo* inputLSTM;
726  // If there is only one LSTM time major batch, we will not concat OR permute.
727  // Set input of LSTM to be first input ITensor.
728  // Set output of LSTM to be final output ITensor.
729  // LSTM input/output cannot be > 2 dimensions so need to resize its TensorInfo.
730  if (maxTime == 1 && !descriptor.m_TimeMajor)
731  {
732  TensorShape inputShape = GetTensorShape(aclInputInfo.tensor_shape(), 1U);
733  TensorShape outputShape = GetTensorShape(aclOutputInfo.tensor_shape(), 1U);
734  TensorShape inputShapeShrink({inputShape[1], inputShape[2]});
735  TensorShape outputShapeShrink({outputShape[1], outputShape[2]});
736  auto acl_input_shape_shrink = BuildArmComputeTensorShape(inputShapeShrink);
737  auto acl_output_shape_shrink = BuildArmComputeTensorShape(outputShapeShrink);
738  const_cast<arm_compute::TensorInfo*>(&aclInputInfo)->set_tensor_shape(acl_input_shape_shrink);
739  inputLSTM = const_cast<arm_compute::TensorInfo*>(&aclInputInfo);
740  const_cast<arm_compute::TensorInfo*>(&aclOutputInfo)->set_tensor_shape(acl_output_shape_shrink);
741  outputLSTM = const_cast<arm_compute::TensorInfo*>(&aclOutputInfo);
742  }
743  // If there is only one LSTM batch major batch, we will not concat, only permute.
744  // Set input of LSTM to be output of initial permute.
745  // Set output of LSTM to be first element of m_ConcatInputs & use that value later in permute.
746  // LSTM output cannot be > 2 dimensions so need to resize its TensorInfo.
747  else if (maxTime == 1 && !descriptor.m_TimeMajor)
748  {
749  TensorShape inputShape = GetTensorShape(aclPermuteOutInfo.tensor_shape(), 1U);
750  TensorShape inputShapeShrink({inputShape[1], inputShape[2]});
751  auto acl_input_shape_shrink = BuildArmComputeTensorShape(inputShapeShrink);
752  aclPermuteOutInfo.set_tensor_shape(acl_input_shape_shrink);
753  inputLSTM = &aclPermuteOutInfo;
754  outputLSTM = const_cast<arm_compute::ITensorInfo*>(concatInputsTensorInfosPtr[i]);
755  }
756  // Batch major AND/OR 2+ LSTM batches so will use concat AND/OR permute later on.
757  else
758  {
759  inputLSTM = splitterOutputsTensorInfosPtr[i];
760  outputLSTM = const_cast<arm_compute::ITensorInfo*>(concatInputsTensorInfosPtr[i]);
761  }
762 
763  statusLSTM = arm_compute::CLLSTMLayer::validate(inputLSTM,
764  &aclInputToForgetWeightsInfo,
765  &aclInputToCellWeightsInfo,
766  &aclInputToOutputWeightsInfo,
767  &aclRecurrentToForgetWeightsInfo,
768  &aclRecurrentToCellWeightsInfo,
769  &aclRecurrentToOutputWeightsInfo,
770  &aclForgetGateBiasInfo,
771  &aclCellBiasInfo,
772  &aclOutputGateBiasInfo,
773  &aclOutputStateInInfo,
774  &aclCellStateInInfo,
775  &aclScratchBufferInfo,
776  &aclOutputStateOutInfo,
777  &aclCellStateOutInfo,
778  outputLSTM,
779  lstm_params_info,
780  activationLayerInfo,
781  cell_threshold,
782  projection_threshold);
783 
784  if (statusLSTM.error_code() != arm_compute::ErrorCode::OK)
785  {
786  break;
787  }
788  }
789 
790  //
791  // Concat validate
792  //
793 
794  // Expand dimensions of LSTM outputs adding one empty dimension to fit concatenate inputs.
795  TensorShape shape = GetTensorShape(concatInputsTensorInfosPtr[0]->tensor_shape(), 1U);
796  TensorShape shapeExpandTimeMajor({1, shape[0], shape[1]});
797  TensorShape shapeExpandBatchMajor({shape[0], 1, shape[1]});
798 
799  TensorInfo concatOuputTensorInfo = TensorInfo(output);
800  concatOuputTensorInfo.SetShape(timeMajorShapeOutput);
801  arm_compute::TensorInfo aclConcatOuputTensorInfo= BuildArmComputeTensorInfo(concatOuputTensorInfo);
802 
803  if (maxTime != 1) // ACL concat does not work with only one element to concatenate.
804  {
805  for (unsigned int i = 0; i < maxTime; ++i)
806  {
807  auto acl_shape_expand = BuildArmComputeTensorShape(shapeExpandTimeMajor);
808  concatInputsTensorInfos[i].set_tensor_shape(acl_shape_expand);
809  }
810 
811  unsigned int aclAxisConcat = CalcAclAxis(numberDimensions, dimension);
812  if (!descriptor.m_TimeMajor)
813  {
814  statusConcat = arm_compute::CLConcatenateLayer::validate(concatInputsTensorInfosPtr,
815  &aclConcatOuputTensorInfo,
816  aclAxisConcat);
817  }
818  else
819  {
820  statusConcat = arm_compute::CLConcatenateLayer::validate(concatInputsTensorInfosPtr,
821  &aclOutputInfo,
822  aclAxisConcat);
823  }
824  }
825  // If only one LSTM batch, we do not concat and/or permute.
826  // Must ensure final output info is expanded to correct batch major dimensions.
827  else
828  {
829  if (!descriptor.m_TimeMajor)
830  {
831  const_cast<arm_compute::TensorInfo*>(&aclInputInfo)->set_tensor_shape(
832  BuildArmComputeTensorShape(shapeExpandBatchMajor));
833  }
834  else
835  {
836  const_cast<arm_compute::TensorInfo*>(&aclInputInfo)->set_tensor_shape(
837  BuildArmComputeTensorShape(shapeExpandTimeMajor));
838  }
839  }
840  //
841  // Permute validate
842  //
843  if (!descriptor.m_TimeMajor)
844  {
845  // Output now time major. Permute output back to batch major.
846  if (maxTime != 1)
847  {
848  statusPermute2 = arm_compute::CLPermute::validate(&aclConcatOuputTensorInfo,
849  &aclOutputInfo,
850  arm_compute::PermutationVector(0U, 2U, 1U));
851  }
852  else
853  {
854  statusPermute2 = arm_compute::CLPermute::validate(concatInputsTensorInfosPtr[0],
855  &aclOutputInfo,
856  arm_compute::PermutationVector(0U, 2U, 1U));
857  }
858  }
859 
860  auto okCode = arm_compute::ErrorCode::OK;
861  if (statusPermute1.error_code() == okCode &&
862  statusSplit.error_code() == okCode &&
863  statusLSTM .error_code() == okCode &&
864  statusConcat.error_code() == okCode &&
865  statusPermute2.error_code() == okCode)
866  {
867  return arm_compute::Status(arm_compute::ErrorCode::OK,
868  "All Unidirectional Sequence LSTM layer validate status OK.");
869  }
870  else
871  {
872  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR,
873  "Unidirectional Sequence LSTM layer validate status failed.");
874  }
875 }
void IgnoreUnused(Ts &&...)
arm_compute::ActivationLayerInfo ConvertLstmActivationFuncToAclLayerInfo(uint32_t activationFunction)
Status
enumeration
Definition: Types.hpp:42
armnn::TensorShape GetTensorShape(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout)
Definition: TensorUtils.cpp:19

◆ Combine() [1/2]

MemorySourceFlags armnn::Combine ( Arg  sourceA,
Arg  sourceB 
)

Definition at line 30 of file MemorySources.hpp.

Referenced by Combine().

31 {
32  return static_cast<MemorySourceFlags>(sourceA) | static_cast<MemorySourceFlags>(sourceB);
33 }
unsigned int MemorySourceFlags

◆ Combine() [2/2]

MemorySourceFlags armnn::Combine ( Arg  source,
Args...  rest 
)

Definition at line 36 of file MemorySources.hpp.

References Combine().

37 {
38  return static_cast<MemorySourceFlags>(source) | Combine(rest...);
39 }
MemorySourceFlags Combine(Arg source, Args... rest)
unsigned int MemorySourceFlags

◆ ComputeAclAxis()

int armnn::ComputeAclAxis ( const int &  armnnAxis,
const armnn::TensorInfo tensor 
)
inline

Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank, rank)

Definition at line 264 of file ArmComputeUtils.hpp.

References ARMNN_ASSERT, and TensorInfo::GetNumDimensions().

Referenced by ClGatherWorkload::ClGatherWorkload(), ClLogSoftmaxWorkload::ClLogSoftmaxWorkload(), ClSoftmaxWorkload::ClSoftmaxWorkload(), NeonGatherWorkload::NeonGatherWorkload(), NeonLogSoftmaxWorkload::NeonLogSoftmaxWorkload(), and NeonSoftmaxWorkload::NeonSoftmaxWorkload().

265 {
266  int rank = static_cast<int>(tensor.GetNumDimensions());
267 
268  ARMNN_ASSERT(rank != 0);
269  ARMNN_ASSERT((-1 * rank) <= armnnAxis);
270  ARMNN_ASSERT(armnnAxis < rank);
271 
272  int sign = (armnnAxis < 0) ? -1 : 1;
273  int aclAxis = sign * rank - 1 - armnnAxis;
274 
275  return aclAxis;
276 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
unsigned int GetNumDimensions() const
Definition: Tensor.hpp:195

◆ ComputeConv3DInfo() [1/2]

arm_compute::Conv3dInfo armnn::ComputeConv3DInfo ( const armnn::Convolution3dDescriptor  descriptor,
bool  isFastMathEnabled,
const ActivationDescriptor activationDescriptor 
)
inline

Utility function used to setup an arm_compute::Conv3dInfo object from convolution3d descriptor.

Definition at line 293 of file ArmComputeUtils.hpp.

References ConvertActivationDescriptorToAclActivationLayerInfo(), Convolution3dDescriptor::m_DilationX, Convolution3dDescriptor::m_DilationY, Convolution3dDescriptor::m_DilationZ, Convolution3dDescriptor::m_PadBack, Convolution3dDescriptor::m_PadBottom, Convolution3dDescriptor::m_PadFront, Convolution3dDescriptor::m_PadLeft, Convolution3dDescriptor::m_PadRight, Convolution3dDescriptor::m_PadTop, Convolution3dDescriptor::m_StrideX, Convolution3dDescriptor::m_StrideY, and Convolution3dDescriptor::m_StrideZ.

296 {
297  const arm_compute::Size3D stride{descriptor.m_StrideX, descriptor.m_StrideY, descriptor.m_StrideZ};
298  const arm_compute::Padding3D padding{descriptor.m_PadLeft, descriptor.m_PadRight,
299  descriptor.m_PadTop, descriptor.m_PadBottom,
300  descriptor.m_PadFront, descriptor.m_PadBack};
301  const arm_compute::Size3D dilation{descriptor.m_DilationX, descriptor.m_DilationY, descriptor.m_DilationZ};
302 
303  const arm_compute::ActivationLayerInfo activationInfo =
305  const auto roundType = arm_compute::DimensionRoundingType::FLOOR;
306 
307  return arm_compute::Conv3dInfo{stride, padding, activationInfo, dilation, roundType, isFastMathEnabled};
308 }
uint32_t m_PadBack
Padding back value in the depth dimension.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_PadBottom
Padding bottom value in the height dimension.
uint32_t m_DilationX
Dilation along x axis.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
uint32_t m_PadFront
Padding front value in the depth dimension.
uint32_t m_PadLeft
Padding left value in the width dimension.
uint32_t m_PadRight
Padding right value in the width dimension.
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor *activationDescPtr)
uint32_t m_PadTop
Padding top value in the height dimension.
uint32_t m_DilationZ
Dilation along z axis.
uint32_t m_StrideZ
Stride value when proceeding through input for the depth dimension.
uint32_t m_DilationY
Dilation along y axis.

◆ ComputeConv3DInfo() [2/2]

arm_compute::Conv3dInfo armnn::ComputeConv3DInfo ( const armnn::Convolution3dQueueDescriptor  queueDescriptor,
bool  isFastMathEnabled 
)
inline

Definition at line 310 of file ArmComputeUtils.hpp.

References ConvertAdditionalInfoToAclActivationLayerInfo(), QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, and Convolution3dDescriptor::m_StrideX.

312 {
313  auto descriptor = queueDescriptor.m_Parameters;
314  const arm_compute::Size3D stride{descriptor.m_StrideX, descriptor.m_StrideY, descriptor.m_StrideZ};
315  const arm_compute::Padding3D padding{descriptor.m_PadLeft, descriptor.m_PadRight,
316  descriptor.m_PadTop, descriptor.m_PadBottom,
317  descriptor.m_PadFront, descriptor.m_PadBack};
318  const arm_compute::Size3D dilation{descriptor.m_DilationX, descriptor.m_DilationY, descriptor.m_DilationZ};
319 
320  const arm_compute::ActivationLayerInfo activationInfo =
322  const auto roundType = arm_compute::DimensionRoundingType::FLOOR;
323 
324  return arm_compute::Conv3dInfo{stride, padding, activationInfo, dilation, roundType, isFastMathEnabled};
325 }
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
arm_compute::ActivationLayerInfo ConvertAdditionalInfoToAclActivationLayerInfo(const QueueDescriptor &queueDescriptor)

◆ ComputePositiveAxis()

unsigned int armnn::ComputePositiveAxis ( const int &  axis,
const armnn::TensorInfo tensor 
)
inline

Function to convert axis to its positive equivalent value.

[-rank, rank) –> [0, rank)

Definition at line 280 of file ArmComputeUtils.hpp.

References ARMNN_ASSERT, and TensorInfo::GetNumDimensions().

281 {
282  int rank = static_cast<int>(tensor.GetNumDimensions());
283 
284  ARMNN_ASSERT(rank != 0);
285  ARMNN_ASSERT((-1 * rank) <= axis);
286  ARMNN_ASSERT(axis < rank);
287 
288  int positiveAxis = (axis < 0) ? rank + axis : axis;
289  return static_cast<unsigned int>(positiveAxis);
290 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
unsigned int GetNumDimensions() const
Definition: Tensor.hpp:195

◆ ComputeReductionTensorShape()

const TensorInfo armnn::ComputeReductionTensorShape ( const armnn::TensorInfo input,
const std::vector< uint32_t > &  vAxis,
const bool  keepDims 
)
inline

Function to compute the output tensor shape based on the axes and if keepDims is set.

Definition at line 352 of file ArmComputeUtils.hpp.

References TensorInfo::GetNumDimensions(), and numeric_cast().

Referenced by ChainReduceLayers().

355 {
356  auto reducedTensorInfo = input;
357  unsigned int rank = reducedTensorInfo.GetNumDimensions();
358  unsigned int outputRank = 0;
359  // Calculate output dimension
360  if (keepDims)
361  {
362  outputRank = rank;
363  }
364  else if (vAxis.empty())
365  {
366  outputRank = 1;
367  }
368  else if (vAxis.size() > reducedTensorInfo.GetNumDimensions())
369  {
370  throw LayerValidationException("ReduceLayer: Dimensions to reduce can not be bigger than input dimensions");
371  }
372  else
373  {
374  outputRank = reducedTensorInfo.GetNumDimensions() - armnn::numeric_cast<unsigned int>(vAxis.size());
375  if (outputRank == 0)
376  {
377  outputRank = 1;
378  }
379  }
380  std::vector<unsigned int> dimSizes(outputRank, 1);
381  if (!vAxis.empty())
382  {
383  // Skip the dimension that has been reduced unless keepDims is true.
384  unsigned int outputIndex = 0;
385  for (unsigned int i = 0; i < reducedTensorInfo.GetNumDimensions(); ++i)
386  {
387  if (std::find(vAxis.begin(), vAxis.end(), i) == vAxis.end())
388  {
389  dimSizes[outputIndex] = armnn::numeric_cast<unsigned int>(reducedTensorInfo.GetShape()[i]);
390  ++outputIndex;
391  }
392  else if (keepDims)
393  {
394  dimSizes[outputIndex] = 1;
395  ++outputIndex;
396  }
397  }
398  }
399  const TensorShape inferredShape = TensorShape(outputRank, dimSizes.data());
400  reducedTensorInfo.SetShape(inferredShape);
401  return reducedTensorInfo;
402 }
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35
unsigned int GetNumDimensions() const
Definition: Tensor.hpp:195

◆ ComputeSoftmaxAclAxis()

T armnn::ComputeSoftmaxAclAxis ( const SoftmaxDescriptor softmaxDesc,
const armnn::TensorInfo tensor 
)
inline

Definition at line 225 of file ArmComputeUtils.hpp.

References ARMNN_ASSERT, TensorInfo::GetNumDimensions(), and SoftmaxDescriptor::m_Axis.

226 {
227  // Detect the Android default value of -1 and return the ACL default value of 0.
228  if (softmaxDesc.m_Axis == -1)
229  {
230  return 0;
231  }
232 
233  unsigned int dim = tensor.GetNumDimensions();
234 
235  ARMNN_ASSERT(dim != 0);
236 
237  // Currently ArmNN support axis 1.
238  auto aclAxis = (static_cast<T>(dim) - 1);
239  aclAxis = aclAxis > 0 ? aclAxis -1 : aclAxis;
240 
241  return aclAxis;
242 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
unsigned int GetNumDimensions() const
Definition: Tensor.hpp:195

◆ ComputeSplitAxis()

std::set<unsigned int> armnn::ComputeSplitAxis ( const armnn::SplitterDescriptor desc,
const TensorShape input 
)
inline

Definition at line 244 of file ArmComputeUtils.hpp.

References ViewsDescriptor::GetNumDimensions(), ViewsDescriptor::GetNumViews(), and ViewsDescriptor::GetViewSizes().

Referenced by ClSplitterWorkload::ClSplitterWorkload(), SplitterLayer::CreateWorkload(), ClLayerSupport::IsSplitterSupported(), NeonLayerSupport::IsSplitterSupported(), and NeonSplitterWorkload::NeonSplitterWorkload().

245 {
246  unsigned int numSplit = desc.GetNumViews();
247  unsigned int numDimensions = desc.GetNumDimensions();
248  std::set<unsigned int> splitAxis;
249 
250  for (unsigned int i = 0; i < numSplit; ++i)
251  {
252  for (unsigned int dimIdx = 0; dimIdx < numDimensions; ++dimIdx)
253  {
254  if (desc.GetViewSizes(i)[dimIdx] != input[dimIdx])
255  {
256  splitAxis.insert(dimIdx);
257  }
258  }
259  }
260  return splitAxis;
261 }
uint32_t GetNumDimensions() const
Get the number of dimensions.
uint32_t GetNumViews() const
Get the number of views.
const uint32_t * GetViewSizes(uint32_t idx) const
Get the view sizes at the int value idx.

◆ Concatenate()

void Concatenate ( const ConcatQueueDescriptor data,
std::vector< ITensorHandle *>  inputs,
std::vector< ITensorHandle *>  outputs 
)

Definition at line 14 of file Concatenate.cpp.

References ARMNN_ASSERT, TensorInfo::GetNumDimensions(), TensorInfo::GetShape(), GetTensorInfo(), ConcatQueueDescriptor::ViewOrigin::m_Origin, ConcatQueueDescriptor::m_ViewOrigins, and MaxNumOfTensorDimensions.

Referenced by RefConcatWorkload::ExecuteAsync().

17 {
18  const TensorInfo& outputInfo0 = GetTensorInfo(outputs[0]);
19 
20  std::unique_ptr<Encoder<float>> encoderPtr = MakeEncoder<float>(outputInfo0, outputs[0]->Map());
21  Encoder<float>& encoder = *encoderPtr;
22 
23  for (unsigned int index = 0 ; index < outputInfo0.GetNumElements(); ++index)
24  {
25  unsigned int indices[MaxNumOfTensorDimensions] = { 0 };
26 
27  unsigned int indexRemainder = index;
28  unsigned int dimensionStride = outputInfo0.GetNumElements();
29 
30  for (unsigned int i = 0; i < outputInfo0.GetNumDimensions(); i++)
31  {
32  dimensionStride /= outputInfo0.GetShape()[i];
33  indices[i] = indexRemainder / dimensionStride; // Use integer division to round down.
34  indexRemainder -= indices[i] * dimensionStride;
35  }
36 
37  for (unsigned int viewIdx = 0; viewIdx < data.m_ViewOrigins.size(); ++viewIdx)
38  {
39  ConcatQueueDescriptor::ViewOrigin const& view = data.m_ViewOrigins[viewIdx];
40 
41  //Split view extents are defined by the size of (the corresponding) input tensor.
42  const TensorInfo& inputInfo = GetTensorInfo(inputs[viewIdx]);
43  ARMNN_ASSERT(inputInfo.GetNumDimensions() == outputInfo0.GetNumDimensions());
44 
45  // Check all dimensions to see if this element is inside the given input view.
46  bool insideView = true;
47  for (unsigned int i = 0; i < inputInfo.GetNumDimensions(); i++)
48  {
49  if (indices[i] < view.m_Origin[i])
50  {
51  insideView = false;
52  }
53  if (indices[i] >= view.m_Origin[i] + inputInfo.GetShape()[i])
54  {
55  insideView = false;
56  }
57  }
58 
59  if (insideView)
60  {
61  std::unique_ptr<Decoder<float>> decoderPtr =
62  MakeDecoder<float>(inputInfo,inputs[viewIdx]->Map());
63  Decoder<float>& decoder = *decoderPtr;
64  unsigned int inIndex = 0;
65  unsigned int dimensionStride = 1;
66 
67  for (unsigned int i = inputInfo.GetNumDimensions(); i-- > 0;)
68  {
69  inIndex += dimensionStride * (indices[i] - view.m_Origin[i]);
70  dimensionStride *= inputInfo.GetShape()[i];
71  }
72  decoder += inIndex;
73  encoder.Set(decoder.Get());
74 
75  //What should we do if input views overlap on the output tensor?
76  //We could error, take the average, or shm else...
77  //For now just stop after finding first view (input) that matches.
78  break;
79  }
80  }
81  ++encoder;
82  }
83 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
armnn::TensorInfo GetTensorInfo(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout, const armnn::DataType dataType)
Definition: TensorUtils.cpp:38
constexpr unsigned int MaxNumOfTensorDimensions
Definition: Types.hpp:31

◆ ConditionalThrow() [1/2]

void armnn::ConditionalThrow ( bool  condition,
const std::string &  message 
)

Definition at line 165 of file Exceptions.hpp.

166 {
167  if (!condition)
168  {
169  throw ExceptionType(message);
170  }
171 }

◆ ConditionalThrow() [2/2]

void armnn::ConditionalThrow ( bool  condition)

Definition at line 174 of file Exceptions.hpp.

175 {
176  if (!condition)
177  {
178  throw ExceptionType();
179  }
180 }

◆ ConditionalThrowIfNotEqual()

void armnn::ConditionalThrowIfNotEqual ( const std::string &  message,
const ComparedType &  leftHandSide,
const ComparedType &  rightHandSide 
)

ComparedType must support: operator==(const ComparedType&) operator<<(ostream&, const ComparedType&)

Definition at line 189 of file Exceptions.hpp.

192 {
193  if (!(leftHandSide == rightHandSide))
194  {
195  std::stringstream ss;
196  ss << message << " : " << leftHandSide << " != " << rightHandSide;
197  throw ExceptionType(ss.str());
198  }
199 }

◆ ConfigureDetailsObject()

void armnn::ConfigureDetailsObject ( JsonChildObject detailsObject,
std::string  layerDetailsStr 
)

Definition at line 295 of file Profiling.cpp.

References ExecObjectDesc, JsonChildObject::SetAndParseDetails(), and JsonChildObject::SetType().

297 {
298  detailsObject.SetType(JsonObjectType::ExecObjectDesc);
299  detailsObject.SetAndParseDetails(layerDetailsStr);
300 
301 }

◆ ConfigureLogging()

void ConfigureLogging ( bool  printToStandardOutput,
bool  printToDebugOutput,
LogSeverity  severity 
)

Configures the logging behaviour of the ARMNN library.

printToStandardOutput: Set to true if log messages should be printed to the standard output. printToDebugOutput: Set to true if log messages be printed to a platform-specific debug output (where supported). severity: All log messages that are at this severity level or higher will be printed, others will be ignored.

Examples:
AsyncExecutionSample.cpp, CustomMemoryAllocatorSample.cpp, and SimpleSample.cpp.

Definition at line 18 of file Utils.cpp.

References SetAllLoggingSinks(), SetLogFilter(), and Trace.

Referenced by ArmnnDevice::ArmnnDevice(), ConfigureLoggingTest(), and main().

19 {
20  SetAllLoggingSinks(printToStandardOutput, printToDebugOutput, false);
21  SetLogFilter(severity);
22 }
void SetAllLoggingSinks(bool standardOut, bool debugOut, bool coloured)
Definition: Logging.cpp:191
void SetLogFilter(LogSeverity level)
Definition: Logging.cpp:73

◆ ConfigureTuner()

void armnn::ConfigureTuner ( arm_compute::CLTuner &  tuner,
TuningLevel  level 
)

Definition at line 115 of file ClBackendContext.cpp.

References ARMNN_LOG, Exhaustive, info, None, Normal, and Rapid.

Referenced by ClBackendContext::ClBackendContext().

116 {
117  tuner.set_tune_new_kernels(true); // Turn on tuning initially.
118 
119  switch (level)
120  {
121  case TuningLevel::Rapid:
122  ARMNN_LOG(info) << "Gpu tuning is activated. TuningLevel: Rapid (1)";
123  tuner.set_tuner_mode(arm_compute::CLTunerMode::RAPID);
124  break;
125  case TuningLevel::Normal:
126  ARMNN_LOG(info) << "Gpu tuning is activated. TuningLevel: Normal (2)";
127  tuner.set_tuner_mode(arm_compute::CLTunerMode::NORMAL);
128  break;
129  case TuningLevel::Exhaustive:
130  ARMNN_LOG(info) << "Gpu tuning is activated. TuningLevel: Exhaustive (3)";
131  tuner.set_tuner_mode(arm_compute::CLTunerMode::EXHAUSTIVE);
132  break;
133  case TuningLevel::None:
134  default:
135  tuner.set_tune_new_kernels(false); // Turn off tuning. Set to "use" only mode.
136  break;
137  }
138 }
#define ARMNN_LOG(severity)
Definition: Logging.hpp:205

◆ Convert1HWOTensorInfoToAcl()

std::tuple< TensorInfo, unsigned int > Convert1HWOTensorInfoToAcl ( const TensorInfo weightInfo,
const TensorInfo inputInfo,
const DataLayout  dataLayout 
)

Weights for depthwise have a datalayout of [1,H,W,O] = [1,H,W,I*M] This function coverts a TensorInfo from [1,H,W,I*M] to [1,I*M,H,W] (if NCHW) or keeps it at [1,H,W,I*M] (if NHWC) as required by the compute library Returns a tuple of converted weights tensor info and depth multiplier.

Definition at line 170 of file WorkloadUtils.cpp.

References GetDataLayoutName(), TensorInfo::GetShape(), NCHW, NHWC, and armnnUtils::Permuted().

Referenced by GatherTensorHandlePairs().

173 {
174  unsigned int aclDepthMultiplier = 1;
175  TensorInfo weightsPermuted;
176  if (dataLayout == armnn::DataLayout::NHWC)
177  {
178  // No permutation required. Input and weights data layouts are the same.
179  aclDepthMultiplier = weightInfo.GetShape()[3] / inputInfo.GetShape()[3];
180  weightsPermuted = weightInfo;
181  }
182 
183  else if (dataLayout == armnn::DataLayout::NCHW)
184  {
185  // Weights permutation required. Weights [N,H,W,C] and input [N,C,H,W] data layouts are different.
186  // [ 1, H, W, I*M] --> [ 1, I * M, H, W ]
187  aclDepthMultiplier = weightInfo.GetShape()[3] / inputInfo.GetShape()[1];
188  PermutationVector permutationVector{ 0, 2, 3, 1 };
189  weightsPermuted = armnnUtils::Permuted(weightInfo, permutationVector);
190  }
191  else
192  {
193  throw InvalidArgumentException(fmt::format("Unknown data layout for tensor info conversion: {}",
194  GetDataLayoutName(dataLayout)));
195  }
196 
197  return std::make_tuple(weightsPermuted, aclDepthMultiplier);
198 }
constexpr const char * GetDataLayoutName(DataLayout dataLayout)
Definition: TypesUtils.hpp:222
armnn::TensorShape Permuted(const armnn::TensorShape &srcShape, const armnn::PermutationVector &mappings)
Definition: Permute.cpp:98

◆ Convert1HWOTensorToAcl()

std::tuple< ConstTensor, unsigned int > Convert1HWOTensorToAcl ( const ConstTensorHandle weightTensor,
const TensorInfo inputInfo,
const DataLayout  dataLayout,
void *  permuteBuffer 
)

Weights for depthwise have a datalayout of [1,H,W,O] = [1,H,W,I*M] This function coverts a ConstCpuTensorHandle from [1,H,W,I*M] to [1,I*M,H,W] (if NCHW) or keeps it at [1,H,W,I*M] (if NHWC) as required by the compute library.

Parameters
weightTensor- ConstTensorHandle of weights tensor
inputInfo- TensorInfo of input tensor
dataLayout- DataLayout of the input tensor
permuteBuffer- Pointer to memory with the size of tensor. Used for the permutation
Returns
tuple of transformed weights-ConstTensor and depthwise multiplier

Definition at line 139 of file WorkloadUtils.cpp.

References GetDataLayoutName(), TensorInfo::GetShape(), ConstTensorHandle::GetTensorInfo(), NCHW, NHWC, and PermuteTensor().

Referenced by GatherTensorHandlePairs().

143 {
144  TensorInfo weightsInfo = weightTensor->GetTensorInfo();
145  unsigned int depthMultiplier = 1;
146  PermutationVector permutationVector{};
147  if (dataLayout == armnn::DataLayout::NHWC)
148  {
149  // No permutation required. Data layouts are the same.
150 
151  depthMultiplier = weightsInfo.GetShape()[3] / inputInfo.GetShape()[3];
152  }
153  else if (dataLayout == armnn::DataLayout::NCHW)
154  {
155  // [ 1, H, W, I*M] --> [ 1, I * M, H, W ]
156  depthMultiplier = weightsInfo.GetShape()[3] / inputInfo.GetShape()[1];
157  permutationVector = { 0, 2, 3, 1 };
158  }
159  else
160  {
161  throw InvalidArgumentException(fmt::format("Unknown data layout for tensor conversion: {}",
162  GetDataLayoutName(dataLayout)));
163  }
164 
165  ConstTensor weightsPermuted = PermuteTensor(weightTensor, permutationVector, permuteBuffer);
166 
167  return std::make_tuple(weightsPermuted, depthMultiplier);
168 }
armnn::ConstTensor PermuteTensor(const ConstTensorHandle *tensor, const PermutationVector &permutationVector, void *permuteBuffer)
constexpr const char * GetDataLayoutName(DataLayout dataLayout)
Definition: TypesUtils.hpp:222

◆ Convert1HWOtoMIHW()

std::tuple< ConstTensor, unsigned int > Convert1HWOtoMIHW ( const ConstTensorHandle weightTensor,
const TensorInfo inputInfo,
const DataLayout dataLayout,
void *  permuteBuffer 
)

Converts a (weights) tensor from [1, H, W, I*M] = [1, H, W, O] to [M, I, H, W].

Parameters
weightTensor- ConstTensorHandle of the weight tensor that should be converted
inputInfo- TensorInfo of the corresponding input tensor
dataLayout- DataLayout of the input tensor e.g. NHWC or NCHW
permuteBuffer- Memory location with the same size as the weight tensor to write converted data to
Returns
- A tuple of ConstTensor and unsigned int which is the converted weightTensor and the depthMultiplier

Definition at line 201 of file WorkloadUtils.cpp.

References DataLayoutIndexed::GetChannelsIndex(), TensorInfo::GetShape(), ConstTensorHandle::GetTensorInfo(), TensorInfo::HasPerAxisQuantization(), PermuteTensor(), and TensorInfo::SetShape().

Referenced by GatherTensorHandlePairs().

205 {
206  TensorInfo weightsInfo = weightTensor->GetTensorInfo();
207 
208  if (weightsInfo.HasPerAxisQuantization())
209  {
210  throw InvalidArgumentException("Can't convert tensor from [1,H,W,Cout] to [M,Cin,H,W] when per channel "
211  "quantization is applied.");
212  }
213 
214  // Reshape weights [ 1, H, W, I*M ] --> [ H, W, I, M ]
215  auto weightsShape = weightsInfo.GetShape();
216  auto channelIndex = armnnUtils::DataLayoutIndexed(dataLayout).GetChannelsIndex();
217  unsigned int depthMultiplier = weightsShape[3] / inputInfo.GetShape()[channelIndex];
218  weightsInfo.SetShape({ weightsShape[1],
219  weightsShape[2],
220  inputInfo.GetShape()[channelIndex],
221  depthMultiplier});
222 
223  // Permute [ H, W, I, M ] --> [ M, I, H, W ]
224  PermutationVector permutationVector = { 2, 3, 1, 0 };
225  ConstTensor weightsPermuted = PermuteTensor(weightTensor, permutationVector, permuteBuffer);
226 
227  return std::make_tuple(weightsPermuted, depthMultiplier);
228 }
armnn::ConstTensor PermuteTensor(const ConstTensorHandle *tensor, const PermutationVector &permutationVector, void *permuteBuffer)
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
unsigned int GetChannelsIndex() const

◆ ConvertActivationDescriptorToAclActivationLayerInfo() [1/2]

arm_compute::ActivationLayerInfo armnn::ConvertActivationDescriptorToAclActivationLayerInfo ( const ActivationDescriptor actDesc)
inline

◆ ConvertActivationDescriptorToAclActivationLayerInfo() [2/2]

arm_compute::ActivationLayerInfo armnn::ConvertActivationDescriptorToAclActivationLayerInfo ( const ActivationDescriptor activationDescPtr)
inline

Definition at line 92 of file ArmComputeUtils.hpp.

References ConvertActivationDescriptorToAclActivationLayerInfo().

93 {
94  if (activationDescPtr != nullptr)
95  {
96  return ConvertActivationDescriptorToAclActivationLayerInfo(static_cast<ActivationDescriptor>(
97  *activationDescPtr));
98  }
99  return arm_compute::ActivationLayerInfo();
100 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor *activationDescPtr)

◆ ConvertActivationFunctionToAclActivationFunction()

arm_compute::ActivationLayerInfo::ActivationFunction armnn::ConvertActivationFunctionToAclActivationFunction ( ActivationFunction  armnnFunction)
inline

Definition at line 61 of file ArmComputeUtils.hpp.

References Abs, BoundedReLu, Elu, HardSwish, LeakyReLu, Linear, ReLu, Sigmoid, SoftReLu, Sqrt, Square, and TanH.

Referenced by ConvertActivationDescriptorToAclActivationLayerInfo().

62 {
63  using AclActivationFunction = arm_compute::ActivationLayerInfo::ActivationFunction;
64 
65  switch (armnnFunction)
66  {
67  case ActivationFunction::Linear: return AclActivationFunction::LINEAR;
68  // Arm compute's 'logistic' function is non-parameterized, so it is exactly a sigmoid function.
69  case ActivationFunction::Sigmoid: return AclActivationFunction::LOGISTIC;
70  case ActivationFunction::ReLu: return AclActivationFunction::RELU;
71  case ActivationFunction::BoundedReLu: return AclActivationFunction::LU_BOUNDED_RELU;
72  case ActivationFunction::SoftReLu: return AclActivationFunction::SOFT_RELU;
73  case ActivationFunction::LeakyReLu: return AclActivationFunction::LEAKY_RELU;
74  case ActivationFunction::Abs: return AclActivationFunction::ABS;
75  case ActivationFunction::Sqrt: return AclActivationFunction::SQRT;
76  case ActivationFunction::Square: return AclActivationFunction::SQUARE;
77  case ActivationFunction::TanH: return AclActivationFunction::TANH;
78  case ActivationFunction::Elu: return AclActivationFunction::ELU;
79  case ActivationFunction::HardSwish: return AclActivationFunction::HARD_SWISH;
80  default: throw InvalidArgumentException("Unsupported activation function");
81  }
82 }
ActivationFunction
Definition: Types.hpp:86

◆ ConvertAdditionalInfoToAclActivationLayerInfo()

arm_compute::ActivationLayerInfo armnn::ConvertAdditionalInfoToAclActivationLayerInfo ( const QueueDescriptor queueDescriptor)
inline

Definition at line 103 of file ArmComputeUtils.hpp.

References ConvertActivationDescriptorToAclActivationLayerInfo(), and QueueDescriptor::GetAdditionalInformation().

Referenced by ClAdditionWorkload::ClAdditionWorkload(), ClDivisionWorkload::ClDivisionWorkload(), ClFullyConnectedWorkload::ClFullyConnectedWorkload(), ClMultiplicationWorkload::ClMultiplicationWorkload(), ClSubtractionWorkload::ClSubtractionWorkload(), ComputeConv3DInfo(), NeonAdditionWorkload::NeonAdditionWorkload(), NeonDivisionWorkload::NeonDivisionWorkload(), NeonMultiplicationWorkload::NeonMultiplicationWorkload(), and NeonSubtractionWorkload::NeonSubtractionWorkload().

104 {
105  const ActivationDescriptor* activationDescPtr = queueDescriptor.GetAdditionalInformation<ActivationDescriptor>();
106 
107  if (activationDescPtr != nullptr)
108  {
109  return ConvertActivationDescriptorToAclActivationLayerInfo(static_cast<ActivationDescriptor>(
110  *activationDescPtr));
111  }
112  return arm_compute::ActivationLayerInfo();
113 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor *activationDescPtr)

◆ ConvertBf16ToFp32Weight()

LayerT* armnn::ConvertBf16ToFp32Weight ( Layer l)

Definition at line 608 of file Network.cpp.

References BFloat16, FloatingPointConverter::ConvertBFloat16ToFloat32(), Convolution2d, Float32, FullyConnected, TensorInfo::GetDataType(), TensorInfo::GetNumElements(), TensorInfo::GetShape(), and info.

609 {
610  LayerT* layer = PolymorphicDowncast<LayerT*>(l);
611  if ((layer->GetType() == LayerType::Convolution2d || layer->GetType() == LayerType::FullyConnected)
612  && layer->m_Weight)
613  {
614  const TensorInfo& info = layer->m_Weight->GetTensorInfo();
615 
616  if (info.GetDataType() == DataType::BFloat16)
617  {
618  std::vector<float> newValues(info.GetNumElements());
619 
621  layer->m_Weight->template GetConstTensor<armnn::BFloat16>(), info.GetNumElements(), newValues.data());
622 
623  TensorInfo newInfo(info.GetShape(), DataType::Float32);
624  ConstTensor newInput(newInfo, newValues);
625  layer->m_Weight.reset(new ScopedTensorHandle(newInput));
626  }
627  }
628  return layer;
629 }
static void ConvertBFloat16ToFloat32(const void *srcBFloat16Buffer, size_t numElements, float *dstFloat32Buffer)
void FullyConnected(const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rWeightsShape, Decoder< float > &rWeightDecoder, Decoder< float > *pBiasDecoder, const bool biasEnabled, const unsigned int K, const bool transposeWeights)
Performs a matrix multiplication and optionally adds a bias.

◆ ConvertComparisonOperationToAcl()

arm_compute::ComparisonOperation armnn::ConvertComparisonOperationToAcl ( const ComparisonDescriptor descriptor)
inline

Definition at line 139 of file ArmComputeUtils.hpp.

References Equal, Greater, GreaterOrEqual, Less, LessOrEqual, ComparisonDescriptor::m_Operation, and NotEqual.

Referenced by ClComparisonWorkload::ClComparisonWorkload(), and NeonComparisonWorkload::NeonComparisonWorkload().

140 {
141  switch (descriptor.m_Operation)
142  {
143  case ComparisonOperation::Greater: return arm_compute::ComparisonOperation::Greater;
144  case ComparisonOperation::GreaterOrEqual: return arm_compute::ComparisonOperation::GreaterEqual;
145  case ComparisonOperation::Less: return arm_compute::ComparisonOperation::Less;
146  case ComparisonOperation::LessOrEqual: return arm_compute::ComparisonOperation::LessEqual;
147  case ComparisonOperation::Equal: return arm_compute::ComparisonOperation::Equal;
148  case ComparisonOperation::NotEqual: return arm_compute::ComparisonOperation::NotEqual;
149  default: throw InvalidArgumentException("Unsupported comparison function");
150  }
151 }

◆ ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo() [1/2]

arm_compute::FullyConnectedLayerInfo armnn::ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo ( const FullyConnectedDescriptor fullyConnectedDesc,
const ActivationDescriptor activationDesc 
)
inline

Definition at line 192 of file ArmComputeUtils.hpp.

References ConvertActivationDescriptorToAclActivationLayerInfo(), and FullyConnectedDescriptor::m_TransposeWeightMatrix.

Referenced by ClFullyConnectedWorkload::ClFullyConnectedWorkload().

194 {
195  arm_compute::FullyConnectedLayerInfo fc_info;
196  fc_info.transpose_weights = fullyConnectedDesc.m_TransposeWeightMatrix;
197  fc_info.activation_info = ConvertActivationDescriptorToAclActivationLayerInfo(activationDesc);
198  return fc_info;
199 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor *activationDescPtr)

◆ ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo() [2/2]

arm_compute::FullyConnectedLayerInfo armnn::ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo ( const FullyConnectedDescriptor fullyConnectedDesc,
arm_compute::ActivationLayerInfo  activationLayerInfo 
)
inline

Definition at line 202 of file ArmComputeUtils.hpp.

References FullyConnectedDescriptor::m_TransposeWeightMatrix.

204 {
205  arm_compute::FullyConnectedLayerInfo fc_info;
206  fc_info.transpose_weights = fullyConnectedDesc.m_TransposeWeightMatrix;
207  fc_info.activation_info = activationLayerInfo;
208  return fc_info;
209 }

◆ ConvertLogSeverity()

constexpr LogSeverity armnn::ConvertLogSeverity ( BoostLogSeverityMapping  severity)

Definition at line 199 of file Logging.hpp.

200 {
201  return static_cast<LogSeverity>(severity);
202 }
LogSeverity
Definition: Utils.hpp:14

◆ ConvertLstmActivationFuncToAclLayerInfo()

arm_compute::ActivationLayerInfo armnn::ConvertLstmActivationFuncToAclLayerInfo ( uint32_t  activationFunction)
inline

Definition at line 116 of file ArmComputeUtils.hpp.

117 {
118  // For preparing the object for the class ActivationLayerInfo, we need to consider 5 situations.
119  switch (activationFunction)
120  {
121  case 0:
122  return arm_compute::ActivationLayerInfo(); // no activation, do nothing
123  case 1:
124  return arm_compute::ActivationLayerInfo(arm_compute::ActivationLayerInfo::ActivationFunction::RELU);
125  case 3:
126  return arm_compute::ActivationLayerInfo(
127  arm_compute::ActivationLayerInfo::ActivationFunction::BOUNDED_RELU, 6.0);
128  case 4:
129  return arm_compute::ActivationLayerInfo(
130  arm_compute::ActivationLayerInfo::ActivationFunction::TANH, 1.0, 1.0);
131  case 6:
132  return arm_compute::ActivationLayerInfo(
133  arm_compute::ActivationLayerInfo::ActivationFunction::LOGISTIC);
134  default:
135  throw armnn::Exception("Wrong Type of Activation Function!");
136  }
137 }
Base class for all ArmNN exceptions so that users can filter to just those.
Definition: Exceptions.hpp:46

◆ ConvertMaskToACLFormat()

int32_t ConvertMaskToACLFormat ( int32_t  mask,
int32_t  numDim 
)

Definition at line 286 of file WorkloadUtils.cpp.

Referenced by ClStridedSliceWorkload::ClStridedSliceWorkload(), GatherTensorHandlePairs(), and NeonStridedSliceWorkload::NeonStridedSliceWorkload().

287 {
288  int32_t reversedMask = 0;
289  for (unsigned int i = 0; i < armnn::numeric_cast<unsigned int>(numDim); ++i)
290  {
291  // Check if bit set in mask for each dimension
292  int32_t bit = (mask & 1 << i) != 0;
293  // Increment the new mask with the bits reversed
294  reversedMask += (bit << std::max(numDim-(armnn::numeric_cast<int>(i)+1), 0));
295  }
296 
297  return reversedMask;
298 }

◆ ConvertNormalizationAlgorithmChannelToAclNormType()

arm_compute::NormType armnn::ConvertNormalizationAlgorithmChannelToAclNormType ( NormalizationAlgorithmChannel  channelType)
inline

Definition at line 180 of file ArmComputeUtils.hpp.

References Across, and Within.

181 {
182  using arm_compute::NormType;
183  switch (channelType)
184  {
185  case NormalizationAlgorithmChannel::Across: return NormType::CROSS_MAP;
186  case NormalizationAlgorithmChannel::Within: return NormType::IN_MAP_2D;
187  default: throw InvalidArgumentException("Unsupported normalization algorithm channel type");
188  }
189 }

◆ ConvertOutputShapeRoundingToAclDimensionRoundingType()

arm_compute::DimensionRoundingType armnn::ConvertOutputShapeRoundingToAclDimensionRoundingType ( OutputShapeRounding  rounding)
inline

Definition at line 166 of file ArmComputeUtils.hpp.

References Ceiling, and Floor.

168 {
169  using arm_compute::DimensionRoundingType;
170 
171  switch (rounding)
172  {
173  case OutputShapeRounding::Ceiling: return DimensionRoundingType::CEIL;
174  case OutputShapeRounding::Floor: return DimensionRoundingType::FLOOR;
175  default: throw InvalidArgumentException("Unsupported Output Shape Rounding type");
176  }
177 }

◆ ConvertPaddingModeToAcl()

arm_compute::PaddingMode armnn::ConvertPaddingModeToAcl ( const PaddingMode paddingMode)
inline

Definition at line 327 of file ArmComputeUtils.hpp.

References Constant, Reflect, and Symmetric.

328 {
329  switch (paddingMode)
330  {
331  case PaddingMode::Constant: return arm_compute::PaddingMode::CONSTANT;
332  case PaddingMode::Reflect: return arm_compute::PaddingMode::REFLECT;
333  case PaddingMode::Symmetric: return arm_compute::PaddingMode::SYMMETRIC;
334  default: throw InvalidArgumentException("Unsupported Padding Mode");
335  }
336 }

◆ ConvertPoolingAlgorithmToAclPoolingType()

arm_compute::PoolingType armnn::ConvertPoolingAlgorithmToAclPoolingType ( PoolingAlgorithm  poolingAlgorithm)
inline

Definition at line 153 of file ArmComputeUtils.hpp.

References Average, L2, and Max.

154 {
155  using arm_compute::PoolingType;
156 
157  switch (poolingAlgorithm)
158  {
159  case PoolingAlgorithm::Max: return PoolingType::MAX;
160  case PoolingAlgorithm::Average: return PoolingType::AVG;
161  case PoolingAlgorithm::L2: return PoolingType::L2;
162  default: throw InvalidArgumentException("Unsupported pooling algorithm");
163  }
164 }

◆ ConvertReductionOperationToAcl()

arm_compute::ReductionOperation armnn::ConvertReductionOperationToAcl ( const ReduceDescriptor descriptor)
inline

Definition at line 338 of file ArmComputeUtils.hpp.

References ReduceDescriptor::m_ReduceOperation, Max, Mean, Min, Prod, and Sum.

339 {
340  switch (descriptor.m_ReduceOperation)
341  {
342  case ReduceOperation::Sum: return arm_compute::ReductionOperation::SUM;
343  case ReduceOperation::Mean: return arm_compute::ReductionOperation::MEAN_SUM;
344  case ReduceOperation::Max: return arm_compute::ReductionOperation::MAX;
345  case ReduceOperation::Min: return arm_compute::ReductionOperation::MIN;
346  case ReduceOperation::Prod: return arm_compute::ReductionOperation::PROD;
347  default: throw InvalidArgumentException("Unsupported Reduction operation");
348  }
349 }

◆ ConvertResizeMethodToAclInterpolationPolicy()

arm_compute::InterpolationPolicy armnn::ConvertResizeMethodToAclInterpolationPolicy ( ResizeMethod  resizeMethod)
inline

Definition at line 211 of file ArmComputeUtils.hpp.

References Bilinear, and NearestNeighbor.

212 {
213  switch (resizeMethod)
214  {
215  case ResizeMethod::Bilinear:
216  return arm_compute::InterpolationPolicy::BILINEAR;
217  case ResizeMethod::NearestNeighbor:
218  return arm_compute::InterpolationPolicy::NEAREST_NEIGHBOR;
219  default:
220  throw InvalidArgumentException("Unsupported resize method");
221  }
222 }

◆ ConvertWeightTensorFromArmnnToAcl()

armnn::ConstTensor ConvertWeightTensorFromArmnnToAcl ( const ConstTensorHandle weightTensor,
DataLayout  dataLayout,
void *  permuteBuffer 
)

Definition at line 230 of file WorkloadUtils.cpp.

References ARMNN_ASSERT_MSG, Float16, Float32, BaseTensor< MemoryType >::GetDataType(), BaseTensor< MemoryType >::GetInfo(), TensorInfo::GetShape(), ConstTensorHandle::GetTensorInfo(), NCHW, NHWC, PermuteTensor(), QAsymmS8, QAsymmU8, QSymmS8, and ReshapeWeightsForAcl().

Referenced by GatherTensorHandlePairs().

233 {
234  ARMNN_ASSERT_MSG(weightTensor, "Invalid input tensor");
235  ARMNN_ASSERT_MSG(permuteBuffer, "Invalid permute buffer");
236 
237  auto multiplier = weightTensor->GetTensorInfo().GetShape()[0];
238  auto inputChannels = weightTensor->GetTensorInfo().GetShape()[1];
239 
240  // Convert the weight format from ArmNN's [ M, I, H, W ] (does NOT depend on the data layout) to either
241  // [ 1, H, W, I * M ] (if NHWC) or [ 1, I * M, H, W ] (if NCHW), as required by the compute library
242 
243  // 1. Permute the weights if necessary
244  // If the data layout is NCHW no permutation is necessary, as a reshape to [ 1, I * M, H, W ] can be better done
245  // starting from the current shape of [ M, I, H, W ]
246  // If no permutation is necessary, leave the permutation vector empty
247  PermutationVector permutationVector{};
248  if (dataLayout == DataLayout::NHWC)
249  {
250  // The data layout is NHWC, then permute the weights from [ M, I, H, W ] to [ H, W, I, M ]
251  permutationVector = { 3, 2, 0, 1 };
252  }
253  ConstTensor weightPermuted = PermuteTensor(weightTensor, permutationVector, permuteBuffer);
254 
255  // Shuffle the weights data to obtain the channel order needed used by Acl
256  if (multiplier > 1 && inputChannels > 1 && dataLayout == DataLayout::NCHW)
257  {
258  switch (weightPermuted.GetDataType())
259  {
260  case DataType::Float32:
261  weightPermuted = ReorderWeightChannelsForAcl<float>(weightPermuted, dataLayout, permuteBuffer);
262  break;
263  case DataType::Float16:
264  weightPermuted =
265  ReorderWeightChannelsForAcl<half_float::half>(weightPermuted, dataLayout, permuteBuffer);
266  break;
267  case DataType::QAsymmS8:
268  case DataType::QAsymmU8:
269  weightPermuted = ReorderWeightChannelsForAcl<uint8_t>(weightPermuted, dataLayout, permuteBuffer);
270  break;
271  case DataType::QSymmS8:
272  weightPermuted = ReorderWeightChannelsForAcl<int8_t>(weightPermuted, dataLayout, permuteBuffer);
273  break;
274  default:
275  break;
276  }
277  }
278 
279  // 2. Reshape the weights
280  ReshapeWeightsForAcl(weightPermuted.GetInfo(), dataLayout);
281 
282  // 3. Return both the tensor and the allocated storage to ensure that the data stays alive
283  return weightPermuted;
284 }
armnn::ConstTensor PermuteTensor(const ConstTensorHandle *tensor, const PermutationVector &permutationVector, void *permuteBuffer)
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
void ReshapeWeightsForAcl(TensorInfo &weightInfo, DataLayout dataLayout)

◆ ConvertWeightTensorInfoFromArmnnToAcl()

TensorInfo ConvertWeightTensorInfoFromArmnnToAcl ( const TensorInfo weightInfo,
DataLayout  dataLayout 
)

Definition at line 115 of file WorkloadUtils.cpp.

References NHWC, armnnUtils::Permuted(), and ReshapeWeightsForAcl().

Referenced by GatherTensorHandlePairs().

116 {
117  // Convert the weight format from ArmNN's [ M, I, H, W ] (does NOT depend on the data layout) to either
118  // [ 1, H, W, I * M ] (if NHWC) or [ 1, I * M, H, W ] (if NCHW), as required by the compute library
119 
120  // 1. Permute the weights if necessary
121  // If the data layout is NCHW no permutation is necessary, as a reshape to [ 1, I * M, H, W ] can be better done
122  // starting from the current shape of [ M, I, H, W ]
123  TensorInfo weightPermutedInfo(weightInfo);
124  if (dataLayout == DataLayout::NHWC)
125  {
126  // The data layout is NHWC, then permute the weights from [ M, I, H, W ] to [ H, W, I, M ]
127  PermutationVector permutationVector{ 3, 2, 0, 1 };
128  weightPermutedInfo = armnnUtils::Permuted(weightInfo, permutationVector);
129  }
130 
131  // 2. Reshape the weights
132  ReshapeWeightsForAcl(weightPermutedInfo, dataLayout);
133 
134  // 3. Return the permuted weight info
135  return weightPermutedInfo;
136 }
void ReshapeWeightsForAcl(TensorInfo &weightInfo, DataLayout dataLayout)
armnn::TensorShape Permuted(const armnn::TensorShape &srcShape, const armnn::PermutationVector &mappings)
Definition: Permute.cpp:98

◆ Convolve()

void Convolve ( const TensorShape rInputShape,
Decoder< float > &  rInputDecoder,
const TensorShape rOutputShape,
Encoder< float > &  rOutputEncoder,
const TensorShape rFilterShape,
Decoder< float > &  rFilterDecoder,
bool  biasEnabled,
Decoder< float > *  pBiasDecoder,
DataLayout  dataLayout,
unsigned int  paddingTop,
unsigned int  paddingLeft,
unsigned int  xStride,
unsigned int  yStride,
unsigned int  xDilation,
unsigned int  yDilation,
bool  depthwise 
)

Definition at line 71 of file ConvImpl.cpp.

References Decoder< IType >::DecodeTensor(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetDataLayout(), DataLayoutIndexed::GetHeightIndex(), DataLayoutIndexed::GetWidthIndex(), NHWC, and Encoder< IType >::Set().

Referenced by RefDepthwiseConvolution2dWorkload::ExecuteAsync(), and RefConvolution2dWorkload::ExecuteAsync().

87 {
88  if (biasEnabled && !pBiasDecoder)
89  {
90  throw InvalidArgumentException("Bias is enabled but the bias data is invalid");
91  }
92  const armnnUtils::DataLayoutIndexed dataLayoutIndexed(dataLayout);
93 
94  const unsigned int channelsIndex = dataLayoutIndexed.GetChannelsIndex();
95  const unsigned int heightIndex = dataLayoutIndexed.GetHeightIndex();
96  const unsigned int widthIndex = dataLayoutIndexed.GetWidthIndex();
97 
98  // Weights layout:
99  // Conv2d: [O,H,W,I]
100  // Depthwise: [1,H,W,O]
101  const unsigned int inputChannels = rInputShape[channelsIndex];
102  const unsigned int outputChannels = rOutputShape[channelsIndex];
103  const unsigned int depthMultiplier = depthwise ? outputChannels/inputChannels : 1;
104 
105  const unsigned int batchSize = rOutputShape[0];
106  const unsigned int outputHeight = rOutputShape[heightIndex];
107  const unsigned int outputWidth = rOutputShape[widthIndex];
108  const unsigned int inputHeight = rInputShape[heightIndex];
109  const unsigned int inputWidth = rInputShape[widthIndex];
110 
111  const unsigned int filterHeight = depthwise ? rFilterShape[1] : rFilterShape[heightIndex];
112  const unsigned int filterWidth = depthwise ? rFilterShape[2] : rFilterShape[widthIndex];
113 
114  const std::vector<float> inputVec = rInputDecoder.DecodeTensor(rInputShape);
115  const std::vector<float> filterVec = rFilterDecoder.DecodeTensor(rFilterShape, depthwise);
116 
117  const TensorShape biasShape{outputChannels};
118  const std::vector<float> biasVec = biasEnabled ? pBiasDecoder->DecodeTensor(biasShape) : std::vector<float>();
119 
120  for (unsigned int batchIdx = 0; batchIdx < batchSize; batchIdx++)
121  {
122  for (unsigned int cOutput = 0; cOutput < outputChannels; cOutput++)
123  {
124  for (unsigned int yOutput = 0; yOutput < outputHeight; yOutput++)
125  {
126  for (unsigned int xOutput = 0; xOutput < outputWidth; xOutput++)
127  {
128  // This loop goes over each output element.
129  float sum = 0.0f;
130 
131  // For depthwise, each output channel corresponds to exactly one input channel.
132  // For normal, must loop over each input channel.
133  for (unsigned int cInput = 0; cInput < (depthwise ? 1 : inputChannels); cInput++)
134  {
135  for (unsigned int yFilter = 0; yFilter < filterHeight; yFilter++)
136  {
137  for (unsigned int xFilter = 0; xFilter < filterWidth; xFilter++)
138  {
139  // This loop goes over each input element for each output element.
140  unsigned int filterIndex = 0;
141 
142  // Since dimensionality of kernel depends on depthwiseness, so does index.
143  if (depthwise)
144  {
145  cInput = cOutput / depthMultiplier;
146  // filterDepth = outputChannels;
147  filterIndex = xFilter * outputChannels + cOutput +
148  yFilter * filterWidth * outputChannels;
149  }
150  else
151  {
152  // Keep this implementation, as using DataLayoutIndexed::GetIndex causes great
153  // performance regression.
154  if (dataLayoutIndexed.GetDataLayout() == DataLayout::NHWC)
155  {
156  filterIndex = cOutput * filterHeight * filterWidth * inputChannels +
157  yFilter * filterWidth * inputChannels +
158  xFilter * inputChannels +
159  cInput;
160  }
161  else
162  {
163  filterIndex = cOutput * filterWidth * filterHeight * inputChannels +
164  cInput * filterWidth * filterHeight +
165  yFilter * filterWidth +
166  xFilter;
167  }
168  }
169 
170  unsigned int yInput = yOutput * yStride + yFilter * yDilation;
171  unsigned int xInput = xOutput * xStride + xFilter * xDilation;
172 
173  float inputValue;
174 
175  // Check if we're in the padding.
176  if (yInput < paddingTop || yInput >= inputHeight + paddingTop ||
177  xInput < paddingLeft || xInput >= inputWidth + paddingLeft)
178  {
179  inputValue = 0.0f;
180  }
181  else
182  {
183  unsigned int inputIndex = 0;
184 
185  // Keep this implementation, as using DataLayoutIndexed::GetIndex causes great
186  // performance regression.
187  if (dataLayoutIndexed.GetDataLayout() == DataLayout::NHWC)
188  {
189  inputIndex = batchIdx * inputHeight * inputWidth * inputChannels +
190  (yInput - paddingTop) * inputWidth * inputChannels +
191  (xInput - paddingLeft) * inputChannels +
192  cInput;
193  }
194  else
195  {
196  inputIndex = batchIdx * inputWidth * inputHeight * inputChannels +
197  inputWidth * inputHeight * cInput +
198  inputWidth * (yInput - paddingTop) +
199  xInput - paddingLeft;
200  }
201  inputValue = inputVec[inputIndex];
202  }
203 
204  sum += filterVec[filterIndex] * inputValue;
205  }
206  }
207  }
208 
209  if (biasEnabled)
210  {
211  sum += biasVec[cOutput];
212  }
213 
214  unsigned int outIdx;
215  if (dataLayoutIndexed.GetDataLayout() == DataLayout::NHWC)
216  {
217  outIdx = batchIdx * outputHeight * outputWidth * outputChannels +
218  yOutput * outputWidth * outputChannels +
219  xOutput * outputChannels +
220  cOutput;
221  }
222  else
223  {
224  outIdx = batchIdx * outputHeight * outputWidth * outputChannels +
225  cOutput * outputHeight * outputWidth +
226  yOutput * outputWidth +
227  xOutput;
228  }
229 
230  rOutputEncoder[outIdx];
231  rOutputEncoder.Set(sum);
232  }
233  }
234  }
235  }
236 }
virtual std::vector< float > DecodeTensor(const TensorShape &tensorShape, bool isDepthwise=false)=0
virtual void Set(IType right)=0
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...

◆ Convolve3d()

void Convolve3d ( const TensorShape rInputShape,
Decoder< float > &  rInputDecoder,
const TensorShape rOutputShape,
Encoder< float > &  rOutputEncoder,
const TensorShape rFilterShape,
Decoder< float > &  rFilterDecoder,
bool  biasEnabled,
Decoder< float > *  pBiasDecoder,
DataLayout  dataLayout,
unsigned int  paddingTop,
unsigned int  paddingLeft,
unsigned int  paddingFront,
unsigned int  xStride,
unsigned int  yStride,
unsigned int  zStride,
unsigned int  xDilation,
unsigned int  yDilation,
unsigned int  zDilation 
)

Definition at line 11 of file Conv3dImpl.cpp.

References Decoder< IType >::DecodeTensor(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetDataLayout(), DataLayoutIndexed::GetDepthIndex(), DataLayoutIndexed::GetHeightIndex(), DataLayoutIndexed::GetWidthIndex(), NDHWC, and Encoder< IType >::Set().

Referenced by RefConvolution3dWorkload::ExecuteAsync().

29 {
30  if (biasEnabled && !pBiasDecoder)
31  {
32  throw InvalidArgumentException("Bias is enabled but the bias data is invalid");
33  }
34  const armnnUtils::DataLayoutIndexed dataLayoutIndexed(dataLayout);
35 
36  const unsigned int channelsIndex = dataLayoutIndexed.GetChannelsIndex();
37  const unsigned int heightIndex = dataLayoutIndexed.GetHeightIndex();
38  const unsigned int widthIndex = dataLayoutIndexed.GetWidthIndex();
39  const unsigned int depthIndex = dataLayoutIndexed.GetDepthIndex();
40 
41  const unsigned int inChannels = rInputShape[channelsIndex];
42  const unsigned int outChannels = rOutputShape[channelsIndex];
43 
44  const unsigned int batchSize = rOutputShape[0];
45  const unsigned int outputHeight = rOutputShape[heightIndex];
46  const unsigned int outputWidth = rOutputShape[widthIndex];
47  const unsigned int outputDepth = rOutputShape[depthIndex];
48  const unsigned int inputHeight = rInputShape[heightIndex];
49  const unsigned int inputWidth = rInputShape[widthIndex];
50  const unsigned int inputDepth = rInputShape[depthIndex];
51 
52  // Conv3d weights layout: [D,H,W,I,O]
53  const unsigned int filterDepth = rFilterShape[0];
54  const unsigned int filterHeight = rFilterShape[1];
55  const unsigned int filterWidth = rFilterShape[2];
56 
57  const std::vector<float> inputVec = rInputDecoder.DecodeTensor(rInputShape);
58  const std::vector<float> filterVec = rFilterDecoder.DecodeTensor(rFilterShape);
59 
60  const TensorShape biasShape{outChannels};
61  const std::vector<float> biasVec = biasEnabled ? pBiasDecoder->DecodeTensor(biasShape) : std::vector<float>();
62 
63  for (unsigned int batchIdx = 0; batchIdx < batchSize; batchIdx++)
64  {
65  for (unsigned int zOutput = 0; zOutput < outputDepth; zOutput++)
66  {
67  for (unsigned int xOutput = 0; xOutput < outputWidth; xOutput++)
68  {
69  for (unsigned int yOutput = 0; yOutput < outputHeight; yOutput++)
70  {
71  for (unsigned int cOutput = 0; cOutput < outChannels; cOutput++)
72  {
73  // This loop goes over each output element.
74  float sum = 0.0f;
75 
76  // Loop over each input channel.
77  for (unsigned int zFilter = 0; zFilter < filterDepth; zFilter++)
78  {
79  for (unsigned int yFilter = 0; yFilter < filterHeight; yFilter++)
80  {
81  for (unsigned int xFilter = 0; xFilter < filterWidth; xFilter++)
82  {
83  for (unsigned int cInput = 0; cInput < inChannels; cInput++)
84  {
85  // This loop goes over each input element for each output element.
86  unsigned int filterIndex = 0;
87 
88  // Conv3d weights layout: [D,H,W,I,O]
89  // Keep this implementation, as using DataLayoutIndexed::GetIndex
90  // causes large performance regression.
91  filterIndex = zFilter * filterHeight * filterWidth * inChannels * outChannels +
92  yFilter * filterWidth * inChannels * outChannels +
93  xFilter * inChannels * outChannels +
94  cInput * outChannels +
95  cOutput;
96 
97  unsigned int yInput = yOutput * yStride + yFilter * yDilation;
98  unsigned int xInput = xOutput * xStride + xFilter * xDilation;
99  unsigned int zInput = zOutput * zStride + zFilter * zDilation;
100 
101  float inputValue;
102 
103  // Check if we're in the padding.
104  if (yInput < paddingTop || yInput >= inputHeight + paddingTop ||
105  xInput < paddingLeft || xInput >= inputWidth + paddingLeft ||
106  zInput < paddingFront || zInput >= inputDepth + paddingFront)
107  {
108  inputValue = 0.0f;
109  }
110  else
111  {
112  unsigned int inputIndex = 0;
113 
114  // Keep this implementation, as using DataLayoutIndexed::GetIndex
115  // causes large performance regression.
116  if (dataLayoutIndexed.GetDataLayout() == DataLayout::NDHWC)
117  {
118  inputIndex =
119  batchIdx * inputDepth * inputHeight * inputWidth * inChannels +
120  (zInput-paddingFront) * inputHeight * inputWidth * inChannels +
121  (yInput-paddingTop) * inputWidth * inChannels +
122  (xInput-paddingLeft) * inChannels +
123  cInput;
124  }
125  else
126  {
127  // NCDHW DataLayout
128  inputIndex =
129  batchIdx * inputDepth * inputHeight * inputWidth * inChannels +
130  inputDepth * inputHeight * inputWidth * cInput +
131  (zInput-paddingFront) * inputHeight * inputWidth +
132  (yInput-paddingTop) * inputWidth +
133  xInput-paddingLeft;
134  }
135 
136  inputValue = inputVec[inputIndex];
137  }
138 
139  sum += filterVec[filterIndex] * inputValue;
140  }
141  }
142  }
143  }
144 
145  if (biasEnabled)
146  {
147  sum += biasVec[cOutput];
148  }
149 
150  unsigned int outIdx;
151  if (dataLayoutIndexed.GetDataLayout() == DataLayout::NDHWC)
152  {
153  outIdx = batchIdx * outputDepth * outputHeight * outputWidth * outChannels +
154  zOutput * outputHeight * outputWidth * outChannels +
155  yOutput * outputWidth * outChannels +
156  xOutput * outChannels +
157  cOutput;
158  }
159  else
160  {
161  // NCDHW DataLayout
162  outIdx = batchIdx * outputDepth * outputHeight * outputWidth * outChannels +
163  cOutput * outputDepth * outputHeight * outputWidth +
164  zOutput * outputHeight * outputWidth +
165  yOutput * outputWidth +
166  xOutput;
167  }
168 
169  rOutputEncoder[outIdx];
170  rOutputEncoder.Set(sum);
171  }
172  }
173  }
174  }
175  }
176 }
virtual std::vector< float > DecodeTensor(const TensorShape &tensorShape, bool isDepthwise=false)=0
virtual void Set(IType right)=0
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...

◆ CopyArmComputeClTensorData()

void armnn::CopyArmComputeClTensorData ( arm_compute::CLTensor &  dstTensor,
const T *  srcData 
)

Definition at line 56 of file ClWorkloadUtils.hpp.

References ARMNN_SCOPED_PROFILING_EVENT_CL.

Referenced by ClConstantWorkload::Execute().

57 {
58  {
59  ARMNN_SCOPED_PROFILING_EVENT_CL("MapClTensorForWriting");
60  dstTensor.map(true);
61  }
62 
63  {
64  ARMNN_SCOPED_PROFILING_EVENT_CL("CopyToClTensor");
65  armcomputetensorutils::CopyArmComputeITensorData<T>(srcData, dstTensor);
66  }
67 
68  dstTensor.unmap();
69 }
#define ARMNN_SCOPED_PROFILING_EVENT_CL(name)

◆ CopyArmComputeTensorData()

void armnn::CopyArmComputeTensorData ( arm_compute::Tensor &  dstTensor,
const T *  srcData 
)

Definition at line 54 of file NeonWorkloadUtils.hpp.

Referenced by InitializeArmComputeTensorData().

55 {
56  InitialiseArmComputeTensorEmpty(dstTensor);
57  CopyArmComputeITensorData(srcData, dstTensor);
58 }

◆ CopyTensorContentsGeneric()

void armnn::CopyTensorContentsGeneric ( const ITensorHandle srcTensor,
ITensorHandle dstTensor,
CopyFunc  copy 
)

Definition at line 46 of file WorkloadUtils.hpp.

References ARMNN_ASSERT, ARMNN_SCOPED_PROFILING_EVENT, TensorShape::GetNumDimensions(), ITensorHandle::GetShape(), ITensorHandle::GetStrides(), IgnoreUnused(), ITensorHandle::Map(), MaxNumOfTensorDimensions, Undefined, and ITensorHandle::Unmap().

Referenced by CopyToOutputTensor(), NeonConvertBf16ToFp32Workload::Execute(), NeonConvertFp32ToBf16Workload::Execute(), NeonConvertFp16ToFp32Workload::Execute(), NeonConvertFp32ToFp16Workload::Execute(), CopyMemGenericWorkload::Execute(), CopyMemGenericWorkload::ExecuteAsync(), and LoadedNetwork::FreeWorkingMemory().

47 {
48  // For ease of understanding, names are assigned to the dimensions
49  // of the tensor as if NHWC, however this routine works with any 5D tensor
50  static_assert(MaxNumOfTensorDimensions == 5, "Please update CopyTensorContents");
51 
52  TensorShape srcStrides = srcTensor->GetStrides();
53  const TensorShape& srcShape = srcTensor->GetShape();
54  const auto srcSize = srcTensor->GetStrides()[0] * srcShape[0];
55  IgnoreUnused(srcSize); // Only used for asserts
56  TensorShape dstStrides = dstTensor->GetStrides();
57  const TensorShape& dstShape = dstTensor->GetShape();
58  const auto dstSize = dstTensor->GetStrides()[0] * dstShape[0];
59  IgnoreUnused(dstSize); // Only used for asserts
60 
61  size_t srcDepth = 1;
62  size_t srcBatches = 1;
63  size_t srcHeight = 1;
64  size_t srcWidth = 1;
65  size_t srcChannels = 1;
66  AssignValues(srcShape.GetNumDimensions(),
67  0,
68  srcShape,
69  srcChannels,
70  srcWidth,
71  srcHeight,
72  srcBatches,
73  srcDepth);
74 
75  size_t srcDepthStride = 0;
76  size_t srcBatchStride = 0;
77  size_t srcHeightStride = 0;
78  size_t srcWidthStride = 0;
79  size_t srcChannelStride = 0;
80  AssignValues(srcStrides.GetNumDimensions(),
81  0,
82  srcStrides,
83  srcChannelStride,
84  srcWidthStride,
85  srcHeightStride,
86  srcBatchStride,
87  srcDepthStride);
88 
89  size_t dstDepth = 1;
90  size_t dstBatches = 1;
91  size_t dstHeight = 1;
92  size_t dstWidth = 1;
93  size_t dstChannels = 1;
94  AssignValues(dstShape.GetNumDimensions(),
95  0,
96  dstShape,
97  dstChannels,
98  dstWidth,
99  dstHeight,
100  dstBatches,
101  dstDepth);
102 
103  size_t dstDepthStride = 0;
104  size_t dstBatchStride = 0;
105  size_t dstHeightStride = 0;
106  size_t dstWidthStride = 0;
107  size_t dstChannelStride = 0;
108  AssignValues(dstStrides.GetNumDimensions(),
109  0,
110  dstStrides,
111  dstChannelStride,
112  dstWidthStride,
113  dstHeightStride,
114  dstBatchStride,
115  dstDepthStride);
116 
117  const unsigned char* srcDataStart;
118  unsigned char* dstDataStart;
119  {
120  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Synchronize buffers");
121  srcDataStart = static_cast<const uint8_t*>(srcTensor->Map());
122  dstDataStart = static_cast<uint8_t*>(dstTensor->Map());
123  }
124 
125  size_t copyLength = std::min(srcChannels * srcChannelStride, dstChannels * dstChannelStride);
126  size_t copyWidth = std::min(srcWidth, dstWidth);
127  size_t copyHeight = std::min(srcHeight, dstHeight);
128  size_t copyBatches = std::min(srcBatches, dstBatches);
129  size_t copyDepth = std::min(srcDepth, dstDepth);
130 
131  // Coalesce inner dimensions where possible
132  // to reduce overheard calling copy() and to
133  // allow for memory bandwidth optimisations
134  if (copyLength == srcWidthStride &&
135  copyLength == dstWidthStride)
136  {
137  // There is no special padding between rows,
138  // and sizes are compatible, so copy whole rows
139  copyLength *= copyWidth;
140  copyWidth = 1;
141 
142  if (copyLength == srcHeightStride &&
143  copyLength == dstHeightStride)
144  {
145  // There is no special padding between batches
146  // and sizes are compatible so copy whole batches
147  copyLength *= copyHeight;
148  copyHeight = 1;
149  }
150  }
151 
152  const unsigned char* srcData = srcDataStart;
153  unsigned char* dstData = dstDataStart;
154  for (unsigned int d = 0; d < copyDepth; ++d)
155  {
156  auto srcPtrDepth = srcData;
157  auto dstPtrDepth = dstData;
158  for (unsigned int b = 0; b < copyBatches; ++b)
159  {
160  auto srcPtrBatch = srcData;
161  auto dstPtrBatch = dstData;
162  for (unsigned int h = 0; h < copyHeight; ++h)
163  {
164  auto srcPtrChannel = srcData;
165  auto dstPtrChannel = dstData;
166  for (unsigned int w = 0; w < copyWidth; ++w)
167  {
168  ARMNN_ASSERT(srcData >= srcDataStart && srcData + copyLength <= srcDataStart + srcSize);
169  ARMNN_ASSERT(dstData >= dstDataStart && dstData + copyLength <= dstDataStart + dstSize);
170  copy(dstData, srcData, copyLength);
171  dstData += dstWidthStride;
172  srcData += srcWidthStride;
173  }
174  dstData += (static_cast<long>(dstHeightStride) - (dstData - dstPtrChannel));
175  srcData += (static_cast<long>(srcHeightStride) - (srcData - srcPtrChannel));
176  }
177  dstData += (static_cast<long>(dstBatchStride) - (dstData - dstPtrBatch));
178  srcData += (static_cast<long>(srcBatchStride) - (srcData - srcPtrBatch));
179  }
180  dstData += (static_cast<long>(dstDepthStride) - (dstData - dstPtrDepth));
181  srcData += (static_cast<long>(srcDepthStride) - (srcData - srcPtrDepth));
182  }
183 
184  srcTensor->Unmap();
185  dstTensor->Unmap();
186 }
void IgnoreUnused(Ts &&...)
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
constexpr unsigned int MaxNumOfTensorDimensions
Definition: Types.hpp:31

◆ CopyToOutputTensor()

void armnn::CopyToOutputTensor ( const Tensor outputTensor,
ITensorHandle outputTensorHandle 
)

Definition at line 1375 of file LoadedNetwork.cpp.

References CopyTensorContentsGeneric(), BaseTensor< MemoryType >::GetInfo(), and BaseTensor< MemoryType >::GetMemoryArea().

Referenced by LoadedNetwork::Execute().

1376 {
1377  auto copyFunc = [](void* dst, const void* src, size_t size)
1378  {
1379  memcpy(dst, src, size);
1380  };
1381 
1382  std::unique_ptr<ITensorHandle> tensorHandle =
1383  std::make_unique<PassthroughTensorHandle>(outputTensor.GetInfo(),
1384  outputTensor.GetMemoryArea());
1385 
1386  CopyTensorContentsGeneric(outputTensorHandle, tensorHandle.get(), copyFunc);
1387 }
void CopyTensorContentsGeneric(const ITensorHandle *srcTensor, ITensorHandle *dstTensor, CopyFunc copy)

◆ CreateAclNormalizationLayerInfoForL2Normalization()

arm_compute::NormalizationLayerInfo armnn::CreateAclNormalizationLayerInfoForL2Normalization ( const armnn::TensorInfo tensorInfo,
armnn::DataLayout  dataLayout 
)
inline

Definition at line 28 of file ArmComputeUtils.hpp.

References TensorInfo::GetShape(), and NCHW.

30 {
31  unsigned int depthDimension = dataLayout == armnn::DataLayout::NCHW ? 1 : 3;
32  const unsigned int depth = tensorInfo.GetShape()[depthDimension];
33 
34  // At the time of writing, {CL|Neon}L2Normalization performs the reduction only along dimension 0. This version of
35  // L2 Normalization always performs the reduction along the depth axis, though. Thus, we repurpose
36  // {CL|Neon}NormalizationLayers to act as depthwise L2 normalizations by carefully chosing the normalization
37  // parameters.
38  //
39  // Please refer to both the reference implementation of the normalization layer and the implementation of
40  // {CL|Neon}NormalizationLayer when checking the derivations for the parameter values below.
41 
42  // Make sure normalization covers the entire depth range. ACL requires the normalization size to be odd.
43  // CL: This does not result in extra kernel threads not doing any work: See usage of the RADIUS parameter in
44  // ACL's normalization_layer_cross_map() CL function.
45  const uint32_t normSize = depth * 2u + 1u;
46 
47  // See ACL's NormalizationLayerInfo::scale_coeff() definition.
48  // For the reference implementation, to make alpha_ become 1, we'd have to use alpha = normSize instead.
49  const float alpha = 1.0f;
50 
51  // Don't offset the reduction.
52  const float kappa = 0.0f;
53 
54  // pow(reduction, -0.5) = 1 / sqrt(reduction)
55  const float beta = 0.5f;
56 
57  return arm_compute::NormalizationLayerInfo(arm_compute::NormType::CROSS_MAP, normSize, alpha, beta, kappa, false);
58 }
const TensorShape & GetShape() const
Definition: Tensor.hpp:191

◆ CreateClContext()

flatbuffers::Offset<ClContext> armnn::CreateClContext ( flatbuffers::FlatBufferBuilder &  _fbb,
flatbuffers::Offset< flatbuffers::Vector< flatbuffers::Offset< armnn::Program >>>  programs = 0 
)
inline

Definition at line 57 of file ClContextSchema_generated.h.

References ClContextBuilder::add_programs(), and ClContextBuilder::Finish().

Referenced by CreateClContextDirect(), and ClContextSerializer::Serialize().

59  {
60  ClContextBuilder builder_(_fbb);
61  builder_.add_programs(programs);
62  return builder_.Finish();
63 }

◆ CreateClContextDirect()

flatbuffers::Offset<ClContext> armnn::CreateClContextDirect ( flatbuffers::FlatBufferBuilder &  _fbb,
const std::vector< flatbuffers::Offset< armnn::Program >> *  programs = nullptr 
)
inline

Definition at line 65 of file ClContextSchema_generated.h.

References CreateClContext().

67  {
68  auto programs__ = programs ? _fbb.CreateVector<flatbuffers::Offset<armnn::Program>>(*programs) : 0;
70  _fbb,
71  programs__);
72 }
flatbuffers::Offset< ClContext > CreateClContext(flatbuffers::FlatBufferBuilder &_fbb, flatbuffers::Offset< flatbuffers::Vector< flatbuffers::Offset< armnn::Program >>> programs=0)

◆ CreateDescriptorForConcatenation()

OriginsDescriptor armnn::CreateDescriptorForConcatenation ( TensorShapeIt  first,
TensorShapeIt  last,
unsigned int  concatenationDimension 
)

Convenience template to create an OriginsDescriptor to use when creating a ConcatLayer for performing concatenation of a number of input tensors.

Definition at line 261 of file Descriptors.hpp.

References OriginsDescriptor::SetConcatAxis(), and OriginsDescriptor::SetViewOriginCoord().

Referenced by Converter::ConvertOperation().

264 {
265  auto numInputs = std::distance(first, last);
266 
267  if (numInputs < 2)
268  {
269  throw InvalidArgumentException("Concatenation requires at least 2 inputs");
270  }
271 
272  const auto& firstInputShape = *first;
273 
274  const unsigned int numDimensions = firstInputShape.GetNumDimensions();
275  for (auto it = first + 1; it != last; ++it)
276  {
277  if (it->GetNumDimensions() != numDimensions)
278  {
279  throw InvalidArgumentException("All inputs to concatenation must have the same number of dimensions");
280  }
281  }
282 
283  if (concatenationDimension >= numDimensions)
284  {
285  throw InvalidArgumentException("concatenationDimension must be between 0 and the number of dimensions.");
286  }
287 
288  for (auto it = first; it != last; ++it)
289  {
290  for (unsigned int d = 0; d < numDimensions; ++d)
291  {
292  const bool dimSizeOk = (d == concatenationDimension) || (firstInputShape[d] == (*it)[d]);
293  if (!dimSizeOk)
294  {
295  throw InvalidArgumentException("All inputs to concatenation must be the same size along all dimensions "
296  " except the concatenation dimension");
297  }
298  }
299  }
300 
301  OriginsDescriptor viewsDescriptor(static_cast<uint32_t>(numInputs), numDimensions);
302  viewsDescriptor.SetConcatAxis(concatenationDimension);
303 
304  uint32_t viewIndex = 0u;
305  uint32_t coordAlongConcatDim = 0u;
306  for (auto it = first; it != last; ++it)
307  {
308  const auto& inputShape = *it;
309 
310  for (unsigned int i = 0; i < concatenationDimension; ++i)
311  {
312  viewsDescriptor.SetViewOriginCoord(viewIndex, i, 0);
313  }
314 
315  viewsDescriptor.SetViewOriginCoord(viewIndex, concatenationDimension, coordAlongConcatDim);
316  unsigned int dimSize = inputShape[concatenationDimension];
317  coordAlongConcatDim += dimSize;
318 
319 
320  for (unsigned int i = concatenationDimension + 1; i < numDimensions; ++i)
321  {
322  viewsDescriptor.SetViewOriginCoord(viewIndex, i, 0);
323  }
324 
325  ++viewIndex;
326  }
327 
328  return viewsDescriptor;
329 }

◆ CreateProgram()

flatbuffers::Offset<Program> armnn::CreateProgram ( flatbuffers::FlatBufferBuilder &  _fbb,
flatbuffers::Offset< flatbuffers::String >  name = 0,
flatbuffers::Offset< flatbuffers::Vector< uint8_t >>  binary = 0 
)
inline

Definition at line 118 of file ClContextSchema_generated.h.

References ProgramBuilder::add_binary(), ProgramBuilder::add_name(), and ProgramBuilder::Finish().

Referenced by CreateProgramDirect(), and ClContextSerializer::Serialize().

121  {
122  ProgramBuilder builder_(_fbb);
123  builder_.add_binary(binary);
124  builder_.add_name(name);
125  return builder_.Finish();
126 }

◆ CreateProgramDirect()

flatbuffers::Offset<Program> armnn::CreateProgramDirect ( flatbuffers::FlatBufferBuilder &  _fbb,
const char *  name = nullptr,
const std::vector< uint8_t > *  binary = nullptr 
)
inline

Definition at line 128 of file ClContextSchema_generated.h.

References CreateProgram().

131  {
132  auto name__ = name ? _fbb.CreateString(name) : 0;
133  auto binary__ = binary ? _fbb.CreateVector<uint8_t>(*binary) : 0;
134  return armnn::CreateProgram(
135  _fbb,
136  name__,
137  binary__);
138 }
flatbuffers::Offset< Program > CreateProgram(flatbuffers::FlatBufferBuilder &_fbb, flatbuffers::Offset< flatbuffers::String > name=0, flatbuffers::Offset< flatbuffers::Vector< uint8_t >> binary=0)

◆ CreateSupportedBackends()

BackendsMap CreateSupportedBackends ( TensorHandleFactoryRegistry handleFactoryRegistry,
BackendSettings backendSettings 
)

Definition at line 1102 of file Network.cpp.

References ARMNN_ASSERT, BackendRegistryInstance(), and BackendSettings::m_SupportedBackends.

Referenced by Optimize().

1104 {
1105  BackendsMap backends;
1106  auto const& backendRegistry = BackendRegistryInstance();
1107  for (auto&& selectedBackend : backendSettings.m_SupportedBackends)
1108  {
1109  auto backendFactory = backendRegistry.GetFactory(selectedBackend);
1110  auto backendObjPtr = backendFactory();
1111  ARMNN_ASSERT(backendObjPtr);
1112 
1113  backendObjPtr->RegisterTensorHandleFactories(handleFactoryRegistry);
1114 
1115  backends[backendObjPtr->GetId()] = std::move(backendObjPtr);
1116  }
1117 
1118  return backends;
1119 }
BackendRegistry & BackendRegistryInstance()
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
std::map< BackendId, std::unique_ptr< class IBackendInternal > > BackendsMap
Definition: Network.hpp:293

◆ Debug()

void Debug ( const TensorInfo inputInfo,
const T *  inputData,
LayerGuid  guid,
const std::string &  layerName,
unsigned int  slotIndex,
bool  outputsToFile 
)

Definition at line 97 of file Debug.cpp.

References Debug< BFloat16 >(), Debug< float >(), Debug< Half >(), Debug< int16_t >(), Debug< int32_t >(), Debug< int8_t >(), and Debug< uint8_t >().

Referenced by RefDebugWorkload< DataType >::ExecuteAsync().

103 {
104  if (outputsToFile)
105  {
106  fs::path tmpDir = fs::temp_directory_path();
107  std::ofstream out(tmpDir.generic_string() + "/ArmNNIntermediateLayerOutputs/" + layerName + ".numpy");
108  PrintOutput<T>(inputInfo, inputData, guid, layerName, slotIndex, out);
109  out.close();
110  }
111  else
112  {
113  PrintOutput<T>(inputInfo, inputData, guid, layerName, slotIndex, std::cout);
114  }
115 }

◆ Debug< BFloat16 >()

template void armnn::Debug< BFloat16 > ( const TensorInfo inputInfo,
const BFloat16 inputData,
LayerGuid  guid,
const std::string &  layerName,
unsigned int  slotIndex,
bool  outputsToFile 
)

Referenced by Debug().

◆ Debug< float >()

template void armnn::Debug< float > ( const TensorInfo inputInfo,
const float *  inputData,
LayerGuid  guid,
const std::string &  layerName,
unsigned int  slotIndex,
bool  outputsToFile 
)

Referenced by Debug().

◆ Debug< Half >()

template void armnn::Debug< Half > ( const TensorInfo inputInfo,
const Half inputData,
LayerGuid  guid,
const std::string &  layerName,
unsigned int  slotIndex,
bool  outputsToFile 
)

Referenced by Debug().

◆ Debug< int16_t >()

template void armnn::Debug< int16_t > ( const TensorInfo inputInfo,
const int16_t *  inputData,
LayerGuid  guid,
const std::string &  layerName,
unsigned int  slotIndex,
bool  outputsToFile 
)

Referenced by Debug().

◆ Debug< int32_t >()

template void armnn::Debug< int32_t > ( const TensorInfo inputInfo,
const int32_t *  inputData,
LayerGuid  guid,
const std::string &  layerName,
unsigned int  slotIndex,
bool  outputsToFile 
)

Referenced by Debug().

◆ Debug< int8_t >()

template void armnn::Debug< int8_t > ( const TensorInfo inputInfo,
const int8_t *  inputData,
LayerGuid  guid,
const std::string &  layerName,
unsigned int  slotIndex,
bool  outputsToFile 
)

Referenced by Debug().

◆ Debug< uint8_t >()

template void armnn::Debug< uint8_t > ( const TensorInfo inputInfo,
const uint8_t *  inputData,
LayerGuid  guid,
const std::string &  layerName,
unsigned int  slotIndex,
bool  outputsToFile 
)

Referenced by Debug().

◆ DeleteAsType()

void armnn::DeleteAsType ( const void *const  blob)

Definition at line 27 of file TosaRefBackend.cpp.

28 {
29  delete static_cast<const T*>(blob);
30 }

◆ DepthToSpace()

void DepthToSpace ( const TensorInfo inputInfo,
const DepthToSpaceDescriptor descriptor,
const void *  inputData,
void *  outputData,
unsigned int  dataTypeSize 
)

Definition at line 18 of file DepthToSpace.cpp.

References ARMNN_ASSERT, DepthToSpace(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetHeightIndex(), TensorShape::GetNumElements(), TensorInfo::GetShape(), DataLayoutIndexed::GetWidthIndex(), SpaceToDepthDescriptor::m_BlockSize, SpaceToDepthDescriptor::m_DataLayout, and armnnUtils::Permute().

Referenced by DepthToSpace().

23 {
24  const unsigned int blockSize = descriptor.m_BlockSize;
25  ARMNN_ASSERT(blockSize != 0u);
26 
27  const TensorShape& inputShape = inputInfo.GetShape();
28  const unsigned int batches = inputShape[0];
29 
30  armnnUtils::DataLayoutIndexed dataLayoutIndexed(descriptor.m_DataLayout);
31  const unsigned int inDepth = inputShape[dataLayoutIndexed.GetChannelsIndex()];
32  const unsigned int inHeight = inputShape[dataLayoutIndexed.GetHeightIndex()];
33  const unsigned int inWidth = inputShape[dataLayoutIndexed.GetWidthIndex()];
34 
35  const unsigned int outDepth = inDepth / (blockSize * blockSize);
36 
37  // The 4D input data can be interpreted as 6D (implicitly reshaped) as follows:
38  //
39  // [batch, block size, block size, inDepth, inHeight, inWidth] for NCHW and
40  // [batch, inHeight, inWidth, blockSize, blockSize, outDepth] for NHWC.
41  //
42  // DepthToSpace can then be implemented as a permutation in 6D resulting in
43  // the following shapes:
44  //
45  // [batch, outDepth, inHeight, blockSize, inWidth, blockSize] for NCHW and
46  // [batch, inHeight, blockSize, inWidth, blockSize, outDepth] for NHWC.
47  //
48  // NOTE:
49  // Since 6D tensors are not currently supported, in practice we need to handle each
50  // batch separately and execute 5D permutations
51 
52  TensorShape permDestShape;
53  PermutationVector permVector{};
54  if (descriptor.m_DataLayout == DataLayout::NCHW)
55  {
56  permDestShape = TensorShape({ outDepth, inHeight, blockSize, inWidth, blockSize });
57  permVector = { 2, 4, 0, 1, 3 };
58  }
59  else
60  {
61  permDestShape = TensorShape({ inHeight, blockSize, inWidth, blockSize, outDepth });
62  permVector = { 0, 2, 1, 3, 4 };
63  }
64 
65  const unsigned int numElementsPerBatch = inputShape.GetNumElements() / batches;
66 
67  for (unsigned int batchIndex = 0u; batchIndex < batches; ++batchIndex)
68  {
69  const uintptr_t batchDataOffset = batchIndex * (numElementsPerBatch * dataTypeSize);
70 
71  armnnUtils::Permute(permDestShape,
72  permVector,
73  static_cast<const void*>(reinterpret_cast<const uint8_t*>(inputData) + batchDataOffset),
74  static_cast<void*>(reinterpret_cast<uint8_t*>(outputData) + batchDataOffset),
75  dataTypeSize);
76  }
77 }
unsigned int GetNumElements() const
Function that calculates the tensor elements by multiplying all dimension size which are Specified...
Definition: Tensor.cpp:181
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
void Permute(const armnn::TensorShape &dstShape, const armnn::PermutationVector &mappings, const void *src, void *dst, size_t dataTypeSize)
Definition: Permute.cpp:131
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
unsigned int m_BlockSize
Scalar specifying the input block size. It must be >= 1.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).

◆ Dequantize() [1/4]

void Dequantize ( Decoder< float > &  inputDecoder,
Encoder< float > &  outputEncoder,
const TensorInfo inputInfo,
const TensorInfo outputInfo 
)

Definition at line 13 of file Dequantize.cpp.

References ARMNN_ASSERT, Decoder< IType >::Get(), TensorInfo::GetNumElements(), IgnoreUnused(), and Encoder< IType >::Set().

17 {
18  IgnoreUnused(outputInfo);
19  ARMNN_ASSERT(inputInfo.GetNumElements() == outputInfo.GetNumElements());
20  for (unsigned int i = 0; i < inputInfo.GetNumElements(); i++)
21  {
22  // inputDecoder.Get() dequantizes the data element from whatever
23  // type is given by inputInfo to fp32 (If MakeDecoder supports that dequantization)
24  // outputEncoder.Set() transforms the data element to whatever type is
25  // given by outputInfo (if MakeEncoder supports that transformation)
26  outputEncoder.Set(inputDecoder.Get());
27  ++outputEncoder;
28  ++inputDecoder;
29  }
30 }
virtual void Set(IType right)=0
void IgnoreUnused(Ts &&...)
virtual IType Get() const =0
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ Dequantize() [2/4]

std::vector<float> armnn::Dequantize ( const T *  quant,
const TensorInfo info 
)

u8 helpers

Definition at line 96 of file RefWorkloadUtils.hpp.

References Dequantize(), TensorInfo::GetNumElements(), TensorInfo::GetQuantizationOffset(), and TensorInfo::GetQuantizationScale().

97 {
98  std::vector<float> ret(info.GetNumElements());
99  for (size_t i = 0; i < info.GetNumElements(); i++)
100  {
101  ret[i] = armnn::Dequantize(quant[i], info.GetQuantizationScale(), info.GetQuantizationOffset());
102  }
103  return ret;
104 }
float Dequantize(QuantizedType value, float scale, int32_t offset)
Dequantize an 8-bit data type into a floating point data type.
Definition: TypesUtils.cpp:46

◆ Dequantize() [3/4]

void armnn::Dequantize ( const T *  inputData,
float *  outputData,
const TensorInfo info 
)
inline

Definition at line 107 of file RefWorkloadUtils.hpp.

References TensorInfo::GetNumElements(), TensorInfo::GetQuantizationOffset(), and TensorInfo::GetQuantizationScale().

108 {
109  for (unsigned int i = 0; i < info.GetNumElements(); i++)
110  {
111  outputData[i] = Dequantize<T>(inputData[i], info.GetQuantizationScale(), info.GetQuantizationOffset());
112  }
113 }

◆ Dequantize() [4/4]

float Dequantize ( QuantizedType  value,
float  scale,
int32_t  offset 
)

Dequantize an 8-bit data type into a floating point data type.

Parameters
value- The value to dequantize.
scale- The scale (must be non-zero).
offset- The offset.
Returns
- The dequantized value calculated as (value-offset)*scale.

Definition at line 46 of file TypesUtils.cpp.

References ARMNN_ASSERT.

Referenced by SelectiveQuantizer< T, DoQuantize >::Dequantize(), and Dequantize().

47 {
48  static_assert(IsQuantizedType<QuantizedType>(), "Not an integer type.");
49  ARMNN_ASSERT(scale != 0.f);
50  ARMNN_ASSERT(!IsNan(value));
51  return (armnn::numeric_cast<float>(value - offset)) * scale;
52 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ DetectionPostProcess()

void DetectionPostProcess ( const TensorInfo boxEncodingsInfo,
const TensorInfo scoresInfo,
const TensorInfo anchorsInfo,
const TensorInfo detectionBoxesInfo,
const TensorInfo detectionClassesInfo,
const TensorInfo detectionScoresInfo,
const TensorInfo numDetectionsInfo,
const DetectionPostProcessDescriptor desc,
Decoder< float > &  boxEncodings,
Decoder< float > &  scores,
Decoder< float > &  anchors,
float *  detectionBoxes,
float *  detectionClasses,
float *  detectionScores,
float *  numDetections 
)

Definition at line 140 of file DetectionPostProcess.cpp.

References AllocateOutputData(), ARMNN_ASSERT, GenerateRangeK(), Decoder< IType >::Get(), TensorInfo::GetNumElements(), TensorInfo::GetShape(), IgnoreUnused(), DetectionPostProcessDescriptor::m_DetectionsPerClass, DetectionPostProcessDescriptor::m_MaxClassesPerDetection, DetectionPostProcessDescriptor::m_MaxDetections, DetectionPostProcessDescriptor::m_NmsIouThreshold, DetectionPostProcessDescriptor::m_NmsScoreThreshold, DetectionPostProcessDescriptor::m_NumClasses, DetectionPostProcessDescriptor::m_ScaleH, DetectionPostProcessDescriptor::m_ScaleW, DetectionPostProcessDescriptor::m_ScaleX, DetectionPostProcessDescriptor::m_ScaleY, DetectionPostProcessDescriptor::m_UseRegularNms, NonMaxSuppression(), numeric_cast(), and TopKSort().

155 {
156  IgnoreUnused(anchorsInfo, detectionClassesInfo, detectionScoresInfo, numDetectionsInfo);
157 
158  // Transform center-size format which is (ycenter, xcenter, height, width) to box-corner format,
159  // which represents the lower left corner and the upper right corner (ymin, xmin, ymax, xmax)
160  std::vector<float> boxCorners(boxEncodingsInfo.GetNumElements());
161 
162  const unsigned int numBoxes = boxEncodingsInfo.GetShape()[1];
163  const unsigned int numScores = scoresInfo.GetNumElements();
164 
165  for (unsigned int i = 0; i < numBoxes; ++i)
166  {
167  // Y
168  float boxEncodingY = boxEncodings.Get();
169  float anchorY = anchors.Get();
170 
171  ++boxEncodings;
172  ++anchors;
173 
174  // X
175  float boxEncodingX = boxEncodings.Get();
176  float anchorX = anchors.Get();
177 
178  ++boxEncodings;
179  ++anchors;
180 
181  // H
182  float boxEncodingH = boxEncodings.Get();
183  float anchorH = anchors.Get();
184 
185  ++boxEncodings;
186  ++anchors;
187 
188  // W
189  float boxEncodingW = boxEncodings.Get();
190  float anchorW = anchors.Get();
191 
192  ++boxEncodings;
193  ++anchors;
194 
195  float yCentre = boxEncodingY / desc.m_ScaleY * anchorH + anchorY;
196  float xCentre = boxEncodingX / desc.m_ScaleX * anchorW + anchorX;
197 
198  float halfH = 0.5f * expf(boxEncodingH / desc.m_ScaleH) * anchorH;
199  float halfW = 0.5f * expf(boxEncodingW / desc.m_ScaleW) * anchorW;
200 
201  unsigned int indexY = i * 4;
202  unsigned int indexX = indexY + 1;
203  unsigned int indexH = indexX + 1;
204  unsigned int indexW = indexH + 1;
205 
206  // ymin
207  boxCorners[indexY] = yCentre - halfH;
208  // xmin
209  boxCorners[indexX] = xCentre - halfW;
210  // ymax
211  boxCorners[indexH] = yCentre + halfH;
212  // xmax
213  boxCorners[indexW] = xCentre + halfW;
214 
215  ARMNN_ASSERT(boxCorners[indexY] < boxCorners[indexH]);
216  ARMNN_ASSERT(boxCorners[indexX] < boxCorners[indexW]);
217  }
218 
219  unsigned int numClassesWithBg = desc.m_NumClasses + 1;
220 
221  // Decode scores
222  std::vector<float> decodedScores;
223  decodedScores.reserve(numScores);
224 
225  for (unsigned int i = 0u; i < numScores; ++i)
226  {
227  decodedScores.emplace_back(scores.Get());
228  ++scores;
229  }
230 
231  // Perform Non Max Suppression.
232  if (desc.m_UseRegularNms)
233  {
234  // Perform Regular NMS.
235  // For each class, perform NMS and select max detection numbers of the highest score across all classes.
236  std::vector<float> classScores(numBoxes);
237 
238  std::vector<unsigned int> selectedBoxesAfterNms;
239  selectedBoxesAfterNms.reserve(numBoxes);
240 
241  std::vector<float> selectedScoresAfterNms;
242  selectedBoxesAfterNms.reserve(numScores);
243 
244  std::vector<unsigned int> selectedClasses;
245 
246  for (unsigned int c = 0; c < desc.m_NumClasses; ++c)
247  {
248  // For each boxes, get scores of the boxes for the class c.
249  for (unsigned int i = 0; i < numBoxes; ++i)
250  {
251  classScores[i] = decodedScores[i * numClassesWithBg + c + 1];
252  }
253  std::vector<unsigned int> selectedIndices = NonMaxSuppression(numBoxes,
254  boxCorners,
255  classScores,
256  desc.m_NmsScoreThreshold,
257  desc.m_DetectionsPerClass,
258  desc.m_NmsIouThreshold);
259 
260  for (unsigned int i = 0; i < selectedIndices.size(); ++i)
261  {
262  selectedBoxesAfterNms.push_back(selectedIndices[i]);
263  selectedScoresAfterNms.push_back(classScores[selectedIndices[i]]);
264  selectedClasses.push_back(c);
265  }
266  }
267 
268  // Select max detection numbers of the highest score across all classes
269  unsigned int numSelected = armnn::numeric_cast<unsigned int>(selectedBoxesAfterNms.size());
270  unsigned int numOutput = std::min(desc.m_MaxDetections, numSelected);
271 
272  // Sort the max scores among the selected indices.
273  std::vector<unsigned int> outputIndices = GenerateRangeK(numSelected);
274  TopKSort(numOutput, outputIndices.data(), selectedScoresAfterNms.data(), numSelected);
275 
276  AllocateOutputData(detectionBoxesInfo.GetShape()[1], numOutput, boxCorners, outputIndices,
277  selectedBoxesAfterNms, selectedClasses, selectedScoresAfterNms,
278  detectionBoxes, detectionScores, detectionClasses, numDetections);
279  }
280  else
281  {
282  // Perform Fast NMS.
283  // Select max scores of boxes and perform NMS on max scores,
284  // select max detection numbers of the highest score
285  unsigned int numClassesPerBox = std::min(desc.m_MaxClassesPerDetection, desc.m_NumClasses);
286  std::vector<float> maxScores;
287  std::vector<unsigned int>boxIndices;
288  std::vector<unsigned int>maxScoreClasses;
289 
290  for (unsigned int box = 0; box < numBoxes; ++box)
291  {
292  unsigned int scoreIndex = box * numClassesWithBg + 1;
293 
294  // Get the max scores of the box.
295  std::vector<unsigned int> maxScoreIndices = GenerateRangeK(desc.m_NumClasses);
296  TopKSort(numClassesPerBox, maxScoreIndices.data(),
297  decodedScores.data() + scoreIndex, desc.m_NumClasses);
298 
299  for (unsigned int i = 0; i < numClassesPerBox; ++i)
300  {
301  maxScores.push_back(decodedScores[scoreIndex + maxScoreIndices[i]]);
302  maxScoreClasses.push_back(maxScoreIndices[i]);
303  boxIndices.push_back(box);
304  }
305  }
306 
307  // Perform NMS on max scores
308  std::vector<unsigned int> selectedIndices = NonMaxSuppression(numBoxes, boxCorners, maxScores,
309  desc.m_NmsScoreThreshold,
310  desc.m_MaxDetections,
311  desc.m_NmsIouThreshold);
312 
313  unsigned int numSelected = armnn::numeric_cast<unsigned int>(selectedIndices.size());
314  unsigned int numOutput = std::min(desc.m_MaxDetections, numSelected);
315 
316  AllocateOutputData(detectionBoxesInfo.GetShape()[1], numOutput, boxCorners, selectedIndices,
317  boxIndices, maxScoreClasses, maxScores,
318  detectionBoxes, detectionScores, detectionClasses, numDetections);
319  }
320 }
std::vector< unsigned int > GenerateRangeK(unsigned int k)
void IgnoreUnused(Ts &&...)
virtual IType Get() const =0
void TopKSort(unsigned int k, unsigned int *indices, const float *values, unsigned int numElement)
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
void AllocateOutputData(unsigned int numOutput, unsigned int numSelected, const std::vector< float > &boxCorners, const std::vector< unsigned int > &outputIndices, const std::vector< unsigned int > &selectedBoxes, const std::vector< unsigned int > &selectedClasses, const std::vector< float > &selectedScores, float *detectionBoxes, float *detectionScores, float *detectionClasses, float *numDetections)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35
std::vector< unsigned int > NonMaxSuppression(unsigned int numBoxes, const std::vector< float > &boxCorners, const std::vector< float > &scores, float nmsScoreThreshold, unsigned int maxDetection, float nmsIouThreshold)

◆ ExtractJsonObjects()

void armnn::ExtractJsonObjects ( unsigned int  inferenceIndex,
const Event parentEvent,
JsonChildObject parentObject,
std::map< const Event *, std::vector< const Event *>>  descendantsMap 
)

Definition at line 303 of file Profiling.cpp.

References JsonChildObject::AddChild(), JsonChildObject::AddMeasurement(), ARMNN_ASSERT, Event, JsonChildObject::GetChild(), Event::GetInstruments(), Event::GetMeasurements(), Event::GetProfilingGuid(), OptionalBase::has_value(), JsonChildObject::m_Children, Measurement, JsonChildObject::NumChildren(), JsonChildObject::SetGuid(), JsonChildObject::SetType(), JsonChildObject::SetUnit(), and OptionalReferenceSwitch< IsReference, T >::value().

Referenced by ProfilerImpl::Print().

307 {
308  ARMNN_ASSERT(parentEvent);
309 
310  // If profiling GUID is entered, process it
311  if (parentEvent->GetProfilingGuid().has_value())
312  {
313  arm::pipe::ProfilingGuid profilingGuid;
314  profilingGuid = parentEvent->GetProfilingGuid().value();
315  parentObject.SetGuid(profilingGuid);
316  }
317  std::vector<Measurement> instrumentMeasurements = parentEvent->GetMeasurements();
318  unsigned int childIdx = 0;
319  unsigned int numSkippedKernels = 0;
320  if (inferenceIndex > 0)
321  {
322  for (auto &i: parentEvent->GetInstruments())
323  {
324  if (i->HasKernelMeasurements())
325  {
326  numSkippedKernels = static_cast<unsigned int>(parentObject.m_Children.size() -
327  instrumentMeasurements.size());
328  childIdx = numSkippedKernels;
329  }
330  }
331  }
332 
333  for (size_t measurementIndex = 0; measurementIndex < instrumentMeasurements.size(); ++measurementIndex, ++childIdx)
334  {
335  if (inferenceIndex == 0)
336  {
337  // Only add kernel measurement once, in case of multiple inferences
338  JsonChildObject measurementObject{ instrumentMeasurements[measurementIndex].m_Name };
339  measurementObject.SetUnit(instrumentMeasurements[measurementIndex].m_Unit);
340  measurementObject.SetType(JsonObjectType::Measurement);
341 
342  ARMNN_ASSERT(parentObject.NumChildren() == childIdx);
343  parentObject.AddChild(measurementObject);
344  }
345  else
346  {
347  if (numSkippedKernels > 0)
348  {
349  parentObject.GetChild(--numSkippedKernels).AddMeasurement(0.0);
350  }
351  }
352 
353  parentObject.GetChild(childIdx).AddMeasurement(instrumentMeasurements[measurementIndex].m_Value);
354  }
355 
356  auto childEventsIt = descendantsMap.find(parentEvent);
357  if (childEventsIt != descendantsMap.end())
358  {
359  for (auto childEvent : childEventsIt->second)
360  {
361  if (inferenceIndex == 0)
362  {
363  // Only add second level once, in case of multiple inferences
364  JsonChildObject childObject{ childEvent->GetName() };
365  childObject.SetType(JsonObjectType::Event);
366  parentObject.AddChild(childObject);
367  }
368 
369  // It's possible that childIdx can overrun the parents' child vector. Check before we try to process a
370  // non-existent child.
371  if (childIdx < parentObject.NumChildren())
372  {
373  // Recursively process children.
374  ExtractJsonObjects(inferenceIndex, childEvent, parentObject.GetChild(childIdx), descendantsMap);
375  childIdx++;
376  }
377  }
378  }
379 }
void ExtractJsonObjects(unsigned int inferenceIndex, const Event *parentEvent, JsonChildObject &parentObject, std::map< const Event *, std::vector< const Event *>> descendantsMap)
Definition: Profiling.cpp:303
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ FakeQuantization()

void armnn::FakeQuantization ( const float *  inputData,
float *  outputData,
uint32_t  numElements,
float  min,
float  max 
)

Definition at line 17 of file RefFakeQuantizationFloat32Workload.cpp.

References numeric_cast().

18 {
19  float scale = (max - min) / 255.f;
20  int32_t offset = armnn::numeric_cast<int32_t>((-min * 255.f) / (max - min));
21 
22  for (uint32_t i = 0; i < numElements; i++)
23  {
24  outputData[i] = static_cast<float>(armnn::Quantize<uint8_t>(inputData[i], scale, offset));
25  }
26 
27 }
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ FalseFunc()

bool armnn::FalseFunc ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 62 of file LayerSupportCommon.hpp.

References IgnoreUnused().

63 {
64  IgnoreUnused(reasonIfUnsupported);
65  IgnoreUnused(params...);
66  return false;
67 }
void IgnoreUnused(Ts &&...)

◆ FalseFuncF16()

bool armnn::FalseFuncF16 ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 70 of file LayerSupportCommon.hpp.

References IgnoreUnused(), and SetValueChecked().

71 {
72  IgnoreUnused(params...);
73  SetValueChecked(reasonIfUnsupported, "Layer is not supported with float16 data type");
74  return false;
75 }
void IgnoreUnused(Ts &&...)
void SetValueChecked(Optional< T &> optionalRef, V &&val)

◆ FalseFuncF32()

bool armnn::FalseFuncF32 ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 78 of file LayerSupportCommon.hpp.

References IgnoreUnused(), and SetValueChecked().

79 {
80  IgnoreUnused(params...);
81  SetValueChecked(reasonIfUnsupported, "Layer is not supported with float32 data type");
82  return false;
83 }
void IgnoreUnused(Ts &&...)
void SetValueChecked(Optional< T &> optionalRef, V &&val)

◆ FalseFuncI32()

bool armnn::FalseFuncI32 ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 94 of file LayerSupportCommon.hpp.

References IgnoreUnused(), and SetValueChecked().

95 {
96  IgnoreUnused(params...);
97  SetValueChecked(reasonIfUnsupported, "Layer is not supported with int32 data type");
98  return false;
99 }
void IgnoreUnused(Ts &&...)
void SetValueChecked(Optional< T &> optionalRef, V &&val)

◆ FalseFuncU8()

bool armnn::FalseFuncU8 ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 86 of file LayerSupportCommon.hpp.

References IgnoreUnused(), and SetValueChecked().

87 {
88  IgnoreUnused(params...);
89  SetValueChecked(reasonIfUnsupported, "Layer is not supported with 8-bit data type");
90  return false;
91 }
void IgnoreUnused(Ts &&...)
void SetValueChecked(Optional< T &> optionalRef, V &&val)

◆ FalseInputFuncF16()

bool armnn::FalseInputFuncF16 ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 110 of file LayerSupportCommon.hpp.

References IgnoreUnused(), and SetValueChecked().

111 {
112  IgnoreUnused(params...);
113  SetValueChecked(reasonIfUnsupported, "Layer is not supported with float16 data type input");
114  return false;
115 }
void IgnoreUnused(Ts &&...)
void SetValueChecked(Optional< T &> optionalRef, V &&val)

◆ FalseInputFuncF32()

bool armnn::FalseInputFuncF32 ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 102 of file LayerSupportCommon.hpp.

References IgnoreUnused(), and SetValueChecked().

103 {
104  IgnoreUnused(params...);
105  SetValueChecked(reasonIfUnsupported, "Layer is not supported with float32 data type input");
106  return false;
107 }
void IgnoreUnused(Ts &&...)
void SetValueChecked(Optional< T &> optionalRef, V &&val)

◆ FalseOutputFuncF16()

bool armnn::FalseOutputFuncF16 ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 126 of file LayerSupportCommon.hpp.

References IgnoreUnused(), and SetValueChecked().

127 {
128  IgnoreUnused(params...);
129  SetValueChecked(reasonIfUnsupported, "Layer is not supported with float16 data type output");
130  return false;
131 }
void IgnoreUnused(Ts &&...)
void SetValueChecked(Optional< T &> optionalRef, V &&val)

◆ FalseOutputFuncF32()

bool armnn::FalseOutputFuncF32 ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 118 of file LayerSupportCommon.hpp.

References IgnoreUnused(), and SetValueChecked().

119 {
120  IgnoreUnused(params...);
121  SetValueChecked(reasonIfUnsupported, "Layer is not supported with float32 data type output");
122  return false;
123 }
void IgnoreUnused(Ts &&...)
void SetValueChecked(Optional< T &> optionalRef, V &&val)

◆ Fill()

void Fill ( Encoder< float > &  output,
const TensorShape desiredOutputShape,
const float  value 
)

Creates a tensor and fills it with a scalar value.

Definition at line 13 of file Fill.cpp.

References TensorShape::GetNumElements(), and Encoder< IType >::Set().

16 {
17  for(unsigned int i = 0; i < desiredOutputShape.GetNumElements(); ++i)
18  {
19  output[i];
20  output.Set(value);
21  }
22 }
virtual void Set(IType right)=0

◆ FindKernelMeasurements()

std::vector<Measurement> armnn::FindKernelMeasurements ( const Event event)

Definition at line 62 of file Profiling.cpp.

References ARMNN_ASSERT, and Event::GetMeasurements().

63 {
64  ARMNN_ASSERT(event != nullptr);
65 
66  std::vector<Measurement> measurements;
67 
68  // Search through the measurements.
69  for (const auto& measurement : event->GetMeasurements())
70  {
71  if (measurement.m_Name.rfind("OpenClKernelTimer", 0) == 0
72  || measurement.m_Name.rfind("NeonKernelTimer", 0) == 0)
73  {
74  // Measurement found.
75  measurements.push_back(measurement);
76  }
77  }
78 
79  return measurements;
80 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ FindMeasurement()

Measurement armnn::FindMeasurement ( const std::string &  name,
const Event event 
)

Definition at line 43 of file Profiling.cpp.

References ARMNN_ASSERT, and Event::GetMeasurements().

Referenced by ProfilerImpl::AnalyzeEventSequenceAndWriteResults(), and ProfilerImpl::CalculateProfilingEventStats().

44 {
45 
46  ARMNN_ASSERT(event != nullptr);
47 
48  // Search though the measurements.
49  for (const auto& measurement : event->GetMeasurements())
50  {
51  if (measurement.m_Name == name)
52  {
53  // Measurement found.
54  return measurement;
55  }
56  }
57 
58  // Measurement not found.
59  return Measurement{ "", 0.f, Measurement::Unit::TIME_MS };
60 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ FinishClContextBuffer()

void armnn::FinishClContextBuffer ( flatbuffers::FlatBufferBuilder &  fbb,
flatbuffers::Offset< armnn::ClContext >  root 
)
inline

Definition at line 171 of file ClContextSchema_generated.h.

References ClContextIdentifier().

173  {
174  fbb.Finish(root, ClContextIdentifier());
175 }
const char * ClContextIdentifier()

◆ FinishSizePrefixedClContextBuffer()

void armnn::FinishSizePrefixedClContextBuffer ( flatbuffers::FlatBufferBuilder &  fbb,
flatbuffers::Offset< armnn::ClContext >  root 
)
inline

Definition at line 177 of file ClContextSchema_generated.h.

References ClContextIdentifier().

179  {
180  fbb.FinishSizePrefixed(root, ClContextIdentifier());
181 }
const char * ClContextIdentifier()

◆ FoldPadIntoAveragePool2d()

LayerType* armnn::FoldPadIntoAveragePool2d ( OptimizationViews optimizationViews,
Pooling2dLayer baseLayer,
Pooling2dDescriptor poolDescriptor,
PadLayer padLayer 
)

Definition at line 82 of file SubgraphUtils.hpp.

References FoldPadLayer(), and OptimizationViews::GetINetwork().

86 {
87  IConnectableLayer* replacement =
88  optimizationViews.GetINetwork()->AddPooling2dLayer(poolDescriptor, "folded-pad-into-pool2d");
89  LayerType* replacementLayer = PolymorphicDowncast<LayerType*>(replacement);
90 
91  FoldPadLayer(optimizationViews,
92  baseLayer,
93  replacementLayer,
94  padLayer);
95 
96  return replacementLayer;
97 }
LayerType * FoldPadLayer(OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, PadLayer *padLayer)
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ FoldPadLayer()

LayerType* armnn::FoldPadLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
LayerType replacementLayer,
PadLayer padLayer 
)

Definition at line 66 of file SubgraphUtils.hpp.

References OptimizationViews::AddSubstitution().

Referenced by FoldPadIntoAveragePool2d().

70 {
71  SubgraphView substitutionSubgraph({padLayer, baseLayer},
72  CreateIInputsFrom({padLayer}),
73  CreateIOutputsFrom({baseLayer}));
74  SubgraphView replacementSubgraph(replacementLayer);
75 
76  optimizationViews.AddSubstitution({substitutionSubgraph, replacementSubgraph});
77 
78  return replacementLayer;
79 }

◆ ForEachLayerInput()

void armnn::ForEachLayerInput ( LayerSelectionInfo::LayerInfoContainer &  layerInfos,
LayerSelectionInfo &  layerInfo,
Delegate  function 
)

Definition at line 267 of file SubgraphViewSelector.cpp.

References ARMNN_ASSERT_MSG, and Layer::GetInputSlots().

Referenced by AssignSplitId(), and IsReadyForSplitAssignment().

270 {
271  Layer& layer = *PolymorphicDowncast<Layer*>(layerInfo.m_Layer);
272 
273  for (auto inputSlot : layer.GetInputSlots())
274  {
275  auto connectedInput = PolymorphicDowncast<OutputSlot*>(inputSlot.GetConnection());
276  ARMNN_ASSERT_MSG(connectedInput, "Dangling input slot detected.");
277  Layer& inputLayer = connectedInput->GetOwningLayer();
278 
279  auto parentInfo = layerInfos.find(&inputLayer);
280  if (parentInfo != layerInfos.end())
281  {
282  function(parentInfo->second);
283  }
284  }
285 }
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15

◆ ForEachLayerOutput()

void armnn::ForEachLayerOutput ( LayerSelectionInfo::LayerInfoContainer &  layerInfos,
LayerSelectionInfo &  layerInfo,
Delegate  function 
)

Definition at line 288 of file SubgraphViewSelector.cpp.

References Layer::GetOutputSlots().

Referenced by SubgraphViewSelector::SelectSubgraphs().

291 {
292  Layer& layer = *PolymorphicDowncast<Layer*>(layerInfo.m_Layer);
293 
294  for (auto& outputSlot : layer.GetOutputSlots())
295  {
296  for (auto& output : outputSlot.GetConnections())
297  {
298  Layer& childLayer = output->GetOwningLayer();
299 
300  auto childInfo = layerInfos.find(&childLayer);
301  if (childInfo != layerInfos.end())
302  {
303  function(childInfo->second);
304  }
305  }
306  }
307 }

◆ FullyConnected()

void FullyConnected ( const TensorShape rInputShape,
Decoder< float > &  rInputDecoder,
const TensorShape rOutputShape,
Encoder< float > &  rOutputEncoder,
const TensorShape rWeightsShape,
Decoder< float > &  rWeightDecoder,
Decoder< float > *  pBiasDecoder,
const bool  biasEnabled,
const unsigned int  K,
const bool  transposeWeights 
)

Performs a matrix multiplication and optionally adds a bias.

Definition at line 15 of file FullyConnected.cpp.

References ARMNN_ASSERT, Decoder< IType >::DecodeTensor(), and Encoder< IType >::Set().

25 {
26  // Perform FullyConnected implementation
27  unsigned int outputSize = rOutputShape[1];
28 
29  const std::vector<float> decodedInputs = rInputDecoder.DecodeTensor(rInputShape);
30  const std::vector<float> decodedWeights = rWeightDecoder.DecodeTensor(rWeightsShape);
31 
32  const TensorShape biasShape{outputSize};
33 
34  ARMNN_ASSERT(!biasEnabled || pBiasDecoder != nullptr);
35  const std::vector<float> decodedBiases = biasEnabled ? pBiasDecoder->DecodeTensor(biasShape) : std::vector<float>();
36 
37 
38  for (unsigned int n = 0; n < rInputShape[0]; n++)
39  {
40  for (unsigned int channelOutput = 0; channelOutput < outputSize; channelOutput++)
41  {
42  float outval = 0.f;
43 
44  for (unsigned int channelInput = 0; channelInput < K; channelInput++)
45  {
46  float weight;
47  if (transposeWeights)
48  {
49  weight = decodedWeights[channelOutput * K + channelInput];
50  }
51  else
52  {
53  weight = decodedWeights[channelInput * outputSize + channelOutput];
54  }
55 
56  outval += weight * decodedInputs[n * K + channelInput];
57  }
58 
59  if (biasEnabled)
60  {
61  outval += decodedBiases[channelOutput];
62  }
63 
64  rOutputEncoder[n * outputSize + channelOutput];
65  rOutputEncoder.Set(outval);
66  }
67  }
68 }
virtual std::vector< float > DecodeTensor(const TensorShape &tensorShape, bool isDepthwise=false)=0
virtual void Set(IType right)=0
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ FuseAdditionLayer()

LayerType* armnn::FuseAdditionLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
ActivationLayer activationLayer,
ActivationDescriptor activationDesc,
std::string  name 
)

Definition at line 74 of file ArmComputeSubgraphUtils.hpp.

References FuseLayer(), and OptimizationViews::GetINetwork().

79 {
80  IConnectableLayer* replacement = optimizationViews.GetINetwork()->AddAdditionLayer(name.c_str());
81  LayerType* replacementLayer = PolymorphicDowncast<LayerType*>(replacement);
82 
83  FuseLayer(optimizationViews,
84  baseLayer,
85  replacementLayer,
86  activationLayer,
87  activationDesc);
88 
89  return replacementLayer;
90 }
LayerType * FuseLayer(OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc)
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ FuseBatchNormalizationLayer()

LayerType* armnn::FuseBatchNormalizationLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
ActivationLayer activationLayer,
ActivationDescriptor activationDesc,
std::string  name 
)

Definition at line 150 of file ArmComputeSubgraphUtils.hpp.

References FuseLayer(), and OptimizationViews::GetINetwork().

155 {
156  IConnectableLayer* replacement =
157  optimizationViews.GetINetwork()->AddBatchNormalizationLayer(baseLayer->GetParameters(),
158  ConstTensor(),
159  ConstTensor(),
160  ConstTensor(),
161  ConstTensor(),
162  name.c_str());
163  LayerType* replacementLayer = PolymorphicDowncast<LayerType*>(replacement);
164 
165  FuseLayer(optimizationViews,
166  baseLayer,
167  replacementLayer,
168  activationLayer,
169  activationDesc);
170 
171  SubgraphView substitutionSubgraph({baseLayer, activationLayer},
172  CreateIInputsFrom({baseLayer}),
173  CreateIOutputsFrom({activationLayer}));
174  SubgraphView replacementSubgraph(replacementLayer);
175 
176  return replacementLayer;
177 }
LayerType * FuseLayer(OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc)
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ FuseConvolution2dLayer()

LayerType* armnn::FuseConvolution2dLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
ActivationLayer activationLayer,
ActivationDescriptor activationDesc,
std::string  name 
)

Definition at line 180 of file ArmComputeSubgraphUtils.hpp.

References FuseLayer(), and OptimizationViews::GetINetwork().

185 {
186  IConnectableLayer* replacement = optimizationViews.GetINetwork()
187  ->AddConvolution2dLayer(baseLayer->GetParameters(), name.c_str());
188 
189  LayerType* replacementLayer = PolymorphicDowncast<LayerType*>(replacement);
190 
191  replacementLayer->m_Weight = std::move(baseLayer->m_Weight);
192  replacementLayer->m_Bias = std::move(baseLayer->m_Bias);
193 
194  FuseLayer(optimizationViews,
195  baseLayer,
196  replacementLayer,
197  activationLayer,
198  activationDesc);
199 
200  return replacementLayer;
201 }
LayerType * FuseLayer(OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc)
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ FuseDepthwiseConvolution2dLayer()

LayerType* armnn::FuseDepthwiseConvolution2dLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
ActivationLayer activationLayer,
ActivationDescriptor activationDesc,
std::string  name 
)

Definition at line 204 of file ArmComputeSubgraphUtils.hpp.

References FuseLayer(), and OptimizationViews::GetINetwork().

209 {
210  IConnectableLayer* replacement =
211  optimizationViews.GetINetwork()->AddDepthwiseConvolution2dLayer(baseLayer->GetParameters(), name.c_str());
212 
213  LayerType* replacementLayer = PolymorphicDowncast<LayerType*>(replacement);
214 
215  replacementLayer->m_Weight = std::move(baseLayer->m_Weight);
216  replacementLayer->m_Bias = std::move(baseLayer->m_Bias);
217 
218  FuseLayer(optimizationViews,
219  baseLayer,
220  replacementLayer,
221  activationLayer,
222  activationDesc);
223 
224  return replacementLayer;
225 }
LayerType * FuseLayer(OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc)
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ FuseDivisionLayer()

LayerType* armnn::FuseDivisionLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
ActivationLayer activationLayer,
ActivationDescriptor activationDesc,
std::string  name 
)

Definition at line 112 of file ArmComputeSubgraphUtils.hpp.

References FuseLayer(), and OptimizationViews::GetINetwork().

117 {
118  IConnectableLayer* replacement = optimizationViews.GetINetwork()->AddDivisionLayer(name.c_str());
119  LayerType* replacementLayer = PolymorphicDowncast<LayerType*>(replacement);
120 
121  FuseLayer(optimizationViews,
122  baseLayer,
123  replacementLayer,
124  activationLayer,
125  activationDesc);
126 
127  return replacementLayer;
128 }
LayerType * FuseLayer(OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc)
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ FuseFullyConnectedLayer()

LayerType* armnn::FuseFullyConnectedLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
ActivationLayer activationLayer,
ActivationDescriptor activationDesc,
std::string  name 
)

Definition at line 228 of file ArmComputeSubgraphUtils.hpp.

References FuseLayer(), and OptimizationViews::GetINetwork().

233 {
234  IConnectableLayer* replacement =
235  optimizationViews.GetINetwork()->AddFullyConnectedLayer(baseLayer->GetParameters(),
236  name.c_str());
237  LayerType* replacementLayer = PolymorphicDowncast<LayerType*>(replacement);
238 
239  FuseLayer(optimizationViews,
240  baseLayer,
241  replacementLayer,
242  activationLayer,
243  activationDesc);
244 
245  replacementLayer->m_Weight = std::move(baseLayer->m_Weight);
246  replacementLayer->m_Bias = std::move(baseLayer->m_Bias);
247 
248  return replacementLayer;
249 }
LayerType * FuseLayer(OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc)
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ FuseLayer()

LayerType* armnn::FuseLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
LayerType replacementLayer,
ActivationLayer activationLayer,
ActivationDescriptor activationDesc 
)

Definition at line 54 of file ArmComputeSubgraphUtils.hpp.

References OptimizationViews::AddSubstitution().

Referenced by FuseAdditionLayer(), FuseBatchNormalizationLayer(), FuseConvolution2dLayer(), FuseDepthwiseConvolution2dLayer(), FuseDivisionLayer(), FuseFullyConnectedLayer(), FuseMultiplicationLayer(), and FuseSubtractionLayer().

59 {
60  replacementLayer->SetAdditionalInfoForObject(
61  std::make_shared<ActivationDescriptor>(activationDesc));
62 
63  SubgraphView substitutionSubgraph({baseLayer, activationLayer},
64  CreateIInputsFrom({baseLayer}),
65  CreateIOutputsFrom({activationLayer}));
66  SubgraphView replacementSubgraph(replacementLayer);
67 
68  optimizationViews.AddSubstitution({substitutionSubgraph, replacementSubgraph});
69 
70  return replacementLayer;
71 }

◆ FuseMultiplicationLayer()

LayerType* armnn::FuseMultiplicationLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
ActivationLayer activationLayer,
ActivationDescriptor activationDesc,
std::string  name 
)

Definition at line 131 of file ArmComputeSubgraphUtils.hpp.

References FuseLayer(), and OptimizationViews::GetINetwork().

136 {
137  IConnectableLayer* replacement = optimizationViews.GetINetwork()->AddMultiplicationLayer(name.c_str());
138  LayerType* replacementLayer = PolymorphicDowncast<LayerType*>(replacement);
139 
140  FuseLayer(optimizationViews,
141  baseLayer,
142  replacementLayer,
143  activationLayer,
144  activationDesc);
145 
146  return replacementLayer;
147 }
LayerType * FuseLayer(OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc)
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ FuseSubtractionLayer()

LayerType* armnn::FuseSubtractionLayer ( OptimizationViews optimizationViews,
LayerType baseLayer,
ActivationLayer activationLayer,
ActivationDescriptor activationDesc,
std::string  name 
)

Definition at line 93 of file ArmComputeSubgraphUtils.hpp.

References FuseLayer(), and OptimizationViews::GetINetwork().

98 {
99  IConnectableLayer* replacement = optimizationViews.GetINetwork()->AddSubtractionLayer(name.c_str());
100  LayerType* replacementLayer = PolymorphicDowncast<LayerType*>(replacement);
101 
102  FuseLayer(optimizationViews,
103  baseLayer,
104  replacementLayer,
105  activationLayer,
106  activationDesc);
107 
108  return replacementLayer;
109 }
LayerType * FuseLayer(OptimizationViews &optimizationViews, LayerType *baseLayer, LayerType *replacementLayer, ActivationLayer *activationLayer, ActivationDescriptor &activationDesc)
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ Gather()

void Gather ( const TensorInfo paramsInfo,
const TensorInfo indicesInfo,
const TensorInfo outputInfo,
Decoder< float > &  params,
const int32_t *  indices,
Encoder< float > &  output,
const int32_t  axis 
)

Definition at line 17 of file Gather.cpp.

References ARMNN_ASSERT, Decoder< IType >::Get(), TensorInfo::GetNumDimensions(), TensorInfo::GetNumElements(), TensorInfo::GetShape(), IgnoreUnused(), numeric_cast(), and Encoder< IType >::Set().

24 {
25  IgnoreUnused(outputInfo);
26  IgnoreUnused(axis);
27 
28  const TensorShape& paramsShape = paramsInfo.GetShape();
29 
30  unsigned int paramsProduct = 1;
31  for (unsigned int i = 1; i < paramsInfo.GetNumDimensions(); ++i)
32  {
33  paramsProduct = paramsProduct * paramsShape[i];
34  }
35 
36  unsigned int outIndex = 0;
37  for (unsigned int i = 0; i < indicesInfo.GetNumElements(); ++i)
38  {
39  unsigned int indx = armnn::numeric_cast<unsigned int>(indices[i]);
40 
41  ARMNN_ASSERT(indices[i] >= 0 && indx < paramsShape[0]);
42 
43  unsigned int startOffset = indx * paramsProduct;
44  unsigned int endOffset = startOffset + paramsProduct;
45 
46  for (unsigned int j = startOffset; j < endOffset; ++j)
47  {
48  params[j];
49  float outputValue = params.Get();
50  output[outIndex];
51  output.Set(outputValue);
52  ++outIndex;
53  }
54  }
55 
56  ARMNN_ASSERT(outIndex == outputInfo.GetNumElements());
57 }
virtual void Set(IType right)=0
void IgnoreUnused(Ts &&...)
virtual IType Get() const =0
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ GatherTensorHandlePairs()

void armnn::GatherTensorHandlePairs ( const DescriptorType &  descriptor,
std::vector< std::pair< SrcTensorHandleType *, DstTensorHandleType *>> &  tensorHandlePairs 
)

Definition at line 189 of file WorkloadUtils.hpp.

References CalculateGatherNdKeyIndices(), Convert1HWOTensorInfoToAcl(), Convert1HWOTensorToAcl(), Convert1HWOtoMIHW(), ConvertMaskToACLFormat(), ConvertWeightTensorFromArmnnToAcl(), ConvertWeightTensorInfoFromArmnnToAcl(), GeneratePermutationVectorOnLastTwoDimensions(), PermuteTensor(), and ReshapeWeightsForAcl().

Referenced by CopyMemGenericWorkload::CopyMemGenericWorkload(), CopyMemGenericWorkload::ExecuteAsync(), NeonConvertBf16ToFp32Workload::NeonConvertBf16ToFp32Workload(), NeonConvertFp16ToFp32Workload::NeonConvertFp16ToFp32Workload(), NeonConvertFp32ToBf16Workload::NeonConvertFp32ToBf16Workload(), and NeonConvertFp32ToFp16Workload::NeonConvertFp32ToFp16Workload().

191 {
192  const unsigned int numInputs = static_cast<unsigned int>(descriptor.m_Inputs.size());
193  tensorHandlePairs.reserve(numInputs);
194 
195  for (unsigned int i = 0; i < numInputs; ++i)
196  {
197  SrcTensorHandleType* const srcTensorHandle =
198  PolymorphicDowncast<SrcTensorHandleType*>(descriptor.m_Inputs[i]);
199  DstTensorHandleType* const dstTensorHandle =
200  PolymorphicDowncast<DstTensorHandleType*>(descriptor.m_Outputs[i]);
201 
202  tensorHandlePairs.emplace_back(srcTensorHandle, dstTensorHandle);
203  }
204 }

◆ GeneratePermutationVectorOnLastTwoDimensions()

armnn::PermutationVector GeneratePermutationVectorOnLastTwoDimensions ( unsigned int  rank)

Generates a permutation vector of size rank that permutes the 2 most right dimensions.

Parameters
rank- Tensor rank, i.e. number of dimensions in the tensors
Returns
- A permutation vector that permutes the 2 last dimensions

Definition at line 344 of file WorkloadUtils.cpp.

Referenced by GatherTensorHandlePairs().

345 {
346  armnn::PermutationVector permutationVector{};
347  switch (rank)
348  {
349  case 2:
350  permutationVector = {1U, 0U};
351  break;
352  case 3:
353  permutationVector = {0U, 2U, 1U};
354  break;
355  case 4:
356  permutationVector = {0U, 1U, 3U, 2U};
357  break;
358  default:
359  throw Exception("Invalid number of dimensions.");
360  }
361  return permutationVector;
362 }

◆ GenerateRangeK()

std::vector<unsigned int> armnn::GenerateRangeK ( unsigned int  k)

Definition at line 17 of file DetectionPostProcess.cpp.

Referenced by DetectionPostProcess(), and NonMaxSuppression().

18 {
19  std::vector<unsigned int> range(k);
20  std::iota(range.begin(), range.end(), 0);
21  return range;
22 }

◆ GetActivationFunctionAsCString()

constexpr char const* armnn::GetActivationFunctionAsCString ( ActivationFunction  activation)

Definition at line 27 of file TypesUtils.hpp.

References Abs, BoundedReLu, Elu, HardSwish, LeakyReLu, Linear, ReLu, Sigmoid, SoftReLu, Sqrt, Square, and TanH.

Referenced by StringifyLayerParameters< ActivationDescriptor >::Serialize().

28 {
29  switch (activation)
30  {
31  case ActivationFunction::Sigmoid: return "Sigmoid";
32  case ActivationFunction::TanH: return "TanH";
33  case ActivationFunction::Linear: return "Linear";
34  case ActivationFunction::ReLu: return "ReLu";
35  case ActivationFunction::BoundedReLu: return "BoundedReLu";
36  case ActivationFunction::SoftReLu: return "SoftReLu";
37  case ActivationFunction::LeakyReLu: return "LeakyReLu";
38  case ActivationFunction::Abs: return "Abs";
39  case ActivationFunction::Sqrt: return "Sqrt";
40  case ActivationFunction::Square: return "Square";
41  case ActivationFunction::Elu: return "Elu";
42  case ActivationFunction::HardSwish: return "HardSwish";
43  default: return "Unknown";
44  }
45 }

◆ GetArgMinMaxFunctionAsCString()

constexpr char const* armnn::GetArgMinMaxFunctionAsCString ( ArgMinMaxFunction  function)

Definition at line 47 of file TypesUtils.hpp.

References Max, and Min.

Referenced by Converter::ConvertOperation().

48 {
49  switch (function)
50  {
51  case ArgMinMaxFunction::Max: return "Max";
52  case ArgMinMaxFunction::Min: return "Min";
53  default: return "Unknown";
54  }
55 }

◆ GetBiasDataType()

DataType GetBiasDataType ( DataType  inputDataType)

Definition at line 28 of file WorkloadData.cpp.

References ARMNN_ASSERT_MSG, ARMNN_LOG, BFloat16, CHECK_LOCATION, TensorInfo::GetDataType(), GetDataTypeName(), TensorInfo::GetNumDimensions(), TensorInfo::GetNumElements(), TensorInfo::GetQuantizationDim(), TensorInfo::GetQuantizationOffset(), TensorInfo::GetQuantizationScale(), TensorInfo::GetQuantizationScales(), TensorInfo::GetShape(), OptionalBase::has_value(), TensorInfo::HasMultipleQuantizationScales(), TensorInfo::HasPerAxisQuantization(), info, TensorInfo::IsQuantized(), IsQuantized8BitType(), TensorInfo::IsTypeSpaceMatch(), WorkloadInfo::m_InputTensorInfos, WorkloadInfo::m_OutputTensorInfos, OptionalReferenceSwitch< std::is_reference< T >::value, T >::value(), and warning.

Referenced by FullyConnectedQueueDescriptor::Validate(), Convolution2dQueueDescriptor::Validate(), Convolution3dQueueDescriptor::Validate(), DepthwiseConvolution2dQueueDescriptor::Validate(), and TransposeConvolution2dQueueDescriptor::Validate().

29 {
30  switch (inputDataType)
31  {
32  case DataType::Float16:
33  return DataType::Float16;
34  case DataType::BFloat16:
35  case DataType::Float32:
36  return DataType::Float32;
37  case DataType::QAsymmS8:
38  return DataType::Signed32;
39  case DataType::QAsymmU8:
40  return DataType::Signed32;
41  case DataType::QSymmS8:
42  return DataType::Signed32;
43  case DataType::QSymmS16:
44  return DataType::Signed32;
45  default:
46  ARMNN_ASSERT_MSG(false, "Invalid input data type");
47  return DataType::Float32;
48  }
49 }
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15

◆ GetBiasTypeFromWeightsType()

armnn::Optional< armnn::DataType > GetBiasTypeFromWeightsType ( armnn::Optional< armnn::DataType weightsType)
inline

Definition at line 14 of file LayerSupportRules.hpp.

References ARMNN_ASSERT_MSG, Float16, Float32, QAsymmS8, QAsymmU8, QSymmS16, QSymmS8, Signed32, and OptionalReferenceSwitch< std::is_reference< T >::value, T >::value().

Referenced by BiasAndWeightsTypesCompatible::BiasAndWeightsTypesCompatible(), and BiasAndWeightsTypesMatch::BiasAndWeightsTypesMatch().

15 {
16  if (!weightsType)
17  {
18  return weightsType;
19  }
20 
21  switch(weightsType.value())
22  {
25  return weightsType;
31  default:
32  ARMNN_ASSERT_MSG(false, "GetBiasTypeFromWeightsType(): Unsupported data type.");
33  }
34  return armnn::EmptyOptional();
35 }
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
EmptyOptional is used to initialize the Optional class in case we want to have default value for an O...
Definition: Optional.hpp:32

◆ GetCapability() [1/2]

Optional< const BackendOptions::BackendOption > GetCapability ( const std::string &  backendCapabilityName,
const BackendCapabilities capabilities 
)

Returns a BackendCapability if the backend lists the capability The BackendCapability must then be inspected to check whether or not that BackendCapability is supported Otherwise returns an EmptyOptional if the BackendCapability is unlisted.

Definition at line 30 of file BackendHelper.cpp.

References BackendOptions::GetOption(), and BackendOptions::GetOptionCount().

Referenced by GetCapability(), HasCapability(), LayerSupportHandle::IsConvolution2dSupported(), LayerSupportHandle::IsDepthwiseConvolutionSupported(), LayerSupportHandle::IsDilatedDepthwiseConvolutionSupported(), and LayerSupportHandle::IsFullyConnectedSupported().

32 {
33  for (size_t i=0; i < capabilities.GetOptionCount(); i++)
34  {
35  const auto& capability = capabilities.GetOption(i);
36  if (backendCapabilityName == capability.GetName())
37  {
38  return capability;
39  }
40  }
41  return EmptyOptional();
42 }

◆ GetCapability() [2/2]

Optional< const BackendOptions::BackendOption > GetCapability ( const std::string &  backendCapabilityName,
const armnn::BackendId backend 
)

Returns a BackendCapability if the backend lists the capability The BackendCapability must then be inspected to check whether or not that BackendCapability is supported Otherwise returns an EmptyOptional if the BackendCapability is unlisted.

Definition at line 44 of file BackendHelper.cpp.

References BackendRegistryInstance(), and GetCapability().

46 {
47  auto const& backendRegistry = armnn::BackendRegistryInstance();
48  if (backendRegistry.IsBackendRegistered(backend))
49  {
50  auto factoryFunc = backendRegistry.GetFactory(backend);
51  auto backendObject = factoryFunc();
52  auto capabilities = backendObject->GetCapabilities();
53  return GetCapability(backendCapabilityName, capabilities);
54  }
55  return EmptyOptional();
56 }
Optional< const BackendOptions::BackendOption > GetCapability(const std::string &backendCapabilityName, const BackendCapabilities &capabilities)
Returns a BackendCapability if the backend lists the capability The BackendCapability must then be in...
BackendRegistry & BackendRegistryInstance()

◆ GetClContext()

const armnn::ClContext* armnn::GetClContext ( const void *  buf)
inline

Definition at line 140 of file ClContextSchema_generated.h.

Referenced by ClContextDeserializer::DeserializeFromBinary().

140  {
141  return flatbuffers::GetRoot<armnn::ClContext>(buf);
142 }

◆ GetComparisonOperationAsCString()

constexpr char const* armnn::GetComparisonOperationAsCString ( ComparisonOperation  operation)

Definition at line 57 of file TypesUtils.hpp.

References Equal, Greater, GreaterOrEqual, Less, LessOrEqual, and NotEqual.

Referenced by armnnTfLiteParser::ComputeWrappedIndex(), Converter::ConvertOperation(), RefComparisonWorkload::ExecuteAsync(), and StringifyLayerParameters< ComparisonDescriptor >::Serialize().

58 {
59  switch (operation)
60  {
61  case ComparisonOperation::Equal: return "Equal";
62  case ComparisonOperation::Greater: return "Greater";
63  case ComparisonOperation::GreaterOrEqual: return "GreaterOrEqual";
64  case ComparisonOperation::Less: return "Less";
65  case ComparisonOperation::LessOrEqual: return "LessOrEqual";
66  case ComparisonOperation::NotEqual: return "NotEqual";
67  default: return "Unknown";
68  }
69 }

◆ GetComputeDeviceAsCString()

constexpr char const* armnn::GetComputeDeviceAsCString ( Compute  compute)

Deprecated function that will be removed together with the Compute enum.

Definition at line 34 of file BackendId.hpp.

References CpuAcc, CpuRef, and GpuAcc.

Referenced by operator<<().

35 {
36  switch (compute)
37  {
38  case armnn::Compute::CpuRef: return "CpuRef";
39  case armnn::Compute::CpuAcc: return "CpuAcc";
40  case armnn::Compute::GpuAcc: return "GpuAcc";
41  default: return "Unknown";
42  }
43 }
CPU Execution: Reference C++ kernels.
GPU Execution: OpenCL: ArmCompute.
CPU Execution: NEON: ArmCompute.

◆ GetConvolutionMethodString()

std::string GetConvolutionMethodString ( arm_compute::ConvolutionMethod &  convolutionMethod)
inline

Definition at line 38 of file ClWorkloadUtils.hpp.

39 {
40  switch (convolutionMethod)
41  {
42  case arm_compute::ConvolutionMethod::FFT:
43  return "FFT";
44  case arm_compute::ConvolutionMethod::DIRECT:
45  return "Direct";
46  case arm_compute::ConvolutionMethod::GEMM:
47  return "GEMM";
48  case arm_compute::ConvolutionMethod::WINOGRAD:
49  return "Winograd";
50  default:
51  return "Unknown";
52  }
53 }

◆ GetDataLayoutName()

constexpr const char* armnn::GetDataLayoutName ( DataLayout  dataLayout)

◆ GetDataTypeName()

constexpr const char* armnn::GetDataTypeName ( DataType  dataType)

Definition at line 202 of file TypesUtils.hpp.

References BFloat16, Boolean, Float16, Float32, QAsymmS8, QAsymmU8, QSymmS16, QSymmS8, Signed32, and Signed64.

Referenced by armnnTfLiteParser::AsFloatArray(), AttemptBackendAssignment(), ProfilingDetails::DetailsExist(), GetBiasDataType(), TfLiteParserImpl::GetBuffer(), RefPermuteWorkload< DataType >::GetName(), RefTransposeWorkload< DataType >::GetName(), RefDebugWorkload< DataType >::GetName(), armnnUtils::GetPerAxisParams(), FuseConvertFp32ToBf16IntoConstLayers::Run(), ConvertConstDequantisationLayersToConstLayersImpl::Run(), and VerifyTensorInfoDataType().

203 {
204  switch (dataType)
205  {
206  case DataType::Float16: return "Float16";
207  case DataType::Float32: return "Float32";
208  case DataType::Signed64: return "Signed64";
209  case DataType::QAsymmU8: return "QAsymmU8";
210  case DataType::QAsymmS8: return "QAsymmS8";
211  case DataType::QSymmS8: return "QSymmS8";
212  case DataType::QSymmS16: return "QSymm16";
213  case DataType::Signed32: return "Signed32";
214  case DataType::Boolean: return "Boolean";
215  case DataType::BFloat16: return "BFloat16";
216 
217  default:
218  return "Unknown";
219  }
220 }

◆ GetDataTypeSize()

constexpr unsigned int armnn::GetDataTypeSize ( DataType  dataType)

Definition at line 151 of file TypesUtils.hpp.

References BFloat16, Boolean, Float16, Float32, QAsymmS8, QAsymmU8, QSymmS16, QSymmS8, Signed32, and Signed64.

Referenced by RefTensorHandle::CanBeImported(), TosaRefTensorHandle::CanBeImported(), Converter::ConvertOperation(), RefDepthToSpaceWorkload::ExecuteAsync(), RefStridedSliceWorkload::ExecuteAsync(), RefSliceWorkload::ExecuteAsync(), RefShapeWorkload::ExecuteAsync(), IDeserializer::DeserializerImpl::GetNetworkOutputBindingInfo(), TensorInfo::GetNumBytes(), GetUnpaddedTensorStrides(), PermuteTensor(), ConvertConstPermuteLayersToConstLayers::Run(), ConvertConstDequantisationLayersToConstLayersImpl::Run(), and armnn_driver::SwizzleAndroidNn4dTensorToArmNn().

152 {
153  switch (dataType)
154  {
155  case DataType::BFloat16:
156  case DataType::Float16: return 2U;
157  case DataType::Float32:
158  case DataType::Signed32: return 4U;
159  case DataType::Signed64: return 8U;
160  case DataType::QAsymmU8: return 1U;
161  case DataType::QAsymmS8: return 1U;
162  case DataType::QSymmS8: return 1U;
163  case DataType::QSymmS16: return 2U;
164  case DataType::Boolean: return 1U;
165  default: return 0U;
166  }
167 }

◆ GetEventPtr() [1/2]

const Event* armnn::GetEventPtr ( const Event ptr)

Definition at line 109 of file Profiling.cpp.

Referenced by ProfilerImpl::AnalyzeEventSequenceAndWriteResults().

109 { return ptr;}

◆ GetEventPtr() [2/2]

const Event* armnn::GetEventPtr ( const std::unique_ptr< Event > &  ptr)

Definition at line 110 of file Profiling.cpp.

110 {return ptr.get(); }

◆ GetGraphForTesting()

Graph & GetGraphForTesting ( IOptimizedNetwork optNet)

Definition at line 49 of file TestUtils.cpp.

References IOptimizedNetwork::pOptimizedNetworkImpl.

Referenced by CheckRelatedLayers().

50 {
51  return optNet->pOptimizedNetworkImpl->GetGraph();
52 }
std::unique_ptr< OptimizedNetworkImpl > pOptimizedNetworkImpl
Definition: INetwork.hpp:815

◆ GetILayerSupportByBackendId()

LayerSupportHandle GetILayerSupportByBackendId ( const armnn::BackendId backend)

Convenience function to retrieve the ILayerSupportHandle for a backend.

Definition at line 16 of file BackendHelper.cpp.

References BackendRegistryInstance(), BackendRegistry::GetFactory(), and BackendRegistry::IsBackendRegistered().

17 {
18  BackendRegistry& backendRegistry = armnn::BackendRegistryInstance();
19 
20  if (!backendRegistry.IsBackendRegistered(backend))
21  {
22  return LayerSupportHandle(nullptr);
23  }
24 
25  auto factoryFunc = backendRegistry.GetFactory(backend);
26  auto backendObject = factoryFunc();
27  return LayerSupportHandle(backendObject->GetLayerSupport(), backend);
28 }
BackendRegistry & BackendRegistryInstance()

◆ GetInputTensor()

const armnn::ConstTensor armnn::GetInputTensor ( const LayerBindingId  layerId,
const InputTensors inputTensors 
)

Definition at line 1390 of file LoadedNetwork.cpp.

1391 {
1392  for (auto inputTensorPair : inputTensors)
1393  {
1394  LayerBindingId id = inputTensorPair.first;
1395  if (id == layerId)
1396  {
1397  return inputTensorPair.second;
1398  }
1399  }
1400  throw InvalidArgumentException("Input does not exist.");
1401 }
int LayerBindingId
Type of identifiers for bindable layers (inputs, outputs).
Definition: Types.hpp:290

◆ GetInputTensorData()

const DataType* armnn::GetInputTensorData ( unsigned int  idx,
const PayloadType &  data 
)

Definition at line 36 of file RefWorkloadUtils.hpp.

References GetOutputTensorData(), and ITensorHandle::Map().

37 {
38  const ITensorHandle* tensorHandle = data.m_Inputs[idx];
39  return reinterpret_cast<const DataType*>(tensorHandle->Map());
40 }
DataType
Definition: Types.hpp:48

◆ GetInputTensorDataBFloat16()

const BFloat16* armnn::GetInputTensorDataBFloat16 ( unsigned int  idx,
const PayloadType &  data 
)

Definition at line 80 of file RefWorkloadUtils.hpp.

81 {
82  return GetInputTensorData<BFloat16>(idx, data);
83 }

◆ GetInputTensorDataFloat()

const float* armnn::GetInputTensorDataFloat ( unsigned int  idx,
const PayloadType &  data 
)

Definition at line 56 of file RefWorkloadUtils.hpp.

57 {
58  return GetInputTensorData<float>(idx, data);
59 }

◆ GetInputTensorDataHalf()

const Half* armnn::GetInputTensorDataHalf ( unsigned int  idx,
const PayloadType &  data 
)

Definition at line 68 of file RefWorkloadUtils.hpp.

69 {
70  return GetInputTensorData<Half>(idx, data);
71 }

◆ GetLayerTypeAsCString()

char const * GetLayerTypeAsCString ( LayerType  type)

◆ GetLogicalBinaryOperationAsCString()

constexpr char const* armnn::GetLogicalBinaryOperationAsCString ( LogicalBinaryOperation  operation)

Definition at line 87 of file TypesUtils.hpp.

References LogicalAnd, and LogicalOr.

Referenced by Converter::ConvertOperation(), and RefLogicalBinaryWorkload::ExecuteAsync().

88 {
89  switch (operation)
90  {
91  case LogicalBinaryOperation::LogicalAnd: return "LogicalAnd";
92  case LogicalBinaryOperation::LogicalOr: return "LogicalOr";
93  default: return "Unknown";
94  }
95 }

◆ GetMemBlockStrategyTypeName()

constexpr const char* armnn::GetMemBlockStrategyTypeName ( MemBlockStrategyType  memBlockStrategyType)

Definition at line 264 of file TypesUtils.hpp.

References MultiAxisPacking, and SingleAxisPacking.

Referenced by RuntimeImpl::RuntimeImpl().

265 {
266  switch (memBlockStrategyType)
267  {
268  case MemBlockStrategyType::SingleAxisPacking: return "SingleAxisPacking";
269  case MemBlockStrategyType::MultiAxisPacking: return "MultiAxisPacking";
270  default: return "Unknown";
271  }
272 }

◆ GetMemoryOptimizerStrategy()

std::unique_ptr<IMemoryOptimizerStrategy> armnn::GetMemoryOptimizerStrategy ( const std::string &  strategyName)

Definition at line 36 of file MemoryOptimizerStrategyLibrary.hpp.

Referenced by RuntimeImpl::RuntimeImpl().

37 {
38  const auto& strategyFactoryMap = GetStrategyFactories();
39  auto strategyFactory = strategyFactoryMap.find(strategyName);
40  if (strategyFactory != GetStrategyFactories().end())
41  {
42  return strategyFactory->second->CreateMemoryOptimizerStrategy();
43  }
44  return nullptr;
45 }

◆ GetMemoryOptimizerStrategyNames()

const std::vector<std::string> armnn::GetMemoryOptimizerStrategyNames ( )

Definition at line 47 of file MemoryOptimizerStrategyLibrary.hpp.

48 {
49  const auto& strategyFactoryMap = GetStrategyFactories();
50  std::vector<std::string> strategyNames;
51  for (const auto& strategyFactory : strategyFactoryMap)
52  {
53  strategyNames.emplace_back(strategyFactory.first);
54  }
55  return strategyNames;
56 }

◆ GetModelOptionsForTesting()

ModelOptions & GetModelOptionsForTesting ( IOptimizedNetwork optNet)

Definition at line 54 of file TestUtils.cpp.

References IOptimizedNetwork::pOptimizedNetworkImpl.

Referenced by CheckRelatedLayers().

55 {
56  return optNet->pOptimizedNetworkImpl->GetModelOptions();
57 }
std::unique_ptr< OptimizedNetworkImpl > pOptimizedNetworkImpl
Definition: INetwork.hpp:815

◆ GetNormalizationAlgorithmChannelAsCString()

constexpr const char* armnn::GetNormalizationAlgorithmChannelAsCString ( NormalizationAlgorithmChannel  channel)

Definition at line 234 of file TypesUtils.hpp.

References Across, and Within.

Referenced by StringifyLayerParameters< NormalizationDescriptor >::Serialize().

235 {
236  switch (channel)
237  {
238  case NormalizationAlgorithmChannel::Across: return "Across";
239  case NormalizationAlgorithmChannel::Within: return "Within";
240  default: return "Unknown";
241  }
242 }

◆ GetNormalizationAlgorithmMethodAsCString()

constexpr const char* armnn::GetNormalizationAlgorithmMethodAsCString ( NormalizationAlgorithmMethod  method)

Definition at line 244 of file TypesUtils.hpp.

References LocalBrightness, and LocalContrast.

Referenced by StringifyLayerParameters< NormalizationDescriptor >::Serialize().

245 {
246  switch (method)
247  {
248  case NormalizationAlgorithmMethod::LocalBrightness: return "LocalBrightness";
249  case NormalizationAlgorithmMethod::LocalContrast: return "LocalContrast";
250  default: return "Unknown";
251  }
252 }

◆ GetNumActivations()

unsigned int armnn::GetNumActivations ( const TensorInfo inputInfo)

Definition at line 16 of file RefFullyConnectedWorkload.cpp.

References TensorInfo::GetNumDimensions(), and TensorInfo::GetShape().

17 {
18  unsigned int numActivations = 1; // Total number of activations in the input.
19  for (unsigned int i = 1; i < inputInfo.GetNumDimensions(); i++)
20  {
21  numActivations *= inputInfo.GetShape()[i];
22  }
23  return numActivations;
24 }

◆ GetNumberOfCacheFiles()

unsigned int GetNumberOfCacheFiles ( const armnn::BackendId backend)

Returns the number of cached files if backend supports caching.

Definition at line 113 of file BackendHelper.cpp.

References BackendRegistryInstance().

Referenced by ArmnnDriver::getNumberOfCacheFilesNeeded(), ArmnnDriverImpl::PrepareArmnnModel(), and ArmnnDriverImpl::PrepareArmnnModelFromCache().

114 {
115  auto const& backendRegistry = armnn::BackendRegistryInstance();
116  if (backendRegistry.IsBackendRegistered(backend))
117  {
118  auto factoryFunc = backendRegistry.GetFactory(backend);
119  auto backendObject = factoryFunc();
120  return backendObject->GetNumberOfCacheFiles();
121  }
122  return 0;
123 }
BackendRegistry & BackendRegistryInstance()

◆ GetNumInputs()

uint32_t armnn::GetNumInputs ( bool  biasEnabled)

◆ GetOffset()

unsigned int armnn::GetOffset ( const TensorShape shape,
unsigned int  b,
unsigned int  h,
unsigned int  w,
unsigned int  c,
const DataLayoutIndexed dataLayout 
)

Definition at line 15 of file SpaceToBatchNd.cpp.

References DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetDataLayout(), DataLayoutIndexed::GetHeightIndex(), and DataLayoutIndexed::GetWidthIndex().

Referenced by SpaceToBatchNd(), and SpaceToDepth().

21 {
22  if (dataLayout.GetDataLayout() == DataLayout::NHWC)
23  {
24  return ((b * shape[dataLayout.GetHeightIndex()] + h) * shape[dataLayout.GetWidthIndex()] + w) *
25  shape[dataLayout.GetChannelsIndex()] + c;
26  }
27  else
28  {
29  return ((b * shape[dataLayout.GetChannelsIndex()] + c) * shape[dataLayout.GetHeightIndex()] + h) *
30  shape[dataLayout.GetWidthIndex()] + w;
31  }
32 }
unsigned int GetWidthIndex() const
unsigned int GetHeightIndex() const
armnn::DataLayout GetDataLayout() const
unsigned int GetChannelsIndex() const

◆ GetOutputShapeRoundingAsCString()

constexpr char const* armnn::GetOutputShapeRoundingAsCString ( OutputShapeRounding  rounding)

Definition at line 108 of file TypesUtils.hpp.

References Ceiling, and Floor.

Referenced by StringifyLayerParameters< Pooling2dDescriptor >::Serialize(), and StringifyLayerParameters< Pooling3dDescriptor >::Serialize().

109 {
110  switch (rounding)
111  {
112  case OutputShapeRounding::Ceiling: return "Ceiling";
113  case OutputShapeRounding::Floor: return "Floor";
114  default: return "Unknown";
115  }
116 }

◆ GetOutputTensor()

const armnn::Tensor armnn::GetOutputTensor ( const LayerBindingId  layerId,
const OutputTensors outputTensors 
)

Definition at line 1403 of file LoadedNetwork.cpp.

1404 {
1405  for (auto outputTensorPair : outputTensors)
1406  {
1407  LayerBindingId id = outputTensorPair.first;
1408  if (id == layerId)
1409  {
1410  return outputTensorPair.second;
1411  }
1412  }
1413  throw InvalidArgumentException("Output does not exist.");
1414 }
int LayerBindingId
Type of identifiers for bindable layers (inputs, outputs).
Definition: Types.hpp:290

◆ GetOutputTensorData() [1/2]

DataType* armnn::GetOutputTensorData ( ITensorHandle tensorHandle)

Definition at line 50 of file RefWorkloadUtils.hpp.

References ITensorHandle::Map().

51 {
52  return reinterpret_cast<DataType*>(tensorHandle->Map());
53 }
DataType
Definition: Types.hpp:48

◆ GetOutputTensorData() [2/2]

DataType * GetOutputTensorData ( unsigned int  idx,
const PayloadType &  data 
)

Definition at line 173 of file ClWorkloadUtils.hpp.

References ITensorHandle::Map().

Referenced by GetInputTensorData(), and SetNeonSliceData().

174 {
175  ITensorHandle* tensorHandle = data.m_Outputs[idx];
176  return reinterpret_cast<DataType*>(tensorHandle->Map());
177 }
DataType
Definition: Types.hpp:48

◆ GetOutputTensorDataBFloat16()

BFloat16* armnn::GetOutputTensorDataBFloat16 ( unsigned int  idx,
const PayloadType &  data 
)

Definition at line 86 of file RefWorkloadUtils.hpp.

87 {
88  return GetOutputTensorData<BFloat16>(idx, data);
89 }

◆ GetOutputTensorDataFloat()

float* armnn::GetOutputTensorDataFloat ( unsigned int  idx,
const PayloadType &  data 
)

Definition at line 62 of file RefWorkloadUtils.hpp.

63 {
64  return GetOutputTensorData<float>(idx, data);
65 }

◆ GetOutputTensorDataHalf()

Half* armnn::GetOutputTensorDataHalf ( unsigned int  idx,
const PayloadType &  data 
)

Definition at line 74 of file RefWorkloadUtils.hpp.

75 {
76  return GetOutputTensorData<Half>(idx, data);
77 }

◆ GetPaddingMethodAsCString()

constexpr char const* armnn::GetPaddingMethodAsCString ( PaddingMethod  method)

Definition at line 118 of file TypesUtils.hpp.

References Exclude, and IgnoreValue.

Referenced by StringifyLayerParameters< Pooling2dDescriptor >::Serialize(), and StringifyLayerParameters< Pooling3dDescriptor >::Serialize().

119 {
120  switch (method)
121  {
122  case PaddingMethod::Exclude: return "Exclude";
123  case PaddingMethod::IgnoreValue: return "IgnoreValue";
124  default: return "Unknown";
125  }
126 }

◆ GetPaddingModeAsCString()

constexpr char const* armnn::GetPaddingModeAsCString ( PaddingMode  mode)

Definition at line 128 of file TypesUtils.hpp.

References Constant, Reflect, and Symmetric.

Referenced by StringifyLayerParameters< PadDescriptor >::Serialize().

129 {
130  switch (mode)
131  {
132  case PaddingMode::Constant: return "Exclude";
133  case PaddingMode::Symmetric: return "Symmetric";
134  case PaddingMode::Reflect: return "Reflect";
135  default: return "Unknown";
136  }
137 }

◆ GetPoolingAlgorithmAsCString()

constexpr char const* armnn::GetPoolingAlgorithmAsCString ( PoolingAlgorithm  pooling)

Definition at line 97 of file TypesUtils.hpp.

References Average, L2, and Max.

Referenced by StringifyLayerParameters< Pooling2dDescriptor >::Serialize(), and StringifyLayerParameters< Pooling3dDescriptor >::Serialize().

98 {
99  switch (pooling)
100  {
101  case PoolingAlgorithm::Average: return "Average";
102  case PoolingAlgorithm::Max: return "Max";
103  case PoolingAlgorithm::L2: return "L2";
104  default: return "Unknown";
105  }
106 }

◆ GetProfilingService()

arm::pipe::IProfilingService & GetProfilingService ( armnn::RuntimeImpl runtime)

Definition at line 59 of file TestUtils.cpp.

Referenced by CheckRelatedLayers().

60 {
61  return *(runtime->m_ProfilingService.get());
62 }

◆ GetReduceOperationAsCString()

constexpr char const* armnn::GetReduceOperationAsCString ( ReduceOperation  reduce_operation)

Definition at line 139 of file TypesUtils.hpp.

References Max, Mean, Min, Prod, and Sum.

Referenced by StringifyLayerParameters< ReduceDescriptor >::Serialize().

140 {
141  switch (reduce_operation)
142  {
143  case ReduceOperation::Sum: return "Sum";
144  case ReduceOperation::Max: return "Max";
145  case ReduceOperation::Mean: return "Mean";
146  case ReduceOperation::Min: return "Min";
147  case ReduceOperation::Prod: return "Prod";
148  default: return "Unknown";
149  }
150 }

◆ GetResizeMethodAsCString()

constexpr const char* armnn::GetResizeMethodAsCString ( ResizeMethod  method)

Definition at line 254 of file TypesUtils.hpp.

References Bilinear, and NearestNeighbor.

Referenced by Converter::ConvertOperation(), and StringifyLayerParameters< ResizeDescriptor >::Serialize().

255 {
256  switch (method)
257  {
258  case ResizeMethod::Bilinear: return "Bilinear";
259  case ResizeMethod::NearestNeighbor: return "NearestNeighbour";
260  default: return "Unknown";
261  }
262 }

◆ GetSizePrefixedClContext()

const armnn::ClContext* armnn::GetSizePrefixedClContext ( const void *  buf)
inline

Definition at line 144 of file ClContextSchema_generated.h.

144  {
145  return flatbuffers::GetSizePrefixedRoot<armnn::ClContext>(buf);
146 }

◆ GetStatusAsCString()

constexpr char const* armnn::GetStatusAsCString ( Status  status)

Definition at line 17 of file TypesUtils.hpp.

References Failure, and Success.

Referenced by operator<<().

18 {
19  switch (status)
20  {
21  case armnn::Status::Success: return "Status::Success";
22  case armnn::Status::Failure: return "Status::Failure";
23  default: return "Unknown";
24  }
25 }

◆ GetTensorInfo()

const TensorInfo& armnn::GetTensorInfo ( const ITensorHandle tensorHandle)
inline

float32 helpers

Definition at line 27 of file RefWorkloadUtils.hpp.

Referenced by BatchNormImpl(), Concatenate(), RefGatherNdWorkload::ExecuteAsync(), RefStridedSliceWorkload::ExecuteAsync(), RefDepthToSpaceWorkload::ExecuteAsync(), RefFakeQuantizationFloat32Workload::ExecuteAsync(), RefSpaceToDepthWorkload::ExecuteAsync(), RefChannelShuffleWorkload::ExecuteAsync(), RefFloorWorkload::ExecuteAsync(), RefFillWorkload::ExecuteAsync(), RefConvertBf16ToFp32Workload::ExecuteAsync(), RefConvertFp16ToFp32Workload::ExecuteAsync(), RefLogSoftmaxWorkload::ExecuteAsync(), RefConvertFp32ToBf16Workload::ExecuteAsync(), RefConvertFp32ToFp16Workload::ExecuteAsync(), RefPadWorkload::ExecuteAsync(), RefActivationWorkload::ExecuteAsync(), RefReshapeWorkload::ExecuteAsync(), RefResizeWorkload::ExecuteAsync(), RefSoftmaxWorkload::ExecuteAsync(), RefSpaceToBatchNdWorkload::ExecuteAsync(), RefStackWorkload::ExecuteAsync(), RefDetectionPostProcessWorkload::ExecuteAsync(), RefBatchToSpaceNdWorkload::ExecuteAsync(), RefInstanceNormalizationWorkload::ExecuteAsync(), RefDequantizeWorkload::ExecuteAsync(), RefDepthwiseConvolution2dWorkload::ExecuteAsync(), RefBatchNormalizationWorkload::ExecuteAsync(), RefArgMinMaxWorkload::ExecuteAsync(), RefPreluWorkload::ExecuteAsync(), RefQuantizeWorkload::ExecuteAsync(), RefSliceWorkload::ExecuteAsync(), RefCastWorkload::ExecuteAsync(), RefL2NormalizationWorkload::ExecuteAsync(), RefNormalizationWorkload::ExecuteAsync(), RefReduceWorkload::ExecuteAsync(), RefLstmWorkload::ExecuteAsync(), RefMeanWorkload::ExecuteAsync(), RefPooling2dWorkload::ExecuteAsync(), RefPooling3dWorkload::ExecuteAsync(), RefQLstmWorkload::ExecuteAsync(), RefConstantWorkload::ExecuteAsync(), RefElementwiseUnaryWorkload::ExecuteAsync(), RefBatchMatMulWorkload::ExecuteAsync(), RefLogicalBinaryWorkload::ExecuteAsync(), RefLogicalUnaryWorkload::ExecuteAsync(), RefConvolution3dWorkload::ExecuteAsync(), RefConvolution2dWorkload::ExecuteAsync(), RefShapeWorkload::ExecuteAsync(), RefComparisonWorkload::ExecuteAsync(), RefGatherWorkload::ExecuteAsync(), RefTransposeConvolution2dWorkload::ExecuteAsync(), RefFullyConnectedWorkload::ExecuteAsync(), RefRankWorkload::ExecuteAsync(), RefElementwiseWorkload< Functor, ParentDescriptor, DebugString >::ExecuteAsync(), RefUnidirectionalSequenceLstmWorkload::ExecuteAsync(), RefPermuteWorkload< DataType >::ExecuteAsync(), RefTransposeWorkload< DataType >::ExecuteAsync(), RefDebugWorkload< DataType >::ExecuteAsync(), OutputSlot::GetNumConnections(), OutputSlot::MoveAllConnections(), RefComparisonWorkload::PostAllocationConfigure(), Split(), Splitter(), SwitchLayer::ValidateTensorShapesFromInputs(), DetectionPostProcessLayer::ValidateTensorShapesFromInputs(), SplitterLayer::ValidateTensorShapesFromInputs(), ConcatLayer::ValidateTensorShapesFromInputs(), LstmLayer::ValidateTensorShapesFromInputs(), QuantizedLstmLayer::ValidateTensorShapesFromInputs(), and QLstmLayer::ValidateTensorShapesFromInputs().

28 {
29  // We know that reference workloads use RefTensorHandles for inputs and outputs
30  const TensorHandleType* refTensorHandle =
31  PolymorphicDowncast<const TensorHandleType*>(tensorHandle);
32  return refTensorHandle->GetTensorInfo();
33 }

◆ GetTimeDuration()

std::chrono::duration<double, std::milli> armnn::GetTimeDuration ( std::chrono::high_resolution_clock::time_point  start_time)
inline

Definition at line 19 of file Timer.hpp.

References GetTimeNow().

Referenced by RuntimeImpl::EnqueueWorkload(), RuntimeImpl::Execute(), RuntimeImpl::RuntimeImpl(), and RuntimeImpl::~RuntimeImpl().

21 {
22  return std::chrono::duration<double, std::milli>(GetTimeNow() - start_time);
23 }
std::chrono::high_resolution_clock::time_point GetTimeNow()
Definition: Timer.hpp:14

◆ GetTimeNow()

std::chrono::high_resolution_clock::time_point armnn::GetTimeNow ( )
inline

Definition at line 14 of file Timer.hpp.

Referenced by RuntimeImpl::EnqueueWorkload(), RuntimeImpl::Execute(), GetTimeDuration(), RuntimeImpl::RuntimeImpl(), Threadpool::TerminateThreadPool(), and RuntimeImpl::~RuntimeImpl().

15 {
16  return std::chrono::high_resolution_clock::now();
17 }

◆ GetUnaryOperationAsCString()

constexpr char const* armnn::GetUnaryOperationAsCString ( UnaryOperation  operation)

Definition at line 71 of file TypesUtils.hpp.

References Abs, Exp, Log, LogicalNot, Neg, Rsqrt, Sin, and Sqrt.

Referenced by armnnTfLiteParser::ComputeWrappedIndex(), Converter::ConvertOperation(), RefElementwiseUnaryWorkload::ExecuteAsync(), RefLogicalUnaryWorkload::ExecuteAsync(), and StringifyLayerParameters< ElementwiseUnaryDescriptor >::Serialize().

72 {
73  switch (operation)
74  {
75  case UnaryOperation::Abs: return "Abs";
76  case UnaryOperation::Exp: return "Exp";
77  case UnaryOperation::Sqrt: return "Sqrt";
78  case UnaryOperation::Rsqrt: return "Rsqrt";
79  case UnaryOperation::Neg: return "Neg";
80  case UnaryOperation::Log: return "Log";
81  case UnaryOperation::LogicalNot: return "LogicalNot";
82  case UnaryOperation::Sin: return "Sin";
83  default: return "Unknown";
84  }
85 }

◆ GetUnpaddedTensorStrides()

TensorShape GetUnpaddedTensorStrides ( const TensorInfo tensorInfo)

Definition at line 15 of file TensorHandle.cpp.

References TensorInfo::GetDataType(), GetDataTypeSize(), and TensorInfo::GetShape().

Referenced by RefTensorHandle::GetStrides(), SampleTensorHandle::GetStrides(), TosaRefTensorHandle::GetStrides(), and ConstTensorHandle::GetStrides().

16 {
17  TensorShape shape(tensorInfo.GetShape());
18  auto size = GetDataTypeSize(tensorInfo.GetDataType());
19  auto runningSize = size;
20  std::vector<unsigned int> strides(shape.GetNumDimensions());
21  auto lastIdx = shape.GetNumDimensions()-1;
22  for (unsigned int i=0; i < lastIdx ; i++)
23  {
24  strides[lastIdx-i] = runningSize;
25  runningSize *= shape[lastIdx-i];
26  }
27  strides[0] = runningSize;
28  return TensorShape(shape.GetNumDimensions(), strides.data());
29 }
constexpr unsigned int GetDataTypeSize(DataType dataType)
Definition: TypesUtils.hpp:151

◆ GetVersion()

const std::string GetVersion ( )

Definition at line 77 of file Utils.cpp.

References ARMNN_VERSION.

78 {
79  return ARMNN_VERSION;
80 }
#define ARMNN_VERSION
ARMNN_VERSION: "X.Y.Z" where: X = Major version number Y = Minor version number Z = Patch version num...
Definition: Version.hpp:22

◆ HasCapability() [1/4]

bool HasCapability ( const std::string &  name,
const BackendCapabilities capabilities 
)

Convenience function to check if a capability exists in a BackendCapabilites struct.

Definition at line 58 of file BackendHelper.cpp.

References GetCapability().

Referenced by HasCapability(), LoadedNetwork::ImportInputs(), LoadedNetwork::ImportOutputs(), LoadedNetwork::MakeLoadedNetwork(), and RuntimeImpl::RuntimeImpl().

59 {
60  return GetCapability(name, capabilities).has_value();
61 }
Optional< const BackendOptions::BackendOption > GetCapability(const std::string &backendCapabilityName, const BackendCapabilities &capabilities)
Returns a BackendCapability if the backend lists the capability The BackendCapability must then be in...

◆ HasCapability() [2/4]

bool HasCapability ( const std::string &  name,
const armnn::BackendId backend 
)

Convenience function to check if a capability exists in a backend.

Definition at line 63 of file BackendHelper.cpp.

References GetCapability().

64 {
65  return GetCapability(name, backend).has_value();
66 }
Optional< const BackendOptions::BackendOption > GetCapability(const std::string &backendCapabilityName, const BackendCapabilities &capabilities)
Returns a BackendCapability if the backend lists the capability The BackendCapability must then be in...

◆ HasCapability() [3/4]

bool HasCapability ( const BackendOptions::BackendOption capability,
const BackendCapabilities capabilities 
)

Convenience function to check if a given capability matches a capability in a BackendCapabilities struct.

Definition at line 68 of file BackendHelper.cpp.

References BackendOptions::Var::AsBool(), BackendOptions::Var::AsFloat(), BackendOptions::Var::AsInt(), BackendOptions::Var::AsString(), BackendOptions::Var::AsUnsignedInt(), BackendOptions::BackendOption::GetName(), BackendOptions::GetOption(), BackendOptions::GetOptionCount(), BackendOptions::BackendOption::GetValue(), BackendOptions::Var::IsBool(), BackendOptions::Var::IsFloat(), BackendOptions::Var::IsInt(), BackendOptions::Var::IsString(), and BackendOptions::Var::IsUnsignedInt().

69 {
70  for (size_t i=0; i < capabilities.GetOptionCount(); i++)
71  {
72  const auto& backendCapability = capabilities.GetOption(i);
73  if (capability.GetName() == backendCapability.GetName())
74  {
75  if (capability.GetValue().IsBool() && backendCapability.GetValue().IsBool())
76  {
77  return capability.GetValue().AsBool() == backendCapability.GetValue().AsBool();
78  }
79  else if (capability.GetValue().IsFloat() && backendCapability.GetValue().IsFloat())
80  {
81  return capability.GetValue().AsFloat() == backendCapability.GetValue().AsFloat();
82  }
83  else if (capability.GetValue().IsInt() && backendCapability.GetValue().IsInt())
84  {
85  return capability.GetValue().AsInt() == backendCapability.GetValue().AsInt();
86  }
87  else if (capability.GetValue().IsString() && backendCapability.GetValue().IsString())
88  {
89  return capability.GetValue().AsString() == backendCapability.GetValue().AsString();
90  }
91  else if (capability.GetValue().IsUnsignedInt() && backendCapability.GetValue().IsUnsignedInt())
92  {
93  return capability.GetValue().AsUnsignedInt() == backendCapability.GetValue().AsUnsignedInt();
94  }
95  }
96  }
97  return false;
98 }

◆ HasCapability() [4/4]

bool HasCapability ( const BackendOptions::BackendOption backendOption,
const armnn::BackendId backend 
)

Convenience function to check if a given capability matches a capability in a backend.

Definition at line 100 of file BackendHelper.cpp.

References BackendRegistryInstance(), and HasCapability().

101 {
102  auto const& backendRegistry = armnn::BackendRegistryInstance();
103  if (backendRegistry.IsBackendRegistered(backend))
104  {
105  auto factoryFunc = backendRegistry.GetFactory(backend);
106  auto backendObject = factoryFunc();
107  auto capabilities = backendObject->GetCapabilities();
108  return HasCapability(backendOption, capabilities);
109  }
110  return false;
111 }
bool HasCapability(const std::string &name, const BackendCapabilities &capabilities)
Convenience function to check if a capability exists in a BackendCapabilites struct.
BackendRegistry & BackendRegistryInstance()

◆ IgnoreUnused()

void armnn::IgnoreUnused ( Ts &&  ...)
inline

Definition at line 14 of file IgnoreUnused.hpp.

Referenced by ClBackendDefaultAllocator::allocate(), DefaultAllocator::allocate(), ArgMinMax(), CalculateSlotOptionForOutput(), ITensorHandle::CanBeImported(), ClTensorHandle::CanBeImported(), ClContextControl::ClContextControl(), ClConvolution3dWorkload::ClConvolution3dWorkload(), SpaceToBatchNdLayer::Clone(), SpaceToDepthLayer::Clone(), DynamicBackendUtils::CloseHandle(), ClUnidirectionalSequenceLstmFloatWorkloadValidate(), ConstTensorPin::ConstTensorPin(), CopyTensorContentsGeneric(), IBackendInternal::CreateExecutionData(), RefTensorHandleFactory::CreateSubTensorHandle(), TosaRefTensorHandleFactory::CreateSubTensorHandle(), SampleDynamicTensorHandleFactory::CreateSubTensorHandle(), SampleDynamicWorkloadFactory::CreateSubTensorHandle(), TosaRefWorkloadFactory::CreateSubTensorHandle(), RefWorkloadFactory::CreateSubTensorHandle(), RefTensorHandleFactory::CreateTensorHandle(), TosaRefTensorHandleFactory::CreateTensorHandle(), SampleDynamicTensorHandleFactory::CreateTensorHandle(), MockTensorHandleFactory::CreateTensorHandle(), ClWorkloadFactory::CreateTensorHandle(), TosaRefWorkloadFactory::CreateTensorHandle(), ITensorHandleFactory::CreateTensorHandle(), RefWorkloadFactory::CreateTensorHandle(), OutputLayer::CreateTensorHandles(), MergeLayer::CreateWorkload(), OutputLayer::CreateWorkload(), UnmapLayer::CreateWorkload(), MapLayer::CreateWorkload(), InputLayer::CreateWorkload(), MemCopyLayer::CreateWorkload(), MemImportLayer::CreateWorkload(), StandInLayer::CreateWorkload(), IBackendInternal::CreateWorkloadFactory(), QASymm8Decoder::DecodeTensor(), QASymmS8Decoder::DecodeTensor(), QSymmS8Decoder::DecodeTensor(), QSymm16Decoder::DecodeTensor(), BFloat16Decoder::DecodeTensor(), Float16Decoder::DecodeTensor(), Float32Decoder::DecodeTensor(), ScaledInt32Decoder::DecodeTensor(), Int32Decoder::DecodeTensor(), Int32ToInt32tDecoder::DecodeTensor(), BooleanDecoder::DecodeTensor(), BooleanDecoderBool::DecodeTensor(), QSymm8PerAxisDecoder::DecodeTensor(), Dequantize(), SelectiveQuantizer< T, false >::Dequantize(), SelectiveQuantizer< armnn::Half, false >::Dequantize(), SelectiveQuantizer< armnn::BFloat16, false >::Dequantize(), DetectionPostProcess(), ProfilerImpl::EndEvent(), RefStridedSliceWorkload::ExecuteAsync(), SerializerStrategy::ExecuteStrategy(), UnmapLayer::ExecuteStrategy(), MapLayer::ExecuteStrategy(), MemImportLayer::ExecuteStrategy(), FakeQuantizationLayer::ExecuteStrategy(), StrategyBase< DefaultStrategy >::ExecuteStrategy(), ExecutionFrame::ExecuteWorkloads(), FalseFunc(), FalseFuncF16(), FalseFuncF32(), FalseFuncI32(), FalseFuncU8(), FalseInputFuncF16(), FalseInputFuncF32(), FalseOutputFuncF16(), FalseOutputFuncF32(), Gather(), ClImportTensorHandleFactory::GetCapabilities(), NeonTensorHandleFactory::GetCapabilities(), ITensorHandleFactory::GetCapabilities(), DynamicBackendUtils::GetEntryPoint(), armnnSerializer::GetFlatBufferArgMinMaxFunction(), DefaultAllocator::GetMemoryRegionAtOffset(), ClBackendDefaultAllocator::GetMemoryRegionAtOffset(), ICustomAllocator::GetMemoryRegionAtOffset(), IDeserializer::DeserializerImpl::GetNetworkInputBindingInfo(), IDeserializer::DeserializerImpl::GetNetworkOutputBindingInfo(), IDeserializer::DeserializerImpl::GetNormalizationDescriptor(), IDeserializer::DeserializerImpl::GetPooling2dDescriptor(), IDeserializer::DeserializerImpl::GetPooling3dDescriptor(), DynamicBackendUtils::GetSharedObjects(), ITensorHandle::Import(), ClTensorHandle::Import(), ShapeLayer::InferOutputShapes(), SliceLayer::InferOutputShapes(), StackLayer::InferOutputShapes(), StandInLayer::InferOutputShapes(), ReshapeLayer::InferOutputShapes(), SplitterLayer::InferOutputShapes(), NeonLayerSupport::IsActivationSupported(), RefLayerSupport::IsArgMinMaxSupported(), RefLayerSupport::IsBatchMatMulSupported(), RefLayerSupport::IsBatchNormalizationSupported(), RefLayerSupport::IsBatchToSpaceNdSupported(), RefLayerSupport::IsChannelShuffleSupported(), RefLayerSupport::IsComparisonSupported(), RefLayerSupport::IsConcatSupported(), NeonLayerSupport::IsConvertBf16ToFp32Supported(), NeonLayerSupport::IsConvertFp16ToFp32Supported(), NeonLayerSupport::IsConvertFp32ToBf16Supported(), NeonLayerSupport::IsConvertFp32ToFp16Supported(), RefLayerSupport::IsConvolution2dSupported(), RefLayerSupport::IsConvolution3dSupported(), RefLayerSupport::IsDepthToSpaceSupported(), RefLayerSupport::IsDepthwiseConvolutionSupported(), RefLayerSupport::IsDetectionPostProcessSupported(), RefLayerSupport::IsElementwiseUnarySupported(), RefLayerSupport::IsFakeQuantizationSupported(), ClLayerSupport::IsFillSupported(), NeonLayerSupport::IsFillSupported(), RefLayerSupport::IsFillSupported(), NeonLayerSupport::IsFloorSupported(), RefLayerSupport::IsFloorSupported(), RefLayerSupport::IsInstanceNormalizationSupported(), RefLayerSupport::IsL2NormalizationSupported(), IsLayerOptimizable(), TosaRefLayerSupport::IsLayerSupported(), ILayerSupport::IsLayerSupported(), ClLayerSupport::IsLogicalBinarySupported(), RefLayerSupport::IsLogicalBinarySupported(), RefLayerSupport::IsLogSoftmaxSupported(), RefLayerSupport::IsLstmSupported(), RefLayerSupport::IsNormalizationSupported(), RefLayerSupport::IsPadSupported(), RefLayerSupport::IsPermuteSupported(), RefLayerSupport::IsPooling2dSupported(), RefLayerSupport::IsPooling3dSupported(), RefLayerSupport::IsQLstmSupported(), RefLayerSupport::IsRankSupported(), RefLayerSupport::IsReduceSupported(), ClLayerSupport::IsReshapeSupported(), NeonLayerSupport::IsReshapeSupported(), RefLayerSupport::IsReshapeSupported(), RefLayerSupport::IsResizeSupported(), RefLayerSupport::IsShapeSupported(), RefLayerSupport::IsSliceSupported(), RefLayerSupport::IsSoftmaxSupported(), RefLayerSupport::IsSpaceToBatchNdSupported(), RefLayerSupport::IsSpaceToDepthSupported(), ClLayerSupport::IsSplitterSupported(), NeonLayerSupport::IsSplitterSupported(), RefLayerSupport::IsSplitterSupported(), RefLayerSupport::IsStackSupported(), RefLayerSupport::IsStridedSliceSupported(), RefLayerSupport::IsTransposeConvolution2dSupported(), RefLayerSupport::IsTransposeSupported(), RefLayerSupport::IsUnidirectionalSequenceLstmSupported(), Layer::Layer(), LogSoftmax(), ClImportTensorHandle::Map(), ClBackend::ClBackendCustomAllocatorMemoryRegion::map(), ClImportSubTensorHandle::Map(), NeonConvolution3dWorkload::NeonConvolution3dWorkload(), DynamicBackendUtils::OpenHandle(), TfLiteParserImpl::OutputShapeOfSqueeze(), SelectiveQuantizer< T, false >::Quantize(), SelectiveQuantizer< armnn::Half, false >::Quantize(), SelectiveQuantizer< armnn::BFloat16, false >::Quantize(), BaseWorkload< Convolution2dQueueDescriptor >::ReplaceInputTensorHandle(), BaseWorkload< Convolution2dQueueDescriptor >::ReplaceOutputTensorHandle(), ConvertConstPermuteLayersToConstLayers::Run(), FuseConvertFp32ToBf16IntoConstLayers::Run(), OptimizeInverseConversionsImpl::Run(), RedirectMembersToConstantInputsImpl::Run(), OptimizeInversePermutesImpl< PermuteType >::Run(), SquashEqualSiblingsImpl< Comparable >::Run(), FuseBatchNorm< ConvLayer, ArmnnType, T >::Run(), ConvertConstants< Converter, Predicate >::Run(), SetLogFilter(), ClImportTensorHandle::SetMemoryGroup(), ClImportSubTensorHandle::SetMemoryGroup(), Slice(), OpenClTimer::Start(), MemoryManager::StoreMemToAllocate(), Graph::SubstituteSubgraph(), TrueFunc(), ClBackend::ClBackendCustomAllocatorMemoryRegion::unmap(), IBackendInternal::UpdateExecutionData(), ClBackend::UseCustomMemoryAllocator(), IBackendInternal::UseCustomMemoryAllocator(), WorkingMemHandle::WorkingMemHandle(), Graph::LayerInGraph< InputLayer >::~LayerInGraph(), Graph::LayerInGraph< OutputLayer >::~LayerInGraph(), and ScopedProfilingEvent::~ScopedProfilingEvent().

14 {}

◆ InitializeArmComputeClTensorData()

void armnn::InitializeArmComputeClTensorData ( arm_compute::CLTensor &  clTensor,
const ConstTensorHandle handle 
)
inline

Definition at line 116 of file ClWorkloadUtils.hpp.

References ARMNN_ASSERT.

118 {
119  ARMNN_ASSERT(handle);
120 
121  armcomputetensorutils::InitialiseArmComputeTensorEmpty(clTensor);
122  switch(handle->GetTensorInfo().GetDataType())
123  {
124  case DataType::Float16:
125  CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<armnn::Half>());
126  break;
127  case DataType::Float32:
128  CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<float>());
129  break;
130  case DataType::QAsymmU8:
131  CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<uint8_t>());
132  break;
133  case DataType::QAsymmS8:
134  case DataType::QSymmS8:
135  CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<int8_t>());
136  break;
137  case DataType::QSymmS16:
138  CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<int16_t>());
139  break;
140  case DataType::Signed32:
141  CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<int32_t>());
142  break;
143  case DataType::BFloat16:
144  CopyArmComputeClTensorData(clTensor, handle->GetConstTensor<armnn::BFloat16>());
145  break;
146  default:
147  // Throw exception; assertion not called in release build.
148  throw Exception("Unexpected tensor type during InitializeArmComputeClTensorData().");
149  }
150 };
half_float::half Half
Definition: Half.hpp:22
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
void CopyArmComputeClTensorData(arm_compute::CLTensor &dstTensor, const T *srcData)

◆ InitializeArmComputeTensorData()

void armnn::InitializeArmComputeTensorData ( arm_compute::Tensor &  tensor,
const ConstTensorHandle handle 
)
inline

Definition at line 60 of file NeonWorkloadUtils.hpp.

References ARMNN_ASSERT, BFloat16, CopyArmComputeTensorData(), Float16, Float32, ConstTensorHandle::GetConstTensor(), TensorInfo::GetDataType(), ConstTensorHandle::GetTensorInfo(), QAsymmS8, QAsymmU8, QSymmS16, QSymmS8, and Signed32.

62 {
63  ARMNN_ASSERT(handle);
64 
65  switch(handle->GetTensorInfo().GetDataType())
66  {
67  case DataType::Float16:
68  CopyArmComputeTensorData(tensor, handle->GetConstTensor<armnn::Half>());
69  break;
70  case DataType::Float32:
71  CopyArmComputeTensorData(tensor, handle->GetConstTensor<float>());
72  break;
73  case DataType::QAsymmU8:
74  CopyArmComputeTensorData(tensor, handle->GetConstTensor<uint8_t>());
75  break;
76  case DataType::QSymmS8:
77  case DataType::QAsymmS8:
78  CopyArmComputeTensorData(tensor, handle->GetConstTensor<int8_t>());
79  break;
80  case DataType::Signed32:
81  CopyArmComputeTensorData(tensor, handle->GetConstTensor<int32_t>());
82  break;
83  case DataType::QSymmS16:
84  CopyArmComputeTensorData(tensor, handle->GetConstTensor<int16_t>());
85  break;
86  case DataType::BFloat16:
87  CopyArmComputeTensorData(tensor, handle->GetConstTensor<armnn::BFloat16>());
88  break;
89  default:
90  // Throw exception; assertion not called in release build.
91  throw Exception("Unexpected tensor type during InitializeArmComputeTensorData().");
92  }
93 };
half_float::half Half
Definition: Half.hpp:22
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
void CopyArmComputeTensorData(arm_compute::Tensor &dstTensor, const T *srcData)

◆ InsertConvertBf16ToFp32LayersBefore()

std::vector< ConvertBf16ToFp32Layer * > InsertConvertBf16ToFp32LayersBefore ( Graph graph,
Layer layer,
bool  expectCorrectInputType 
)

Definition at line 53 of file NetworkUtils.cpp.

References Layer::BeginInputSlots(), BFloat16, Layer::EndInputSlots(), Float32, InputSlot::GetConnectedOutputSlot(), TensorInfo::GetDataType(), Layer::GetInputSlot(), Layer::GetName(), Layer::GetNumInputSlots(), Layer::GetOutputSlot(), OutputSlot::GetTensorInfo(), Graph::InsertNewLayer(), TensorInfo::SetDataType(), and OutputSlot::SetTensorInfo().

Referenced by AttemptBackendAssignment().

56 {
57  std::vector<ConvertBf16ToFp32Layer*> convertLayers;
58  convertLayers.reserve(layer.GetNumInputSlots());
59 
60  // Insert a ConvertBf16ToFp32Layer before each input slot
61  for (auto&& inputSlot = layer.BeginInputSlots(); inputSlot != layer.EndInputSlots(); ++inputSlot)
62  {
63  bool allowInsert = true;
64  if (expectCorrectInputType)
65  {
66  // Only insert ConvertBf16ToFp32Layer before BF16 input slots
67  OutputSlot* connectedOutputSlot = inputSlot->GetConnectedOutputSlot();
68  allowInsert =
69  connectedOutputSlot && connectedOutputSlot->GetTensorInfo().GetDataType() == DataType::BFloat16;
70  }
71 
72  if (allowInsert)
73  {
74  const std::string name =
75  std::string("convert_bf16_to_fp32-" + std::to_string(inputSlot->GetSlotIndex()) + "-") +
76  layer.GetName();
77  ConvertBf16ToFp32Layer* convertLayer =
78  graph.InsertNewLayer<ConvertBf16ToFp32Layer>(*inputSlot, name.c_str());
79 
80  TensorInfo convertInfo = convertLayer->GetInputSlot(0).GetConnectedOutputSlot()->GetTensorInfo();
81  convertInfo.SetDataType(DataType::Float32);
82 
83  convertLayer->GetOutputSlot().SetTensorInfo(convertInfo);
84 
85  convertLayers.emplace_back(convertLayer);
86  }
87  }
88 
89  return convertLayers;
90 }

◆ InsertConvertFp16ToFp32LayersBefore()

std::vector< ConvertFp16ToFp32Layer * > InsertConvertFp16ToFp32LayersBefore ( Graph graph,
Layer layer,
bool  expectCorrectInputType 
)

Definition at line 140 of file NetworkUtils.cpp.

References Layer::BeginInputSlots(), Layer::EndInputSlots(), Float16, Float32, InputSlot::GetConnectedOutputSlot(), TensorInfo::GetDataType(), Layer::GetInputSlot(), Layer::GetName(), Layer::GetNumInputSlots(), Layer::GetOutputSlot(), OutputSlot::GetTensorInfo(), Graph::InsertNewLayer(), TensorInfo::SetDataType(), and OutputSlot::SetTensorInfo().

Referenced by AttemptBackendAssignment(), and ConvertFp32NetworkToFp16Impl::Run().

143 {
144  std::vector<ConvertFp16ToFp32Layer*> convertLayers;
145  convertLayers.reserve(layer.GetNumInputSlots());
146 
147  // Insert a ConvertFp16ToFp32Layer before each input slot
148  for (auto&& inputSlot = layer.BeginInputSlots(); inputSlot != layer.EndInputSlots(); ++inputSlot)
149  {
150  bool allowInsert = true;
151  if (expectCorrectInputType)
152  {
153  // Only insert ConvertFp16ToFp32Layer before FP16 input slots
154  OutputSlot* connectedOutputSlot = inputSlot->GetConnectedOutputSlot();
155  allowInsert =
156  connectedOutputSlot && connectedOutputSlot->GetTensorInfo().GetDataType() == DataType::Float16;
157  }
158 
159  if (allowInsert)
160  {
161  const std::string name =
162  std::string("convert_fp16_to_fp32-" + std::to_string(inputSlot->GetSlotIndex()) + "-") +
163  layer.GetName();
164  ConvertFp16ToFp32Layer* convertLayer =
165  graph.InsertNewLayer<ConvertFp16ToFp32Layer>(*inputSlot, name.c_str());
166 
167  TensorInfo convertInfo = convertLayer->GetInputSlot(0).GetConnectedOutputSlot()->GetTensorInfo();
168  convertInfo.SetDataType(DataType::Float32);
169 
170  convertLayer->GetOutputSlot().SetTensorInfo(convertInfo);
171 
172  convertLayers.emplace_back(convertLayer);
173  }
174  }
175 
176  return convertLayers;
177 }

◆ InsertConvertFp32ToBf16LayersAfter()

std::vector< ConvertFp32ToBf16Layer * > InsertConvertFp32ToBf16LayersAfter ( Graph graph,
Layer layer 
)

Definition at line 179 of file NetworkUtils.cpp.

References BFloat16, Float32, InputSlot::GetConnectedOutputSlot(), TensorInfo::GetDataType(), Layer::GetInputSlot(), Layer::GetName(), Layer::GetNumOutputSlots(), Layer::GetOutputSlot(), OutputSlot::GetTensorInfo(), Graph::InsertNewLayer(), TensorInfo::SetDataType(), and OutputSlot::SetTensorInfo().

Referenced by AttemptBackendAssignment().

180 {
181  const unsigned int numOutputSlots = layer.GetNumOutputSlots();
182 
183  std::vector<ConvertFp32ToBf16Layer*> convertLayers;
184  convertLayers.reserve(numOutputSlots);
185 
186  // Update Bf16 output slots to FP32 on current layer
187  ChangeOutputBf16ToFp32(layer);
188 
189  // Insert a ConvertFp32ToBf16Layer after each FP32 output slot
190  for (unsigned int slotIndex = 0u; slotIndex < numOutputSlots; ++slotIndex)
191  {
192  OutputSlot& outputSlot = layer.GetOutputSlot(slotIndex);
193  if(outputSlot.GetTensorInfo().GetDataType() == DataType::Float32)
194  {
195  const std::string name =
196  std::string("convert_fp32_to_bf16-" + std::to_string(slotIndex) + "-") + layer.GetName();
197  ConvertFp32ToBf16Layer* convertLayer =
198  graph.InsertNewLayer<ConvertFp32ToBf16Layer>(outputSlot, name.c_str());
199 
200  TensorInfo convertInfo = convertLayer->GetInputSlot(0).GetConnectedOutputSlot()->GetTensorInfo();
201  convertInfo.SetDataType(DataType::BFloat16);
202 
203  convertLayer->GetOutputSlot().SetTensorInfo(convertInfo);
204 
205  convertLayers.emplace_back(convertLayer);
206  }
207  }
208 
209  return convertLayers;
210 }

◆ InsertConvertFp32ToBf16LayersBefore()

std::vector< ConvertFp32ToBf16Layer * > InsertConvertFp32ToBf16LayersBefore ( Graph graph,
Layer layer,
bool  expectCorrectInputType 
)

Definition at line 92 of file NetworkUtils.cpp.

References Layer::BeginInputSlots(), BFloat16, Convolution2d, DepthwiseConvolution2d, Layer::EndInputSlots(), Float32, FullyConnected, InputSlot::GetConnectedOutputSlot(), TensorInfo::GetDataType(), Layer::GetInputSlot(), Layer::GetName(), Layer::GetNumInputSlots(), Layer::GetOutputSlot(), OutputSlot::GetTensorInfo(), Layer::GetType(), Graph::InsertNewLayer(), TensorInfo::SetDataType(), and OutputSlot::SetTensorInfo().

Referenced by ConvertFp32NetworkToBf16Impl::Run().

95 {
96  std::vector<ConvertFp32ToBf16Layer*> convertLayers;
97  convertLayers.reserve(layer.GetNumInputSlots());
98 
99  // Insert a ConvertFp32ToBf16Layer before each input slot
100  for (auto&& inputSlot = layer.BeginInputSlots(); inputSlot != layer.EndInputSlots(); ++inputSlot)
101  {
102  bool allowInsert = true;
103 
104  if ((layer.GetType() == LayerType::Convolution2d ||
105  layer.GetType() == LayerType::FullyConnected ||
106  layer.GetType() == LayerType::DepthwiseConvolution2d)
107  && inputSlot->GetSlotIndex() == 2)
108  {
109  // Refrain from reducing bias to Bf16
110  continue;
111  }
112  if (expectCorrectInputType)
113  {
114  // Only insert ConvertFp32ToBf16Layer before FP32 input slots
115  OutputSlot* connectedOutputSlot = inputSlot->GetConnectedOutputSlot();
116  allowInsert =
117  connectedOutputSlot && connectedOutputSlot->GetTensorInfo().GetDataType() == DataType::Float32;
118  }
119 
120  if (allowInsert)
121  {
122  const std::string name =
123  std::string("convert_fp32_to_bf16-" + std::to_string(inputSlot->GetSlotIndex()) + "-") +
124  layer.GetName();
125  ConvertFp32ToBf16Layer* convertLayer =
126  graph.InsertNewLayer<ConvertFp32ToBf16Layer>(*inputSlot, name.c_str());
127 
128  TensorInfo convertInfo = convertLayer->GetInputSlot(0).GetConnectedOutputSlot()->GetTensorInfo();
129  convertInfo.SetDataType(DataType::BFloat16);
130 
131  convertLayer->GetOutputSlot().SetTensorInfo(convertInfo);
132 
133  convertLayers.emplace_back(convertLayer);
134  }
135  }
136 
137  return convertLayers;
138 }
void FullyConnected(const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rWeightsShape, Decoder< float > &rWeightDecoder, Decoder< float > *pBiasDecoder, const bool biasEnabled, const unsigned int K, const bool transposeWeights)
Performs a matrix multiplication and optionally adds a bias.

◆ InsertConvertFp32ToFp16LayersAfter()

std::vector< ConvertFp32ToFp16Layer * > InsertConvertFp32ToFp16LayersAfter ( Graph graph,
Layer layer 
)

Definition at line 212 of file NetworkUtils.cpp.

References Float16, Float32, InputSlot::GetConnectedOutputSlot(), TensorInfo::GetDataType(), Layer::GetInputSlot(), Layer::GetName(), Layer::GetNumOutputSlots(), Layer::GetOutputSlot(), OutputSlot::GetTensorInfo(), Graph::InsertNewLayer(), TensorInfo::SetDataType(), and OutputSlot::SetTensorInfo().

Referenced by AttemptBackendAssignment(), and ConvertFp32NetworkToFp16Impl::Run().

213 {
214  const unsigned int numOutputSlots = layer.GetNumOutputSlots();
215 
216  std::vector<ConvertFp32ToFp16Layer*> convertLayers;
217  convertLayers.reserve(numOutputSlots);
218 
219  // Update FP16 output slots to FP32 on current layer
220  ChangeOutputFp16ToFp32(layer);
221 
222  // Insert a ConvertFp32ToFp16Layer after each FP32 output slot
223  for (unsigned int slotIndex = 0u; slotIndex < numOutputSlots; ++slotIndex)
224  {
225  OutputSlot& outputSlot = layer.GetOutputSlot(slotIndex);
226  if(outputSlot.GetTensorInfo().GetDataType() == DataType::Float32)
227  {
228  const std::string name =
229  std::string("convert_fp32_to_fp16-" + std::to_string(slotIndex) + "-") + layer.GetName();
230  ConvertFp32ToFp16Layer* convertLayer =
231  graph.InsertNewLayer<ConvertFp32ToFp16Layer>(outputSlot, name.c_str());
232 
233  TensorInfo convertInfo = convertLayer->GetInputSlot(0).GetConnectedOutputSlot()->GetTensorInfo();
234  convertInfo.SetDataType(DataType::Float16);
235 
236  convertLayer->GetOutputSlot().SetTensorInfo(convertInfo);
237 
238  convertLayers.emplace_back(convertLayer);
239  }
240  }
241 
242  return convertLayers;
243 }

◆ InsertDebugLayerAfter()

std::vector< DebugLayer * > InsertDebugLayerAfter ( Graph graph,
Layer layer,
bool  toFile 
)

Definition at line 245 of file NetworkUtils.cpp.

References ARMNN_ASSERT, Layer::BeginOutputSlots(), CpuRef, Layer::EndOutputSlots(), InputSlot::GetConnectedOutputSlot(), Layer::GetInputSlot(), Layer::GetNameStr(), Layer::GetNumOutputSlots(), Layer::GetOutputSlot(), OutputSlot::GetTensorInfo(), Graph::InsertNewLayer(), Layer::SetBackendId(), and OutputSlot::SetTensorInfo().

Referenced by AddDebugImpl::Run(), and AddDebugToFileImpl::Run().

246 {
247  std::vector<DebugLayer*> debugLayers;
248  debugLayers.reserve(layer.GetNumOutputSlots());
249 
250  // Connect a DebugLayer to each output slot of the layer
251  uint32_t outputSlotIdx = 0;
252  for (auto outputSlot = layer.BeginOutputSlots(); outputSlot != layer.EndOutputSlots(); ++outputSlot)
253  {
254  const std::string debugName = std::string("DebugLayerAfter") + layer.GetNameStr() + "_" +
255  std::to_string(outputSlotIdx);
256 
257  DebugLayer* debugLayer =
258  graph.InsertNewLayer<DebugLayer>(*outputSlot, debugName.c_str(), toFile);
259 
260  // Sets output tensor info for the debug layer.
261  ARMNN_ASSERT(debugLayer->GetInputSlot(0).GetConnectedOutputSlot() == &(*outputSlot));
262  TensorInfo debugInfo = debugLayer->GetInputSlot(0).GetConnectedOutputSlot()->GetTensorInfo();
263 
264  debugLayer->GetOutputSlot().SetTensorInfo(debugInfo);
265 
266  // NOTE: It is OK to do this because DebugLayer is only supported on CpuRef
267  debugLayer->SetBackendId(Compute::CpuRef);
268 
269  debugLayers.emplace_back(debugLayer);
270 
271  ++outputSlotIdx;
272  }
273 
274  return debugLayers;
275 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ InstanceNorm()

void InstanceNorm ( const InstanceNormalizationQueueDescriptor data,
const TensorInfo inputInfo,
Decoder< float > &  inputDecoder,
Encoder< float > &  outputEncoder 
)

Definition at line 18 of file InstanceNorm.cpp.

References Decoder< IType >::Get(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetHeightIndex(), DataLayoutIndexed::GetIndex(), TensorInfo::GetShape(), DataLayoutIndexed::GetWidthIndex(), InstanceNormalizationDescriptor::m_Beta, InstanceNormalizationDescriptor::m_DataLayout, InstanceNormalizationDescriptor::m_Eps, InstanceNormalizationDescriptor::m_Gamma, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, and Encoder< IType >::Set().

Referenced by RefInstanceNormalizationWorkload::ExecuteAsync().

22 {
23  const TensorShape inputShape = inputInfo.GetShape();
24 
25  armnnUtils::DataLayoutIndexed dataLayout(data.m_Parameters.m_DataLayout);
26 
27  unsigned int inputBatches = inputShape[0];
28  unsigned int inputHeight = inputShape[dataLayout.GetHeightIndex()];
29  unsigned int inputWidth = inputShape[dataLayout.GetWidthIndex()];
30  unsigned int inputChannels = inputShape[dataLayout.GetChannelsIndex()];
31 
32  float beta = data.m_Parameters.m_Beta;
33  float eps = data.m_Parameters.m_Eps;
34  float gamma = data.m_Parameters.m_Gamma;
35 
36  for (unsigned int n = 0; n < inputBatches; ++n)
37  {
38  for (unsigned int c = 0; c < inputChannels; ++c)
39  {
40  float mean = 0, var = 0;
41 
42  //Calculate Mean
43  for (unsigned int h = 0; h < inputHeight; h++)
44  {
45  for (unsigned int w = 0; w < inputWidth; w++)
46  {
47  unsigned int index = dataLayout.GetIndex(inputShape, n, c, h, w);
48 
49  inputDecoder[index];
50  float value = inputDecoder.Get();
51  mean += value;
52  }
53  }
54  mean /= static_cast<float>(inputHeight * inputWidth);
55 
56  //Calculate Variance
57  for (unsigned int h = 0; h < inputHeight; h++)
58  {
59  for (unsigned int w = 0; w < inputWidth; w++)
60  {
61  unsigned int index = dataLayout.GetIndex(inputShape, n, c, h, w);
62 
63  inputDecoder[index];
64  float value = inputDecoder.Get();
65  var += (value - mean) * (value - mean);
66  }
67  }
68  var /= static_cast<float>(inputHeight * inputWidth);
69 
70  // Apply Instance Normalisation
71  for (unsigned int h = 0; h < inputHeight; ++h)
72  {
73  for (unsigned int w = 0; w < inputWidth; ++w)
74  {
75  unsigned int index = dataLayout.GetIndex(inputShape, n, c, h, w);
76  inputDecoder[index];
77  outputEncoder[index];
78  outputEncoder.Set((inputDecoder.Get() - mean) * gamma / std::sqrt ( var + eps) + beta);
79  }
80 
81  }
82  }
83  }
84 }
virtual void Set(IType right)=0
virtual IType Get() const =0
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...

◆ IntersectionOverUnion()

float IntersectionOverUnion ( const float *  boxI,
const float *  boxJ 
)

Definition at line 30 of file DetectionPostProcess.cpp.

Referenced by NonMaxSuppression().

31 {
32  // Box-corner format: ymin, xmin, ymax, xmax.
33  const int yMin = 0;
34  const int xMin = 1;
35  const int yMax = 2;
36  const int xMax = 3;
37  float areaI = (boxI[yMax] - boxI[yMin]) * (boxI[xMax] - boxI[xMin]);
38  float areaJ = (boxJ[yMax] - boxJ[yMin]) * (boxJ[xMax] - boxJ[xMin]);
39  float yMinIntersection = std::max(boxI[yMin], boxJ[yMin]);
40  float xMinIntersection = std::max(boxI[xMin], boxJ[xMin]);
41  float yMaxIntersection = std::min(boxI[yMax], boxJ[yMax]);
42  float xMaxIntersection = std::min(boxI[xMax], boxJ[xMax]);
43  float areaIntersection = std::max(yMaxIntersection - yMinIntersection, 0.0f) *
44  std::max(xMaxIntersection - xMinIntersection, 0.0f);
45  float areaUnion = areaI + areaJ - areaIntersection;
46  return areaIntersection / areaUnion;
47 }

◆ IsActivationSupported()

bool armnn::IsActivationSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const ActivationDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

◆ IsAdditionSupported()

bool armnn::IsAdditionSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsBatchNormalizationSupported()

bool armnn::IsBatchNormalizationSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const TensorInfo mean,
const TensorInfo var,
const TensorInfo beta,
const TensorInfo gamma,
const BatchNormalizationDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsBatchToSpaceNdSupported()

bool armnn::IsBatchToSpaceNdSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const BatchToSpaceNdDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsBFloat16()

bool armnn::IsBFloat16 ( const WorkloadInfo info)

Definition at line 53 of file RefWorkloadFactory.cpp.

References info.

Referenced by RefWorkloadFactory::CreateWorkload().

54 {
55  return IsDataType<DataType::BFloat16>(info);
56 }

◆ IsConcatSupported()

bool armnn::IsConcatSupported ( const BackendId backend,
const std::vector< const TensorInfo *>  inputs,
const TensorInfo output,
const OriginsDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsConstantSupported()

bool armnn::IsConstantSupported ( const BackendId backend,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by armnn_driver::ConvertToLayerInputHandle(), and ILayerSupport::IsLayerSupported().

◆ IsConvertFp16ToFp32Supported()

bool armnn::IsConvertFp16ToFp32Supported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsConvertFp32ToFp16Supported()

bool armnn::IsConvertFp32ToFp16Supported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsConvolution2dSupported()

bool armnn::IsConvolution2dSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const Convolution2dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsDataType()

bool IsDataType ( const WorkloadInfo info)

Definition at line 32 of file RefWorkloadFactory.cpp.

References WorkloadInfo::m_InputTensorInfos, and WorkloadInfo::m_OutputTensorInfos.

33 {
34  auto checkType = [](const TensorInfo& tensorInfo) {return tensorInfo.GetDataType() == ArmnnType;};
35  auto it = std::find_if(std::begin(info.m_InputTensorInfos), std::end(info.m_InputTensorInfos), checkType);
36  if (it != std::end(info.m_InputTensorInfos))
37  {
38  return true;
39  }
40  it = std::find_if(std::begin(info.m_OutputTensorInfos), std::end(info.m_OutputTensorInfos), checkType);
41  if (it != std::end(info.m_OutputTensorInfos))
42  {
43  return true;
44  }
45  return false;
46 }

◆ IsDebugSupported()

bool armnn::IsDebugSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsDepthwiseConvolutionSupported()

bool armnn::IsDepthwiseConvolutionSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const DepthwiseConvolution2dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsDequantizeSupported()

bool armnn::IsDequantizeSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsDivisionSupported()

bool armnn::IsDivisionSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsEqualSupported()

bool armnn::IsEqualSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

◆ IsFakeQuantizationSupported()

bool armnn::IsFakeQuantizationSupported ( const BackendId backend,
const TensorInfo input,
const FakeQuantizationDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsFloat16()

bool armnn::IsFloat16 ( const WorkloadInfo info)

Definition at line 58 of file RefWorkloadFactory.cpp.

References info.

Referenced by RefWorkloadFactory::CreateWorkload().

59 {
60  return IsDataType<DataType::Float16>(info);
61 }

◆ IsFloorSupported()

bool armnn::IsFloorSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsFullyConnectedSupported()

bool armnn::IsFullyConnectedSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const TensorInfo weights,
const TensorInfo biases,
const FullyConnectedDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsGreaterSupported()

bool armnn::IsGreaterSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

◆ IsInputSupported()

bool armnn::IsInputSupported ( const BackendId backend,
const TensorInfo input,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by armnn_driver::ConvertToLayerInputHandle(), and ILayerSupport::IsLayerSupported().

◆ IsL2NormalizationSupported()

bool armnn::IsL2NormalizationSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const L2NormalizationDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsLayerOptimizable() [1/2]

bool armnn::IsLayerOptimizable ( const armnn::Layer layer)

Definition at line 85 of file MockBackend.cpp.

References ARMNN_ASSERT, and Layer::GetName().

Referenced by IsLayerOptimizable().

86 {
87  ARMNN_ASSERT(layer != nullptr);
88 
89  // A Layer is not optimizable if its name contains "unoptimizable"
90  const std::string layerName(layer->GetName());
91  bool optimizable = layerName.find("unoptimizable") == std::string::npos;
92 
93  return optimizable;
94 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
const char * GetName() const override
Returns the name of the layer.
Definition: Layer.hpp:319

◆ IsLayerOptimizable() [2/2]

◆ IsLayerSupported() [1/2]

bool armnn::IsLayerSupported ( const armnn::Layer layer)

Definition at line 60 of file MockBackend.cpp.

References Addition, ARMNN_ASSERT, Constant, Convolution2d, Layer::GetType(), Input, and Output.

Referenced by IsLayerOptimizable(), and SampleDynamicWorkloadFactory::IsLayerSupported().

61 {
62  ARMNN_ASSERT(layer != nullptr);
63 
64  armnn::LayerType layerType = layer->GetType();
65  switch (layerType)
66  {
72  // Layer supported
73  return true;
74  default:
75  // Layer unsupported
76  return false;
77  }
78 }
LayerType GetType() const override
Returns the armnn::LayerType of this layer.
Definition: Layer.hpp:273
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
LayerType
When adding a new layer, adapt also the LastLayer enum value in the enum class LayerType below...
Definition: Types.hpp:468

◆ IsLayerSupported() [2/2]

bool armnn::IsLayerSupported ( const armnn::Layer layer)

Definition at line 80 of file MockBackend.cpp.

81 {
82  return IsLayerSupported(&layer);
83 }
bool IsLayerSupported(const armnn::Layer &layer)
Definition: MockBackend.cpp:80

◆ IsLstmSupported()

bool armnn::IsLstmSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo outputStateIn,
const TensorInfo cellStateIn,
const TensorInfo scratchBuffer,
const TensorInfo outputStateOut,
const TensorInfo cellStateOut,
const TensorInfo output,
const LstmDescriptor descriptor,
const LstmInputParamsInfo paramsInfo,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsMaximumSupported()

bool armnn::IsMaximumSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
char *  reasonIfUnSupported = nullptr,
size_t  reasonIfUnSupportedMaxLength = 0 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsMeanSupported()

bool armnn::IsMeanSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const MeanDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsMemCopySupported()

bool armnn::IsMemCopySupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsMergeSupported()

bool armnn::IsMergeSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsMinimumSupported()

bool armnn::IsMinimumSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsMultiplicationSupported()

bool armnn::IsMultiplicationSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsNormalizationSupported()

bool armnn::IsNormalizationSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const NormalizationDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsOperationQueueDescriptor() [1/4]

constexpr bool armnn::IsOperationQueueDescriptor ( const QueueDescriptorType &  )

Definition at line 18 of file RefWorkloadFactory.hpp.

18 { return true; }

◆ IsOperationQueueDescriptor() [2/4]

constexpr bool armnn::IsOperationQueueDescriptor ( const MemCopyQueueDescriptor )

Definition at line 21 of file RefWorkloadFactory.hpp.

21 { return false; }

◆ IsOperationQueueDescriptor() [3/4]

constexpr bool armnn::IsOperationQueueDescriptor ( const ConstantQueueDescriptor )

Definition at line 24 of file RefWorkloadFactory.hpp.

24 { return false; }

◆ IsOperationQueueDescriptor() [4/4]

constexpr bool armnn::IsOperationQueueDescriptor ( const PermuteQueueDescriptor )

Definition at line 27 of file RefWorkloadFactory.hpp.

27 { return false; }

◆ IsOutputSupported()

bool armnn::IsOutputSupported ( const BackendId backend,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsPadSupported()

bool armnn::IsPadSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const PadDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsPermuteSupported()

bool armnn::IsPermuteSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const PermuteDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsPooling2dSupported()

bool armnn::IsPooling2dSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const Pooling2dDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by armnn_driver::ConvertPooling2d(), and ILayerSupport::IsLayerSupported().

◆ IsPreCompiledSupported()

bool armnn::IsPreCompiledSupported ( const BackendId backend,
const TensorInfo input,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsPreluSupported()

bool armnn::IsPreluSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo alpha,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsQAsymmS8()

bool armnn::IsQAsymmS8 ( const WorkloadInfo info)

Definition at line 73 of file RefWorkloadFactory.cpp.

References info.

Referenced by RefWorkloadFactory::CreateWorkload().

74 {
75  return IsDataType<DataType::QAsymmS8>(info);
76 }

◆ IsQAsymmU8()

bool armnn::IsQAsymmU8 ( const WorkloadInfo info)

Definition at line 78 of file RefWorkloadFactory.cpp.

References info.

Referenced by RefWorkloadFactory::CreateWorkload().

79 {
80  return IsDataType<DataType::QAsymmU8>(info);
81 }

◆ IsQSymmS16()

bool armnn::IsQSymmS16 ( const WorkloadInfo info)

Definition at line 63 of file RefWorkloadFactory.cpp.

References info.

Referenced by RefWorkloadFactory::CreateWorkload().

64 {
65  return IsDataType<DataType::QSymmS16>(info);
66 }

◆ IsQSymmS8()

bool armnn::IsQSymmS8 ( const WorkloadInfo info)

Definition at line 68 of file RefWorkloadFactory.cpp.

References info.

Referenced by RefWorkloadFactory::CreateWorkload().

69 {
70  return IsDataType<DataType::QSymmS8>(info);
71 }

◆ IsQuantized8BitType()

constexpr bool armnn::IsQuantized8BitType ( DataType  dataType)

Definition at line 285 of file TypesUtils.hpp.

References QAsymmS8, QAsymmU8, and QSymmS8.

Referenced by GetBiasDataType(), RefLayerSupport::IsConvolution2dSupported(), RefLayerSupport::IsConvolution3dSupported(), RefLayerSupport::IsDepthwiseConvolutionSupported(), IsQuantizedType(), and RefLayerSupport::IsTransposeConvolution2dSupported().

286 {
287  return dataType == DataType::QAsymmU8 ||
288  dataType == DataType::QAsymmS8 ||
289  dataType == DataType::QSymmS8;
290 }

◆ IsQuantizedLstmSupported()

bool armnn::IsQuantizedLstmSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo previousCellStateIn,
const TensorInfo previousOutputIn,
const TensorInfo cellStateOut,
const TensorInfo output,
const QuantizedLstmInputParamsInfo paramsInfo,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsQuantizedType() [1/2]

constexpr bool armnn::IsQuantizedType ( )

◆ IsQuantizedType() [2/2]

constexpr bool armnn::IsQuantizedType ( DataType  dataType)

Definition at line 292 of file TypesUtils.hpp.

References IsQuantized8BitType(), and QSymmS16.

293 {
294  return dataType == DataType::QSymmS16 || IsQuantized8BitType(dataType);
295 }
constexpr bool IsQuantized8BitType(DataType dataType)
Definition: TypesUtils.hpp:285

◆ IsReadyForSplitAssignment()

bool armnn::IsReadyForSplitAssignment ( LayerSelectionInfo::LayerInfoContainer &  layerInfos,
LayerSelectionInfo &  layerInfo 
)

Definition at line 374 of file SubgraphViewSelector.cpp.

References ForEachLayerInput().

Referenced by SubgraphViewSelector::SelectSubgraphs().

375 {
376  bool ready = true;
377  ForEachLayerInput(layerInfos, layerInfo,
378  [&ready](LayerSelectionInfo& parentInfo)
379  {
380  if (!parentInfo.m_IsProcessed)
381  {
382  ready = false;
383  }
384  });
385  return ready;
386 }
void ForEachLayerInput(LayerSelectionInfo::LayerInfoContainer &layerInfos, LayerSelectionInfo &layerInfo, Delegate function)

◆ IsReduceSupported()

bool armnn::IsReduceSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const ReduceDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by armnn_driver::ConvertReduce(), and ILayerSupport::IsLayerSupported().

◆ IsReshapeSupported()

bool armnn::IsReshapeSupported ( const BackendId backend,
const TensorInfo input,
const ReshapeDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsResizeSupported()

bool armnn::IsResizeSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const ResizeDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsRsqrtSupported()

bool armnn::IsRsqrtSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

◆ IsSigned32()

bool armnn::IsSigned32 ( const WorkloadInfo info)

Definition at line 48 of file RefWorkloadFactory.cpp.

References info.

Referenced by RefWorkloadFactory::CreateWorkload().

49 {
50  return IsDataType<DataType::Signed32>(info);
51 }

◆ IsSoftmaxSupported()

bool armnn::IsSoftmaxSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const SoftmaxDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsSpaceToBatchNdSupported()

bool armnn::IsSpaceToBatchNdSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const SpaceToBatchNdDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsSpaceToDepthSupported()

bool armnn::IsSpaceToDepthSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const SpaceToDepthDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsSplitterSupported()

bool armnn::IsSplitterSupported ( const BackendId backend,
const TensorInfo input,
const std::vector< std::reference_wrapper< TensorInfo >> &  outputs,
const ViewsDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsStackSupported()

bool armnn::IsStackSupported ( const BackendId backend,
const std::vector< const TensorInfo *>  inputs,
const TensorInfo output,
const StackDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsStridedSliceSupported()

bool armnn::IsStridedSliceSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const StridedSliceDescriptor descriptor,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsSubtractionSupported()

bool armnn::IsSubtractionSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ IsSupportedForDataTypeGeneric()

bool armnn::IsSupportedForDataTypeGeneric ( Optional< std::string &>  reasonIfUnsupported,
DataType  dataType,
Float16Func  float16FuncPtr,
Float32Func  float32FuncPtr,
Uint8Func  uint8FuncPtr,
Int32Func  int32FuncPtr,
BooleanFunc  booleanFuncPtr,
Params &&...  params 
)

Definition at line 27 of file LayerSupportCommon.hpp.

References Boolean, Float16, Float32, QAsymmU8, and Signed32.

Referenced by RefLayerSupport::IsConvertFp16ToFp32Supported(), RefLayerSupport::IsConvertFp32ToFp16Supported(), and NeonLayerSupport::IsFloorSupported().

35 {
36  switch(dataType)
37  {
38  case DataType::Float16:
39  return float16FuncPtr(reasonIfUnsupported, std::forward<Params>(params)...);
40  case DataType::Float32:
41  return float32FuncPtr(reasonIfUnsupported, std::forward<Params>(params)...);
42  case DataType::QAsymmU8:
43  return uint8FuncPtr(reasonIfUnsupported, std::forward<Params>(params)...);
44  case DataType::Signed32:
45  return int32FuncPtr(reasonIfUnsupported, std::forward<Params>(params)...);
46  case DataType::Boolean:
47  return booleanFuncPtr(reasonIfUnsupported, std::forward<Params>(params)...);
48  default:
49  return false;
50  }
51 }

◆ IsSwitchSupported()

bool armnn::IsSwitchSupported ( const BackendId backend,
const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output0,
const TensorInfo output1,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by ILayerSupport::IsLayerSupported().

◆ IsTransposeConvolution2dSupported()

bool armnn::IsTransposeConvolution2dSupported ( const BackendId backend,
const TensorInfo input,
const TensorInfo output,
const TransposeConvolution2dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
char *  reasonIfUnsupported = nullptr,
size_t  reasonIfUnsupportedMaxLength = 1024 
)

Deprecated in favor of IBackend and ILayerSupport interfaces.

Referenced by Converter::ConvertOperation(), and ILayerSupport::IsLayerSupported().

◆ LayerEnumOf() [1/75]

constexpr LayerType armnn::LayerEnumOf ( const T *  = nullptr)

◆ LayerEnumOf() [2/75]

constexpr LayerType armnn::LayerEnumOf ( const ActivationLayer )

Definition at line 111 of file LayersFwd.hpp.

◆ LayerEnumOf() [3/75]

constexpr LayerType armnn::LayerEnumOf ( const AdditionLayer )

Definition at line 112 of file LayersFwd.hpp.

◆ LayerEnumOf() [4/75]

constexpr LayerType armnn::LayerEnumOf ( const ArgMinMaxLayer )

Definition at line 113 of file LayersFwd.hpp.

◆ LayerEnumOf() [5/75]

constexpr LayerType armnn::LayerEnumOf ( const BatchMatMulLayer )

Definition at line 114 of file LayersFwd.hpp.

◆ LayerEnumOf() [6/75]

constexpr LayerType armnn::LayerEnumOf ( const BatchNormalizationLayer )

Definition at line 115 of file LayersFwd.hpp.

◆ LayerEnumOf() [7/75]

constexpr LayerType armnn::LayerEnumOf ( const BatchToSpaceNdLayer )

Definition at line 116 of file LayersFwd.hpp.

◆ LayerEnumOf() [8/75]

constexpr LayerType armnn::LayerEnumOf ( const CastLayer )

Definition at line 117 of file LayersFwd.hpp.

◆ LayerEnumOf() [9/75]

constexpr LayerType armnn::LayerEnumOf ( const ChannelShuffleLayer )

Definition at line 118 of file LayersFwd.hpp.

◆ LayerEnumOf() [10/75]

constexpr LayerType armnn::LayerEnumOf ( const ComparisonLayer )

Definition at line 119 of file LayersFwd.hpp.

◆ LayerEnumOf() [11/75]

constexpr LayerType armnn::LayerEnumOf ( const ConcatLayer )

Definition at line 120 of file LayersFwd.hpp.

◆ LayerEnumOf() [12/75]

constexpr LayerType armnn::LayerEnumOf ( const ConstantLayer )

Definition at line 121 of file LayersFwd.hpp.

◆ LayerEnumOf() [13/75]

constexpr LayerType armnn::LayerEnumOf ( const ConvertBf16ToFp32Layer )

Definition at line 122 of file LayersFwd.hpp.

◆ LayerEnumOf() [14/75]

constexpr LayerType armnn::LayerEnumOf ( const ConvertFp16ToFp32Layer )

Definition at line 123 of file LayersFwd.hpp.

◆ LayerEnumOf() [15/75]

constexpr LayerType armnn::LayerEnumOf ( const ConvertFp32ToBf16Layer )

Definition at line 124 of file LayersFwd.hpp.

◆ LayerEnumOf() [16/75]

constexpr LayerType armnn::LayerEnumOf ( const ConvertFp32ToFp16Layer )

Definition at line 125 of file LayersFwd.hpp.

◆ LayerEnumOf() [17/75]

constexpr LayerType armnn::LayerEnumOf ( const Convolution2dLayer )

Definition at line 126 of file LayersFwd.hpp.

◆ LayerEnumOf() [18/75]

constexpr LayerType armnn::LayerEnumOf ( const Convolution3dLayer )

Definition at line 127 of file LayersFwd.hpp.

◆ LayerEnumOf() [19/75]

constexpr LayerType armnn::LayerEnumOf ( const DebugLayer )

Definition at line 128 of file LayersFwd.hpp.

◆ LayerEnumOf() [20/75]

constexpr LayerType armnn::LayerEnumOf ( const DepthToSpaceLayer )

Definition at line 129 of file LayersFwd.hpp.

◆ LayerEnumOf() [21/75]

constexpr LayerType armnn::LayerEnumOf ( const DepthwiseConvolution2dLayer )

Definition at line 130 of file LayersFwd.hpp.

◆ LayerEnumOf() [22/75]

constexpr LayerType armnn::LayerEnumOf ( const DequantizeLayer )

Definition at line 131 of file LayersFwd.hpp.

◆ LayerEnumOf() [23/75]

constexpr LayerType armnn::LayerEnumOf ( const DetectionPostProcessLayer )

Definition at line 132 of file LayersFwd.hpp.

◆ LayerEnumOf() [24/75]

constexpr LayerType armnn::LayerEnumOf ( const DivisionLayer )

Definition at line 133 of file LayersFwd.hpp.

◆ LayerEnumOf() [25/75]

constexpr LayerType armnn::LayerEnumOf ( const ElementwiseUnaryLayer )

Definition at line 134 of file LayersFwd.hpp.

◆ LayerEnumOf() [26/75]

constexpr LayerType armnn::LayerEnumOf ( const FakeQuantizationLayer )

Definition at line 135 of file LayersFwd.hpp.

◆ LayerEnumOf() [27/75]

constexpr LayerType armnn::LayerEnumOf ( const FillLayer )

Definition at line 136 of file LayersFwd.hpp.

◆ LayerEnumOf() [28/75]

constexpr LayerType armnn::LayerEnumOf ( const FloorLayer )

Definition at line 137 of file LayersFwd.hpp.

◆ LayerEnumOf() [29/75]

constexpr LayerType armnn::LayerEnumOf ( const FullyConnectedLayer )

Definition at line 138 of file LayersFwd.hpp.

◆ LayerEnumOf() [30/75]

constexpr LayerType armnn::LayerEnumOf ( const GatherLayer )

Definition at line 139 of file LayersFwd.hpp.

◆ LayerEnumOf() [31/75]

constexpr LayerType armnn::LayerEnumOf ( const GatherNdLayer )

Definition at line 140 of file LayersFwd.hpp.

◆ LayerEnumOf() [32/75]

constexpr LayerType armnn::LayerEnumOf ( const InputLayer )

Definition at line 141 of file LayersFwd.hpp.

◆ LayerEnumOf() [33/75]

constexpr LayerType armnn::LayerEnumOf ( const InstanceNormalizationLayer )

Definition at line 142 of file LayersFwd.hpp.

◆ LayerEnumOf() [34/75]

constexpr LayerType armnn::LayerEnumOf ( const L2NormalizationLayer )

Definition at line 143 of file LayersFwd.hpp.

◆ LayerEnumOf() [35/75]

constexpr LayerType armnn::LayerEnumOf ( const LogicalBinaryLayer )

Definition at line 144 of file LayersFwd.hpp.

◆ LayerEnumOf() [36/75]

constexpr LayerType armnn::LayerEnumOf ( const LogSoftmaxLayer )

Definition at line 145 of file LayersFwd.hpp.

◆ LayerEnumOf() [37/75]

constexpr LayerType armnn::LayerEnumOf ( const LstmLayer )

Definition at line 146 of file LayersFwd.hpp.

◆ LayerEnumOf() [38/75]

constexpr LayerType armnn::LayerEnumOf ( const MapLayer )

Definition at line 147 of file LayersFwd.hpp.

◆ LayerEnumOf() [39/75]

constexpr LayerType armnn::LayerEnumOf ( const MaximumLayer )

Definition at line 148 of file LayersFwd.hpp.

◆ LayerEnumOf() [40/75]

constexpr LayerType armnn::LayerEnumOf ( const MeanLayer )

Definition at line 149 of file LayersFwd.hpp.

◆ LayerEnumOf() [41/75]

constexpr LayerType armnn::LayerEnumOf ( const MemCopyLayer )

Definition at line 150 of file LayersFwd.hpp.

◆ LayerEnumOf() [42/75]

constexpr LayerType armnn::LayerEnumOf ( const MemImportLayer )

Definition at line 151 of file LayersFwd.hpp.

◆ LayerEnumOf() [43/75]

constexpr LayerType armnn::LayerEnumOf ( const MergeLayer )

Definition at line 152 of file LayersFwd.hpp.

◆ LayerEnumOf() [44/75]

constexpr LayerType armnn::LayerEnumOf ( const MinimumLayer )

Definition at line 153 of file LayersFwd.hpp.

◆ LayerEnumOf() [45/75]

constexpr LayerType armnn::LayerEnumOf ( const MultiplicationLayer )

Definition at line 154 of file LayersFwd.hpp.

◆ LayerEnumOf() [46/75]

constexpr LayerType armnn::LayerEnumOf ( const NormalizationLayer )

Definition at line 155 of file LayersFwd.hpp.

◆ LayerEnumOf() [47/75]

constexpr LayerType armnn::LayerEnumOf ( const OutputLayer )

Definition at line 156 of file LayersFwd.hpp.

◆ LayerEnumOf() [48/75]

constexpr LayerType armnn::LayerEnumOf ( const PadLayer )

Definition at line 157 of file LayersFwd.hpp.

◆ LayerEnumOf() [49/75]

constexpr LayerType armnn::LayerEnumOf ( const PermuteLayer )

Definition at line 158 of file LayersFwd.hpp.

◆ LayerEnumOf() [50/75]

constexpr LayerType armnn::LayerEnumOf ( const Pooling2dLayer )

Definition at line 159 of file LayersFwd.hpp.

◆ LayerEnumOf() [51/75]

constexpr LayerType armnn::LayerEnumOf ( const Pooling3dLayer )

Definition at line 160 of file LayersFwd.hpp.

◆ LayerEnumOf() [52/75]

constexpr LayerType armnn::LayerEnumOf ( const PreCompiledLayer )

Definition at line 161 of file LayersFwd.hpp.

◆ LayerEnumOf() [53/75]

constexpr LayerType armnn::LayerEnumOf ( const PreluLayer )

Definition at line 162 of file LayersFwd.hpp.

◆ LayerEnumOf() [54/75]

constexpr LayerType armnn::LayerEnumOf ( const QuantizeLayer )

Definition at line 163 of file LayersFwd.hpp.

◆ LayerEnumOf() [55/75]

constexpr LayerType armnn::LayerEnumOf ( const QLstmLayer )

Definition at line 164 of file LayersFwd.hpp.

◆ LayerEnumOf() [56/75]

constexpr LayerType armnn::LayerEnumOf ( const QuantizedLstmLayer )

Definition at line 165 of file LayersFwd.hpp.

◆ LayerEnumOf() [57/75]

constexpr LayerType armnn::LayerEnumOf ( const RankLayer )

Definition at line 166 of file LayersFwd.hpp.

◆ LayerEnumOf() [58/75]

constexpr LayerType armnn::LayerEnumOf ( const ReduceLayer )

Definition at line 167 of file LayersFwd.hpp.

◆ LayerEnumOf() [59/75]

constexpr LayerType armnn::LayerEnumOf ( const ReshapeLayer )

Definition at line 168 of file LayersFwd.hpp.

◆ LayerEnumOf() [60/75]

constexpr LayerType armnn::LayerEnumOf ( const ResizeLayer )

Definition at line 169 of file LayersFwd.hpp.

◆ LayerEnumOf() [61/75]

constexpr LayerType armnn::LayerEnumOf ( const ShapeLayer )

Definition at line 170 of file LayersFwd.hpp.

◆ LayerEnumOf() [62/75]

constexpr LayerType armnn::LayerEnumOf ( const SliceLayer )

Definition at line 171 of file LayersFwd.hpp.

◆ LayerEnumOf() [63/75]

constexpr LayerType armnn::LayerEnumOf ( const SoftmaxLayer )

Definition at line 172 of file LayersFwd.hpp.

◆ LayerEnumOf() [64/75]

constexpr LayerType armnn::LayerEnumOf ( const SpaceToBatchNdLayer )

Definition at line 173 of file LayersFwd.hpp.

◆ LayerEnumOf() [65/75]

constexpr LayerType armnn::LayerEnumOf ( const SpaceToDepthLayer )

Definition at line 174 of file LayersFwd.hpp.

◆ LayerEnumOf() [66/75]

constexpr LayerType armnn::LayerEnumOf ( const SplitterLayer )

Definition at line 175 of file LayersFwd.hpp.

◆ LayerEnumOf() [67/75]

constexpr LayerType armnn::LayerEnumOf ( const StackLayer )

Definition at line 176 of file LayersFwd.hpp.

◆ LayerEnumOf() [68/75]

constexpr LayerType armnn::LayerEnumOf ( const StandInLayer )

Definition at line 177 of file LayersFwd.hpp.

◆ LayerEnumOf() [69/75]

constexpr LayerType armnn::LayerEnumOf ( const StridedSliceLayer )

Definition at line 178 of file LayersFwd.hpp.

◆ LayerEnumOf() [70/75]

constexpr LayerType armnn::LayerEnumOf ( const SubtractionLayer )

Definition at line 179 of file LayersFwd.hpp.

◆ LayerEnumOf() [71/75]

constexpr LayerType armnn::LayerEnumOf ( const SwitchLayer )

Definition at line 180 of file LayersFwd.hpp.

◆ LayerEnumOf() [72/75]

constexpr LayerType armnn::LayerEnumOf ( const TransposeLayer )

Definition at line 181 of file LayersFwd.hpp.

◆ LayerEnumOf() [73/75]

constexpr LayerType armnn::LayerEnumOf ( const TransposeConvolution2dLayer )

Definition at line 182 of file LayersFwd.hpp.

◆ LayerEnumOf() [74/75]

constexpr LayerType armnn::LayerEnumOf ( const UnidirectionalSequenceLstmLayer )

Definition at line 183 of file LayersFwd.hpp.

◆ LayerEnumOf() [75/75]

constexpr LayerType armnn::LayerEnumOf ( const UnmapLayer )

Definition at line 184 of file LayersFwd.hpp.

◆ LevelToString()

std::string armnn::LevelToString ( LogSeverity  level)
inline

Definition at line 15 of file Logging.hpp.

References Debug, Error, Fatal, Info, Trace, and Warning.

Referenced by ScopedRecord::ScopedRecord().

16 {
17  switch(level)
18  {
19  case LogSeverity::Trace:
20  return "Trace";
21  case LogSeverity::Debug:
22  return "Debug";
23  case LogSeverity::Info:
24  return "Info";
25  case LogSeverity::Warning:
26  return "Warning";
27  case LogSeverity::Error:
28  return "Error";
29  case LogSeverity::Fatal:
30  return "Fatal";
31  default:
32  return "Log";
33  }
34 }
void Debug(const TensorInfo &inputInfo, const T *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
Definition: Debug.cpp:97

◆ LogSoftmax()

void LogSoftmax ( Decoder< float > &  input,
Encoder< float > &  output,
const TensorInfo inputInfo,
const LogSoftmaxDescriptor descriptor 
)

Definition at line 29 of file LogSoftmax.cpp.

References ARMNN_ASSERT_MSG, Decoder< IType >::Get(), TensorShape::GetNumDimensions(), TensorInfo::GetNumDimensions(), armnnUtils::GetNumElementsBetween(), TensorInfo::GetShape(), IgnoreUnused(), SoftmaxDescriptor::m_Axis, SoftmaxDescriptor::m_Beta, numeric_cast(), and Encoder< IType >::Set().

33 {
34  const unsigned int numDimensions = inputInfo.GetNumDimensions();
35 
36  bool axisIsValid = ValidateAxis(descriptor.m_Axis, numDimensions);
37  ARMNN_ASSERT_MSG(axisIsValid,
38  "Axis index is not in range [-numDimensions, numDimensions).");
39  IgnoreUnused(axisIsValid);
40 
41  unsigned int uAxis = descriptor.m_Axis < 0 ?
42  numDimensions - armnn::numeric_cast<unsigned int>(std::abs(descriptor.m_Axis)) :
43  armnn::numeric_cast<unsigned int>(descriptor.m_Axis);
44 
45  const TensorShape& inputShape = inputInfo.GetShape();
46  const unsigned int outerSize = armnnUtils::GetNumElementsBetween(inputShape, 0, uAxis);
47  const unsigned int axisSize = inputShape[uAxis];
48  const unsigned int innerSize = armnnUtils::GetNumElementsBetween(inputShape,
49  uAxis + 1,
50  inputShape.GetNumDimensions());
51 
52  for (unsigned int outer = 0; outer < outerSize; ++outer)
53  {
54  for (unsigned int inner = 0; inner < innerSize; ++inner)
55  {
56  // Find max
57  input[outer * axisSize * innerSize + inner];
58  float maxValue = input.Get();
59  for (unsigned int i = 1u; i < axisSize; ++i)
60  {
61  input[(outer * axisSize + i) * innerSize + inner];
62  maxValue = std::max(maxValue, input.Get());
63  }
64 
65  // Compute sum
66  float sum = 0.0f;
67  for (unsigned int i = 0u; i < axisSize; ++i)
68  {
69  input[(outer * axisSize + i) * innerSize + inner];
70  sum += std::exp((input.Get() - maxValue) * descriptor.m_Beta);
71  }
72 
73  // Compute log sum
74  const float logSum = std::log(sum);
75 
76  // Compute result
77  for (unsigned int i = 0u; i < axisSize; ++i)
78  {
79  const unsigned int index = (outer * axisSize + i) * innerSize + inner;
80 
81  input [index];
82  output[index];
83 
84  output.Set((input.Get() - maxValue) * descriptor.m_Beta - logSum);
85  }
86  }
87  }
88 }
unsigned int GetNumElementsBetween(const armnn::TensorShape &shape, unsigned int firstAxisInclusive, unsigned int lastAxisExclusive)
virtual void Set(IType right)=0
void IgnoreUnused(Ts &&...)
virtual IType Get() const =0
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ LowerString()

std::string armnn::LowerString ( std::string  value)

Definition at line 62 of file ClBackendContext.cpp.

63 {
64  std::transform(value.begin(), value.end(), value.begin(),
65  [](unsigned char c){ return std::tolower(c); });
66 
67  return value;
68 }

◆ LstmImpl()

void LstmImpl ( const LstmDescriptor descriptor,
const TensorInfo inputInfo,
const TensorInfo outputInfo,
const TensorShape inputToOutputWeightsShape,
const TensorShape recurrentToOutputWeightsShape,
std::unique_ptr< Decoder< float >> &  inputData,
std::unique_ptr< Decoder< float >> &  outputStateIn,
std::unique_ptr< Decoder< float >> &  cellStateIn,
std::unique_ptr< Encoder< float >> &  outputStateOut,
std::unique_ptr< Encoder< float >> &  cellStateOut,
std::unique_ptr< Encoder< float >> &  output,
std::unique_ptr< Decoder< float >> &  cellStateOutDecoder,
std::unique_ptr< Decoder< float >> &  outputDecoder,
std::unique_ptr< Decoder< float >> &  inputToInputWeightsTensor,
std::unique_ptr< Decoder< float >> &  inputToForgetWeightsTensor,
std::unique_ptr< Decoder< float >> &  inputToCellWeightsTensor,
std::unique_ptr< Decoder< float >> &  inputToOutputWeightsTensor,
std::unique_ptr< Decoder< float >> &  recurrentToInputWeightsTensor,
std::unique_ptr< Decoder< float >> &  recurrentToForgetWeightsTensor,
std::unique_ptr< Decoder< float >> &  recurrentToCellWeightsTensor,
std::unique_ptr< Decoder< float >> &  recurrentToOutputWeightsTensor,
std::unique_ptr< Decoder< float >> &  cellToInputWeightsTensor,
std::unique_ptr< Decoder< float >> &  cellToForgetWeightsTensor,
std::unique_ptr< Decoder< float >> &  cellToOutputWeightsTensor,
std::unique_ptr< Decoder< float >> &  inputGateBiasTensor,
std::unique_ptr< Decoder< float >> &  forgetGateBiasTensor,
std::unique_ptr< Decoder< float >> &  cellBiasTensor,
std::unique_ptr< Decoder< float >> &  outputGateBiasTensor,
std::unique_ptr< Decoder< float >> &  projectionWeightsTensor,
std::unique_ptr< Decoder< float >> &  projectionBiasTensor,
std::unique_ptr< Decoder< float >> &  inputLayerNormWeights,
std::unique_ptr< Decoder< float >> &  forgetLayerNormWeights,
std::unique_ptr< Decoder< float >> &  cellLayerNormWeights,
std::unique_ptr< Decoder< float >> &  outputLayerNormWeights,
std::unique_ptr< Encoder< float >> &  inputGateScratch,
std::unique_ptr< Encoder< float >> &  cellScratch,
std::unique_ptr< Encoder< float >> &  forgetGateScratch,
std::unique_ptr< Encoder< float >> &  outputGateScratch,
std::unique_ptr< Decoder< float >> &  inputGateScratchDecoder,
std::unique_ptr< Decoder< float >> &  cellScratchDecoder,
std::unique_ptr< Decoder< float >> &  forgetGateScratchDecoder,
std::unique_ptr< Decoder< float >> &  outputGateScratchDecoder,
float  layerNormEpsilon 
)

Definition at line 13 of file Lstm.cpp.

References Activation(), ClipVector(), CopyVector(), TensorInfo::GetDataType(), TensorInfo::GetShape(), LstmDescriptor::m_ActivationFunc, LstmDescriptor::m_CifgEnabled, LstmDescriptor::m_ClippingThresCell, LstmDescriptor::m_ClippingThresProj, LstmDescriptor::m_LayerNormEnabled, LstmDescriptor::m_PeepholeEnabled, LstmDescriptor::m_ProjectionEnabled, MatrixBatchVectorMultiplyAccumulate(), MeanStddevNormalization(), SetActivationParameters(), Sigmoid, Sub1Vector(), VectorBatchVectorAdd(), VectorBatchVectorAssign(), VectorBatchVectorCwiseProduct(), VectorBatchVectorCwiseProductAccumulate(), VectorVectorCwiseProduct(), VectorVectorCwiseProductAccumulate(), and ZeroVector().

Referenced by RefLstmWorkload::ExecuteAsync(), and RefUnidirectionalSequenceLstmWorkload::ExecuteAsync().

56 {
57  // This is a porting of the LSTM::Eval() method in the Android code base
58  // Refer to: android/frameworks/ml/nn/common/operations/LSTM.cpp
59 
60  const TensorShape& inputShape = inputInfo.GetShape();
61  const DataType& outputType = outputInfo.GetDataType();
62 
63  const uint32_t nBatch = inputShape[0];
64  const uint32_t nInput = inputShape[1];
65 
66  const uint32_t nCell = inputToOutputWeightsShape[0];
67  const uint32_t nOutput = recurrentToOutputWeightsShape[1];
68 
69  const bool useCifg = descriptor.m_CifgEnabled;
70  const bool usePeephole = descriptor.m_PeepholeEnabled;
71  const bool useLayerNorm = descriptor.m_LayerNormEnabled;
72 
73  if (!useLayerNorm)
74  {
75  // Initialize scratch buffers with bias.
76  if (!useCifg)
77  {
78  VectorBatchVectorAssign(*inputGateBiasTensor,
79  nCell, nBatch, *inputGateScratch);
80  }
81  VectorBatchVectorAssign(*forgetGateBiasTensor,
82  nCell, nBatch, *forgetGateScratch);
83  VectorBatchVectorAssign(*cellBiasTensor,
84  nCell, nBatch, *cellScratch);
85  VectorBatchVectorAssign(*outputGateBiasTensor,
86  nCell, nBatch, *outputGateScratch);
87  }
88  else
89  {
90  // Initialize scratch buffers with zeroes.
91  if (!useCifg)
92  {
93  ZeroVector(*inputGateScratch, nCell * nBatch);
94  }
95  ZeroVector(*forgetGateScratch, nCell * nBatch);
96  ZeroVector(*cellScratch , nCell * nBatch);
97  ZeroVector(*outputGateScratch, nCell * nBatch);
98  }
99 
100  // For each batch and cell: compute input_weight * input.
101  if (!useCifg)
102  {
103  MatrixBatchVectorMultiplyAccumulate(*inputToInputWeightsTensor,
104  nCell, nInput, *inputData, nBatch, *inputGateScratch);
105  }
106  MatrixBatchVectorMultiplyAccumulate(*inputToForgetWeightsTensor,
107  nCell, nInput, *inputData, nBatch, *forgetGateScratch);
108  MatrixBatchVectorMultiplyAccumulate(*inputToCellWeightsTensor,
109  nCell, nInput, *inputData, nBatch, *cellScratch);
110  MatrixBatchVectorMultiplyAccumulate(*inputToOutputWeightsTensor,
111  nCell, nInput, *inputData, nBatch, *outputGateScratch);
112 
113  // For each batch and cell: compute recurrent_weight * output_state.
114  if (!useCifg)
115  {
116  MatrixBatchVectorMultiplyAccumulate(*recurrentToInputWeightsTensor,
117  nCell, nOutput, *outputStateIn, nBatch, *inputGateScratch);
118  }
119  MatrixBatchVectorMultiplyAccumulate(*recurrentToForgetWeightsTensor,
120  nCell, nOutput, *outputStateIn, nBatch, *forgetGateScratch);
121  MatrixBatchVectorMultiplyAccumulate(*recurrentToCellWeightsTensor,
122  nCell, nOutput, *outputStateIn, nBatch, *cellScratch);
123  MatrixBatchVectorMultiplyAccumulate(*recurrentToOutputWeightsTensor,
124  nCell, nOutput, *outputStateIn, nBatch, *outputGateScratch);
125 
126  // For each batch and cell: update input gate.
127  if (!useCifg)
128  {
129  if (usePeephole)
130  {
131  VectorBatchVectorCwiseProductAccumulate(*cellToInputWeightsTensor,
132  nCell, *cellStateIn, nBatch, *inputGateScratch);
133  }
134  if (useLayerNorm)
135  {
136  MeanStddevNormalization(*inputGateScratchDecoder,
137  *inputGateScratch, nCell, nBatch, layerNormEpsilon);
138  VectorBatchVectorCwiseProduct(*inputLayerNormWeights,
139  nCell, *inputGateScratchDecoder, nBatch, *inputGateScratch);
140  VectorBatchVectorAdd(*inputGateBiasTensor,
141  nCell, *inputGateScratchDecoder, nBatch, *inputGateScratch);
142  }
143  Activation(*inputGateScratchDecoder, *inputGateScratch,
144  TensorInfo({nCell, nBatch}, outputType),
145  ActivationFunction::Sigmoid, 0, 0);
146  }
147 
148  // For each batch and cell: update forget gate.
149  if (usePeephole)
150  {
151  VectorBatchVectorCwiseProductAccumulate(*cellToForgetWeightsTensor, nCell,
152  *cellStateIn, nBatch, *forgetGateScratch);
153  }
154  if (useLayerNorm)
155  {
156  MeanStddevNormalization(*forgetGateScratchDecoder,
157  *forgetGateScratch, nCell, nBatch, layerNormEpsilon);
158  VectorBatchVectorCwiseProduct(*forgetLayerNormWeights,
159  nCell, *forgetGateScratchDecoder, nBatch, *forgetGateScratch);
160  VectorBatchVectorAdd(*forgetGateBiasTensor,
161  nCell, *forgetGateScratchDecoder, nBatch, *forgetGateScratch);
162  }
163  Activation(*forgetGateScratchDecoder, *forgetGateScratch,
164  TensorInfo({nCell, nBatch}, outputType),
165  ActivationFunction::Sigmoid, 0, 0);
166 
167  // For each batch and cell: update the cell.
168  if (useLayerNorm)
169  {
170  MeanStddevNormalization(*cellScratchDecoder,
171  *cellScratch, nCell, nBatch, layerNormEpsilon);
172  VectorBatchVectorCwiseProduct(*cellLayerNormWeights,
173  nCell, *cellScratchDecoder, nBatch, *cellScratch);
174  VectorBatchVectorAdd(*cellBiasTensor,
175  nCell, *cellScratchDecoder, nBatch, *cellScratch);
176  }
177 
178  VectorVectorCwiseProduct(*forgetGateScratchDecoder, *cellStateIn, nBatch * nCell, *cellStateOut);
179 
180  ActivationFunction armnnActivationFunc = ActivationFunction::Sigmoid;
181  float a = 0;
182  float b = 0;
183  SetActivationParameters(descriptor.m_ActivationFunc, armnnActivationFunc, a, b);
184 
185  if (descriptor.m_ActivationFunc > 0)
186  {
187  Activation(*cellScratchDecoder, *cellScratch,
188  TensorInfo({nCell, nBatch}, outputType),
189  armnnActivationFunc, a, b);
190  }
191  if (useCifg)
192  {
193  Sub1Vector(*forgetGateScratchDecoder, nBatch * nCell, *forgetGateScratch);
195  *cellScratchDecoder, *forgetGateScratchDecoder, nBatch * nCell, *cellStateOut);
196  }
197  else
198  {
200  *cellScratchDecoder, *inputGateScratchDecoder, nBatch * nCell, *cellStateOut);
201  }
202  if (descriptor.m_ClippingThresCell > 0.0)
203  {
204  ClipVector(*cellStateOutDecoder, nBatch * nCell, descriptor.m_ClippingThresCell, *cellStateOut);
205  }
206 
207  // For each batch and cell: update the output gate.
208  if (usePeephole)
209  {
210  VectorBatchVectorCwiseProductAccumulate(*cellToOutputWeightsTensor,
211  nCell, *cellStateOutDecoder, nBatch, *outputGateScratch);
212  }
213  if (useLayerNorm)
214  {
215  MeanStddevNormalization(*outputGateScratchDecoder,
216  *outputGateScratch, nCell, nBatch, layerNormEpsilon);
217  VectorBatchVectorCwiseProduct(*outputLayerNormWeights,
218  nCell, *outputGateScratchDecoder, nBatch, *outputGateScratch);
219  VectorBatchVectorAdd(*outputGateBiasTensor,
220  nCell, *outputGateScratchDecoder, nBatch, *outputGateScratch);
221  }
222  Activation(*outputGateScratchDecoder, *outputGateScratch,
223  TensorInfo({nCell, nBatch}, outputType),
224  ActivationFunction::Sigmoid, 0, 0);
225 
226  if (descriptor.m_ActivationFunc > 0)
227  {
228  Activation(*cellStateOutDecoder, *cellScratch,
229  TensorInfo({nCell, nBatch}, outputType),
230  armnnActivationFunc, a, b);
231  }
232 
233  VectorVectorCwiseProduct(*outputGateScratchDecoder, *cellScratchDecoder, nBatch * nCell, *outputGateScratch);
234 
235  // For each batch: update the projection and output_state.
236  if (descriptor.m_ProjectionEnabled)
237  {
238  if (projectionBiasTensor)
239  {
240  VectorBatchVectorAssign(*projectionBiasTensor,
241  nOutput, nBatch, *output);
242  }
243  MatrixBatchVectorMultiplyAccumulate(*projectionWeightsTensor,
244  nOutput, nCell, *outputGateScratchDecoder, nBatch, *output);
245 
246  if (descriptor.m_ClippingThresProj > 0.0)
247  {
248  ClipVector(*outputDecoder, nBatch * nOutput, descriptor.m_ClippingThresProj, *output);
249  }
250  }
251  else
252  {
253  CopyVector(*outputGateScratchDecoder, nBatch * nOutput, *output);
254  }
255 
256  CopyVector(*outputDecoder, nBatch * nOutput, *outputStateOut);
257 }
void MeanStddevNormalization(armnn::Decoder< float > &input_vector, armnn::Encoder< float > &output_vector, uint32_t v_size, uint32_t n_batch, float normalization_epsilon)
Definition: LstmUtils.cpp:40
void VectorBatchVectorAdd(armnn::Decoder< float > &vector, uint32_t vSize, armnn::Decoder< float > &batchVector, uint32_t nBatch, armnn::Encoder< float > &outResult)
Definition: LstmUtils.cpp:16
void ClipVector(armnn::Decoder< float > &vector, uint32_t vSize, float absLimit, armnn::Encoder< float > &outResult)
Definition: LstmUtils.cpp:229
void Sub1Vector(armnn::Decoder< float > &vector, uint32_t vSize, armnn::Encoder< float > &result)
Definition: LstmUtils.cpp:173
void CopyVector(armnn::Decoder< float > &vector, uint32_t vSize, armnn::Encoder< float > &outResult)
Definition: LstmUtils.cpp:244
void VectorBatchVectorCwiseProductAccumulate(armnn::Decoder< float > &vector, uint32_t vSize, armnn::Decoder< float > &batchVector, uint32_t nBatch, armnn::Encoder< float > &outResult)
Definition: LstmUtils.cpp:131
void ZeroVector(armnn::Encoder< float > &vector, uint32_t vSize)
Definition: LstmUtils.cpp:76
void VectorVectorCwiseProduct(armnn::Decoder< float > &vector1, armnn::Decoder< float > &vector2, uint32_t vSize, armnn::Encoder< float > &outResult)
Definition: LstmUtils.cpp:187
void VectorBatchVectorCwiseProduct(armnn::Decoder< float > &vector, uint32_t vSize, armnn::Decoder< float > &batchVector, uint32_t nBatch, armnn::Encoder< float > &outResult)
Definition: LstmUtils.cpp:152
void MatrixBatchVectorMultiplyAccumulate(armnn::Decoder< float > &matrix, uint32_t mRows, uint32_t mCols, armnn::Decoder< float > &vector, uint32_t nBatch, armnn::Encoder< float > &outResult)
Definition: LstmUtils.cpp:87
DataType
Definition: Types.hpp:48
float Activation(float in, ActivationFunction function, float a, float b)
Definition: Activation.cpp:13
void VectorVectorCwiseProductAccumulate(armnn::Decoder< float > &vector1, armnn::Decoder< float > &vector2, uint32_t vSize, armnn::Encoder< float > &outResult)
Definition: LstmUtils.cpp:204
void VectorBatchVectorAssign(armnn::Decoder< float > &vector, uint32_t vSize, uint32_t nBatch, armnn::Encoder< float > &outBatchVector)
Definition: LstmUtils.cpp:113
void SetActivationParameters(uint32_t activation, armnn::ActivationFunction &outArmnnActivation, float &outA, float &outB)
Definition: LstmUtils.cpp:258
ActivationFunction
Definition: Types.hpp:86

◆ MakeDecoder() [1/4]

std::unique_ptr<Decoder<T> > armnn::MakeDecoder ( const TensorInfo info,
const void *  data = nullptr 
)
inline

Definition at line 66 of file Decoders.hpp.

References ARMNN_ASSERT_MSG, BFloat16, Boolean, Float16, Float32, TensorInfo::GetDataType(), armnnUtils::GetPerAxisParams(), TensorInfo::GetQuantizationOffset(), TensorInfo::GetQuantizationScale(), TensorInfo::HasPerAxisQuantization(), QAsymmS8, QAsymmU8, QSymmS16, QSymmS8, and Signed32.

67 {
68  switch(info.GetDataType())
69  {
70  case DataType::QAsymmS8:
71  {
72  return std::make_unique<QASymmS8Decoder>(
73  static_cast<const int8_t*>(data),
74  info.GetQuantizationScale(),
75  info.GetQuantizationOffset());
76  }
77  case DataType::QAsymmU8:
78  {
79  return std::make_unique<QASymm8Decoder>(
80  static_cast<const uint8_t*>(data),
81  info.GetQuantizationScale(),
82  info.GetQuantizationOffset());
83  }
84  case DataType::QSymmS16:
85  {
86  return std::make_unique<QSymm16Decoder>(
87  static_cast<const int16_t*>(data),
88  info.GetQuantizationScale(),
89  info.GetQuantizationOffset());
90  }
91  case DataType::BFloat16:
92  {
93  return std::make_unique<BFloat16Decoder>(static_cast<const BFloat16*>(data));
94  }
95  case DataType::Float16:
96  {
97  return std::make_unique<Float16Decoder>(static_cast<const Half*>(data));
98  }
99  case DataType::Float32:
100  {
101  return std::make_unique<Float32Decoder>(static_cast<const float*>(data));
102  }
103  case DataType::Signed32:
104  {
105  return MakeSigned32Decoder(info, data);
106  }
107  case DataType::QSymmS8:
108  {
109  if (info.HasPerAxisQuantization())
110  {
111  std::pair<unsigned int, std::vector<float>> params = armnnUtils::GetPerAxisParams(info);
112  return std::make_unique<QSymm8PerAxisDecoder>(static_cast<const int8_t*>(data), info);
113  }
114  else
115  {
116  return std::make_unique<QSymmS8Decoder>(
117  static_cast<const int8_t*>(data),
118  info.GetQuantizationScale(),
119  info.GetQuantizationOffset());
120  }
121  }
123  {
124  return std::make_unique<BooleanDecoder>(static_cast<const uint8_t*>(data));
125  }
126  default:
127  {
128  ARMNN_ASSERT_MSG(false, "Unsupported Data Type!");
129  break;
130  }
131  }
132  return nullptr;
133 }
std::pair< unsigned int, std::vector< float > > GetPerAxisParams(const armnn::TensorInfo &info)
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
half_float::half Half
Definition: Half.hpp:22

◆ MakeDecoder() [2/4]

std::unique_ptr<Decoder<float> > armnn::MakeDecoder ( const TensorInfo info,
const void *  data 
)
inline

Definition at line 66 of file Decoders.hpp.

References ARMNN_ASSERT_MSG, BFloat16, Boolean, Float16, Float32, TensorInfo::GetDataType(), armnnUtils::GetPerAxisParams(), TensorInfo::GetQuantizationOffset(), TensorInfo::GetQuantizationScale(), TensorInfo::HasPerAxisQuantization(), QAsymmS8, QAsymmU8, QSymmS16, QSymmS8, and Signed32.

67 {
68  switch(info.GetDataType())
69  {
70  case DataType::QAsymmS8:
71  {
72  return std::make_unique<QASymmS8Decoder>(
73  static_cast<const int8_t*>(data),
74  info.GetQuantizationScale(),
75  info.GetQuantizationOffset());
76  }
77  case DataType::QAsymmU8:
78  {
79  return std::make_unique<QASymm8Decoder>(
80  static_cast<const uint8_t*>(data),
81  info.GetQuantizationScale(),
82  info.GetQuantizationOffset());
83  }
84  case DataType::QSymmS16:
85  {
86  return std::make_unique<QSymm16Decoder>(
87  static_cast<const int16_t*>(data),
88  info.GetQuantizationScale(),
89  info.GetQuantizationOffset());
90  }
91  case DataType::BFloat16:
92  {
93  return std::make_unique<BFloat16Decoder>(static_cast<const BFloat16*>(data));
94  }
95  case DataType::Float16:
96  {
97  return std::make_unique<Float16Decoder>(static_cast<const Half*>(data));
98  }
99  case DataType::Float32:
100  {
101  return std::make_unique<Float32Decoder>(static_cast<const float*>(data));
102  }
103  case DataType::Signed32:
104  {
105  return MakeSigned32Decoder(info, data);
106  }
107  case DataType::QSymmS8:
108  {
109  if (info.HasPerAxisQuantization())
110  {
111  std::pair<unsigned int, std::vector<float>> params = armnnUtils::GetPerAxisParams(info);
112  return std::make_unique<QSymm8PerAxisDecoder>(static_cast<const int8_t*>(data), info);
113  }
114  else
115  {
116  return std::make_unique<QSymmS8Decoder>(
117  static_cast<const int8_t*>(data),
118  info.GetQuantizationScale(),
119  info.GetQuantizationOffset());
120  }
121  }
123  {
124  return std::make_unique<BooleanDecoder>(static_cast<const uint8_t*>(data));
125  }
126  default:
127  {
128  ARMNN_ASSERT_MSG(false, "Unsupported Data Type!");
129  break;
130  }
131  }
132  return nullptr;
133 }
std::pair< unsigned int, std::vector< float > > GetPerAxisParams(const armnn::TensorInfo &info)
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
half_float::half Half
Definition: Half.hpp:22

◆ MakeDecoder() [3/4]

std::unique_ptr<Decoder<bool> > armnn::MakeDecoder ( const TensorInfo info,
const void *  data 
)
inline

Definition at line 136 of file Decoders.hpp.

References ARMNN_ASSERT_MSG, Boolean, and TensorInfo::GetDataType().

137 {
138  switch(info.GetDataType())
139  {
140  case DataType::Boolean:
141  {
142  return std::make_unique<BooleanDecoderBool>(static_cast<const uint8_t*>(data));
143  }
144  default:
145  {
146  ARMNN_ASSERT_MSG(false, "Unsupported Data Type!");
147  break;
148  }
149  }
150  return nullptr;
151 }
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15

◆ MakeDecoder() [4/4]

std::unique_ptr<Decoder<int32_t> > armnn::MakeDecoder ( const TensorInfo info,
const void *  data 
)
inline

Definition at line 154 of file Decoders.hpp.

References ARMNN_ASSERT_MSG, TensorInfo::GetDataType(), and Signed32.

155 {
156  switch(info.GetDataType())
157  {
158  case DataType::Signed32:
159  {
160  return std::make_unique<Int32ToInt32tDecoder>(static_cast<const int32_t*>(data));
161  }
162  default:
163  {
164  ARMNN_ASSERT_MSG(false, "Unsupported Data Type!");
165  break;
166  }
167  }
168  return nullptr;
169 }
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15

◆ MakeEncoder() [1/4]

std::unique_ptr<Encoder<T> > armnn::MakeEncoder ( const TensorInfo info,
void *  data = nullptr 
)
inline

Definition at line 21 of file Encoders.hpp.

References ARMNN_ASSERT_MSG, BFloat16, Boolean, Float16, Float32, TensorInfo::GetDataType(), armnnUtils::GetPerAxisParams(), TensorInfo::GetQuantizationOffset(), TensorInfo::GetQuantizationScale(), TensorInfo::HasPerAxisQuantization(), QAsymmS8, QAsymmU8, QSymmS16, QSymmS8, and Signed32.

22 {
23  switch(info.GetDataType())
24  {
26  {
27  return std::make_unique<QASymmS8Encoder>(
28  static_cast<int8_t*>(data),
29  info.GetQuantizationScale(),
30  info.GetQuantizationOffset());
31  }
33  {
34  return std::make_unique<QASymm8Encoder>(
35  static_cast<uint8_t*>(data),
36  info.GetQuantizationScale(),
37  info.GetQuantizationOffset());
38  }
39  case DataType::QSymmS8:
40  {
41  if (info.HasPerAxisQuantization())
42  {
43  std::pair<unsigned int, std::vector<float>> params = armnnUtils::GetPerAxisParams(info);
44  return std::make_unique<QSymm8PerAxisEncoder>(
45  static_cast<int8_t*>(data),
46  params.second,
47  params.first);
48  }
49  else
50  {
51  return std::make_unique<QSymmS8Encoder>(
52  static_cast<int8_t*>(data),
53  info.GetQuantizationScale(),
54  info.GetQuantizationOffset());
55  }
56  }
58  {
59  return std::make_unique<QSymm16Encoder>(
60  static_cast<int16_t*>(data),
61  info.GetQuantizationScale(),
62  info.GetQuantizationOffset());
63  }
65  {
66  return std::make_unique<Int32Encoder>(static_cast<int32_t*>(data));
67  }
69  {
70  return std::make_unique<BFloat16Encoder>(static_cast<armnn::BFloat16*>(data));
71  }
73  {
74  return std::make_unique<Float16Encoder>(static_cast<Half*>(data));
75  }
77  {
78  return std::make_unique<Float32Encoder>(static_cast<float*>(data));
79  }
80  default:
81  {
82  ARMNN_ASSERT_MSG(false, "Unsupported target Data Type!");
83  break;
84  }
85  }
86  return nullptr;
87 }
std::pair< unsigned int, std::vector< float > > GetPerAxisParams(const armnn::TensorInfo &info)
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
half_float::half Half
Definition: Half.hpp:22

◆ MakeEncoder() [2/4]

std::unique_ptr<Encoder<float> > armnn::MakeEncoder ( const TensorInfo info,
void *  data 
)
inline

Definition at line 21 of file Encoders.hpp.

References ARMNN_ASSERT_MSG, BFloat16, Float16, Float32, TensorInfo::GetDataType(), armnnUtils::GetPerAxisParams(), TensorInfo::GetQuantizationOffset(), TensorInfo::GetQuantizationScale(), TensorInfo::HasPerAxisQuantization(), QAsymmS8, QAsymmU8, QSymmS16, QSymmS8, and Signed32.

22 {
23  switch(info.GetDataType())
24  {
26  {
27  return std::make_unique<QASymmS8Encoder>(
28  static_cast<int8_t*>(data),
29  info.GetQuantizationScale(),
30  info.GetQuantizationOffset());
31  }
33  {
34  return std::make_unique<QASymm8Encoder>(
35  static_cast<uint8_t*>(data),
36  info.GetQuantizationScale(),
37  info.GetQuantizationOffset());
38  }
39  case DataType::QSymmS8:
40  {
41  if (info.HasPerAxisQuantization())
42  {
43  std::pair<unsigned int, std::vector<float>> params = armnnUtils::GetPerAxisParams(info);
44  return std::make_unique<QSymm8PerAxisEncoder>(
45  static_cast<int8_t*>(data),
46  params.second,
47  params.first);
48  }
49  else
50  {
51  return std::make_unique<QSymmS8Encoder>(
52  static_cast<int8_t*>(data),
53  info.GetQuantizationScale(),
54  info.GetQuantizationOffset());
55  }
56  }
58  {
59  return std::make_unique<QSymm16Encoder>(
60  static_cast<int16_t*>(data),
61  info.GetQuantizationScale(),
62  info.GetQuantizationOffset());
63  }
65  {
66  return std::make_unique<Int32Encoder>(static_cast<int32_t*>(data));
67  }
69  {
70  return std::make_unique<BFloat16Encoder>(static_cast<armnn::BFloat16*>(data));
71  }
73  {
74  return std::make_unique<Float16Encoder>(static_cast<Half*>(data));
75  }
77  {
78  return std::make_unique<Float32Encoder>(static_cast<float*>(data));
79  }
80  default:
81  {
82  ARMNN_ASSERT_MSG(false, "Unsupported target Data Type!");
83  break;
84  }
85  }
86  return nullptr;
87 }
std::pair< unsigned int, std::vector< float > > GetPerAxisParams(const armnn::TensorInfo &info)
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
half_float::half Half
Definition: Half.hpp:22

◆ MakeEncoder() [3/4]

std::unique_ptr<Encoder<bool> > armnn::MakeEncoder ( const TensorInfo info,
void *  data 
)
inline

Definition at line 90 of file Encoders.hpp.

References ARMNN_ASSERT_MSG, Boolean, and TensorInfo::GetDataType().

91 {
92  switch(info.GetDataType())
93  {
95  {
96  return std::make_unique<BooleanEncoder>(static_cast<uint8_t*>(data));
97  }
98  default:
99  {
100  ARMNN_ASSERT_MSG(false, "Cannot encode from boolean. Not supported target Data Type!");
101  break;
102  }
103  }
104  return nullptr;
105 }
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15

◆ MakeEncoder() [4/4]

std::unique_ptr<Encoder<int32_t> > armnn::MakeEncoder ( const TensorInfo info,
void *  data 
)
inline

Definition at line 108 of file Encoders.hpp.

References ARMNN_ASSERT_MSG, TensorInfo::GetDataType(), and Signed32.

109 {
110  switch(info.GetDataType())
111  {
112  case DataType::Signed32:
113  {
114  return std::make_unique<Int32ToInt32tEncoder>(static_cast<int32_t*>(data));
115  }
116  default:
117  {
118  ARMNN_ASSERT_MSG(false, "Unsupported Data Type!");
119  break;
120  }
121  }
122  return nullptr;
123 }
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15

◆ MakeInfo()

arm_compute::DetectionPostProcessLayerInfo armnn::MakeInfo ( const DetectionPostProcessDescriptor descriptor)

Definition at line 17 of file NeonDetectionPostProcessWorkload.cpp.

References DetectionPostProcessDescriptor::m_DetectionsPerClass, DetectionPostProcessDescriptor::m_MaxClassesPerDetection, DetectionPostProcessDescriptor::m_MaxDetections, DetectionPostProcessDescriptor::m_NmsIouThreshold, DetectionPostProcessDescriptor::m_NmsScoreThreshold, DetectionPostProcessDescriptor::m_NumClasses, and DetectionPostProcessDescriptor::m_UseRegularNms.

Referenced by NeonDetectionPostProcessValidate().

18 {
19  return arm_compute::DetectionPostProcessLayerInfo(descriptor.m_MaxDetections,
20  descriptor.m_MaxClassesPerDetection,
21  descriptor.m_NmsScoreThreshold,
22  descriptor.m_NmsIouThreshold,
23  descriptor.m_NumClasses,
24  { descriptor.m_ScaleX,
25  descriptor.m_ScaleY,
26  descriptor.m_ScaleW,
27  descriptor.m_ScaleH },
28  descriptor.m_UseRegularNms,
29  descriptor.m_DetectionsPerClass);
30 }

◆ MakeOptimizations()

Optimizer::Optimizations armnn::MakeOptimizations ( Args &&...  args)

Definition at line 43 of file Optimizer.hpp.

References Append().

Referenced by ApplyBackendOptimizations(), and Optimize().

44 {
45  Optimizer::Optimizations optimizations;
46 
47  Append(optimizations, std::forward<Args>(args)...);
48 
49  return optimizations;
50 }
void Append(Optimizer::Optimizations &optimizations, Front &&front, Others &&... others)
Definition: Optimizer.hpp:36

◆ MakeOptional()

Optional<T> armnn::MakeOptional ( Args &&...  args)

Utility template that constructs an object of type T in-place and wraps it inside an Optional<T> object.

Definition at line 305 of file Optional.hpp.

References CONSTRUCT_IN_PLACE.

306 {
307  return Optional<T>(CONSTRUCT_IN_PLACE, std::forward<Args>(args)...);
308 }
#define CONSTRUCT_IN_PLACE
Definition: Optional.hpp:41

◆ MakeTransformIterator()

constexpr TransformIterator<Function, Iterator> armnn::MakeTransformIterator ( Iterator  i,
Function  f 
)

Definition at line 81 of file TransformIterator.hpp.

82 {
83  return TransformIterator<Function, Iterator>(i, f);
84 }

◆ MirrorPad()

void MirrorPad ( const TensorInfo inputInfo,
const TensorInfo outputInfo,
const ITensorHandle inputHandle,
ITensorHandle outputHandle,
const PadQueueDescriptor data 
)

Definition at line 59 of file MirrorPad.cpp.

References TensorShape::GetNumDimensions(), TensorInfo::GetNumElements(), TensorInfo::GetShape(), PadDescriptor::m_PaddingMode, PadDescriptor::m_PadList, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, ITensorHandle::Map(), Reflect, Encoder< IType >::Set(), and Symmetric.

Referenced by RefPadWorkload::ExecuteAsync().

64 {
65  auto padList = data.m_Parameters.m_PadList;
66  PaddingMode paddingMode = data.m_Parameters.m_PaddingMode;
67 
68  TensorShape outputShape = outputInfo.GetShape();
69  TensorShape inputShape = inputInfo.GetShape();
70 
71  unsigned int numOutputElements = outputInfo.GetNumElements();
72  unsigned int numInputDimensions = inputShape.GetNumDimensions();
73  assert(numInputDimensions == outputShape.GetNumDimensions());
74 
75  // If padding mode is Reflect then both paddings must be no greater than inputShape(i) - 1.
76  // If padding mode is Symmetric then both paddings must be no greater than inputShape(i).
77  const unsigned int isReflect = static_cast<unsigned int>(paddingMode == PaddingMode::Reflect);
78  for(unsigned int i = 0; i < padList.size(); ++i)
79  {
80  if(padList.at(i).first > (inputShape[i] - isReflect) ||
81  padList.at(i).second > (inputShape[i] - isReflect))
82  {
83  throw armnn::InvalidArgumentException("Paddings must be less (Reflect) or "
84  "equal (Symmetric) to the dimension size.");
85  }
86  }
87 
88  auto inputData = MakeDecoder<float>(inputInfo, inputHandle->Map());
89  auto outData = MakeEncoder<float>(outputInfo, outputHandle->Map());
90 
91  Decoder<float>& input = *inputData;
92  Encoder<float>& output = *outData;
93 
94  for(unsigned int idx = 0; idx < numOutputElements; ++idx)
95  {
96  // Get the coordinates of the current index in vector form. E.g inx 1 = [0, 0, 0, 1 ]
97  const std::vector<unsigned int> coord = IndexToCoord(outputShape, idx);
98 
99  std::vector<unsigned int> dimensions;
100  std::vector<unsigned int> coords;
101 
102  for(unsigned int i = 0; i < numInputDimensions; ++i)
103  {
104  dimensions.emplace_back(i);
105  coords.emplace_back(coord[i]);
106  }
107 
108  auto isInPadding = [&](unsigned int i)
109  {
110  return (coords[i] < padList[i].first || coords[i] > inputShape[i] + padList[i].first - 1);
111  };
112 
113  auto getReflectIndex = [&](unsigned int i) -> unsigned int
114  {
115  if(isInPadding(i))
116  {
117  if(coords[i] < padList[i].first)
118  {
119  return padList[i].first - coords[i];
120  }
121  else
122  {
123  return 2 * inputShape[i] + padList[i].first - 2 - coords[i];
124  }
125  }
126  return coords[i] - padList[i].first;
127  };
128 
129  auto getSymmetricIndex = [&](unsigned int i) -> unsigned int
130  {
131  if(isInPadding(i))
132  {
133  if(coords[i] < padList[i].first)
134  {
135  return padList[i].first - coords[i] - 1;
136  }
137  else
138  {
139  return 2 * inputShape[i] + padList[i].first - 1 - coords[i];
140  }
141  }
142  return coords[i] - padList[i].first;
143  };
144 
145  // Location of the value in the input tensor to use in the output.
146  std::vector<unsigned int> coordOfInput;
147 
148  // any_of works as a loop here to check if any of the dimensions are in the padding.
149  // If dimensions is in the padding area, then create the coordinates of the location in the
150  // input tensor to use in the output.
151  // E.g.
152  // Input tensor = [ 1, 2, 3 ], Rank = 1.
153  // Output tensor = [ 2, 1, 2, 3, 1 ] if Reflect or [ 1, 1, 2, 3, 3 ] if Symmetric with a padding of (1, 1).
154  // So it will either return [ 1 ] or [ 0 ] which is used to set the first value in the output tensor and so on.
155  if(std::any_of(dimensions.begin(), dimensions.end(), isInPadding))
156  {
157  switch(paddingMode)
158  {
159  case PaddingMode::Reflect:
160  {
161  for(unsigned int i = 0; i < numInputDimensions; ++i)
162  {
163  coordOfInput.emplace_back(getReflectIndex(i));
164  }
165  break;
166  }
167  case PaddingMode::Symmetric:
168  {
169  for(unsigned int i = 0; i < numInputDimensions; ++i)
170  {
171  coordOfInput.emplace_back(getSymmetricIndex(i));
172  }
173  break;
174  }
175  default:
176  throw InvalidArgumentException("Padding mode not supported.");
177  break;
178  }
179  }
180  else
181  {
182  for(unsigned int i = 0; i < numInputDimensions; ++i)
183  {
184  coordOfInput.emplace_back(coord[i] - padList[i].first);
185  }
186  }
187 
188  // Set output value using the coordinate of the input value to use.
189  const unsigned int indexOfInput = CoordToIndex(inputShape, coordOfInput);
190 
191  input[indexOfInput];
192  auto inputValue = input.Get();
193 
194  output[idx];
195  output.Set(inputValue);
196  }
197 }
PaddingMode
The padding mode controls whether the padding should be filled with constant values (Constant)...
Definition: Types.hpp:186

◆ MockTensorHandleFactoryId()

constexpr const char* armnn::MockTensorHandleFactoryId ( )

Definition at line 14 of file MockTensorHandleFactory.hpp.

Referenced by MockTensorHandleFactory::GetIdStatic().

15 {
16  return "Arm/Mock/TensorHandleFactory";
17 }

◆ NeonAbsWorkloadValidate()

arm_compute::Status NeonAbsWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 17 of file NeonAbsWorkload.cpp.

Referenced by NeonLayerSupport::IsElementwiseUnarySupported().

18 {
19  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
20  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
21 
22  return arm_compute::NEAbsLayer::validate(&aclInput, &aclOutput);
23 }

◆ NeonActivationWorkloadValidate()

arm_compute::Status NeonActivationWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const ActivationDescriptor descriptor 
)

Definition at line 17 of file NeonActivationWorkload.cpp.

Referenced by NeonLayerSupport::IsActivationSupported().

20 {
21  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  const arm_compute::ActivationLayerInfo activationLayerInfo =
26 
27  return arm_compute::NEActivationLayer::validate(&aclInput,
28  &aclOutput,
29  activationLayerInfo);
30 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ NeonAdditionWorkloadValidate()

arm_compute::Status NeonAdditionWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ActivationDescriptor activationDescriptor 
)

Definition at line 20 of file NeonAdditionWorkload.cpp.

Referenced by NeonLayerSupport::IsAdditionSupported(), and NeonBackend::OptimizeSubgraphView().

24 {
25  const arm_compute::TensorInfo aclInput0 = armcomputetensorutils::BuildArmComputeTensorInfo(input0);
26  const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input1);
27  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
28 
29  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
30  activationDescriptor);
31 
32  return arm_compute::NEArithmeticAddition::validate(&aclInput0,
33  &aclInput1,
34  &aclOutput,
35  arm_compute::ConvertPolicy::SATURATE,
36  activationInfo);
37 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ NeonArgMinMaxWorkloadValidate()

arm_compute::Status NeonArgMinMaxWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const ArgMinMaxDescriptor descriptor 
)

Definition at line 31 of file NeonArgMinMaxWorkload.cpp.

Referenced by NeonLayerSupport::IsArgMinMaxSupported().

34 {
35  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
36  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
37 
38  auto numDims = input.GetNumDimensions();
39  auto unsignedAxis = armnnUtils::GetUnsignedAxis(numDims, descriptor.m_Axis);
40  int aclAxis = armnn::numeric_cast<int>(CalcAclAxis(numDims, unsignedAxis));
41 
42  if (descriptor.m_Function == ArgMinMaxFunction::Max)
43  {
44  return arm_compute::NEArgMinMaxLayer::validate(&aclInput, aclAxis, &aclOutput,
45  arm_compute::ReductionOperation::ARG_IDX_MAX);
46  }
47  else
48  {
49  return arm_compute::NEArgMinMaxLayer::validate(&aclInput, aclAxis, &aclOutput,
50  arm_compute::ReductionOperation::ARG_IDX_MIN);
51  }
52 }
unsigned int GetUnsignedAxis(const unsigned int inputDimension, const int axis)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ NeonBackendId()

constexpr const char* armnn::NeonBackendId ( )

Definition at line 10 of file NeonBackendId.hpp.

Referenced by NeonBackend::GetIdStatic().

10 { return "CpuAcc"; }

◆ NeonBatchMatMulValidate()

arm_compute::Status NeonBatchMatMulValidate ( const TensorInfo inputX,
const TensorInfo inputY,
const TensorInfo output,
const BatchMatMulDescriptor descriptor 
)

Definition at line 23 of file NeonBatchMatMulWorkload.cpp.

References BatchMatMulDescriptor::m_AdjointX, BatchMatMulDescriptor::m_AdjointY, BatchMatMulDescriptor::m_DataLayoutX, BatchMatMulDescriptor::m_DataLayoutY, and NCHW.

Referenced by NeonLayerSupport::IsBatchMatMulSupported().

27 {
28  if (descriptor.m_AdjointX || descriptor.m_AdjointY )
29  {
30  throw Exception("Support for adjoint not implemented.");
31  }
32  if (descriptor.m_DataLayoutX != armnn::DataLayout::NCHW || descriptor.m_DataLayoutY != armnn::DataLayout::NCHW )
33  {
34  throw Exception("Only supported the MatMul in the last 2 dimensions");
35  }
36 
37  const auto aclInputXInfo = armcomputetensorutils::BuildArmComputeTensorInfo(inputX, descriptor.m_DataLayoutX);
38  const auto aclInputYInfo = armcomputetensorutils::BuildArmComputeTensorInfo(inputY, descriptor.m_DataLayoutY);
39  const auto aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
40 
41  arm_compute::Status statusGEMM = arm_compute::Status(arm_compute::ErrorCode::OK);
42  arm_compute::Status statusPermuteX = arm_compute::Status(arm_compute::ErrorCode::OK);
43  arm_compute::Status statusPermuteY = arm_compute::Status(arm_compute::ErrorCode::OK);
44 
45  arm_compute::TensorInfo aclPermutedXInfo = arm_compute::TensorInfo();
46  arm_compute::TensorInfo aclPermutedYInfo = arm_compute::TensorInfo();
47 
48  if (descriptor.m_TransposeX == true)
49  {
50  auto permutationXVector = GeneratePermutationVectorOnLastTwoDimensions(inputX.GetNumDimensions());
51  const auto aclPermutationXVector = armcomputetensorutils::BuildArmComputePermutationVector(permutationXVector);
52  const TensorInfo permutedXInfo = armnnUtils::Permuted(inputX, permutationXVector);
53  aclPermutedXInfo = armcomputetensorutils::BuildArmComputeTensorInfo(permutedXInfo);
54 
55  statusPermuteX = arm_compute::NEPermute::validate(&aclInputXInfo,
56  &aclPermutedXInfo,
57  aclPermutationXVector);
58  }
59 
60  if (descriptor.m_TransposeY == true)
61  {
62  auto permutationYVector = GeneratePermutationVectorOnLastTwoDimensions(inputY.GetNumDimensions());
63  const auto aclPermutationYVector = armcomputetensorutils::BuildArmComputePermutationVector(permutationYVector);
64  const TensorInfo permutedYInfo = armnnUtils::Permuted(inputY, permutationYVector);
65  aclPermutedYInfo = armcomputetensorutils::BuildArmComputeTensorInfo(permutedYInfo);
66 
67  statusPermuteY = arm_compute::NEPermute::validate(&aclInputYInfo,
68  &aclPermutedYInfo,
69  aclPermutationYVector);
70  }
71 
72  const arm_compute::GEMMInfo& gemm_info = arm_compute::GEMMInfo(false, // is inputX reshaped
73  false, // is inputY reshaped
74  false); // is inputY reshaped only 1st run
75 
76  statusGEMM = arm_compute::NEGEMM::validate(descriptor.m_TransposeX ? &aclPermutedXInfo : &aclInputXInfo,
77  descriptor.m_TransposeY ? &aclPermutedYInfo : &aclInputYInfo,
78  nullptr,
79  &aclOutputInfo,
80  1.0,
81  0,
82  gemm_info);
83 
84  if (statusPermuteX.error_code() == arm_compute::ErrorCode::OK &&
85  statusPermuteY.error_code() == arm_compute::ErrorCode::OK &&
86  statusGEMM.error_code() == arm_compute::ErrorCode::OK)
87  {
88  return arm_compute::Status(arm_compute::ErrorCode::OK,
89  "All BatchMatMul layers validate status OK.");
90  }
91  else
92  {
93  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR,
94  "BatchMatMul layer validate status failed."
95  + statusGEMM.error_description()
96  + statusPermuteX.error_description()
97  + statusPermuteY.error_description());
98  }
99 
100 }
armnn::PermutationVector GeneratePermutationVectorOnLastTwoDimensions(unsigned int rank)
Generates a permutation vector of size rank that permutes the 2 most right dimensions.
Status
enumeration
Definition: Types.hpp:42
armnn::TensorShape Permuted(const armnn::TensorShape &srcShape, const armnn::PermutationVector &mappings)
Definition: Permute.cpp:98

◆ NeonBatchNormalizationValidate()

arm_compute::Status NeonBatchNormalizationValidate ( const TensorInfo input,
const TensorInfo output,
const TensorInfo mean,
const TensorInfo var,
const TensorInfo beta,
const TensorInfo gamma,
const BatchNormalizationDescriptor descriptor,
const ActivationDescriptor activationDescriptor 
)

Definition at line 24 of file NeonBatchNormalizationWorkload.cpp.

Referenced by NeonLayerSupport::IsBatchNormalizationSupported(), and NeonBackend::OptimizeSubgraphView().

32 {
33  const arm_compute::TensorInfo aclInputInfo =
34  armcomputetensorutils::BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
35  const arm_compute::TensorInfo aclOutputInfo =
36  armcomputetensorutils::BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
37  const arm_compute::TensorInfo aclMeanInfo =
38  armcomputetensorutils::BuildArmComputeTensorInfo(mean, descriptor.m_DataLayout);
39  const arm_compute::TensorInfo aclVarInfo =
40  armcomputetensorutils::BuildArmComputeTensorInfo(var, descriptor.m_DataLayout);
41  const arm_compute::TensorInfo aclBetaInfo =
42  armcomputetensorutils::BuildArmComputeTensorInfo(beta, descriptor.m_DataLayout);
43  const arm_compute::TensorInfo aclGammaInfo =
44  armcomputetensorutils::BuildArmComputeTensorInfo(gamma, descriptor.m_DataLayout);
45 
46  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
47  activationDescriptor);
48 
49  return arm_compute::NEBatchNormalizationLayer::validate(&aclInputInfo,
50  &aclOutputInfo,
51  &aclMeanInfo,
52  &aclVarInfo,
53  &aclBetaInfo,
54  &aclGammaInfo,
55  descriptor.m_Eps,
56  activationInfo);
57 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ NeonBatchToSpaceNdWorkloadValidate()

arm_compute::Status NeonBatchToSpaceNdWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const BatchToSpaceNdDescriptor descriptor 
)

Definition at line 20 of file NeonBatchToSpaceNdWorkload.cpp.

Referenced by NeonLayerSupport::IsBatchToSpaceNdSupported().

23 {
24  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
25  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
26 
27  // ArmNN blockShape is [H, W] Cl asks for W, H
28  int32_t blockHeight = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[0]);
29  int32_t blockWidth = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[1]);
30 
31  const arm_compute::Status aclStatus = arm_compute::NEBatchToSpaceLayer::validate(&aclInputInfo,
32  blockWidth,
33  blockHeight,
34  &aclOutputInfo);
35  return aclStatus;
36 }
Status
enumeration
Definition: Types.hpp:42
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ NeonCastValidate()

arm_compute::Status NeonCastValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 19 of file NeonCastWorkload.cpp.

Referenced by NeonLayerSupport::IsCastSupported().

20 {
21  arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  return arm_compute::NECast::validate(&aclInput, &aclOutput, g_AclConvertPolicy);
25 }

◆ NeonChannelShuffleValidate()

arm_compute::Status NeonChannelShuffleValidate ( const TensorInfo input,
const TensorInfo output,
const ChannelShuffleDescriptor descriptor 
)

Definition at line 17 of file NeonChannelShuffleWorkload.cpp.

Referenced by NeonLayerSupport::IsChannelShuffleSupported().

20 {
21  arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  // In Arm NN and in NNAPI, channel shuffle implementation is datalayout agnostic and it has axis as a parameter.
25  // The channel shuffle Implementation for Neon is dependent on datalayout and does not have axis as a parameter,
26  // it only supports channel shuffle for 4D tensors in dimension C (1 or 3).
27  arm_compute::DataLayout aclDataLayout;
28  if (input.GetNumDimensions() == 4)
29  {
30  switch (descriptor.m_Axis)
31  {
32  case 1:
33  aclDataLayout = ConvertDataLayout(armnn::DataLayout::NCHW);
34  break;
35  case 3:
36  aclDataLayout = ConvertDataLayout(armnn::DataLayout::NHWC);
37  break;
38  default:
39  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR, "Unsupported axis"};
40  }
41  aclInputInfo.set_data_layout(aclDataLayout);
42  aclOutputInfo.set_data_layout(aclDataLayout);
43  return arm_compute::NEChannelShuffleLayer::validate(&aclInputInfo, &aclOutputInfo, descriptor.m_NumGroups);
44  }
45  else
46  {
47  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR, "Unsupported number of dimensions"};
48  }
49 }
DataLayout
Definition: Types.hpp:62
Status
enumeration
Definition: Types.hpp:42

◆ NeonComparisonWorkloadValidate()

arm_compute::Status NeonComparisonWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ComparisonDescriptor descriptor 
)

Definition at line 16 of file NeonComparisonWorkload.cpp.

Referenced by NeonLayerSupport::IsComparisonSupported().

20 {
21  const arm_compute::TensorInfo aclInput0 = BuildArmComputeTensorInfo(input0);
22  const arm_compute::TensorInfo aclInput1 = BuildArmComputeTensorInfo(input1);
23  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output);
24 
25  const arm_compute::ComparisonOperation comparisonOperation = ConvertComparisonOperationToAcl(descriptor);
26 
27  const arm_compute::Status aclStatus = arm_compute::NEElementwiseComparison::validate(&aclInput0,
28  &aclInput1,
29  &aclOutput,
30  comparisonOperation);
31  return aclStatus;
32 }
ComparisonOperation
Definition: Types.hpp:108
Status
enumeration
Definition: Types.hpp:42
arm_compute::ComparisonOperation ConvertComparisonOperationToAcl(const ComparisonDescriptor &descriptor)

◆ NeonConcatWorkloadValidate()

arm_compute::Status NeonConcatWorkloadValidate ( const std::vector< const TensorInfo *> &  inputs,
const TensorInfo output,
const OriginsDescriptor descriptor 
)

Definition at line 27 of file NeonConcatWorkload.cpp.

Referenced by NeonLayerSupport::IsConcatSupported().

31 {
32  std::vector<arm_compute::TensorInfo> aclInputs;
33  for (const TensorInfo* input : inputs)
34  {
35  arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(*input, armnn::DataLayout::NCHW);
36  aclInputs.emplace_back(aclInputInfo);
37  }
38  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
39  std::vector<const arm_compute::ITensorInfo*> aclInputPtrs;
40  for (arm_compute::ITensorInfo& input : aclInputs)
41  {
42  aclInputPtrs.emplace_back(&input);
43  }
44 
45  size_t aclAxis = CalcAxis(descriptor);
46  return arm_compute::NEConcatenateLayer::validate(aclInputPtrs, &aclOutputInfo, aclAxis);
47 }

◆ NeonConstantWorkloadValidate()

arm_compute::Status NeonConstantWorkloadValidate ( const TensorInfo output)

Definition at line 20 of file NeonConstantWorkload.cpp.

Referenced by NeonLayerSupport::IsConstantSupported().

21 {
22  const arm_compute::TensorInfo neonOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
23 
24  std::array<arm_compute::DataType,9> supportedTypes = {
25  arm_compute::DataType::BFLOAT16,
26  arm_compute::DataType::F16,
27  arm_compute::DataType::F32,
28  arm_compute::DataType::QASYMM8,
29  arm_compute::DataType::QASYMM8_SIGNED,
30  arm_compute::DataType::QSYMM16,
31  arm_compute::DataType::QSYMM8,
32  arm_compute::DataType::QSYMM8_PER_CHANNEL,
33  arm_compute::DataType::S32
34  };
35  auto it = std::find(begin(supportedTypes), end(supportedTypes), neonOutputInfo.data_type());
36 
37  if (it != end(supportedTypes))
38  {
39  return arm_compute::Status{};
40  }
41  else
42  {
43  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR, "Unsupported DataType"};
44  }
45 }
Status
enumeration
Definition: Types.hpp:42

◆ NeonConvolution2dWorkloadValidate()

arm_compute::Status NeonConvolution2dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const Convolution2dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
bool  isFastMathEnabled,
const ActivationDescriptor activationDescriptor 
)

Definition at line 24 of file NeonConvolution2dWorkload.cpp.

Referenced by NeonLayerSupport::IsConvolution2dSupported(), and NeonBackend::OptimizeSubgraphView().

31 {
32  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
33  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
34  arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights, descriptor.m_DataLayout);
35  aclWeightsInfo.set_are_values_constant(weights.IsConstant());
36 
37  const arm_compute::Size2D aclDilationInfo = BuildArmComputeSize2D(descriptor.m_DilationX,
38  descriptor.m_DilationY);
39 
40  arm_compute::TensorInfo aclBiasesInfo;
41  arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr;
42 
43  if (descriptor.m_BiasEnabled)
44  {
45  ARMNN_ASSERT(biases.has_value());
46  // Same for bias as weights. We don't currently support non const.
47  if (!biases.value().IsConstant())
48  {
49  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR,
50  "ArmNN NeonConvolution2dWorkload does not support non constant bias."};
51  }
52  aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout);
53  aclBiasesInfo.set_are_values_constant(biases.value().IsConstant());
54  optionalAclBiasesInfo = &aclBiasesInfo;
55  }
56 
57  arm_compute::PadStrideInfo layerInfo = BuildArmComputePadStrideInfo(descriptor);
58 
59  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
60  activationDescriptor);
61 
62  return arm_compute::NEConvolutionLayer::validate(&aclInputInfo,
63  &aclWeightsInfo,
64  optionalAclBiasesInfo,
65  &aclOutputInfo,
66  layerInfo,
67  arm_compute::WeightsInfo(),
68  aclDilationInfo,
69  activationInfo,
70  isFastMathEnabled);
71 }
Status
enumeration
Definition: Types.hpp:42
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ NeonConvolution3dWorkloadValidate()

arm_compute::Status NeonConvolution3dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const Convolution3dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
bool  isFastMathEnabled,
const ActivationDescriptor activationDescriptor 
)

Definition at line 24 of file NeonConvolution3dWorkload.cpp.

Referenced by NeonLayerSupport::IsConvolution3dSupported().

31 {
32  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
33  const arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights, descriptor.m_DataLayout);
34  arm_compute::TensorInfo aclBiasesInfo;
35  arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr;
36  if (descriptor.m_BiasEnabled)
37  {
38  ARMNN_ASSERT(biases.has_value());
39 
40  aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout);
41  optionalAclBiasesInfo = &aclBiasesInfo;
42  }
43  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
44 
45  const arm_compute::Conv3dInfo aclConv3DInfo = ComputeConv3DInfo(descriptor,
46  isFastMathEnabled,
47  activationDescriptor);
48 
49  return arm_compute::NEConv3D::validate(&aclInputInfo,
50  &aclWeightsInfo,
51  optionalAclBiasesInfo,
52  &aclOutputInfo,
53  aclConv3DInfo);
54 }
arm_compute::Conv3dInfo ComputeConv3DInfo(const armnn::Convolution3dDescriptor descriptor, bool isFastMathEnabled, const ActivationDescriptor *activationDescriptor)
Utility function used to setup an arm_compute::Conv3dInfo object from convolution3d descriptor...
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ NeonDepthToSpaceWorkloadValidate()

arm_compute::Status NeonDepthToSpaceWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const DepthToSpaceDescriptor descriptor 
)

Definition at line 19 of file NeonDepthToSpaceWorkload.cpp.

References SpaceToDepthDescriptor::m_DataLayout.

Referenced by NeonLayerSupport::IsDepthToSpaceSupported().

22 {
23  DataLayout dataLayout = descriptor.m_DataLayout;
24  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input, dataLayout);
25  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output, dataLayout);
26 
27  int32_t blockSize = armnn::numeric_cast<int32_t>(descriptor.m_BlockSize);
28 
29  return arm_compute::NEDepthToSpaceLayer::validate(&aclInput, &aclOutput, blockSize);
30 }
DataLayout
Definition: Types.hpp:62
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ NeonDepthwiseConvolutionWorkloadValidate()

arm_compute::Status NeonDepthwiseConvolutionWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const DepthwiseConvolution2dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
const ActivationDescriptor activationDescriptor 
)

Definition at line 29 of file NeonDepthwiseConvolutionWorkload.cpp.

Referenced by NeonLayerSupport::IsDepthwiseConvolutionSupported(), NeonLayerSupport::IsDilatedDepthwiseConvolutionSupported(), and NeonBackend::OptimizeSubgraphView().

35 {
36  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
37  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
38 
39  // ArmNN format for weights for depthwise is [1, H, W, C] independently of the input/output layout
40  //
41  // ACL format for weights for depthwise is:
42  // - [1, H, W, C] for [N, H, W, C] input/output layout (matches with ArmNN)
43  // - [1, C, H, W] for [N, C, H, W] input/output layout
44  //
45  // Therefore ArmNN weights have to be permuted when input/output layout is [N, C, H, W] to pass them to ACL.
46  // The PermuteDepthwiseConv2dWeights backend optimization takes care of this, but it has not been performed yet,
47  // so we do the permute here for the TensorInfo weights.
48  unsigned int aclDepthMultiplier;
49  TensorInfo weightsPermuted;
50  std::tie(weightsPermuted, aclDepthMultiplier) = Convert1HWOTensorInfoToAcl(weights, input, descriptor.m_DataLayout);
51 
52  // Convert the weights into the compute library format
53  arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weightsPermuted, descriptor.m_DataLayout);
54  aclWeightsInfo.set_are_values_constant(weights.IsConstant());
55 
56  arm_compute::TensorInfo aclBiasesInfo;
57  arm_compute::TensorInfo* optionalAclBiasesInfo = nullptr;
58  if (descriptor.m_BiasEnabled)
59  {
60  ARMNN_ASSERT(biases.has_value());
61  // Same for bias as weights. We don't currently support non const.
62  if (!biases.value().IsConstant())
63  {
64  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR,
65  "ArmNN NeonDepthwiseConv2dWorkload does not support non constant bias."};
66  }
67  aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout);
68  aclBiasesInfo.set_are_values_constant(biases.value().IsConstant());
69  optionalAclBiasesInfo = &aclBiasesInfo;
70  }
71 
72  arm_compute::PadStrideInfo aclPadStrideInfo = BuildArmComputePadStrideInfo(descriptor);
73  const arm_compute::Size2D aclDilationInfo = BuildArmComputeSize2D(
74  descriptor.m_DilationX, descriptor.m_DilationY);
75 
76  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
77  activationDescriptor);
78 
79  return arm_compute::NEDepthwiseConvolutionLayer::validate(&aclInputInfo,
80  &aclWeightsInfo,
81  optionalAclBiasesInfo,
82  &aclOutputInfo,
83  aclPadStrideInfo,
84  aclDepthMultiplier,
85  activationInfo,
86  aclDilationInfo);
87 }
bool IsConstant() const
Definition: Tensor.cpp:509
bool m_BiasEnabled
Enable/disable bias.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
uint32_t m_DilationY
Dilation factor value for height dimension.
uint32_t m_DilationX
Dilation factor value for width dimension.
bool has_value() const noexcept
Definition: Optional.hpp:53
Status
enumeration
Definition: Types.hpp:42
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
std::tuple< TensorInfo, unsigned int > Convert1HWOTensorInfoToAcl(const TensorInfo &weightInfo, const TensorInfo &inputInfo, const DataLayout dataLayout)
Weights for depthwise have a datalayout of [1,H,W,O] = [1,H,W,I*M] This function coverts a TensorInfo...
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ NeonDequantizeWorkloadValidate()

arm_compute::Status NeonDequantizeWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 22 of file NeonDequantizeWorkload.cpp.

Referenced by NeonLayerSupport::IsDequantizeSupported().

24 {
25  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input);
26  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output);
27 
28  return arm_compute::NEDequantizationLayer::validate(&aclInput, &aclOutput);
29 }

◆ NeonDetected()

bool NeonDetected ( )

Definition at line 37 of file Utils.cpp.

38 {
39 #if !defined(ARMNN_BUILD_BARE_METAL) && (defined(__arm__) || defined(__aarch64__))
40  auto hwcaps= getauxval(AT_HWCAP);
41 #endif
42 
43 #if !defined(ARMNN_BUILD_BARE_METAL) && defined(__aarch64__)
44 
45  if (hwcaps & HWCAP_ASIMD)
46  {
47  // On an arm64 device with Neon.
48  return true;
49  }
50  else
51  {
52  // On an arm64 device without Neon.
53  return false;
54  }
55 
56 #endif
57 #if !defined(ARMNN_BUILD_BARE_METAL) && defined(__arm__)
58 
59  if (hwcaps & HWCAP_NEON)
60  {
61  // On an armhf device with Neon.
62  return true;
63  }
64  else
65  {
66  // On an armhf device without Neon.
67  return false;
68  }
69 
70 #endif
71 
72  // This method of Neon detection is only supported on Linux so in order to prevent a false negative
73  // we will return true in cases where detection did not run.
74  return true;
75 }

◆ NeonDetectionPostProcessValidate()

arm_compute::Status NeonDetectionPostProcessValidate ( const TensorInfo boxEncodings,
const TensorInfo scores,
const TensorInfo anchors,
const TensorInfo detectionBoxes,
const TensorInfo detectionClasses,
const TensorInfo detectionScores,
const TensorInfo numDetections,
const DetectionPostProcessDescriptor descriptor 
)

Definition at line 32 of file NeonDetectionPostProcessWorkload.cpp.

References info, and MakeInfo().

40 {
41  arm_compute::DetectionPostProcessLayerInfo info = MakeInfo(descriptor);
42 
43  const arm_compute::TensorInfo aclBoxEncodings =
44  armcomputetensorutils::BuildArmComputeTensorInfo(boxEncodings);
45 
46  const arm_compute::TensorInfo aclScores =
47  armcomputetensorutils::BuildArmComputeTensorInfo(scores);
48 
49  const arm_compute::TensorInfo aclAnchors =
50  armcomputetensorutils::BuildArmComputeTensorInfo(anchors);
51 
52  arm_compute::TensorInfo aclDetectionBoxes =
53  armcomputetensorutils::BuildArmComputeTensorInfo(detectionBoxes);
54 
55  arm_compute::TensorInfo aclDetectionClasses =
56  armcomputetensorutils::BuildArmComputeTensorInfo(detectionClasses);
57 
58  arm_compute::TensorInfo aclDetectionScores =
59  armcomputetensorutils::BuildArmComputeTensorInfo(detectionScores);
60 
61  arm_compute::TensorInfo aclNumDetections =
62  armcomputetensorutils::BuildArmComputeTensorInfo(numDetections);
63 
64  return arm_compute::NEDetectionPostProcessLayer::validate(
65  &aclBoxEncodings,
66  &aclScores,
67  &aclAnchors,
68  &aclDetectionBoxes,
69  &aclDetectionClasses,
70  &aclDetectionScores,
71  &aclNumDetections,
72  info);
73 }
arm_compute::DetectionPostProcessLayerInfo MakeInfo(const DetectionPostProcessDescriptor &descriptor)

◆ NeonDivisionWorkloadValidate()

arm_compute::Status NeonDivisionWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ActivationDescriptor activationDescriptor 
)

Definition at line 18 of file NeonDivisionWorkload.cpp.

Referenced by NeonLayerSupport::IsDivisionSupported(), and NeonBackend::OptimizeSubgraphView().

22 {
23  const arm_compute::TensorInfo aclInput0 = armcomputetensorutils::BuildArmComputeTensorInfo(input0);
24  const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input1);
25  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
26 
27  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
28  activationDescriptor);
29 
30  return arm_compute::NEElementwiseDivision::validate(&aclInput0,
31  &aclInput1,
32  &aclOutput,
33  activationInfo);
34 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ NeonExpWorkloadValidate()

arm_compute::Status NeonExpWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 17 of file NeonExpWorkload.cpp.

Referenced by NeonLayerSupport::IsElementwiseUnarySupported().

18 {
19  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
20  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
21 
22  return arm_compute::NEExpLayer::validate(&aclInput, &aclOutput);
23 }

◆ NeonFullyConnectedWorkloadValidate()

arm_compute::Status NeonFullyConnectedWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const TensorInfo weights,
const Optional< TensorInfo > &  biases,
const FullyConnectedDescriptor descriptor,
const ActivationDescriptor activationDescriptor 
)

Definition at line 24 of file NeonFullyConnectedWorkload.cpp.

Referenced by NeonLayerSupport::IsFullyConnectedSupported(), and NeonBackend::OptimizeSubgraphView().

30 {
31  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input);
32  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output);
33  arm_compute::TensorInfo aclWeights = BuildArmComputeTensorInfo(weights);
34  aclWeights.set_are_values_constant(weights.IsConstant());
35 
36  arm_compute::TensorInfo aclBiases;
37  arm_compute::TensorInfo* optionalAclBiases = nullptr;
38  if (descriptor.m_BiasEnabled)
39  {
40  ARMNN_ASSERT(biases.has_value());
41  // Same for bias as weights. We don't currently support non const.
42  if (!biases.value().IsConstant())
43  {
44  return arm_compute::Status{arm_compute::ErrorCode::RUNTIME_ERROR,
45  "Arm NN NeonFullyConnectedWorkload does not support non constant bias."};
46  }
47  aclBiases = BuildArmComputeTensorInfo(biases.value());
48  aclBiases.set_are_values_constant(biases.value().IsConstant());
49  optionalAclBiases = &aclBiases;
50  }
51 
52  const arm_compute::FullyConnectedLayerInfo fullyConnectedLayerInfo =
53  ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo(descriptor, activationDescriptor);
54  return arm_compute::NEFullyConnectedLayer::validate(&aclInput,
55  &aclWeights,
56  optionalAclBiases,
57  &aclOutput,
58  fullyConnectedLayerInfo);
59 }
arm_compute::FullyConnectedLayerInfo ConvertFullyConnectedDescriptorToAclFullyConnectedLayerInfo(const FullyConnectedDescriptor &fullyConnectedDesc, const ActivationDescriptor *activationDesc)
Status
enumeration
Definition: Types.hpp:42
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ NeonGatherNdWorkloadValidate()

arm_compute::Status NeonGatherNdWorkloadValidate ( const TensorInfo paramsInfo,
const TensorInfo indicesInfo,
const TensorInfo outputInfo 
)

Validate Mul

Validate ReduceSum

Validate Gather

Validate Reshape

Return OK if all the layers are valid

Definition at line 14 of file NeonGatherNdWorkload.cpp.

References CalculateGatherNdKeyIndices(), and TensorInfo::SetShape().

Referenced by NeonLayerSupport::IsGatherNdSupported().

17 {
18  // Calculate ND, K, W, C.
19  std::map<std::string, unsigned int> keyIndices = CalculateGatherNdKeyIndices(paramsInfo, indicesInfo);
20 
21  /// Validate Mul
22  // Indices with shape { W, ND }
23  armnn::TensorInfo indices_W_ND_Info = indicesInfo;
24  indices_W_ND_Info.SetShape({ keyIndices["W"], keyIndices["ND"] });
25  const arm_compute::TensorInfo aclIndicesInfo = BuildArmComputeTensorInfo(indices_W_ND_Info);
26 
27  // Flattened coefficients with shape { ND }
28  armnn::TensorInfo flattenedCoeff_Info = indicesInfo;
29  flattenedCoeff_Info.SetShape({ keyIndices["ND"] });
30  const arm_compute::TensorInfo aclFlattenedCoeffInfo = BuildArmComputeTensorInfo(flattenedCoeff_Info);
31 
32  // Output of Mul with shape { W, ND }
33  const arm_compute::TensorInfo aclOutputMulInfo = BuildArmComputeTensorInfo(indices_W_ND_Info);
34 
35  auto statusMul = arm_compute::NEPixelWiseMultiplication::validate(&aclIndicesInfo,
36  &aclFlattenedCoeffInfo,
37  &aclOutputMulInfo,
38  1.0f,
39  arm_compute::ConvertPolicy::WRAP,
40  arm_compute::RoundingPolicy::TO_ZERO,
41  arm_compute::ActivationLayerInfo());
42 
43  /// Validate ReduceSum
44  // Flattened indices with shape { W }
45  armnn::TensorInfo flattenedIndices_Info = indicesInfo;
46  flattenedIndices_Info.SetShape({ keyIndices["W"] });
47  const arm_compute::TensorInfo aclFlattenedIndicesInfo = BuildArmComputeTensorInfo(flattenedIndices_Info);
48 
49  const std::vector<unsigned int> armnnReduceAxes(1, 1);
50  arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(aclOutputMulInfo.num_dimensions(),
51  indices_W_ND_Info.GetNumDimensions(),
52  armnnReduceAxes);
53 
54  auto statusReduceSum = arm_compute::NEReductionOperation::validate(&aclOutputMulInfo,
55  &aclFlattenedIndicesInfo,
56  static_cast<unsigned int>(coords[0]),
57  arm_compute::ReductionOperation::SUM,
58  false);
59 
60  /// Validate Gather
61  // Params with shape { K, C }
62  armnn::TensorInfo params_K_C_Info = paramsInfo;
63  params_K_C_Info.SetShape({ keyIndices["K"], keyIndices["C"] });
64  const arm_compute::TensorInfo aclParamsInfo = BuildArmComputeTensorInfo(params_K_C_Info);
65 
66  // Output of gather with shape { W, C }
67  armnn::TensorInfo outputGather_Info = outputInfo;
68  outputGather_Info.SetShape({ keyIndices["W"], keyIndices["C"] });
69  const arm_compute::TensorInfo aclOutputGatherInfo = BuildArmComputeTensorInfo(outputGather_Info);
70 
71  auto aclAxis = ComputeAclAxis(0, params_K_C_Info);
72  auto statusGather =
73  arm_compute::NEGather::validate(&aclParamsInfo, &aclFlattenedIndicesInfo, &aclOutputGatherInfo, aclAxis);
74 
75  /// Validate Reshape
76  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(outputInfo);
77 
78  auto statusReshape = arm_compute::NEReshapeLayer::validate(&aclOutputGatherInfo, &aclOutputInfo);
79 
80  /// Return OK if all the layers are valid
81  auto okCode = arm_compute::ErrorCode::OK;
82  if (statusMul.error_code() == okCode &&
83  statusReduceSum.error_code() == okCode &&
84  statusGather.error_code() == okCode &&
85  statusReshape.error_code() == okCode)
86  {
87  return arm_compute::Status(arm_compute::ErrorCode::OK,
88  "All GatherND layers validate status OK.");
89  }
90  else
91  {
92  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR,
93  "GatherND layer validate status failed.");
94  }
95 }
int ComputeAclAxis(const int &armnnAxis, const armnn::TensorInfo &tensor)
Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank...
std::map< std::string, unsigned int > CalculateGatherNdKeyIndices(TensorInfo inputInfo0, TensorInfo inputInfo1)
Calculates the key index values needed for GatherNd: N, ND, K, W, C (N is always 1) ...
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates
void SetShape(const TensorShape &newShape)
Definition: Tensor.hpp:193
Status
enumeration
Definition: Types.hpp:42
unsigned int GetNumDimensions() const
Definition: Tensor.hpp:195

◆ NeonGatherWorkloadValidate()

arm_compute::Status NeonGatherWorkloadValidate ( const TensorInfo input,
const TensorInfo indices,
const TensorInfo output,
const GatherDescriptor descriptor 
)

Definition at line 13 of file NeonGatherWorkload.cpp.

Referenced by NeonLayerSupport::IsGatherSupported().

17 {
18  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input);
19  const arm_compute::TensorInfo aclIndices = BuildArmComputeTensorInfo(indices);
20  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output);
21 
22  int aclAxis = ComputeAclAxis(descriptor.m_Axis, input);
23 
24  return arm_compute::NEGather::validate(&aclInput, &aclIndices, &aclOutput, aclAxis);
25 }
int ComputeAclAxis(const int &armnnAxis, const armnn::TensorInfo &tensor)
Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank...

◆ NeonInstanceNormalizationWorkloadValidate()

arm_compute::Status NeonInstanceNormalizationWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const InstanceNormalizationDescriptor descriptor 
)

Definition at line 19 of file NeonInstanceNormalizationWorkload.cpp.

Referenced by NeonLayerSupport::IsInstanceNormalizationSupported().

22 {
23  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
24  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
25 
26  return arm_compute::NEInstanceNormalizationLayer::validate(&aclInputInfo,
27  &aclOutputInfo,
28  descriptor.m_Gamma,
29  descriptor.m_Beta,
30  descriptor.m_Eps);
31 }

◆ NeonL2NormalizationWorkloadValidate()

arm_compute::Status NeonL2NormalizationWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const L2NormalizationDescriptor descriptor 
)

Definition at line 19 of file NeonL2NormalizationFloatWorkload.cpp.

Referenced by NeonLayerSupport::IsL2NormalizationSupported().

22 {
23  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
24  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
25 
26  int axis = (descriptor.m_DataLayout == DataLayout::NCHW) ? 2 : 0;
27 
28  return arm_compute::NEL2NormalizeLayer::validate(&aclInput, &aclOutput, axis, descriptor.m_Eps);
29 }

◆ NeonLogicalAndWorkloadValidate()

arm_compute::Status NeonLogicalAndWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output 
)

Definition at line 18 of file NeonLogicalAndWorkload.cpp.

Referenced by NeonLayerSupport::IsLogicalBinarySupported().

21 {
22  const arm_compute::TensorInfo aclInputInfo0 = BuildArmComputeTensorInfo(input0);
23  const arm_compute::TensorInfo aclInputInfo1 = BuildArmComputeTensorInfo(input1);
24  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
25 
26  const arm_compute::Status aclStatus = arm_compute::NELogicalAnd::validate(&aclInputInfo0,
27  &aclInputInfo1,
28  &aclOutputInfo);
29  return aclStatus;
30 }
Status
enumeration
Definition: Types.hpp:42

◆ NeonLogicalNotWorkloadValidate()

arm_compute::Status NeonLogicalNotWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 19 of file NeonLogicalNotWorkload.cpp.

Referenced by NeonLayerSupport::IsElementwiseUnarySupported().

21 {
22  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
23  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
24 
25  const arm_compute::Status aclStatus = arm_compute::NELogicalNot::validate(&aclInputInfo,
26  &aclOutputInfo);
27  return aclStatus;
28 }
Status
enumeration
Definition: Types.hpp:42

◆ NeonLogicalOrWorkloadValidate()

arm_compute::Status NeonLogicalOrWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output 
)

Definition at line 18 of file NeonLogicalOrWorkload.cpp.

Referenced by NeonLayerSupport::IsLogicalBinarySupported().

21 {
22  const arm_compute::TensorInfo aclInputInfo0 = BuildArmComputeTensorInfo(input0);
23  const arm_compute::TensorInfo aclInputInfo1 = BuildArmComputeTensorInfo(input1);
24  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
25 
26  const arm_compute::Status aclStatus = arm_compute::NELogicalOr::validate(&aclInputInfo0,
27  &aclInputInfo1,
28  &aclOutputInfo);
29  return aclStatus;
30 }
Status
enumeration
Definition: Types.hpp:42

◆ NeonLogSoftmaxWorkloadValidate()

arm_compute::Status NeonLogSoftmaxWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const LogSoftmaxDescriptor descriptor 
)

Definition at line 19 of file NeonLogSoftmaxWorkload.cpp.

Referenced by NeonLayerSupport::IsLogSoftmaxSupported().

22 {
23  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
24  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
25 
26  int aclAxis = ComputeAclAxis(descriptor.m_Axis, input);
27  return arm_compute::NELogSoftmaxLayer::validate(&aclInputInfo,
28  &aclOutputInfo,
29  descriptor.m_Beta,
30  aclAxis);
31 }
int ComputeAclAxis(const int &armnnAxis, const armnn::TensorInfo &tensor)
Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank...

◆ NeonLogWorkloadValidate()

arm_compute::Status NeonLogWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 17 of file NeonLogWorkload.cpp.

Referenced by NeonLayerSupport::IsElementwiseUnarySupported().

18 {
19  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
20  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
21 
22  return arm_compute::NELogLayer::validate(&aclInput, &aclOutput);
23 }

◆ NeonLstmFloatWorkloadValidate()

arm_compute::Status NeonLstmFloatWorkloadValidate ( const TensorInfo input,
const TensorInfo outputStateIn,
const TensorInfo cellStateIn,
const TensorInfo scratchBuffer,
const TensorInfo outputStateOut,
const TensorInfo cellStateOut,
const TensorInfo output,
const LstmDescriptor descriptor,
const LstmInputParamsInfo paramsInfo 
)

Definition at line 253 of file NeonLstmFloatWorkload.cpp.

Referenced by NeonLayerSupport::IsLstmSupported().

262 {
263  arm_compute::LSTMParams<arm_compute::ITensorInfo> lstm_params_info;
264 
265  // The inputs and outputs
266  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
267  const arm_compute::TensorInfo aclOutputStateInInfo = BuildArmComputeTensorInfo(outputStateIn);
268  const arm_compute::TensorInfo aclCellStateInInfo = BuildArmComputeTensorInfo(cellStateIn);
269  const arm_compute::TensorInfo aclScratchBufferInfo = BuildArmComputeTensorInfo(scratchBuffer);
270  const arm_compute::TensorInfo aclOutputStateOutInfo = BuildArmComputeTensorInfo(outputStateOut);
271  const arm_compute::TensorInfo aclCellStateOutInfo = BuildArmComputeTensorInfo(cellStateOut);
272  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
273 
274  // Basic parameters
275  const arm_compute::TensorInfo aclInputToForgetWeightsInfo
276  = BuildArmComputeTensorInfo(paramsInfo.GetInputToForgetWeights());
277  const arm_compute::TensorInfo aclInputToCellWeightsInfo
278  = BuildArmComputeTensorInfo(paramsInfo.GetInputToCellWeights());
279  const arm_compute::TensorInfo aclInputToOutputWeightsInfo
280  = BuildArmComputeTensorInfo(paramsInfo.GetInputToOutputWeights());
281  const arm_compute::TensorInfo aclRecurrentToForgetWeightsInfo
282  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToForgetWeights());
283  const arm_compute::TensorInfo aclRecurrentToCellWeightsInfo
284  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToCellWeights());
285  const arm_compute::TensorInfo aclRecurrentToOutputWeightsInfo
286  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToOutputWeights());
287  const arm_compute::TensorInfo aclForgetGateBiasInfo
288  = BuildArmComputeTensorInfo(paramsInfo.GetForgetGateBias());
289  const arm_compute::TensorInfo aclCellBiasInfo
290  = BuildArmComputeTensorInfo(paramsInfo.GetCellBias());
291  const arm_compute::TensorInfo aclOutputGateBiasInfo
292  = BuildArmComputeTensorInfo(paramsInfo.GetOutputGateBias());
293 
294  arm_compute::TensorInfo aclInputToInputWeightsInfo;
295  arm_compute::TensorInfo aclRecurrentToInputWeightsInfo;
296  arm_compute::TensorInfo aclCellToInputWeightsInfo;
297  arm_compute::TensorInfo aclInputGateBiasInfo;
298  arm_compute::TensorInfo aclProjectionWeightsInfo;
299  arm_compute::TensorInfo aclProjectionBiasInfo;
300  arm_compute::TensorInfo aclCellToForgetWeightsInfo;
301  arm_compute::TensorInfo aclCellToOutputWeightsInfo;
302 
303  arm_compute::TensorInfo aclInputLayerNormWeightsInfo;
304  arm_compute::TensorInfo aclForgetLayerNormWeightsInfo;
305  arm_compute::TensorInfo aclCellLayerNormWeightsInfo;
306  arm_compute::TensorInfo aclOutputLayerNormWeightsInfo;
307 
308 
309  if (!descriptor.m_CifgEnabled)
310  {
311  if (descriptor.m_PeepholeEnabled)
312  {
313  aclCellToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToInputWeights());
314  }
315  aclInputToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputToInputWeights());
316  aclRecurrentToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToInputWeights());
317  aclInputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputGateBias());
318 
319  lstm_params_info.set_cifg_params(&aclInputToInputWeightsInfo, &aclRecurrentToInputWeightsInfo,
320  descriptor.m_PeepholeEnabled ? &aclCellToInputWeightsInfo : nullptr,
321  &aclInputGateBiasInfo);
322  }
323 
324  if (descriptor.m_ProjectionEnabled)
325  {
326  if (paramsInfo.m_ProjectionBias != nullptr)
327  {
328  aclProjectionBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionBias());
329  }
330  aclProjectionWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionWeights());
331 
332  lstm_params_info.set_projection_params(&aclProjectionWeightsInfo,
333  paramsInfo.m_ProjectionBias != nullptr ?
334  &aclProjectionBiasInfo : nullptr);
335  }
336 
337  if (descriptor.m_PeepholeEnabled)
338  {
339  aclCellToForgetWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToForgetWeights());
340  aclCellToOutputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToOutputWeights());
341 
342  lstm_params_info.set_peephole_params(&aclCellToForgetWeightsInfo, &aclCellToOutputWeightsInfo);
343  }
344 
345  if (descriptor.m_LayerNormEnabled)
346  {
347  if (!descriptor.m_CifgEnabled)
348  {
349  aclInputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputLayerNormWeights());
350  }
351  aclForgetLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetForgetLayerNormWeights());
352  aclCellLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellLayerNormWeights());
353  aclOutputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetOutputLayerNormWeights());
354 
355  lstm_params_info.set_layer_normalization_params(descriptor.m_CifgEnabled ?
356  nullptr : &aclInputLayerNormWeightsInfo,
357  &aclForgetLayerNormWeightsInfo,
358  &aclCellLayerNormWeightsInfo,
359  &aclOutputLayerNormWeightsInfo);
360  }
361 
362  float cell_threshold = descriptor.m_ClippingThresCell;
363  float projection_threshold = descriptor.m_ClippingThresProj;
364 
365  // for preparing the object for the class ActivationLayerInfo, we need to consider 5 situations
366  arm_compute::ActivationLayerInfo activationLayerInfo =
367  ConvertLstmActivationFuncToAclLayerInfo(descriptor.m_ActivationFunc);
368 
369  return arm_compute::NELSTMLayer::validate(&aclInputInfo,
370  &aclInputToForgetWeightsInfo,
371  &aclInputToCellWeightsInfo,
372  &aclInputToOutputWeightsInfo,
373  &aclRecurrentToForgetWeightsInfo,
374  &aclRecurrentToCellWeightsInfo,
375  &aclRecurrentToOutputWeightsInfo,
376  &aclForgetGateBiasInfo,
377  &aclCellBiasInfo,
378  &aclOutputGateBiasInfo,
379  &aclOutputStateInInfo,
380  &aclCellStateInInfo,
381  &aclScratchBufferInfo,
382  &aclOutputStateOutInfo,
383  &aclCellStateOutInfo,
384  &aclOutputInfo,
385  lstm_params_info,
386  activationLayerInfo,
387  cell_threshold,
388  projection_threshold);
389 }
arm_compute::ActivationLayerInfo ConvertLstmActivationFuncToAclLayerInfo(uint32_t activationFunction)

◆ NeonMaximumWorkloadValidate()

arm_compute::Status NeonMaximumWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output 
)

Definition at line 14 of file NeonMaximumWorkload.cpp.

Referenced by NeonLayerSupport::IsMaximumSupported().

17 {
18  const arm_compute::TensorInfo aclInput0 = armcomputetensorutils::BuildArmComputeTensorInfo(input0);
19  const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input1);
20  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
21 
22  return arm_compute::NEElementwiseMax::validate(&aclInput0,
23  &aclInput1,
24  &aclOutput);
25 }

◆ NeonMeanWorkloadValidate()

arm_compute::Status NeonMeanWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const MeanDescriptor descriptor 
)

Definition at line 18 of file NeonMeanWorkload.cpp.

Referenced by NeonLayerSupport::IsMeanSupported().

21 {
22  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
23  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
24 
25  arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(aclInputInfo.num_dimensions(),
26  input.GetNumDimensions(),
27  descriptor.m_Axis);
28 
29  return arm_compute::NEReduceMean::validate(&aclInputInfo, coords, descriptor.m_KeepDims, &aclOutputInfo);
30 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates

◆ NeonMinimumWorkloadValidate()

arm_compute::Status NeonMinimumWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output 
)

Validate function for validating the inputs and output.

Parameters
[in]input0The input0 value to be validated.
[in]input1The input1 value to be validated.
[in]outputThe output value to be validated.

Definition at line 15 of file NeonMinimumWorkload.cpp.

Referenced by NeonLayerSupport::IsMinimumSupported().

18 {
19  const arm_compute::TensorInfo aclInput0 = armcomputetensorutils::BuildArmComputeTensorInfo(input0);
20  const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input1);
21  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  return arm_compute::NEElementwiseMin::validate(&aclInput0,
24  &aclInput1,
25  &aclOutput);
26 }

◆ NeonMultiplicationWorkloadValidate()

arm_compute::Status NeonMultiplicationWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ActivationDescriptor activationDescriptor 
)

Definition at line 19 of file NeonMultiplicationWorkload.cpp.

Referenced by NeonLayerSupport::IsMultiplicationSupported(), and NeonBackend::OptimizeSubgraphView().

23 {
24  const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input0);
25  const arm_compute::TensorInfo aclInput2 = armcomputetensorutils::BuildArmComputeTensorInfo(input1);
26  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
27 
28  auto convertPolicy = (IsQuantizedType(input0.GetDataType()) || IsQuantizedType(input1.GetDataType())) ?
29  arm_compute::ConvertPolicy::SATURATE :
30  arm_compute::ConvertPolicy::WRAP;
31 
32  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
33  activationDescriptor);
34 
35  // At the time of writing, configure() will fail if a rounding policy other than TO_ZERO is supplied to it,
36  // when providing a scale of 1.0 for F32 tensors, even though the provided rounding policy appears to be
37  // ignored for F32 tensors.
38  return arm_compute::NEPixelWiseMultiplication::validate(&aclInput1,
39  &aclInput2,
40  &aclOutput,
41  1.0f,
42  convertPolicy,
43  arm_compute::RoundingPolicy::TO_ZERO,
44  activationInfo);
45 }
constexpr bool IsQuantizedType()
Definition: TypesUtils.hpp:280
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ NeonNegWorkloadValidate()

arm_compute::Status NeonNegWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 17 of file NeonNegWorkload.cpp.

Referenced by NeonLayerSupport::IsElementwiseUnarySupported().

18 {
19  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
20  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
21 
22  return arm_compute::NENegLayer::validate(&aclInput, &aclOutput);
23 }

◆ NeonNormalizationWorkloadValidate()

arm_compute::Status NeonNormalizationWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const NormalizationDescriptor descriptor 
)

Definition at line 49 of file NeonNormalizationFloatWorkload.cpp.

Referenced by NeonLayerSupport::IsNormalizationSupported().

52 {
53  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
54  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
55 
56  arm_compute::NormalizationLayerInfo normalizationInfo = BuildArmComputeNormalizationLayerInfo(descriptor);
57 
58  return arm_compute::NENormalizationLayer::validate(&aclInput, &aclOutput, normalizationInfo);
59 }

◆ NeonPadWorkloadValidate()

arm_compute::Status NeonPadWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const PadDescriptor descriptor 
)

Definition at line 59 of file NeonPadWorkload.cpp.

Referenced by NeonLayerSupport::IsPadSupported().

62 {
63  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
64  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
65 
66  std::vector<std::pair<unsigned int, unsigned int>> reversed_PadList(descriptor.m_PadList.size());
67 
68  std::reverse_copy(std::begin(descriptor.m_PadList),
69  std::end(descriptor.m_PadList),
70  std::begin(reversed_PadList));
71 
72  arm_compute::PaddingList padList = static_cast<arm_compute::PaddingList>(reversed_PadList);
73 
74  // PixelValue is currently unused when validating, but it's required to pass in PaddingMode.
75  arm_compute::PixelValue pixelValue = GetPixelValue(&aclInputInfo, descriptor.m_PadValue);
76  return arm_compute::NEPadLayer::validate(&aclInputInfo,
77  &aclOutputInfo,
78  padList,
79  pixelValue,
80  ConvertPaddingModeToAcl(descriptor.m_PaddingMode));
81 }
arm_compute::PaddingMode ConvertPaddingModeToAcl(const PaddingMode &paddingMode)

◆ NeonPermuteWorkloadValidate()

arm_compute::Status NeonPermuteWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const PermuteDescriptor descriptor 
)

Definition at line 15 of file NeonPermuteWorkload.cpp.

Referenced by NeonLayerSupport::IsPermuteSupported().

18 {
19  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
20  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
21  const armnn::PermutationVector& mappings = descriptor.m_DimMappings;
22 
23  return arm_compute::NEPermute::validate(&aclInputInfo, &aclOutputInfo,
24  armcomputetensorutils::BuildArmComputePermutationVector(mappings));
25 }

◆ NeonPooling2dWorkloadValidate()

arm_compute::Status NeonPooling2dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const Pooling2dDescriptor descriptor 
)

Definition at line 22 of file NeonPooling2dWorkload.cpp.

Referenced by NeonLayerSupport::IsPooling2dSupported().

25 {
26  const arm_compute::TensorInfo aclInputInfo =
27  BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
28  const arm_compute::TensorInfo aclOutputInfo =
29  BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
30 
31  arm_compute::PoolingLayerInfo layerInfo = BuildArmComputePoolingLayerInfo(descriptor);
32 
33  return arm_compute::NEPoolingLayer::validate(&aclInputInfo, &aclOutputInfo, layerInfo);
34 }

◆ NeonPooling3dWorkloadValidate()

arm_compute::Status NeonPooling3dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const Pooling3dDescriptor descriptor 
)

Definition at line 15 of file NeonPooling3dWorkload.cpp.

Referenced by NeonLayerSupport::IsPooling3dSupported().

18  {
19  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
20  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
21  arm_compute::Pooling3dLayerInfo layerInfo = BuildArmComputePooling3dLayerInfo(descriptor);
22  return arm_compute::NEPooling3dLayer::validate(&aclInputInfo, &aclOutputInfo, layerInfo);
23  }

◆ NeonPreluWorkloadValidate()

arm_compute::Status NeonPreluWorkloadValidate ( const TensorInfo input,
const TensorInfo alpha,
const TensorInfo output 
)

Definition at line 17 of file NeonPreluWorkload.cpp.

Referenced by NeonLayerSupport::IsPreluSupported().

20 {
21  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
22  const arm_compute::TensorInfo aclAlpha = armcomputetensorutils::BuildArmComputeTensorInfo(alpha);
23  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
24 
25  return arm_compute::NEPReluLayer::validate(&aclInput,
26  &aclAlpha,
27  &aclOutput);
28 }

◆ NeonQLstmWorkloadValidate()

arm_compute::Status NeonQLstmWorkloadValidate ( const TensorInfo input,
const TensorInfo cellStateIn,
const TensorInfo outputStateIn,
const TensorInfo cellStateOut,
const TensorInfo outputStateOut,
const TensorInfo output,
const QLstmDescriptor descriptor,
const LstmInputParamsInfo paramsInfo 
)

Definition at line 243 of file NeonQLstmWorkload.cpp.

Referenced by NeonLayerSupport::IsQLstmSupported().

251 {
252  arm_compute::LSTMParams<arm_compute::ITensorInfo> aclParamsInfo;
253 
254  // Input/Output tensor info
255  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
256  const arm_compute::TensorInfo aclOutputStateInInfo = BuildArmComputeTensorInfo(outputStateIn);
257  const arm_compute::TensorInfo aclCellStateInInfo = BuildArmComputeTensorInfo(cellStateIn);
258 
259  const arm_compute::TensorInfo aclOutputStateOutInfo = BuildArmComputeTensorInfo(outputStateOut);
260  const arm_compute::TensorInfo aclCellStateOutInfo = BuildArmComputeTensorInfo(cellStateOut);
261  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
262 
263  // Mandatory tensor info
264  const arm_compute::TensorInfo aclInputToForgetWeightsInfo
265  = BuildArmComputeTensorInfo(paramsInfo.GetInputToForgetWeights());
266  const arm_compute::TensorInfo aclInputToCellWeightsInfo
267  = BuildArmComputeTensorInfo(paramsInfo.GetInputToCellWeights());
268  const arm_compute::TensorInfo aclInputToOutputWeightsInfo
269  = BuildArmComputeTensorInfo(paramsInfo.GetInputToOutputWeights());
270  const arm_compute::TensorInfo aclRecurrentToForgetWeightsInfo
271  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToForgetWeights());
272  const arm_compute::TensorInfo aclRecurrentToCellWeightsInfo
273  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToCellWeights());
274  const arm_compute::TensorInfo aclRecurrentToOutputWeightsInfo
275  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToOutputWeights());
276  const arm_compute::TensorInfo aclForgetGateBiasInfo
277  = BuildArmComputeTensorInfo(paramsInfo.GetForgetGateBias());
278  const arm_compute::TensorInfo aclCellBiasInfo
279  = BuildArmComputeTensorInfo(paramsInfo.GetCellBias());
280  const arm_compute::TensorInfo aclOutputGateBiasInfo
281  = BuildArmComputeTensorInfo(paramsInfo.GetOutputGateBias());
282 
283  // Optional tensor info
284  arm_compute::TensorInfo aclInputToInputWeightsInfo;
285  arm_compute::TensorInfo aclRecurrentToInputWeightsInfo;
286 
287  arm_compute::TensorInfo aclCellToInputWeightsInfo;
288  arm_compute::TensorInfo aclCellToForgetWeightsInfo;
289  arm_compute::TensorInfo aclCellToOutputWeightsInfo;
290 
291  arm_compute::TensorInfo aclInputGateBiasInfo;
292 
293  arm_compute::TensorInfo aclProjectionWeightsInfo;
294  arm_compute::TensorInfo aclProjectionBiasInfo;
295 
296  arm_compute::TensorInfo aclInputLayerNormWeightsInfo;
297  arm_compute::TensorInfo aclForgetLayerNormWeightsInfo;
298  arm_compute::TensorInfo aclCellLayerNormWeightsInfo;
299  arm_compute::TensorInfo aclOutputLayerNormWeightsInfo;
300 
301  // Create tensor info for optional params if they are enabled
302  if (descriptor.m_PeepholeEnabled)
303  {
304  if (!descriptor.m_CifgEnabled)
305  {
306  aclCellToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToInputWeights());
307  }
308 
309  aclCellToForgetWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToForgetWeights());
310  aclCellToOutputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToOutputWeights());
311 
312  // Set peephole params info
313  aclParamsInfo.set_peephole_params(&aclCellToForgetWeightsInfo,
314  &aclCellToOutputWeightsInfo);
315  }
316 
317  if (descriptor.m_ProjectionEnabled)
318  {
319  aclProjectionWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionWeights());
320 
321  if (paramsInfo.m_ProjectionBias != nullptr)
322  {
323  aclProjectionBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionBias());
324  }
325 
326  // Set projection params info
327  aclParamsInfo.set_projection_params(
328  &aclProjectionWeightsInfo,
329  paramsInfo.m_ProjectionBias != nullptr ? &aclProjectionBiasInfo : nullptr);
330  }
331 
332  if (descriptor.m_LayerNormEnabled)
333  {
334  if (!descriptor.m_CifgEnabled)
335  {
336  aclInputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputLayerNormWeights());
337  }
338 
339  aclForgetLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetForgetLayerNormWeights());
340  aclCellLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellLayerNormWeights());
341  aclOutputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetOutputLayerNormWeights());
342 
343  // Set layer norm params info
344  aclParamsInfo.set_layer_normalization_params(
345  paramsInfo.m_InputLayerNormWeights != nullptr ? &aclInputLayerNormWeightsInfo : nullptr,
346  &aclForgetLayerNormWeightsInfo,
347  &aclCellLayerNormWeightsInfo,
348  &aclOutputLayerNormWeightsInfo);
349  }
350 
351  if (!descriptor.m_CifgEnabled)
352  {
353  aclInputToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputToInputWeights());
354  aclRecurrentToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToInputWeights());
355  aclInputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputGateBias());
356 
357  // Set CIFG params info
358  aclParamsInfo.set_cifg_params(
359  &aclInputToInputWeightsInfo,
360  &aclRecurrentToInputWeightsInfo,
361  paramsInfo.m_CellToInputWeights != nullptr ? &aclCellToInputWeightsInfo : nullptr,
362  &aclInputGateBiasInfo);
363  }
364 
365  // Set scalar descriptor params
366  aclParamsInfo.set_cell_clip_params(descriptor.m_CellClip);
367  aclParamsInfo.set_projection_clip_params(descriptor.m_ProjectionClip);
368  aclParamsInfo.set_hidden_state_params(descriptor.m_HiddenStateZeroPoint, descriptor.m_HiddenStateScale);
369  aclParamsInfo.set_matmul_scale_params(descriptor.m_InputIntermediateScale,
370  descriptor.m_ForgetIntermediateScale,
371  descriptor.m_CellIntermediateScale,
372  descriptor.m_OutputIntermediateScale);
373 
374  // QLSTM NEON validate
375  return arm_compute::NEQLSTMLayer::validate(&aclInputInfo,
376  &aclInputToForgetWeightsInfo,
377  &aclInputToCellWeightsInfo,
378  &aclInputToOutputWeightsInfo,
379  &aclRecurrentToForgetWeightsInfo,
380  &aclRecurrentToCellWeightsInfo,
381  &aclRecurrentToOutputWeightsInfo,
382  &aclForgetGateBiasInfo,
383  &aclCellBiasInfo,
384  &aclOutputGateBiasInfo,
385  &aclCellStateInInfo,
386  &aclOutputStateInInfo,
387  &aclCellStateOutInfo,
388  &aclOutputStateOutInfo,
389  &aclOutputInfo,
390  aclParamsInfo);
391 }

◆ NeonQuantizedLstmWorkloadValidate()

arm_compute::Status NeonQuantizedLstmWorkloadValidate ( const TensorInfo input,
const TensorInfo cellStateIn,
const TensorInfo outputStateIn,
const TensorInfo cellStateOut,
const TensorInfo outputStateOut,
const QuantizedLstmInputParamsInfo paramsInfo 
)

Definition at line 131 of file NeonQuantizedLstmWorkload.cpp.

Referenced by NeonLayerSupport::IsQuantizedLstmSupported().

137 {
138  // The inputs and outputs
139  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
140  const arm_compute::TensorInfo aclCellStateInInfo = BuildArmComputeTensorInfo(cellStateIn);
141  const arm_compute::TensorInfo aclOutputStateInInfo = BuildArmComputeTensorInfo(outputStateIn);
142  const arm_compute::TensorInfo aclCellStateOutInfo = BuildArmComputeTensorInfo(cellStateOut);
143  const arm_compute::TensorInfo aclOutputStateOutInfo = BuildArmComputeTensorInfo(outputStateOut);
144 
145  // Basic parameters
146  const arm_compute::TensorInfo aclInputToInputWeightsInfo
147  = BuildArmComputeTensorInfo(paramsInfo.GetInputToInputWeights());
148  const arm_compute::TensorInfo aclInputToForgetWeightsInfo
149  = BuildArmComputeTensorInfo(paramsInfo.GetInputToForgetWeights());
150  const arm_compute::TensorInfo aclInputToCellWeightsInfo
151  = BuildArmComputeTensorInfo(paramsInfo.GetInputToCellWeights());
152  const arm_compute::TensorInfo aclInputToOutputWeightsInfo
153  = BuildArmComputeTensorInfo(paramsInfo.GetInputToOutputWeights());
154 
155  const arm_compute::TensorInfo aclRecurrentToInputWeightsInfo
156  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToInputWeights());
157  const arm_compute::TensorInfo aclRecurrentToForgetWeightsInfo
158  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToForgetWeights());
159  const arm_compute::TensorInfo aclRecurrentToCellWeightsInfo
160  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToCellWeights());
161  const arm_compute::TensorInfo aclRecurrentToOutputWeightsInfo
162  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToOutputWeights());
163 
164  const arm_compute::TensorInfo aclInputGateBiasInfo
165  = BuildArmComputeTensorInfo(paramsInfo.GetInputGateBias());
166  const arm_compute::TensorInfo aclForgetGateBiasInfo
167  = BuildArmComputeTensorInfo(paramsInfo.GetForgetGateBias());
168  const arm_compute::TensorInfo aclCellBiasInfo
169  = BuildArmComputeTensorInfo(paramsInfo.GetCellBias());
170  const arm_compute::TensorInfo aclOutputGateBiasInfo
171  = BuildArmComputeTensorInfo(paramsInfo.GetOutputGateBias());
172 
173  return arm_compute::NELSTMLayerQuantized::validate(&aclInputInfo,
174  &aclInputToInputWeightsInfo,
175  &aclInputToForgetWeightsInfo,
176  &aclInputToCellWeightsInfo,
177  &aclInputToOutputWeightsInfo,
178  &aclRecurrentToInputWeightsInfo,
179  &aclRecurrentToForgetWeightsInfo,
180  &aclRecurrentToCellWeightsInfo,
181  &aclRecurrentToOutputWeightsInfo,
182  &aclInputGateBiasInfo,
183  &aclForgetGateBiasInfo,
184  &aclCellBiasInfo,
185  &aclOutputGateBiasInfo,
186  &aclCellStateInInfo,
187  &aclOutputStateInInfo,
188  &aclCellStateOutInfo,
189  &aclOutputStateOutInfo);
190 }

◆ NeonQuantizeWorkloadValidate()

arm_compute::Status NeonQuantizeWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 18 of file NeonQuantizeWorkload.cpp.

Referenced by NeonLayerSupport::IsQuantizeSupported().

19 {
20  const arm_compute::TensorInfo neonInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo neonOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  return arm_compute::NEQuantizationLayer::validate(&neonInputInfo, &neonOutputInfo);
24 }

◆ NeonReduceWorkloadValidate()

arm_compute::Status NeonReduceWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const ReduceDescriptor descriptor 
)

Definition at line 19 of file NeonReduceWorkload.cpp.

References ReduceDescriptor::m_vAxis.

Referenced by NeonLayerSupport::IsReduceSupported().

22 {
23  if ( descriptor.m_vAxis.size()==1 || descriptor.m_vAxis.empty())
24  {
25  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
26  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
27 
28  arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(aclInputInfo.num_dimensions(),
29  input.GetNumDimensions(),
30  descriptor.m_vAxis);
31 
32  return arm_compute::NEReductionOperation::validate(&aclInputInfo,
33  &aclOutputInfo,
34  static_cast<unsigned int>(coords[0]),
36  descriptor.m_KeepDims);
37  }
38  else
39  {
40  // Validate layer if there are multiple axes.
41  arm_compute::Status status;
43  return status;
44  }
45 }
#define IS_MULTI_AXES_REDUCE_SUPPORTED(func, input, desc, status)
Macro function check if layer with multiple axes is supported on each backend.
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates
arm_compute::Status NeonReduceWorkloadValidate(const TensorInfo &input, const TensorInfo &output, const ReduceDescriptor &descriptor)
arm_compute::ReductionOperation ConvertReductionOperationToAcl(const ReduceDescriptor &descriptor)
Status
enumeration
Definition: Types.hpp:42

◆ NeonReshapeWorkloadValidate()

arm_compute::Status NeonReshapeWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 17 of file NeonReshapeWorkload.cpp.

Referenced by NeonLayerSupport::IsReshapeSupported().

19 {
20  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  return arm_compute::NEReshapeLayer::validate(&aclInputInfo, &aclOutputInfo);
24 }

◆ NeonResizeWorkloadValidate()

arm_compute::Status NeonResizeWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const ResizeDescriptor descriptor 
)

Definition at line 22 of file NeonResizeWorkload.cpp.

Referenced by NeonLayerSupport::IsResizeSupported().

25 {
26  arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
27  arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
28 
29  arm_compute::DataLayout aclDataLayout = ConvertDataLayout(descriptor.m_DataLayout);
30  aclInputInfo.set_data_layout(aclDataLayout);
31  aclOutputInfo.set_data_layout(aclDataLayout);
32 
33  arm_compute::InterpolationPolicy aclInterpolationPolicy =
35 
36  arm_compute::SamplingPolicy samplingPolicy = descriptor.m_HalfPixelCenters ? arm_compute::SamplingPolicy::CENTER :
37  arm_compute::SamplingPolicy::TOP_LEFT;
38 
39  bool usePadding = false;
40 
41  return arm_compute::NEScale::validate(&aclInputInfo,
42  &aclOutputInfo,
43  arm_compute::ScaleKernelInfo(aclInterpolationPolicy,
44  arm_compute::BorderMode::REPLICATE,
45  arm_compute::PixelValue(0.f),
46  samplingPolicy,
47  usePadding,
48  descriptor.m_AlignCorners));
49 
50 }
arm_compute::InterpolationPolicy ConvertResizeMethodToAclInterpolationPolicy(ResizeMethod resizeMethod)
DataLayout
Definition: Types.hpp:62

◆ NeonRsqrtWorkloadValidate()

arm_compute::Status NeonRsqrtWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 18 of file NeonRsqrtWorkload.cpp.

Referenced by NeonLayerSupport::IsElementwiseUnarySupported().

19 {
20  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  return arm_compute::NERsqrtLayer::validate(&aclInput, &aclOutput);
24 }

◆ NeonSinWorkloadValidate()

arm_compute::Status NeonSinWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 17 of file NeonSinWorkload.cpp.

Referenced by NeonLayerSupport::IsElementwiseUnarySupported().

18 {
19  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
20  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
21 
22  return arm_compute::NESinLayer::validate(&aclInput, &aclOutput);
23 }

◆ NeonSliceWorkloadValidate()

arm_compute::Status NeonSliceWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const SliceDescriptor descriptor 
)

Definition at line 21 of file NeonSliceWorkload.cpp.

Referenced by NeonLayerSupport::IsSliceSupported().

24 {
25  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
26  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
27 
30 
31  std::tie(starts, ends) = SetNeonSliceData(descriptor.m_Begin, descriptor.m_Size);
32 
33  return arm_compute::NESlice::validate(&aclInputInfo, &aclOutputInfo, starts, ends);
34 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates
auto SetNeonSliceData(const std::vector< unsigned int > &m_begin, const std::vector< unsigned int > &m_size)

◆ NeonSoftmaxWorkloadValidate()

arm_compute::Status NeonSoftmaxWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const SoftmaxDescriptor descriptor 
)

Definition at line 19 of file NeonSoftmaxWorkload.cpp.

Referenced by NeonLayerSupport::IsSoftmaxSupported().

22 {
23  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
24  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
25 
26  int aclAxis = ComputeAclAxis(descriptor.m_Axis, input);
27  return arm_compute::NESoftmaxLayer::validate(&aclInputInfo,
28  &aclOutputInfo,
29  descriptor.m_Beta,
30  aclAxis);
31 }
int ComputeAclAxis(const int &armnnAxis, const armnn::TensorInfo &tensor)
Function to convert ArmNN axis (left to right) to ACL axis (right to left) ranging from [-rank...

◆ NeonSpaceToBatchNdWorkloadValidate()

arm_compute::Status NeonSpaceToBatchNdWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const SpaceToBatchNdDescriptor descriptor 
)

Definition at line 20 of file NeonSpaceToBatchNdWorkload.cpp.

Referenced by NeonLayerSupport::IsSpaceToBatchNdSupported().

23 {
24  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
25  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
26 
27  // ArmNN blockShape is [H, W] Cl asks for W, H
28  int32_t blockHeight = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[0]);
29  int32_t blockWidth = armnn::numeric_cast<int32_t>(descriptor.m_BlockShape[1]);
30 
31  arm_compute::Size2D paddingLeftTop = BuildArmComputeSize2D(
32  descriptor.m_PadList[1].first, descriptor.m_PadList[0].first);
33  arm_compute::Size2D paddingRightBottom = BuildArmComputeSize2D(
34  descriptor.m_PadList[1].second, descriptor.m_PadList[0].second);
35 
36  return arm_compute::NESpaceToBatchLayer::validate(&aclInputInfo,
37  blockWidth,
38  blockHeight,
39  paddingLeftTop,
40  paddingRightBottom,
41  &aclOutputInfo);
42 }
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ NeonSpaceToDepthWorkloadValidate()

arm_compute::Status NeonSpaceToDepthWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const SpaceToDepthDescriptor descriptor 
)

Definition at line 19 of file NeonSpaceToDepthWorkload.cpp.

References SpaceToDepthDescriptor::m_DataLayout.

Referenced by NeonLayerSupport::IsSpaceToDepthSupported().

22 {
23  DataLayout dataLayout = descriptor.m_DataLayout;
24  const arm_compute::TensorInfo aclInput = BuildArmComputeTensorInfo(input, dataLayout);
25  const arm_compute::TensorInfo aclOutput = BuildArmComputeTensorInfo(output, dataLayout);
26 
27  int32_t blockSize = armnn::numeric_cast<int32_t>(descriptor.m_BlockSize);
28 
29  return arm_compute::NESpaceToDepthLayer::validate(&aclInput, &aclOutput, blockSize);
30 }
DataLayout
Definition: Types.hpp:62
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ NeonSplitterWorkloadValidate()

arm_compute::Status NeonSplitterWorkloadValidate ( const TensorInfo input,
const std::vector< std::reference_wrapper< TensorInfo >> &  outputs,
unsigned int  splitAxis 
)

Definition at line 32 of file NeonSplitterWorkload.cpp.

Referenced by NeonLayerSupport::IsSplitterSupported().

35 {
36  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input);
37 
38  size_t numOutputs = outputs.size();
39 
40  std::vector<arm_compute::TensorInfo> aclOutputs;
41  aclOutputs.reserve(numOutputs);
42 
43  std::vector<arm_compute::ITensorInfo*> aclOutputPtr;
44  aclOutputPtr.reserve(numOutputs);
45 
46  for (size_t i = 0u; i < outputs.size(); ++i)
47  {
48  aclOutputs.emplace_back(BuildArmComputeTensorInfo(outputs[i]));
49  aclOutputPtr.emplace_back(&aclOutputs.back());
50  }
51 
52  unsigned int aclAxis = CalcAclAxis(input.GetNumDimensions(), splitAxis);
53  return arm_compute::NESplit::validate(&aclInputInfo, aclOutputPtr, aclAxis);
54 }

◆ NeonSqrtWorkloadValidate()

arm_compute::Status NeonSqrtWorkloadValidate ( const TensorInfo input,
const TensorInfo output 
)

Definition at line 18 of file NeonSqrtWorkload.cpp.

Referenced by NeonLayerSupport::IsElementwiseUnarySupported().

19 {
20  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
21  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
22 
23  ActivationDescriptor descriptor;
24  descriptor.m_Function = ActivationFunction::Sqrt;
25  const arm_compute::ActivationLayerInfo activationLayerInfo =
27 
28  return arm_compute::NEActivationLayer::validate(&aclInput, &aclOutput, activationLayerInfo);
29 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ NeonStackWorkloadValidate()

arm_compute::Status NeonStackWorkloadValidate ( const std::vector< const TensorInfo *> &  inputs,
const TensorInfo output,
const StackDescriptor descriptor 
)

Definition at line 27 of file NeonStackWorkload.cpp.

Referenced by NeonLayerSupport::IsStackSupported().

30 {
31  std::vector<arm_compute::TensorInfo> aclInputs;
32  for (const TensorInfo* input : inputs)
33  {
34  arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(*input, armnn::DataLayout::NCHW);
35  aclInputs.emplace_back(aclInputInfo);
36  }
37 
38  std::vector<arm_compute::ITensorInfo*> aclInputPtrs;
39  for (arm_compute::ITensorInfo& input : aclInputs)
40  {
41  aclInputPtrs.emplace_back(&input);
42  }
43 
44  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output);
45  int aclAxis = CalcAxis(descriptor.m_Axis, descriptor.m_InputShape.GetNumDimensions());
46  return arm_compute::NEStackLayer::validate(aclInputPtrs, aclAxis, &aclOutputInfo);
47 }

◆ NeonStridedSliceWorkloadValidate()

arm_compute::Status NeonStridedSliceWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const StridedSliceDescriptor descriptor 
)

Definition at line 19 of file NeonStridedSliceWorkload.cpp.

Referenced by NeonLayerSupport::IsStridedSliceSupported().

22 {
23  const arm_compute::TensorInfo aclInput = armcomputetensorutils::BuildArmComputeTensorInfo(input);
24  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
25 
29 
30  std::tie(starts, ends, strides) = SetNeonStridedSliceData(descriptor.m_Begin,
31  descriptor.m_End,
32  descriptor.m_Stride);
33 
34  auto numDimensions = armnn::numeric_cast<int>(input.GetNumDimensions());
35  int32_t begin_mask = ConvertMaskToACLFormat(descriptor.m_BeginMask, numDimensions);
36  int32_t end_mask = ConvertMaskToACLFormat(descriptor.m_EndMask, numDimensions);
37  int32_t shrink_axis_mask = ConvertMaskToACLFormat(descriptor.m_ShrinkAxisMask, numDimensions);
38 
39  return arm_compute::NEStridedSlice::validate(&aclInput,
40  &aclOutput,
41  starts,
42  ends,
43  strides,
44  begin_mask,
45  end_mask,
46  shrink_axis_mask);
47 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates
auto SetNeonStridedSliceData(const std::vector< int > &m_begin, const std::vector< int > &m_end, const std::vector< int > &m_stride)
int32_t ConvertMaskToACLFormat(int32_t mask, int32_t numDim)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ NeonSubtractionWorkloadValidate()

arm_compute::Status NeonSubtractionWorkloadValidate ( const TensorInfo input0,
const TensorInfo input1,
const TensorInfo output,
const ActivationDescriptor activationDescriptor 
)

Definition at line 22 of file NeonSubtractionWorkload.cpp.

Referenced by NeonLayerSupport::IsSubtractionSupported(), and NeonBackend::OptimizeSubgraphView().

26 {
27  const arm_compute::TensorInfo aclInput0 = armcomputetensorutils::BuildArmComputeTensorInfo(input0);
28  const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input1);
29  const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output);
30 
31  const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo(
32  activationDescriptor);
33 
34  return arm_compute::NEArithmeticSubtraction::validate(&aclInput0,
35  &aclInput1,
36  &aclOutput,
37  arm_compute::ConvertPolicy::SATURATE,
38  activationInfo);
39 }
arm_compute::ActivationLayerInfo ConvertActivationDescriptorToAclActivationLayerInfo(const ActivationDescriptor &actDesc)

◆ NeonTensorHandleFactoryId()

constexpr const char* armnn::NeonTensorHandleFactoryId ( )

Definition at line 14 of file NeonTensorHandleFactory.hpp.

Referenced by NeonTensorHandleFactory::GetIdStatic().

14 { return "Arm/Neon/TensorHandleFactory"; }

◆ NeonTransposeConvolution2dWorkloadValidate()

arm_compute::Status NeonTransposeConvolution2dWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const TransposeConvolution2dDescriptor descriptor,
const TensorInfo weights,
const Optional< TensorInfo > &  biases 
)

Definition at line 25 of file NeonTransposeConvolution2dWorkload.cpp.

Referenced by NeonLayerSupport::IsTransposeConvolution2dSupported().

30 {
31  const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input, descriptor.m_DataLayout);
32  const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output, descriptor.m_DataLayout);
33  const arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights, descriptor.m_DataLayout);
34 
35  arm_compute::TensorInfo aclBiasesInfo;
36  arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr;
37 
38  if (descriptor.m_BiasEnabled)
39  {
40  ARMNN_ASSERT(biases.has_value());
41 
42  aclBiasesInfo = BuildArmComputeTensorInfo(biases.value(), descriptor.m_DataLayout);
43  optionalAclBiasesInfo = &aclBiasesInfo;
44  }
45 
46  arm_compute::PadStrideInfo layerInfo = BuildArmComputePadStrideInfo(descriptor);
47 
48  return arm_compute::NEDeconvolutionLayer::validate(&aclInputInfo,
49  &aclWeightsInfo,
50  optionalAclBiasesInfo,
51  &aclOutputInfo,
52  layerInfo);
53 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ NeonTransposeWorkloadValidate()

arm_compute::Status NeonTransposeWorkloadValidate ( const TensorInfo input,
const TensorInfo output,
const TransposeDescriptor descriptor 
)

Definition at line 15 of file NeonTransposeWorkload.cpp.

Referenced by NeonLayerSupport::IsTransposeSupported().

18 {
19  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
20  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
21  const armnn::PermutationVector& mappings = descriptor.m_DimMappings;
22 
23  return arm_compute::NEPermute::validate(&aclInputInfo, &aclOutputInfo,
24  armcomputetensorutils::BuildArmComputeTransposeVector(mappings));
25 }

◆ NeonUnidirectionalSequenceLstmFloatWorkloadValidate()

arm_compute::Status NeonUnidirectionalSequenceLstmFloatWorkloadValidate ( const TensorInfo input,
const TensorInfo outputStateIn,
const TensorInfo cellStateIn,
const TensorInfo outputStateOut,
const TensorInfo cellStateOut,
const TensorInfo output,
const UnidirectionalSequenceLstmDescriptor descriptor,
const LstmInputParamsInfo paramsInfo 
)

Definition at line 510 of file NeonUnidirectionalSequenceLstmFloatWorkload.cpp.

References TensorInfo::GetShape(), and LstmDescriptor::m_TimeMajor.

Referenced by NeonLayerSupport::IsUnidirectionalSequenceLstmSupported().

518 {
519  TensorShape inputLayerShape = input.GetShape();
520  TensorShape outputLayerShape = outputStateIn.GetShape();
521 
522  unsigned int maxTime = descriptor.m_TimeMajor ? inputLayerShape[0] : inputLayerShape[1];
523  unsigned int batchSize = descriptor.m_TimeMajor ? inputLayerShape[1] : inputLayerShape[0];
524  unsigned int inputSize = inputLayerShape[2];
525  unsigned int outputSize = outputLayerShape[2];
526 
527  const TensorShape timeMajorShapeInput({maxTime, batchSize, inputSize});
528  const TensorShape timeMajorShapeOutput({maxTime, batchSize, outputSize});
529 
530  arm_compute::Status statusPermute1 = arm_compute::Status(arm_compute::ErrorCode::OK,
531  "Permute1 status");
532  arm_compute::Status statusSplit = arm_compute::Status(arm_compute::ErrorCode::OK,
533  "Split status");
534  arm_compute::Status statusLSTM = arm_compute::Status(arm_compute::ErrorCode::OK,
535  "LSTM status");
536  arm_compute::Status statusConcat = arm_compute::Status(arm_compute::ErrorCode::OK,
537  "Concat status");
538  arm_compute::Status statusPermute2 = arm_compute::Status(arm_compute::ErrorCode::OK,
539  "Permute2 status");
540 
541  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
542  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
543 
544  //
545  // Permute validate
546  //
547  TensorInfo permuteOutInfo = TensorInfo(input);
548  arm_compute::TensorInfo aclPermuteOutInfo = armcomputetensorutils::BuildArmComputeTensorInfo(permuteOutInfo);
549  if (!descriptor.m_TimeMajor)
550  {
551  statusPermute1 = arm_compute::NEPermute::validate(&aclInputInfo,
552  &aclPermuteOutInfo,
553  arm_compute::PermutationVector(0U, 2U, 1U));
554  }
555 
556  //
557  // Split and Concat Tensors validate
558  //
559  std::vector<arm_compute::TensorInfo> splitterOutputsTensorInfos;
560  std::vector<arm_compute::TensorInfo> concatInputsTensorInfos;
561  std::vector<arm_compute::ITensorInfo*> splitterOutputsTensorInfosPtr;
562  std::vector<const arm_compute::ITensorInfo*> concatInputsTensorInfosPtr;
563  splitterOutputsTensorInfos.reserve(maxTime);
564  concatInputsTensorInfos.reserve(maxTime);
565  for (unsigned int i = 0; i < maxTime; ++i)
566  {
567  arm_compute::TensorInfo splitter_out;
568  arm_compute::TensorInfo concat_in;
569 
570  auto splitterTensorInfo = TensorInfo(input);
571  auto concatTensorInfo = TensorInfo(output);
572  splitterTensorInfo.SetShape({batchSize, inputSize});
573  concatTensorInfo.SetShape({batchSize, outputSize});
574 
575  arm_compute::TensorInfo aclSplitterTensorInfo
576  = armcomputetensorutils::BuildArmComputeTensorInfo(splitterTensorInfo);
577  arm_compute::TensorInfo aclConcatTensorInfo
578  = armcomputetensorutils::BuildArmComputeTensorInfo(concatTensorInfo);
579 
580  splitterOutputsTensorInfos.emplace_back(aclSplitterTensorInfo);
581  concatInputsTensorInfos.emplace_back(aclConcatTensorInfo);
582  splitterOutputsTensorInfosPtr.emplace_back(&splitterOutputsTensorInfos[i]);
583  concatInputsTensorInfosPtr.emplace_back(&concatInputsTensorInfos[i]);
584  }
585 
586  //
587  // Split validate
588  //
589  unsigned int numberDimensions = 3;
590  unsigned int dimension = 0; // splitting on 0-dimension (i.e. maxTime dimension)
591  unsigned int aclAxisSplit = CalcAclAxis(numberDimensions, dimension);
592 
593  if (maxTime != 1) // ACL split does not work with only one element to split.
594  {
595  if (!descriptor.m_TimeMajor)
596  {
597  statusSplit = arm_compute::NESplit::validate(&aclPermuteOutInfo,
598  splitterOutputsTensorInfosPtr,
599  aclAxisSplit);
600  } else
601  {
602  statusSplit = arm_compute::NESplit::validate(&aclInputInfo, splitterOutputsTensorInfosPtr, aclAxisSplit);
603  }
604  }
605 
606  //
607  // LSTM validate
608  //
609 
610  arm_compute::LSTMParams<arm_compute::ITensorInfo> lstm_params_info;
611 
612  const TensorInfo& scratchBuffer = TensorInfo(cellStateIn.GetShape(), input.GetDataType());
613 
614  // The inputs and outputs
615  const arm_compute::TensorInfo aclOutputStateInInfo = BuildArmComputeTensorInfo(outputStateIn);
616  const arm_compute::TensorInfo aclCellStateInInfo = BuildArmComputeTensorInfo(cellStateIn);
617  const arm_compute::TensorInfo aclScratchBufferInfo = BuildArmComputeTensorInfo(scratchBuffer);
618  const arm_compute::TensorInfo aclOutputStateOutInfo = BuildArmComputeTensorInfo(outputStateOut);
619  const arm_compute::TensorInfo aclCellStateOutInfo = BuildArmComputeTensorInfo(cellStateOut);
620 
621  // Basic parameters
622  const arm_compute::TensorInfo aclInputToForgetWeightsInfo
623  = BuildArmComputeTensorInfo(paramsInfo.GetInputToForgetWeights());
624  const arm_compute::TensorInfo aclInputToCellWeightsInfo
625  = BuildArmComputeTensorInfo(paramsInfo.GetInputToCellWeights());
626  const arm_compute::TensorInfo aclInputToOutputWeightsInfo
627  = BuildArmComputeTensorInfo(paramsInfo.GetInputToOutputWeights());
628  const arm_compute::TensorInfo aclRecurrentToForgetWeightsInfo
629  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToForgetWeights());
630  const arm_compute::TensorInfo aclRecurrentToCellWeightsInfo
631  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToCellWeights());
632  const arm_compute::TensorInfo aclRecurrentToOutputWeightsInfo
633  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToOutputWeights());
634  const arm_compute::TensorInfo aclForgetGateBiasInfo
635  = BuildArmComputeTensorInfo(paramsInfo.GetForgetGateBias());
636  const arm_compute::TensorInfo aclCellBiasInfo
637  = BuildArmComputeTensorInfo(paramsInfo.GetCellBias());
638  const arm_compute::TensorInfo aclOutputGateBiasInfo
639  = BuildArmComputeTensorInfo(paramsInfo.GetOutputGateBias());
640 
641  arm_compute::TensorInfo aclInputToInputWeightsInfo;
642  arm_compute::TensorInfo aclRecurrentToInputWeightsInfo;
643  arm_compute::TensorInfo aclCellToInputWeightsInfo;
644  arm_compute::TensorInfo aclInputGateBiasInfo;
645  arm_compute::TensorInfo aclProjectionWeightsInfo;
646  arm_compute::TensorInfo aclProjectionBiasInfo;
647  arm_compute::TensorInfo aclCellToForgetWeightsInfo;
648  arm_compute::TensorInfo aclCellToOutputWeightsInfo;
649 
650  arm_compute::TensorInfo aclInputLayerNormWeightsInfo;
651  arm_compute::TensorInfo aclForgetLayerNormWeightsInfo;
652  arm_compute::TensorInfo aclCellLayerNormWeightsInfo;
653  arm_compute::TensorInfo aclOutputLayerNormWeightsInfo;
654 
655 
656  if (!descriptor.m_CifgEnabled)
657  {
658  if (descriptor.m_PeepholeEnabled)
659  {
660  aclCellToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToInputWeights());
661  }
662  aclInputToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputToInputWeights());
663  aclRecurrentToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToInputWeights());
664  aclInputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputGateBias());
665 
666  lstm_params_info.set_cifg_params(&aclInputToInputWeightsInfo,
667  &aclRecurrentToInputWeightsInfo,
668  descriptor.m_PeepholeEnabled ? &aclCellToInputWeightsInfo : nullptr,
669  &aclInputGateBiasInfo);
670  }
671 
672  if (descriptor.m_ProjectionEnabled)
673  {
674  if (paramsInfo.m_ProjectionBias != nullptr)
675  {
676  aclProjectionBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionBias());
677  }
678  aclProjectionWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionWeights());
679 
680  lstm_params_info.set_projection_params(&aclProjectionWeightsInfo,
681  paramsInfo.m_ProjectionBias ? &aclProjectionBiasInfo : nullptr);
682  }
683 
684  if (descriptor.m_PeepholeEnabled)
685  {
686  aclCellToForgetWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToForgetWeights());
687  aclCellToOutputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToOutputWeights());
688 
689  lstm_params_info.set_peephole_params(&aclCellToForgetWeightsInfo, &aclCellToOutputWeightsInfo);
690  }
691 
692  if (descriptor.m_LayerNormEnabled)
693  {
694  if (!descriptor.m_CifgEnabled)
695  {
696  aclInputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputLayerNormWeights());
697  }
698  aclForgetLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetForgetLayerNormWeights());
699  aclCellLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellLayerNormWeights());
700  aclOutputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetOutputLayerNormWeights());
701 
702  lstm_params_info.set_layer_normalization_params(descriptor.m_CifgEnabled ? nullptr :
703  &aclInputLayerNormWeightsInfo,
704  &aclForgetLayerNormWeightsInfo,
705  &aclCellLayerNormWeightsInfo,
706  &aclOutputLayerNormWeightsInfo);
707  }
708 
709  // Need to be set at negative threshold to be compatible for ACL
710  float cell_threshold = descriptor.m_ClippingThresCell;
711  float projection_threshold = descriptor.m_ClippingThresProj;
712 
713  arm_compute::ActivationLayerInfo activationLayerInfo =
714  ConvertLstmActivationFuncToAclLayerInfo(descriptor.m_ActivationFunc);
715 
716  for (unsigned int i = 0; i != maxTime; ++i)
717  {
718 
719  // Set LSTM input and output ITensors depending on:
720  // input format (timeMajor) & number of LSTM batches (maxTime).
721  arm_compute::ITensorInfo* outputLSTM;
722  arm_compute::ITensorInfo* inputLSTM;
723 
724  // If there is only one LSTM time major batch, we will not concat OR permute.
725  // Set input of LSTM to be first input ITensor.
726  // Set output of LSTM to be final output ITensor.
727  // LSTM input/output cannot be > 2 dimensions so need to resize its TensorInfo.
728  if (maxTime == 1 && !descriptor.m_TimeMajor)
729  {
730  TensorShape inputShape = GetTensorShape(aclInputInfo.tensor_shape(), 1U);
731  TensorShape outputShape = GetTensorShape(aclOutputInfo.tensor_shape(), 1U);
732 
733  TensorShape inputShapeShrink({inputShape[1], inputShape[2]});
734  TensorShape outputShapeShrink({outputShape[1], outputShape[2]});
735 
736  auto acl_input_shape_shrink = BuildArmComputeTensorShape(inputShapeShrink);
737  auto acl_output_shape_shrink = BuildArmComputeTensorShape(outputShapeShrink);
738 
739  const_cast<arm_compute::TensorInfo*>(&aclInputInfo)->set_tensor_shape(acl_input_shape_shrink);
740  inputLSTM = const_cast<arm_compute::TensorInfo*>(&aclInputInfo);
741 
742  const_cast<arm_compute::TensorInfo*>(&aclOutputInfo)->set_tensor_shape(acl_output_shape_shrink);
743  outputLSTM = const_cast<arm_compute::TensorInfo*>(&aclOutputInfo);
744  }
745  // If there is only one LSTM batch major batch, we will not concat, only permute.
746  // Set input of LSTM to be output of initial permute.
747  // Set output of LSTM to be first element of m_ConcatInputs & use that value later in permute.
748  // LSTM output cannot be > 2 dimensions so need to resize its TensorInfo.
749  else if (maxTime == 1 && !descriptor.m_TimeMajor)
750  {
751  TensorShape inputShape = GetTensorShape(aclPermuteOutInfo.tensor_shape(), 1U);
752  TensorShape inputShapeShrink({inputShape[1], inputShape[2]});
753  auto acl_input_shape_shrink = BuildArmComputeTensorShape(inputShapeShrink);
754  aclPermuteOutInfo.set_tensor_shape(acl_input_shape_shrink);
755  inputLSTM = &aclPermuteOutInfo;
756 
757  outputLSTM = const_cast<arm_compute::ITensorInfo*>(concatInputsTensorInfosPtr[i]);
758  }
759  // Batch major AND/OR 2+ LSTM batches so will use concat AND/OR permute later on.
760  else
761  {
762  inputLSTM = splitterOutputsTensorInfosPtr[i];
763  outputLSTM = const_cast<arm_compute::ITensorInfo*>(concatInputsTensorInfosPtr[i]);
764  }
765 
766  statusLSTM = arm_compute::NELSTMLayer::validate(inputLSTM,
767  &aclInputToForgetWeightsInfo,
768  &aclInputToCellWeightsInfo,
769  &aclInputToOutputWeightsInfo,
770  &aclRecurrentToForgetWeightsInfo,
771  &aclRecurrentToCellWeightsInfo,
772  &aclRecurrentToOutputWeightsInfo,
773  &aclForgetGateBiasInfo,
774  &aclCellBiasInfo,
775  &aclOutputGateBiasInfo,
776  &aclOutputStateInInfo,
777  &aclCellStateInInfo,
778  &aclScratchBufferInfo,
779  &aclOutputStateOutInfo,
780  &aclCellStateOutInfo,
781  outputLSTM,
782  lstm_params_info,
783  activationLayerInfo,
784  cell_threshold,
785  projection_threshold);
786 
787  if (statusLSTM.error_code() != arm_compute::ErrorCode::OK)
788  {
789  break;
790  }
791  }
792 
793  //
794  // Concat validate
795  //
796 
797  // Expand dimensions of LSTM outputs adding one empty dimension to fit concatenate inputs.
798  TensorShape shape = GetTensorShape(concatInputsTensorInfosPtr[0]->tensor_shape(), 1U);
799  TensorShape shapeExpandTimeMajor({1, shape[0], shape[1]});
800  TensorShape shapeExpandBatchMajor({shape[0], 1, shape[1]});
801 
802  TensorInfo concatOutputTensorInfo = TensorInfo(output);
803  concatOutputTensorInfo.SetShape(timeMajorShapeOutput);
804  arm_compute::TensorInfo aclConcatOutputTensorInfo= BuildArmComputeTensorInfo(concatOutputTensorInfo);
805 
806  if (maxTime != 1) // ACL concat does not work with only one element to concatenate.
807  {
808  for (unsigned int i = 0; i < maxTime; ++i)
809  {
810  auto acl_shape_expand = BuildArmComputeTensorShape(shapeExpandTimeMajor);
811  concatInputsTensorInfos[i].set_tensor_shape(acl_shape_expand);
812  }
813 
814  unsigned int aclAxisConcat = CalcAclAxis(numberDimensions, dimension);
815  if (!descriptor.m_TimeMajor)
816  {
817  statusConcat = arm_compute::NEConcatenateLayer::validate(concatInputsTensorInfosPtr,
818  &aclConcatOutputTensorInfo,
819  aclAxisConcat);
820  }
821  else
822  {
823  statusConcat = arm_compute::NEConcatenateLayer::validate(concatInputsTensorInfosPtr,
824  &aclOutputInfo,
825  aclAxisConcat);
826  }
827  }
828  // If only one LSTM batch, we do not concat and/or permute.
829  // Must ensure final output info is expanded to correct batch major dimensions.
830  else
831  {
832  if (!descriptor.m_TimeMajor)
833  {
834  const_cast<arm_compute::TensorInfo*>(&aclInputInfo)->set_tensor_shape(
835  BuildArmComputeTensorShape(shapeExpandBatchMajor));
836  }
837  else
838  {
839  const_cast<arm_compute::TensorInfo*>(&aclInputInfo)->set_tensor_shape(
840  BuildArmComputeTensorShape(shapeExpandTimeMajor));
841  }
842  }
843 
844  //
845  // Permute validate
846  //
847  if (!descriptor.m_TimeMajor)
848  {
849  // Output now time major. Permute output back to batch major.
850  if (maxTime != 1)
851  {
852  statusPermute2 = arm_compute::NEPermute::validate(&aclConcatOutputTensorInfo,
853  &aclOutputInfo,
854  arm_compute::PermutationVector(0U, 2U, 1U));
855  }
856  else
857  {
858  statusPermute2 = arm_compute::NEPermute::validate(concatInputsTensorInfosPtr[0],
859  &aclOutputInfo,
860  arm_compute::PermutationVector(0U, 2U, 1U));
861  }
862  }
863 
864  auto okCode = arm_compute::ErrorCode::OK;
865  if (statusPermute1.error_code() == okCode &&
866  statusSplit.error_code() == okCode &&
867  statusLSTM .error_code() == okCode &&
868  statusConcat.error_code() == okCode &&
869  statusPermute2.error_code() == okCode)
870  {
871  return arm_compute::Status(arm_compute::ErrorCode::OK,
872  "All Unidirectional Sequence LSTM layer validate status OK.");
873  }
874  else
875  {
876  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR,
877  "Unidirectional Sequence LSTM layer validate status failed.");
878  }
879 }
arm_compute::ActivationLayerInfo ConvertLstmActivationFuncToAclLayerInfo(uint32_t activationFunction)
Status
enumeration
Definition: Types.hpp:42
armnn::TensorShape GetTensorShape(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout)
Definition: TensorUtils.cpp:19

◆ NeonUnidirectionalSequenceLstmWorkloadValidate()

arm_compute::Status NeonUnidirectionalSequenceLstmWorkloadValidate ( const TensorInfo input,
const TensorInfo outputStateIn,
const TensorInfo cellStateIn,
const TensorInfo outputStateOut,
const TensorInfo cellStateOut,
const TensorInfo output,
const UnidirectionalSequenceLstmDescriptor descriptor,
const LstmInputParamsInfo paramsInfo 
)

Definition at line 491 of file NeonUnidirectionalSequenceLstmWorkload.cpp.

References TensorInfo::GetShape(), and LstmDescriptor::m_TimeMajor.

Referenced by NeonLayerSupport::IsUnidirectionalSequenceLstmSupported().

499 {
500  TensorShape inputLayerShape = input.GetShape();
501  TensorShape outputLayerShape = output.GetShape();
502 
503  unsigned int maxTime = descriptor.m_TimeMajor ? inputLayerShape[0] : inputLayerShape[1];
504  unsigned int batchSize = descriptor.m_TimeMajor ? inputLayerShape[1] : inputLayerShape[0];
505  unsigned int inputSize = inputLayerShape[2];
506  unsigned int outputSize = outputLayerShape[2];
507 
508  const TensorShape timeMajorShapeInput({maxTime, batchSize, inputSize});
509  const TensorShape timeMajorShapeOutput({maxTime, batchSize, outputSize});
510 
511  arm_compute::Status statusPermute1 = arm_compute::Status(arm_compute::ErrorCode::OK,
512  "Permute1 status");
513  arm_compute::Status statusSplit = arm_compute::Status(arm_compute::ErrorCode::OK,
514  "Split status");
515  arm_compute::Status statusLSTM = arm_compute::Status(arm_compute::ErrorCode::OK,
516  "LSTM status");
517  arm_compute::Status statusConcat = arm_compute::Status(arm_compute::ErrorCode::OK,
518  "Concat status");
519  arm_compute::Status statusPermute2 = arm_compute::Status(arm_compute::ErrorCode::OK,
520  "Permute2 status");
521 
522  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
523  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
524 
525  //
526  // Permute validate
527  //
528  TensorInfo permuteOutInfo = TensorInfo(input);
529  arm_compute::TensorInfo aclPermuteOutInfo = armcomputetensorutils::BuildArmComputeTensorInfo(permuteOutInfo);
530  if (!descriptor.m_TimeMajor)
531  {
532  statusPermute1 = arm_compute::NEPermute::validate(&aclInputInfo,
533  &aclPermuteOutInfo,
534  arm_compute::PermutationVector(0U, 2U, 1U));
535  }
536 
537  //
538  // Split and Concat Tensors validate
539  //
540  std::vector<arm_compute::TensorInfo> splitterOutputsTensorInfos;
541  std::vector<arm_compute::TensorInfo> concatInputsTensorInfos;
542  std::vector<arm_compute::ITensorInfo*> splitterOutputsTensorInfosPtr;
543  std::vector<const arm_compute::ITensorInfo*> concatInputsTensorInfosPtr;
544  splitterOutputsTensorInfos.reserve(maxTime);
545  concatInputsTensorInfos.reserve(maxTime);
546  for (unsigned int i = 0; i < maxTime; ++i)
547  {
548  arm_compute::TensorInfo splitter_out;
549  arm_compute::TensorInfo concat_in;
550 
551  auto splitterTensorInfo = TensorInfo(input);
552  auto concatTensorInfo = TensorInfo(output);
553  splitterTensorInfo.SetShape({batchSize, inputSize});
554  concatTensorInfo.SetShape({batchSize, outputSize});
555 
556  arm_compute::TensorInfo aclSplitterTensorInfo
557  = armcomputetensorutils::BuildArmComputeTensorInfo(splitterTensorInfo);
558  arm_compute::TensorInfo aclConcatTensorInfo
559  = armcomputetensorutils::BuildArmComputeTensorInfo(concatTensorInfo);
560 
561  splitterOutputsTensorInfos.emplace_back(aclSplitterTensorInfo);
562  concatInputsTensorInfos.emplace_back(aclConcatTensorInfo);
563  splitterOutputsTensorInfosPtr.emplace_back(&splitterOutputsTensorInfos[i]);
564  concatInputsTensorInfosPtr.emplace_back(&concatInputsTensorInfos[i]);
565  }
566 
567  //
568  // Split validate
569  //
570  unsigned int numberDimensions = 3;
571  unsigned int dimension = 0; // splitting on 0-dimension (i.e. maxTime dimension)
572  unsigned int aclAxisSplit = CalcAclAxis(numberDimensions, dimension);
573 
574  if (maxTime != 1) // ACL split does not work with only one element to split.
575  {
576  if (!descriptor.m_TimeMajor)
577  {
578  statusSplit = arm_compute::NESplit::validate(&aclPermuteOutInfo,
579  splitterOutputsTensorInfosPtr,
580  aclAxisSplit);
581  } else
582  {
583  statusSplit = arm_compute::NESplit::validate(&aclInputInfo, splitterOutputsTensorInfosPtr, aclAxisSplit);
584  }
585  }
586 
587  //
588  // LSTM validate
589  //
590 
591  arm_compute::LSTMParams<arm_compute::ITensorInfo> lstm_params_info;
592 
593  const TensorInfo& scratchBuffer = TensorInfo(cellStateIn.GetShape(), input.GetDataType());
594 
595  lstm_params_info.set_cell_clip_params(descriptor.m_ClippingThresCell);
596  lstm_params_info.set_projection_clip_params(descriptor.m_ClippingThresProj);
597  // The inputs and outputs
598  const arm_compute::TensorInfo aclOutputStateInInfo = BuildArmComputeTensorInfo(outputStateIn);
599  const arm_compute::TensorInfo aclCellStateInInfo = BuildArmComputeTensorInfo(cellStateIn);
600  const arm_compute::TensorInfo aclScratchBufferInfo = BuildArmComputeTensorInfo(scratchBuffer);
601  const arm_compute::TensorInfo aclOutputStateOutInfo = BuildArmComputeTensorInfo(outputStateOut);
602  const arm_compute::TensorInfo aclCellStateOutInfo = BuildArmComputeTensorInfo(cellStateOut);
603 
604  // Basic parameters
605  const arm_compute::TensorInfo aclInputToForgetWeightsInfo
606  = BuildArmComputeTensorInfo(paramsInfo.GetInputToForgetWeights());
607  const arm_compute::TensorInfo aclInputToCellWeightsInfo
608  = BuildArmComputeTensorInfo(paramsInfo.GetInputToCellWeights());
609  const arm_compute::TensorInfo aclInputToOutputWeightsInfo
610  = BuildArmComputeTensorInfo(paramsInfo.GetInputToOutputWeights());
611  const arm_compute::TensorInfo aclRecurrentToForgetWeightsInfo
612  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToForgetWeights());
613  const arm_compute::TensorInfo aclRecurrentToCellWeightsInfo
614  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToCellWeights());
615  const arm_compute::TensorInfo aclRecurrentToOutputWeightsInfo
616  = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToOutputWeights());
617  const arm_compute::TensorInfo aclForgetGateBiasInfo
618  = BuildArmComputeTensorInfo(paramsInfo.GetForgetGateBias());
619  const arm_compute::TensorInfo aclCellBiasInfo
620  = BuildArmComputeTensorInfo(paramsInfo.GetCellBias());
621  const arm_compute::TensorInfo aclOutputGateBiasInfo
622  = BuildArmComputeTensorInfo(paramsInfo.GetOutputGateBias());
623 
624  arm_compute::TensorInfo aclInputToInputWeightsInfo;
625  arm_compute::TensorInfo aclRecurrentToInputWeightsInfo;
626  arm_compute::TensorInfo aclCellToInputWeightsInfo;
627  arm_compute::TensorInfo aclInputGateBiasInfo;
628  arm_compute::TensorInfo aclProjectionWeightsInfo;
629  arm_compute::TensorInfo aclProjectionBiasInfo;
630  arm_compute::TensorInfo aclCellToForgetWeightsInfo;
631  arm_compute::TensorInfo aclCellToOutputWeightsInfo;
632 
633  arm_compute::TensorInfo aclInputLayerNormWeightsInfo;
634  arm_compute::TensorInfo aclForgetLayerNormWeightsInfo;
635  arm_compute::TensorInfo aclCellLayerNormWeightsInfo;
636  arm_compute::TensorInfo aclOutputLayerNormWeightsInfo;
637 
638  if (!descriptor.m_CifgEnabled)
639  {
640  if (descriptor.m_PeepholeEnabled)
641  {
642  aclCellToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToInputWeights());
643  }
644  aclInputToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputToInputWeights());
645  aclRecurrentToInputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetRecurrentToInputWeights());
646  aclInputGateBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputGateBias());
647 
648  lstm_params_info.set_cifg_params(&aclInputToInputWeightsInfo,
649  &aclRecurrentToInputWeightsInfo,
650  descriptor.m_PeepholeEnabled ? &aclCellToInputWeightsInfo : nullptr,
651  &aclInputGateBiasInfo);
652  }
653 
654  if (descriptor.m_ProjectionEnabled)
655  {
656  if (paramsInfo.m_ProjectionBias != nullptr)
657  {
658  aclProjectionBiasInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionBias());
659  }
660  aclProjectionWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetProjectionWeights());
661 
662  lstm_params_info.set_projection_params(&aclProjectionWeightsInfo,
663  paramsInfo.m_ProjectionBias ? &aclProjectionBiasInfo : nullptr);
664  }
665 
666  if (descriptor.m_PeepholeEnabled)
667  {
668  aclCellToForgetWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToForgetWeights());
669  aclCellToOutputWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellToOutputWeights());
670 
671  lstm_params_info.set_peephole_params(&aclCellToForgetWeightsInfo, &aclCellToOutputWeightsInfo);
672  }
673 
674  if (descriptor.m_LayerNormEnabled)
675  {
676  if (!descriptor.m_CifgEnabled)
677  {
678  aclInputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetInputLayerNormWeights());
679  }
680  aclForgetLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetForgetLayerNormWeights());
681  aclCellLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetCellLayerNormWeights());
682  aclOutputLayerNormWeightsInfo = BuildArmComputeTensorInfo(paramsInfo.GetOutputLayerNormWeights());
683 
684  lstm_params_info.set_layer_normalization_params(descriptor.m_CifgEnabled ? nullptr :
685  &aclInputLayerNormWeightsInfo,
686  &aclForgetLayerNormWeightsInfo,
687  &aclCellLayerNormWeightsInfo,
688  &aclOutputLayerNormWeightsInfo);
689  }
690 
691  lstm_params_info.set_matmul_scale_params(descriptor.m_InputIntermediateScale,
692  descriptor.m_ForgetIntermediateScale,
693  descriptor.m_CellIntermediateScale,
694  descriptor.m_OutputIntermediateScale);
695 
696  lstm_params_info.set_hidden_state_params(descriptor.m_HiddenStateZeroPoint, descriptor.m_HiddenStateScale);
697 
698  for (unsigned int i = 0; i != maxTime; ++i)
699  {
700 
701  // Set LSTM input and output ITensors depending on:
702  // input format (timeMajor) & number of LSTM batches (maxTime).
703  arm_compute::ITensorInfo* outputLSTM;
704  arm_compute::ITensorInfo* inputLSTM;
705 
706  // If there is only one LSTM time major batch, we will not concat OR permute.
707  // Set input of LSTM to be first input ITensor.
708  // Set output of LSTM to be final output ITensor.
709  // LSTM input/output cannot be > 2 dimensions so need to resize its TensorInfo.
710  if (maxTime == 1 && !descriptor.m_TimeMajor)
711  {
712  TensorShape inputShape = GetTensorShape(aclInputInfo.tensor_shape(), 1U);
713  TensorShape outputShape = GetTensorShape(aclOutputInfo.tensor_shape(), 1U);
714 
715  TensorShape inputShapeShrink({inputShape[1], inputShape[2]});
716  TensorShape outputShapeShrink({outputShape[1], outputShape[2]});
717 
718  auto acl_input_shape_shrink = BuildArmComputeTensorShape(inputShapeShrink);
719  auto acl_output_shape_shrink = BuildArmComputeTensorShape(outputShapeShrink);
720 
721  const_cast<arm_compute::TensorInfo*>(&aclInputInfo)->set_tensor_shape(acl_input_shape_shrink);
722  inputLSTM = const_cast<arm_compute::TensorInfo*>(&aclInputInfo);
723 
724  const_cast<arm_compute::TensorInfo*>(&aclOutputInfo)->set_tensor_shape(acl_output_shape_shrink);
725  outputLSTM = const_cast<arm_compute::TensorInfo*>(&aclOutputInfo);
726  }
727  // If there is only one LSTM batch major batch, we will not concat, only permute.
728  // Set input of LSTM to be output of initial permute.
729  // Set output of LSTM to be first element of m_ConcatInputs & use that value later in permute.
730  // LSTM output cannot be > 2 dimensions so need to resize its TensorInfo.
731  else if (maxTime == 1 && !descriptor.m_TimeMajor)
732  {
733  TensorShape inputShape = GetTensorShape(aclPermuteOutInfo.tensor_shape(), 1U);
734  TensorShape inputShapeShrink({inputShape[1], inputShape[2]});
735  auto acl_input_shape_shrink = BuildArmComputeTensorShape(inputShapeShrink);
736  aclPermuteOutInfo.set_tensor_shape(acl_input_shape_shrink);
737  inputLSTM = &aclPermuteOutInfo;
738 
739  outputLSTM = const_cast<arm_compute::ITensorInfo*>(concatInputsTensorInfosPtr[i]);
740  }
741  // Batch major AND/OR 2+ LSTM batches so will use concat AND/OR permute later on.
742  else
743  {
744  inputLSTM = splitterOutputsTensorInfosPtr[i];
745  outputLSTM = const_cast<arm_compute::ITensorInfo*>(concatInputsTensorInfosPtr[i]);
746  }
747 
748  statusLSTM = arm_compute::NEQLSTMLayer::validate(inputLSTM,
749  &aclInputToForgetWeightsInfo,
750  &aclInputToCellWeightsInfo,
751  &aclInputToOutputWeightsInfo,
752  &aclRecurrentToForgetWeightsInfo,
753  &aclRecurrentToCellWeightsInfo,
754  &aclRecurrentToOutputWeightsInfo,
755  &aclForgetGateBiasInfo,
756  &aclCellBiasInfo,
757  &aclOutputGateBiasInfo,
758  &aclCellStateInInfo,
759  &aclOutputStateInInfo,
760  &aclCellStateOutInfo,
761  &aclOutputStateOutInfo,
762  outputLSTM,
763  lstm_params_info);
764  }
765 
766  //
767  // Concat validate
768  //
769 
770  // Expand dimensions of LSTM outputs adding one empty dimension to fit concatenate inputs.
771  TensorShape shape = GetTensorShape(concatInputsTensorInfosPtr[0]->tensor_shape(), 1U);
772  TensorShape shapeExpandTimeMajor({1, shape[0], shape[1]});
773  TensorShape shapeExpandBatchMajor({shape[0], 1, shape[1]});
774 
775  TensorInfo concatOutputTensorInfo = TensorInfo(output);
776  concatOutputTensorInfo.SetShape(timeMajorShapeOutput);
777  arm_compute::TensorInfo aclConcatOutputTensorInfo= BuildArmComputeTensorInfo(concatOutputTensorInfo);
778 
779  if (maxTime != 1) // ACL concat does not work with only one element to concatenate.
780  {
781  for (unsigned int i = 0; i < maxTime; ++i)
782  {
783  auto acl_shape_expand = BuildArmComputeTensorShape(shapeExpandTimeMajor);
784  concatInputsTensorInfos[i].set_tensor_shape(acl_shape_expand);
785  }
786 
787  unsigned int aclAxisConcat = CalcAclAxis(numberDimensions, dimension);
788  if (!descriptor.m_TimeMajor)
789  {
790  statusConcat = arm_compute::NEConcatenateLayer::validate(concatInputsTensorInfosPtr,
791  &aclConcatOutputTensorInfo,
792  aclAxisConcat);
793  }
794  else
795  {
796  statusConcat = arm_compute::NEConcatenateLayer::validate(concatInputsTensorInfosPtr,
797  &aclOutputInfo,
798  aclAxisConcat);
799  }
800  }
801  // If only one LSTM batch, we do not concat and/or permute.
802  // Must ensure final output info is expanded to correct batch major dimensions.
803  else
804  {
805  if (!descriptor.m_TimeMajor)
806  {
807  const_cast<arm_compute::TensorInfo*>(&aclInputInfo)->set_tensor_shape(
808  BuildArmComputeTensorShape(shapeExpandBatchMajor));
809  }
810  else
811  {
812  const_cast<arm_compute::TensorInfo*>(&aclInputInfo)->set_tensor_shape(
813  BuildArmComputeTensorShape(shapeExpandTimeMajor));
814  }
815  }
816 
817  //
818  // Permute validate
819  //
820  if (!descriptor.m_TimeMajor)
821  {
822  // Output now time major. Permute output back to batch major.
823  if (maxTime != 1)
824  {
825  statusPermute2 = arm_compute::NEPermute::validate(&aclConcatOutputTensorInfo,
826  &aclOutputInfo,
827  arm_compute::PermutationVector(0U, 2U, 1U));
828  }
829  else
830  {
831  statusPermute2 = arm_compute::NEPermute::validate(concatInputsTensorInfosPtr[0],
832  &aclOutputInfo,
833  arm_compute::PermutationVector(0U, 2U, 1U));
834  }
835  }
836 
837  auto okCode = arm_compute::ErrorCode::OK;
838  if (statusPermute1.error_code() == okCode &&
839  statusSplit.error_code() == okCode &&
840  statusLSTM .error_code() == okCode &&
841  statusConcat.error_code() == okCode &&
842  statusPermute2.error_code() == okCode)
843  {
844  return arm_compute::Status(arm_compute::ErrorCode::OK,
845  "All Unidirectional Sequence LSTM layer validate status OK.");
846  }
847  else
848  {
849  return arm_compute::Status(arm_compute::ErrorCode::RUNTIME_ERROR,
850  "Unidirectional Sequence LSTM layer validate status failed.");
851  }
852 }
Status
enumeration
Definition: Types.hpp:42
armnn::TensorShape GetTensorShape(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout)
Definition: TensorUtils.cpp:19

◆ NextIndex()

bool armnn::NextIndex ( const unsigned int  numDims,
const armnn::TensorShape dims,
std::vector< unsigned int > &  current 
)

Definition at line 19 of file Reduce.cpp.

Referenced by Reduce().

20 {
21  unsigned int carry = 1;
22 
23  for (unsigned int idx = numDims; idx-- > 0; )
24  {
25  unsigned int current_val = current[idx] + carry;
26  if (dims[idx] == current_val)
27  {
28  current[idx] = 0;
29  }
30  else
31  {
32  current[idx] = current_val;
33  carry = 0;
34  break;
35  }
36  }
37  return (carry == 0);
38 }

◆ NonMaxSuppression()

std::vector< unsigned int > NonMaxSuppression ( unsigned int  numBoxes,
const std::vector< float > &  boxCorners,
const std::vector< float > &  scores,
float  nmsScoreThreshold,
unsigned int  maxDetection,
float  nmsIouThreshold 
)

Definition at line 49 of file DetectionPostProcess.cpp.

References GenerateRangeK(), IntersectionOverUnion(), numeric_cast(), and TopKSort().

Referenced by DetectionPostProcess().

55 {
56  // Select boxes that have scores above a given threshold.
57  std::vector<float> scoresAboveThreshold;
58  std::vector<unsigned int> indicesAboveThreshold;
59  for (unsigned int i = 0; i < numBoxes; ++i)
60  {
61  if (scores[i] >= nmsScoreThreshold)
62  {
63  scoresAboveThreshold.push_back(scores[i]);
64  indicesAboveThreshold.push_back(i);
65  }
66  }
67 
68  // Sort the indices based on scores.
69  unsigned int numAboveThreshold = armnn::numeric_cast<unsigned int>(scoresAboveThreshold.size());
70  std::vector<unsigned int> sortedIndices = GenerateRangeK(numAboveThreshold);
71  TopKSort(numAboveThreshold, sortedIndices.data(), scoresAboveThreshold.data(), numAboveThreshold);
72 
73  // Number of output cannot be more than max detections specified in the option.
74  unsigned int numOutput = std::min(maxDetection, numAboveThreshold);
75  std::vector<unsigned int> outputIndices;
76  std::vector<bool> visited(numAboveThreshold, false);
77 
78  // Prune out the boxes with high intersection over union by keeping the box with higher score.
79  for (unsigned int i = 0; i < numAboveThreshold; ++i)
80  {
81  if (outputIndices.size() >= numOutput)
82  {
83  break;
84  }
85  if (!visited[sortedIndices[i]])
86  {
87  outputIndices.push_back(indicesAboveThreshold[sortedIndices[i]]);
88  for (unsigned int j = i + 1; j < numAboveThreshold; ++j)
89  {
90  unsigned int iIndex = indicesAboveThreshold[sortedIndices[i]] * 4;
91  unsigned int jIndex = indicesAboveThreshold[sortedIndices[j]] * 4;
92  if (IntersectionOverUnion(&boxCorners[iIndex], &boxCorners[jIndex]) > nmsIouThreshold)
93  {
94  visited[sortedIndices[j]] = true;
95  }
96  }
97  }
98  }
99  return outputIndices;
100 }
float IntersectionOverUnion(const float *boxI, const float *boxJ)
std::vector< unsigned int > GenerateRangeK(unsigned int k)
void TopKSort(unsigned int k, unsigned int *indices, const float *values, unsigned int numElement)
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ numeric_cast() [1/9]

std::enable_if_t< std::is_unsigned<Source>::value && std::is_unsigned<Dest>::value, Dest> armnn::numeric_cast ( Source  source)

Definition at line 35 of file NumericCast.hpp.

References ARMNN_NUMERIC_CAST_CHECK.

Referenced by AllocateOutputData(), ArgMinMax(), armnnTfLiteParser::AsFloatArray(), ClArgMinMaxWorkload::ClArgMinMaxWorkload(), ClSpaceToBatchNdWorkload::ClSpaceToBatchNdWorkload(), ClStridedSliceWorkload::ClStridedSliceWorkload(), ComputeReductionTensorShape(), armnnTfLiteParser::ComputeWrappedIndex(), OutputSlot::Connect(), Converter::ConvertOperation(), OnnxParserImpl::CreateNetworkFromString(), DetectionPostProcess(), RefL2NormalizationWorkload::ExecuteAsync(), armnnUtils::ExpandDims(), FakeQuantization(), Gather(), IDeserializer::DeserializerImpl::GetNetworkOutputBindingInfo(), OutputSlot::GetNumConnections(), SubgraphView::GetNumInputSlots(), SubgraphView::GetNumOutputSlots(), StridedSliceDescriptor::GetStartForAxis(), StridedSliceDescriptor::GetStopForAxis(), armnnUtils::GetUnsignedAxis(), PreluLayer::InferOutputShapes(), RefLayerSupport::IsMeanSupported(), LogSoftmax(), LoadedNetwork::MakeLoadedNetwork(), NeonArgMinMaxWorkload::NeonArgMinMaxWorkload(), NeonSpaceToBatchNdWorkload::NeonSpaceToBatchNdWorkload(), NeonStridedSliceWorkload::NeonStridedSliceWorkload(), NonMaxSuppression(), IDeserializer::DeserializerImpl::OutputShapeOfReshape(), TfLiteParserImpl::OutputShapeOfReshape(), Pooling2d(), Pooling3d(), Reduce(), ClContextSerializer::SaveSerializedToStream(), ISerializer::SerializerImpl::SaveSerializedToStream(), StridedSlice(), Graph::SubstituteSubgraph(), MeanQueueDescriptor::Validate(), ReduceLayer::ValidateTensorShapesFromInputs(), MeanLayer::ValidateTensorShapesFromInputs(), and WorkingMemHandle::WorkingMemHandle().

36 {
37 #if ENABLE_NUMERIC_CAST_CHECKS
38  if (source > std::numeric_limits<Dest>::max())
39  {
40  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting unsigned type to "
41  "narrower unsigned type. Overflow detected.");
42  }
43 #endif // ENABLE_NUMERIC_CAST_CHECKS
44 
45  return static_cast<Dest>(source);
46 }
#define ARMNN_NUMERIC_CAST_CHECK(cond, msg)
Definition: NumericCast.hpp:25

◆ numeric_cast() [2/9]

std::enable_if_t< std::is_signed<Source>::value && std::is_integral<Source>::value && std::is_signed<Dest>::value && std::is_integral<Dest>::value, Dest> armnn::numeric_cast ( Source  source)

Definition at line 58 of file NumericCast.hpp.

References ARMNN_NUMERIC_CAST_CHECK.

59 {
60 #if ENABLE_NUMERIC_CAST_CHECKS
61  if (source > std::numeric_limits<Dest>::max())
62  {
63  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting signed integral type to narrower signed type. "
64  "Overflow detected.");
65  }
66 
67  if (source < std::numeric_limits<Dest>::lowest())
68  {
69  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting signed integral type to narrower signed type. "
70  "Underflow detected.");
71  }
72 #endif // ENABLE_NUMERIC_CAST_CHECKS
73 
74  return static_cast<Dest>(source);
75 }
#define ARMNN_NUMERIC_CAST_CHECK(cond, msg)
Definition: NumericCast.hpp:25

◆ numeric_cast() [3/9]

std::enable_if_t< std::is_floating_point<Source>::value && std::is_floating_point<Dest>::value, Dest> armnn::numeric_cast ( Source  source)

Definition at line 83 of file NumericCast.hpp.

References ARMNN_NUMERIC_CAST_CHECK.

84 {
85 #if ENABLE_NUMERIC_CAST_CHECKS
86  if (source > std::numeric_limits<Dest>::max())
87  {
88  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting floating point type to narrower signed type. "
89  "Overflow detected.");
90  }
91 
92  if (source < std::numeric_limits<Dest>::lowest())
93  {
94  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting floating point type to narrower signed type. "
95  "Underflow detected.");
96  }
97 #endif // ENABLE_NUMERIC_CAST_CHECKS
98 
99  return static_cast<Dest>(source);
100 }
#define ARMNN_NUMERIC_CAST_CHECK(cond, msg)
Definition: NumericCast.hpp:25

◆ numeric_cast() [4/9]

std::enable_if_t< std::is_floating_point<Source>::value && std::is_signed<Dest>::value && std::is_integral<Dest>::value, Dest> armnn::numeric_cast ( Source  source)

Definition at line 109 of file NumericCast.hpp.

References ARMNN_NUMERIC_CAST_CHECK.

110 {
111 #if ENABLE_NUMERIC_CAST_CHECKS
112  if (source > static_cast<Source>(std::numeric_limits<Dest>::max()))
113  {
114  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting floating point type to narrower signed type. "
115  "Overflow detected.");
116  }
117 
118  if (source < static_cast<Source>(std::numeric_limits<Dest>::lowest()))
119  {
120  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting floating point type to narrower signed type. "
121  "Underflow detected.");
122  }
123 #endif // ENABLE_NUMERIC_CAST_CHECKS
124 
125  return static_cast<Dest>(source);
126 }
#define ARMNN_NUMERIC_CAST_CHECK(cond, msg)
Definition: NumericCast.hpp:25

◆ numeric_cast() [5/9]

std::enable_if_t< std::is_signed<Source>::value && std::is_integral<Source>::value && std::is_floating_point<Dest>::value, Dest> armnn::numeric_cast ( Source  source)

Definition at line 135 of file NumericCast.hpp.

References ARMNN_NUMERIC_CAST_CHECK.

136 {
137 #if ENABLE_NUMERIC_CAST_CHECKS
138  Dest sourceConverted = static_cast<Dest>(source);
139 
140  if (sourceConverted > std::numeric_limits<Dest>::max())
141  {
142  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting signed type to narrower floating point type. "
143  "Overflow detected.");
144  }
145 
146  if (sourceConverted < std::numeric_limits<Dest>::lowest())
147  {
148  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting signed type to narrower floating point type. "
149  "Underflow detected.");
150  }
151 #endif // ENABLE_NUMERIC_CAST_CHECKS
152 
153  return static_cast<Dest>(source);
154 }
#define ARMNN_NUMERIC_CAST_CHECK(cond, msg)
Definition: NumericCast.hpp:25

◆ numeric_cast() [6/9]

std::enable_if_t< std::is_signed<Dest>::value && std::is_integral<Dest>::value && std::is_unsigned<Source>::value, Dest> armnn::numeric_cast ( Source  sValue)

Definition at line 165 of file NumericCast.hpp.

References ARMNN_NUMERIC_CAST_CHECK.

166 {
167 #if ENABLE_NUMERIC_CAST_CHECKS
168  if (sValue > static_cast< typename std::make_unsigned<Dest>::type >(std::numeric_limits<Dest>::max()))
169  {
170  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting unsigned type to signed type. "
171  "Overflow detected.");
172  }
173 #endif // ENABLE_NUMERIC_CAST_CHECKS
174 
175  return static_cast<Dest>(sValue);
176 }
#define ARMNN_NUMERIC_CAST_CHECK(cond, msg)
Definition: NumericCast.hpp:25

◆ numeric_cast() [7/9]

std::enable_if_t< std::is_floating_point<Dest>::value && std::is_unsigned<Source>::value, Dest> armnn::numeric_cast ( Source  sValue)

Definition at line 184 of file NumericCast.hpp.

References ARMNN_NUMERIC_CAST_CHECK.

185 {
186 #if ENABLE_NUMERIC_CAST_CHECKS
187  if (static_cast<Dest>(sValue) > std::numeric_limits<Dest>::max())
188  {
189  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting unsigned type to floating point type. "
190  "Overflow detected.");
191  }
192 #endif // ENABLE_NUMERIC_CAST_CHECKS
193 
194  return static_cast<Dest>(sValue);
195 }
#define ARMNN_NUMERIC_CAST_CHECK(cond, msg)
Definition: NumericCast.hpp:25

◆ numeric_cast() [8/9]

std::enable_if_t< std::is_unsigned<Dest>::value && std::is_signed<Source>::value && std::is_integral<Source>::value, Dest> armnn::numeric_cast ( Source  sValue)

Definition at line 206 of file NumericCast.hpp.

References ARMNN_NUMERIC_CAST_CHECK.

207 {
208 #if ENABLE_NUMERIC_CAST_CHECKS
209  if (sValue < 0)
210  {
211  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting negative value to unsigned type. "
212  "Underflow detected.");
213  }
214 
215  if (static_cast< typename std::make_unsigned<Source>::type >(sValue) > std::numeric_limits<Dest>::max())
216  {
217  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting signed type to unsigned type. "
218  "Overflow detected.");
219  }
220 #endif // ENABLE_NUMERIC_CAST_CHECKS
221  return static_cast<Dest>(sValue);
222 }
#define ARMNN_NUMERIC_CAST_CHECK(cond, msg)
Definition: NumericCast.hpp:25

◆ numeric_cast() [9/9]

std::enable_if_t< std::is_unsigned<Dest>::value && std::is_floating_point<Source>::value, Dest> armnn::numeric_cast ( Source  sValue)

Definition at line 230 of file NumericCast.hpp.

References ARMNN_NUMERIC_CAST_CHECK.

231 {
232 #if ENABLE_NUMERIC_CAST_CHECKS
233  if (sValue < 0)
234  {
235  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting negative value to unsigned type. "
236  "Underflow detected.");
237  }
238 
239  if (sValue > static_cast<Source>(std::numeric_limits<Dest>::max()))
240  {
241  ARMNN_NUMERIC_CAST_CHECK(false, "numeric_cast failed casting floating point type to unsigned type. "
242  "Overflow detected.");
243  }
244 #endif // ENABLE_NUMERIC_CAST_CHECKS
245  return static_cast<Dest>(sValue);
246 }
#define ARMNN_NUMERIC_CAST_CHECK(cond, msg)
Definition: NumericCast.hpp:25

◆ Offset()

unsigned int armnn::Offset ( const TensorShape shape,
unsigned int  batch,
unsigned int  height,
unsigned int  width,
unsigned int  channels,
const DataLayoutIndexed dataLayout 
)
inline

Definition at line 19 of file BatchToSpaceNd.cpp.

References DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetDataLayout(), DataLayoutIndexed::GetHeightIndex(), and DataLayoutIndexed::GetWidthIndex().

Referenced by BatchToSpaceNd().

21 {
22  if (dataLayout.GetDataLayout() == DataLayout::NHWC)
23  {
24  return ((batch * shape[dataLayout.GetHeightIndex()] + height) * shape[dataLayout.GetWidthIndex()] + width) *
25  shape[dataLayout.GetChannelsIndex()] + channels;
26  }
27  else
28  {
29  return ((batch * shape[dataLayout.GetChannelsIndex()] + channels) *
30  shape[dataLayout.GetHeightIndex()] + height) *
31  shape[dataLayout.GetWidthIndex()] + width;
32  }
33 }
unsigned int GetWidthIndex() const
unsigned int GetHeightIndex() const
armnn::DataLayout GetDataLayout() const
unsigned int GetChannelsIndex() const

◆ operator<<() [1/9]

std::ostream& armnn::operator<< ( std::ostream &  os,
const std::vector< Compute > &  compute 
)
inline

Deprecated function that will be removed together with the Compute enum.

Definition at line 47 of file BackendId.hpp.

References GetComputeDeviceAsCString().

48 {
49  for (const Compute& comp : compute)
50  {
51  os << GetComputeDeviceAsCString(comp) << " ";
52  }
53  return os;
54 }
Compute
The Compute enum is now deprecated and it is now being replaced by BackendId.
Definition: BackendId.hpp:21
constexpr char const * GetComputeDeviceAsCString(Compute compute)
Deprecated function that will be removed together with the Compute enum.
Definition: BackendId.hpp:34

◆ operator<<() [2/9]

std::ostream& armnn::operator<< ( std::ostream &  os,
const std::set< Compute > &  compute 
)
inline

Deprecated function that will be removed together with the Compute enum.

Definition at line 58 of file BackendId.hpp.

References GetComputeDeviceAsCString().

59 {
60  for (const Compute& comp : compute)
61  {
62  os << GetComputeDeviceAsCString(comp) << " ";
63  }
64  return os;
65 }
Compute
The Compute enum is now deprecated and it is now being replaced by BackendId.
Definition: BackendId.hpp:21
constexpr char const * GetComputeDeviceAsCString(Compute compute)
Deprecated function that will be removed together with the Compute enum.
Definition: BackendId.hpp:34

◆ operator<<() [3/9]

std::ostream& armnn::operator<< ( std::ostream &  os,
const Compute compute 
)
inline

Deprecated function that will be removed together with the Compute enum.

Definition at line 69 of file BackendId.hpp.

References GetComputeDeviceAsCString().

70 {
71  os << GetComputeDeviceAsCString(compute);
72  return os;
73 }
constexpr char const * GetComputeDeviceAsCString(Compute compute)
Deprecated function that will be removed together with the Compute enum.
Definition: BackendId.hpp:34

◆ operator<<() [4/9]

std::ostream& armnn::operator<< ( std::ostream &  os,
const BackendVersion backendVersion 
)
inline

Definition at line 70 of file IBackendInternal.hpp.

References BackendVersion::m_Major, and BackendVersion::m_Minor.

71 {
72  os << "[" << backendVersion.m_Major << "." << backendVersion.m_Minor << "]";
73 
74  return os;
75 }

◆ operator<<() [5/9]

std::ostream& armnn::operator<< ( std::ostream &  os,
const BFloat16 b 
)
inline

Definition at line 122 of file BFloat16.hpp.

References BFloat16::ToFloat32(), and BFloat16::Val().

123 {
124  os << b.ToFloat32() << "(0x" << std::hex << b.Val() << ")";
125  return os;
126 }

◆ operator<<() [6/9]

std::ostream& armnn::operator<< ( std::ostream &  os,
const BackendId id 
)
inline

Definition at line 176 of file BackendId.hpp.

177 {
178  os << id.Get();
179  return os;
180 }

◆ operator<<() [7/9]

std::ostream& armnn::operator<< ( std::ostream &  os,
const TContainer< BackendId, TContainerTemplateArgs... > &  ids 
)

Definition at line 183 of file BackendId.hpp.

185 {
186  os << '[';
187  for (const auto& id : ids) { os << id << " "; }
188  os << ']';
189  return os;
190 }

◆ operator<<() [8/9]

std::ostream& armnn::operator<< ( std::ostream &  os,
Status  stat 
)
inline

Definition at line 297 of file TypesUtils.hpp.

References GetStatusAsCString().

298 {
299  os << GetStatusAsCString(stat);
300  return os;
301 }
constexpr char const * GetStatusAsCString(Status status)
Definition: TypesUtils.hpp:17

◆ operator<<() [9/9]

std::ostream& armnn::operator<< ( std::ostream &  os,
const armnn::TensorShape shape 
)
inline

Definition at line 304 of file TypesUtils.hpp.

References Dequantize, TensorShape::GetDimensionality(), TensorShape::GetDimensionSpecificity(), TensorShape::GetNumDimensions(), NotSpecified, and Quantize.

305 {
306  os << "[";
307  if (shape.GetDimensionality() != Dimensionality::NotSpecified)
308  {
309  for (uint32_t i = 0; i < shape.GetNumDimensions(); ++i)
310  {
311  if (i != 0)
312  {
313  os << ",";
314  }
315  if (shape.GetDimensionSpecificity(i))
316  {
317  os << shape[i];
318  }
319  else
320  {
321  os << "?";
322  }
323  }
324  }
325  else
326  {
327  os << "Dimensionality Not Specified";
328  }
329  os << "]";
330  return os;
331 }
Dimensionality GetDimensionality() const
Function that returns the tensor type.
Definition: Tensor.hpp:92
bool GetDimensionSpecificity(unsigned int i) const
Gets information about if the dimension size has been specified or not.
Definition: Tensor.cpp:211
unsigned int GetNumDimensions() const
Function that returns the tensor rank.
Definition: Tensor.cpp:174

◆ Optimize() [1/2]

IOptimizedNetworkPtr Optimize ( const INetwork network,
const std::vector< BackendId > &  backendPreferences,
const IDeviceSpec deviceSpec,
const OptimizerOptions options = OptimizerOptions(),
Optional< std::vector< std::string > &>  messages = EmptyOptional() 
)

Create an optimized version of the network.

Parameters
networkINetwork description of the network to be optimized.
backendPreferencesThe choice of the backend ordered by user preferences.
deviceSpecDeviceSpec object as queried from the runtime. See IRuntime::GetDeviceSpec()
messagesIf there are failures or warnings a string describing same will be added to the vector
optionsOptimizerOptions object with optimizer configuration options
Returns
An IOptimizedNetworkPtr interface to the optimized network, throws an exception derived from armnn::Exception if process fails.
Examples:
AsyncExecutionSample.cpp, CustomMemoryAllocatorSample.cpp, DynamicSample.cpp, and SimpleSample.cpp.

Definition at line 1850 of file Network.cpp.

References BackendOptions::Var::AsBool(), IOptimizedNetwork::Optimize, ParseOptions(), and INetwork::pNetworkImpl.

Referenced by ArmnnDriverImpl::PrepareArmnnModel(), ArmnnDriverImpl::PrepareArmnnModelFromCache(), ParserPrototxtFixture< TParser >::Setup(), ParserPrototxtFixture< TParser >::SetupOptimizedNetwork(), and IMemoryOptimizerStrategy::~IMemoryOptimizerStrategy().

1855 {
1856  return Optimize(inNetwork.pNetworkImpl->GetGraph(),
1857  backendPreferences,
1858  deviceSpec,
1859  options,
1860  messages);
1861 }
IOptimizedNetworkPtr Optimize(const INetwork &network, const std::vector< BackendId > &backendPreferences, const IDeviceSpec &deviceSpec, const OptimizerOptions &options=OptimizerOptions(), Optional< std::vector< std::string > &> messages=EmptyOptional())
Create an optimized version of the network.
Definition: Network.cpp:1850

◆ Optimize() [2/2]

IOptimizedNetworkPtr Optimize ( const Graph inGraph,
const std::vector< BackendId > &  backendPreferences,
const IDeviceSpec deviceSpec,
const OptimizerOptions options,
Optional< std::vector< std::string > &>  messages = EmptyOptional() 
)

Create an optimized version of the network.

Parameters
inGraphGraph to be optimized.
backendPreferencesThe choice of the backend ordered by user preferences.
deviceSpecDeviceSpec object as queried from the runtime. See IRuntime::GetDeviceSpec()
messagesIf there are failures or warnings a string describing same will be added to the vector
optionsOptimizerOptions object with optimizer configuration options
Returns
An IOptimizedNetworkPtr interface to the optimized network, throws an exception derived from armnn::Exception if process fails.

Definition at line 1653 of file Network.cpp.

References Graph::AddCompatibilityLayers(), ApplyBackendOptimizations(), ARMNN_LOG, ARMNN_SCOPED_PROFILING_EVENT, AssignBackends(), Graph::begin(), armnnUtils::Filesystem::CreateDirectory(), CreateSupportedBackends(), debug, IOptimizedNetwork::Destroy(), Graph::end(), BackendSettings::GetAvailablePreferredBackends(), ProfilerManager::GetInstance(), Graph::GetProfiler(), InferAndValidate, Graph::InferTensorInfos(), IOptimizedNetwork::IOptimizedNetwork(), OptimizerOptions::m_Debug, OptimizerOptions::m_DebugToFile, OptimizationResult::m_Error, OptimizerOptions::m_ExportEnabled, OptimizerOptions::m_ImportEnabled, OptimizerOptions::m_ModelOptions, OptimizerOptions::m_ProfilingEnabled, OptimizerOptions::m_ReduceFp32ToBf16, OptimizerOptions::m_ReduceFp32ToFp16, OptimizerOptions::m_shapeInferenceMethod, BackendSettings::m_SupportedBackends, MakeOptimizations(), Optimizer::Pass(), IOptimizedNetwork::pOptimizedNetworkImpl, ProfilerManager::RegisterProfiler(), ReportError(), SelectTensorHandleStrategy(), OptimizerOptions::ToString(), Undefined, ValidateOnly, and Graph::VerifyConstantLayerSetTensorInfo().

1658 {
1659  ARMNN_LOG(debug) << options.ToString();
1660 
1661  // Enable profiling
1662  auto profiler = inGraph.GetProfiler();
1663  ProfilerManager::GetInstance().RegisterProfiler(profiler.get());
1664  profiler->EnableProfiling(options.m_ProfilingEnabled);
1665 
1666  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Optimizer");
1667  if (backendPreferences.empty())
1668  {
1669  throw InvalidArgumentException("Invoked Optimize with no backends specified");
1670  }
1671 
1672  if (options.m_ReduceFp32ToFp16 && options.m_ReduceFp32ToBf16)
1673  {
1674  throw InvalidArgumentException("BFloat16 and Float16 optimization cannot be enabled at the same time.");
1675  }
1676 
1677  // Ensure TensorInfo is set on all output slots of ConstantLayers in the graph
1678  inGraph.VerifyConstantLayerSetTensorInfo();
1679 
1680  std::unique_ptr<Graph> graph = std::make_unique<Graph>(inGraph);
1681 
1682  // We need to pass on the information about whether import and export is enabled to the LoadNetwork phase.
1683  // The mechanism to do that is to add model options to the optimized network.
1684  armnn::BackendOptions importExport("Global",
1685  {{"ImportEnabled", options.m_ImportEnabled},
1686  {"ExportEnabled", options.m_ExportEnabled}});
1687  ModelOptions optimizedOptions(options.m_ModelOptions);
1688  optimizedOptions.push_back(importExport);
1689 
1690  auto optNet = IOptimizedNetworkPtr(new IOptimizedNetwork(std::move(graph), optimizedOptions),
1691  &IOptimizedNetwork::Destroy);
1692 
1693  IOptimizedNetwork* optNetObjPtr = optNet.get();
1694 
1695  // Get the optimized graph
1696  Graph& optGraph = optNetObjPtr->pOptimizedNetworkImpl->GetGraph();
1697 
1698  if(options.m_shapeInferenceMethod == ShapeInferenceMethod::InferAndValidate)
1699  {
1700  // Infer the tensor infos for all output slots. Throws an exception on failure
1701  optGraph.InferTensorInfos();
1702  }
1703 
1704  // Perform AddBroadcastReshapeLayer optimisation
1705  using namespace optimizations;
1706  Optimizer::Pass(optGraph, MakeOptimizations(AddBroadcastReshapeLayer()));
1707 
1708  if(options.m_shapeInferenceMethod == ShapeInferenceMethod::ValidateOnly)
1709  {
1710  // Validate the tensor infos for all output slots. Throws an exception on failure
1711  optGraph.InferTensorInfos();
1712  }
1713 
1714  // Need to FusePermuteIntoConstantLayer before FoldPadIntoDepthwiseConvolution2d or
1715  // FuseBatchNormIntoDepthwiseConvolution2D optimizations are called.
1716  Optimizer::Pass(optGraph, MakeOptimizations(FusePermuteIntoConstLayer()));
1717 
1718  // Perform optimisation passes
1719  Optimizer::Pass(optGraph, MakeOptimizations(SquashEqualPermuteSiblings(),
1724  MovePermuteUp(),
1725  MoveTransposeUp(),
1726  PermuteAsReshape(),
1739 
1740  // If Fp32 to Fp16 optimization is set convert Fp32 network to Fp16
1741  if (options.m_ReduceFp32ToFp16)
1742  {
1743  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Optimizer_ReduceFp32ToFp16");
1744  Optimizer::Pass(optGraph, MakeOptimizations(Fp32NetworkToFp16Converter()));
1745  Optimizer::Pass(optGraph, MakeOptimizations(ConvertConstantsFloatToHalf()));
1746  }
1747 
1748  // If Fp32 to Bf16 optimization is set convert Fp32 network to Bf16
1749  // Convert input of Convolution2d and FullyConnected from Fp32 to Bf16
1750  // Only Constant weight of Convolution2d and FullyConnected are converted from Fp32 to Bf16
1751  // Constant and Fp32ToBf16 layers will also be fused so conversion is no longer needed at inference time
1752  if (options.m_ReduceFp32ToBf16)
1753  {
1754  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Optimizer_ReduceFp32ToBf16");
1755  Optimizer::Pass(optGraph, MakeOptimizations(Fp32NetworkToBf16Converter()));
1756  Optimizer::Pass(optGraph, MakeOptimizations(FuseConversionLayersIntoConstLayers()));
1757  }
1758 
1759  // Initialize backend settings
1760  BackendSettings backendSettings(backendPreferences, deviceSpec);
1761  if (backendSettings.GetAvailablePreferredBackends().empty())
1762  {
1763  std::stringstream failureMsg;
1764  failureMsg << "None of the preferred backends " << backendPreferences
1765  << " are supported. Current platform provides " << backendSettings.m_SupportedBackends;
1766  ReportError(failureMsg.str(), messages);
1767  throw InvalidArgumentException(failureMsg.str());
1768  }
1769 
1770  // Create a map to temporarily hold initialized backend objects
1771  TensorHandleFactoryRegistry tensorHandleFactoryRegistry;
1772  BackendsMap backends = CreateSupportedBackends(tensorHandleFactoryRegistry, backendSettings);
1773 
1774  // Assign an available backend to each layer
1775  Graph::Iterator firstLayer = optGraph.begin();
1776  Graph::Iterator lastLayer = optGraph.end();
1777  OptimizationResult assignBackendsResult = AssignBackends(optNetObjPtr->pOptimizedNetworkImpl.get(),
1778  backendSettings,
1779  firstLayer,
1780  lastLayer,
1781  messages);
1782  if (assignBackendsResult.m_Error)
1783  {
1784  // Failed to assign a backend to each layer
1785  throw InvalidArgumentException("Failed to assign a backend to each layer");
1786  }
1787 
1788  Optimizer::Pass(optGraph, MakeOptimizations(OptimizeInverseConversionsFp16(),
1790 
1791  // Apply the backend-specific optimizations
1792  OptimizationResult backendOptimizationResult = ApplyBackendOptimizations(optNetObjPtr->pOptimizedNetworkImpl.get(),
1793  backendSettings,
1794  backends,
1795  options.m_ModelOptions,
1796  messages);
1797  if (backendOptimizationResult.m_Error)
1798  {
1799  // Failed to apply the backend-specific optimizations
1800  throw InvalidArgumentException("Failed to apply the backend-specific optimizations");
1801  }
1802 
1803  // Convert constants
1804  {
1805  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Optimizer_ConvertConstants");
1806  Optimizer::Pass(optGraph, MakeOptimizations(ConvertConstantsFloatToHalf()));
1807  Optimizer::Pass(optGraph, MakeOptimizations(ConvertConstantsHalfToFloat()));
1808 
1809  // Once the constants are converted we can now safely call RedirectMembersToConstantInputs
1810  Optimizer::Pass(optGraph, MakeOptimizations(RedirectMembersToConstantInputs()));
1811  }
1812 
1813  // This must occur after all topological changes to the graph and any redirection of variables
1814  // If the debug flag is set, then insert a DebugLayer after each layer
1815  // Doing this after applying the backend optimizations as they might have changed some layers
1816  if (options.m_Debug && !options.m_DebugToFile)
1817  {
1818  Optimizer::Pass(optGraph, MakeOptimizations(InsertDebugLayer()));
1819  }
1820  else if (options.m_DebugToFile)
1821  {
1822  // Setup the output file path
1823  armnnUtils::Filesystem::CreateDirectory("/ArmNNIntermediateLayerOutputs");
1824  Optimizer::Pass(optGraph, MakeOptimizations(InsertDebugToFileLayer()));
1825  }
1826 
1827  // Calculate the compatibility strategies for tensor handles
1828  OptimizationResult strategyResult = SelectTensorHandleStrategy(optGraph,
1829  backends,
1830  tensorHandleFactoryRegistry,
1831  options.m_ImportEnabled,
1832  options.m_ExportEnabled,
1833  messages);
1834 
1835  if (strategyResult.m_Error)
1836  {
1837  // Failed to apply the backend-specific optimizations
1838  return IOptimizedNetworkPtr(nullptr, &IOptimizedNetwork::Destroy);
1839  }
1840 
1841  // Based on the tensor handle strategy determined above, insert copy layers where required.
1842  {
1843  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Optimizer_AddCompatibilityLayers");
1844  optGraph.AddCompatibilityLayers(backends, tensorHandleFactoryRegistry);
1845  }
1846 
1847  return optNet;
1848 }
OptimizeForConnection< Layer, PermuteLayer, SquashEqualSiblingsImpl< PermuteLayer > > SquashEqualPermuteSiblings
void ReportError(const std::string &errorMessage, Optional< std::vector< std::string > &> errorMessages)
Definition: Network.cpp:531
OptimizeForConnection< PermuteLayer, PermuteLayer, OptimizeInversePermutesImpl< PermuteLayer > > OptimizeInversePermutes
OptimizeForExclusiveConnection< PadLayer, Convolution2dLayer, pad_fold::FoldPadIntoConvolution2dImpl > FoldPadIntoConvolution2d
Optimizer::Optimizations MakeOptimizations(Args &&... args)
Definition: Optimizer.hpp:43
OptimizeForConnection< TransposeLayer, TransposeLayer, OptimizeInversePermutesImpl< TransposeLayer > > OptimizeInverseTransposes
OptimizeForExclusiveConnection< PadLayer, DepthwiseConvolution2dLayer, pad_fold::FoldPadIntoDepthwiseConvolution2dImpl > FoldPadIntoDepthwiseConvolution2d
OptimizeForConnection< TransposeLayer, BatchToSpaceNdLayer, PermuteAndBatchToSpaceAsDepthToSpaceImpl< TransposeLayer > > TransposeAndBatchToSpaceAsDepthToSpace
OptimizeForExclusiveConnection< DepthwiseConvolution2dLayer, BatchNormalizationLayer, FuseBatchNorm< DepthwiseConvolution2dLayer, armnn::DataType::Float32 > > FuseBatchNormIntoDepthwiseConvolution2DFloat32
std::vector< BackendOptions > ModelOptions
OptimizeForExclusiveConnection< DepthwiseConvolution2dLayer, BatchNormalizationLayer, FuseBatchNorm< DepthwiseConvolution2dLayer, armnn::DataType::Float16 > > FuseBatchNormIntoDepthwiseConvolution2DFloat16
OptimizeForType< Layer, RedirectMembersToConstantInputsImpl > RedirectMembersToConstantInputs
OptimizeForExclusiveConnection< Convolution2dLayer, BatchNormalizationLayer, FuseBatchNorm< Convolution2dLayer, armnn::DataType::Float16 > > FuseBatchNormIntoConvolution2DFloat16
OptimizeForExclusiveConnection< Convolution2dLayer, BatchNormalizationLayer, FuseBatchNorm< Convolution2dLayer, armnn::DataType::Float32 > > FuseBatchNormIntoConvolution2DFloat32
#define ARMNN_LOG(severity)
Definition: Logging.hpp:205
OptimizeForConnection< Layer, ReshapeLayer, SquashEqualSiblingsImpl< ReshapeLayer > > SquashEqualReshapeSiblings
OptimizeForConnection< Layer, TransposeLayer, MoveTransposeUpImpl > MoveTransposeUp
OptimizeForType< Layer, AddDebugImpl > InsertDebugLayer
Definition: AddDebug.hpp:53
OptimizeForConnection< ReshapeLayer, ReshapeLayer, OptimizeConsecutiveReshapesImpl > OptimizeConsecutiveReshapes
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
OptimizeForConnection< ConvertFp16ToFp32Layer, ConvertFp32ToFp16Layer, OptimizeInverseConversionsImpl > OptimizeInverseConversionsFp16
OptimizeForConnection< ConstantLayer, PermuteLayer, ConvertConstPermuteLayersToConstLayers > FusePermuteIntoConstLayer
OptimizeForConnection< PermuteLayer, BatchToSpaceNdLayer, PermuteAndBatchToSpaceAsDepthToSpaceImpl< PermuteLayer > > PermuteAndBatchToSpaceAsDepthToSpace
OptimizeForConnection< Layer, PermuteLayer, MovePermuteUpImpl > MovePermuteUp
ConvertConstants< Float32ToFloat16, IsFloat16Layer > ConvertConstantsFloatToHalf
OptimizeForType< TransposeLayer, TransposeAsReshapeImpl > TransposeAsReshape
OptimizationResult ApplyBackendOptimizations(OptimizedNetworkImpl *optNetObjPtr, BackendSettings &backendSettings, BackendsMap &backends, const ModelOptions &modelOptions, Optional< std::vector< std::string > &> errMessages)
Definition: Network.cpp:1121
std::string CreateDirectory(std::string sPath)
Returns full path to temporary folder.
Definition: Filesystem.cpp:46
OptimizationResult SelectTensorHandleStrategy(Graph &optGraph, BackendsMap &backends, TensorHandleFactoryRegistry &registry, bool importEnabled, bool exportEnabled, Optional< std::vector< std::string > &> errMessages)
Definition: Network.cpp:1583
std::unique_ptr< IOptimizedNetwork, void(*)(IOptimizedNetwork *network)> IOptimizedNetworkPtr
Definition: INetwork.hpp:254
OptimizeForType< PermuteLayer, PermuteAsReshapeImpl > PermuteAsReshape
OptimizeForConnection< Layer, TransposeLayer, SquashEqualSiblingsImpl< TransposeLayer > > SquashEqualTransposeSiblings
Struct for the users to pass backend specific options.
ConvertConstants< Float16ToFloat32, IsFloat32Layer > ConvertConstantsHalfToFloat
BackendsMap CreateSupportedBackends(TensorHandleFactoryRegistry &handleFactoryRegistry, BackendSettings &backendSettings)
Definition: Network.cpp:1102
OptimizeForConnection< ConvertFp32ToFp16Layer, ConvertFp16ToFp32Layer, OptimizeInverseConversionsImpl > OptimizeInverseConversionsFp32
OptimizeForExclusiveConnection< PadLayer, Pooling2dLayer, pad_fold::FoldPadIntoPooling2dImpl > FoldPadIntoPooling2d
OptimizeForType< Layer, ConvertFp32NetworkToFp16Impl > Fp32NetworkToFp16Converter
OptimizeForType< Layer, AddBroadcastReshapeLayerImpl > AddBroadcastReshapeLayer
OptimizeForConnection< ConstantLayer, DequantizeLayer, ConvertConstDequantisationLayersToConstLayersImpl > ConvertConstDequantisationLayersToConstLayers
OptimizeForType< Layer, ConvertFp32NetworkToBf16Impl > Fp32NetworkToBf16Converter
OptimizeForConnection< ConstantLayer, ConvertFp32ToBf16Layer, FuseConvertFp32ToBf16IntoConstLayers > FuseConversionLayersIntoConstLayers
OptimizeForType< Layer, AddDebugToFileImpl > InsertDebugToFileLayer
Definition: AddDebug.hpp:54
OptimizationResult AssignBackends(OptimizedNetworkImpl *optNetObjPtr, BackendSettings &backendSettings, SubgraphView &subgraph, Optional< std::vector< std::string > &> errMessages)
Definition: Network.cpp:1088
std::map< BackendId, std::unique_ptr< class IBackendInternal > > BackendsMap
Definition: Network.hpp:293

◆ Pad()

void Pad ( const TensorInfo inputInfo,
const TensorInfo outputInfo,
const ITensorHandle inputHandle,
ITensorHandle outputHandle,
const PadQueueDescriptor data 
)

Definition at line 39 of file Pad.cpp.

References Decoder< IType >::Get(), TensorShape::GetNumDimensions(), TensorInfo::GetNumElements(), TensorInfo::GetShape(), PadDescriptor::m_PadList, PadDescriptor::m_PadValue, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, ITensorHandle::Map(), and Encoder< IType >::Set().

44 {
45  auto padList = data.m_Parameters.m_PadList;
46  auto padValue = data.m_Parameters.m_PadValue;
47 
48  unsigned int numOutputElements = outputInfo.GetNumElements();
49 
50  TensorShape outputShape = outputInfo.GetShape();
51  TensorShape inputShape = inputInfo.GetShape();
52 
53  unsigned int numInputDimensions = inputShape.GetNumDimensions();
54 
55 #ifndef NDEBUG
56 
57  unsigned int numOutputDimensions = outputShape.GetNumDimensions();
58  assert(numInputDimensions == numOutputDimensions);
59 
60 #endif
61 
62  unsigned int inputBatches = 0;
63  unsigned int inputChannels = 0;
64  unsigned int inputHeight = 0;
65  unsigned int inputWidth = 0;
66 
67  unsigned int outputChannels = 0;
68  unsigned int outputHeight = 0;
69  unsigned int outputWidth = 0;
70 
71  auto inputData = MakeDecoder<float>(inputInfo, inputHandle->Map());
72  auto outData = MakeEncoder<float>(outputInfo, outputHandle->Map());
73 
74  // Fill the output tensor with Pad value first
75  if (outputInfo.IsQuantized())
76  {
77  // For Quantized types Pad Value should not be quantized with scale and offset of the tensor info
78  auto temporaryInfo = TensorInfo(outputInfo.GetShape(), outputInfo.GetDataType(), 1.0f, 0);
79  auto outputData = MakeEncoder<float>(temporaryInfo, outputHandle->Map());
80  FillOutputWithPadValue(*outputData, padValue, numOutputElements);
81  }
82  else
83  {
84  FillOutputWithPadValue(*outData, padValue, numOutputElements);
85  }
86 
87  Decoder<float>& input = *inputData;
88  Encoder<float>& output = *outData;
89 
90  switch(numInputDimensions) {
91 
92  case 1:
93  inputWidth = inputShape[0];
94  for (unsigned int w = 0; w < inputWidth ; w++)
95  {
96  input[w];
97  auto inputValue = input.Get();
98  auto outputIndex = w + std::get<0>(padList[0]);
99  output[outputIndex];
100  output.Set(inputValue);
101  }
102 
103  break;
104  case 2 :
105  inputHeight = inputShape[0];
106  inputWidth = inputShape[1];
107  outputWidth = outputShape[1];
108 
109  for (unsigned int h = 0; h < inputHeight; h++)
110  {
111  for (unsigned int w = 0; w < inputWidth ; w++)
112  {
113  input[h * inputWidth + w];
114  auto inputValue = input.Get();
115  auto outputIndex = (h + std::get<0>(padList[0])) * outputWidth + (w + std::get<0>(padList[1]));
116  output[outputIndex];
117  output.Set(inputValue);
118  }
119  }
120 
121  break;
122  case 3 :
123  inputChannels = inputShape[0];
124  inputHeight = inputShape[1];
125  inputWidth = inputShape[2];
126  outputHeight = outputShape[1];
127  outputWidth = outputShape[2];
128 
129  for (unsigned int c = 0; c < inputChannels; c++)
130  {
131  for (unsigned int h = 0; h < inputHeight; h++)
132  {
133  for (unsigned int w = 0; w < inputWidth ; w++)
134  {
135  input[c * inputHeight * inputWidth + h * inputWidth + w];
136  auto inputValue = input.Get();
137  auto outputIndex = (c + std::get<0>(padList[0])) * outputHeight * outputWidth
138  + (h + std::get<0>(padList[1])) * outputWidth
139  + (w + std::get<0>(padList[2]));
140  output[outputIndex];
141  output.Set(inputValue);
142  }
143  }
144  }
145 
146  break;
147  case 4 :
148  inputBatches = inputShape[0];
149  inputChannels = inputShape[1];
150  inputHeight = inputShape[2];
151  inputWidth = inputShape[3];
152  outputChannels = outputShape[1];
153  outputHeight = outputShape[2];
154  outputWidth = outputShape[3];
155 
156  for (unsigned int b = 0; b < inputBatches; b++)
157  {
158  for (unsigned int c = 0; c < inputChannels; c++)
159  {
160  for (unsigned int h = 0; h < inputHeight; h++)
161  {
162  for (unsigned int w = 0; w < inputWidth ; w++)
163  {
164  input[b * inputChannels * inputHeight * inputWidth
165  + c * inputHeight * inputWidth
166  + h * inputWidth
167  + w];
168  auto inputValue = input.Get();
169  auto outputIndex = (b + std::get<0>(padList[0]))
170  * outputChannels * outputHeight * outputWidth
171  + (c + std::get<0>(padList[1])) * outputHeight * outputWidth
172  + (h + std::get<0>(padList[2])) * outputWidth
173  + (w + std::get<0>(padList[3]));
174  output[outputIndex];
175  output.Set(inputValue);
176  }
177  }
178  }
179  }
180 
181  break;
182  default :
183  break;
184  }
185 }

◆ ParseBoolean()

bool armnn::ParseBoolean ( const BackendOptions::Var value,
bool  defaultValue 
)

Definition at line 97 of file ClBackendContext.cpp.

References BackendOptions::Var::AsBool(), and BackendOptions::Var::IsBool().

98 {
99  if (value.IsBool())
100  {
101  return value.AsBool();
102  }
103  return defaultValue;
104 }

◆ ParseBooleanBackendOption()

bool armnn::ParseBooleanBackendOption ( const armnn::BackendOptions::Var value,
bool  defaultValue 
)
inline

Definition at line 312 of file BackendOptions.hpp.

References BackendOptions::Var::AsBool(), and BackendOptions::Var::IsBool().

313 {
314  if (value.IsBool())
315  {
316  return value.AsBool();
317  }
318  return defaultValue;
319 }
bool AsBool() const
Value getters.
bool IsBool() const
Type getters.

◆ ParseComputeDevice()

constexpr armnn::Compute armnn::ParseComputeDevice ( const char *  str)

Deprecated function that will be removed together with the Compute enum.

Definition at line 182 of file TypesUtils.hpp.

References CpuAcc, CpuRef, GpuAcc, StrEqual(), and Undefined.

183 {
184  if (armnn::StrEqual(str, "CpuAcc"))
185  {
186  return armnn::Compute::CpuAcc;
187  }
188  else if (armnn::StrEqual(str, "CpuRef"))
189  {
190  return armnn::Compute::CpuRef;
191  }
192  else if (armnn::StrEqual(str, "GpuAcc"))
193  {
194  return armnn::Compute::GpuAcc;
195  }
196  else
197  {
199  }
200 }
CPU Execution: Reference C++ kernels.
constexpr bool StrEqual(const char *strA, const char(&strB)[N])
Definition: TypesUtils.hpp:170
GPU Execution: OpenCL: ArmCompute.
CPU Execution: NEON: ArmCompute.

◆ ParseFile()

std::string armnn::ParseFile ( const BackendOptions::Var value,
std::string  defaultValue 
)

Definition at line 106 of file ClBackendContext.cpp.

References BackendOptions::Var::AsString(), and BackendOptions::Var::IsString().

Referenced by ClBackendContext::ClBackendContext(), and ClBackendModelContext::ClBackendModelContext().

107 {
108  if (value.IsString())
109  {
110  return value.AsString();
111  }
112  return defaultValue;
113 }

◆ ParseIntBackendOption()

int armnn::ParseIntBackendOption ( const armnn::BackendOptions::Var value,
int  defaultValue 
)
inline

Definition at line 330 of file BackendOptions.hpp.

References BackendOptions::Var::AsInt(), and BackendOptions::Var::IsInt().

Referenced by ClBackendModelContext::ClBackendModelContext().

331 {
332  if (value.IsInt())
333  {
334  return value.AsInt();
335  }
336  return defaultValue;
337 }

◆ ParseOptions()

void armnn::ParseOptions ( const std::vector< BackendOptions > &  options,
BackendId  backend,
f 
)

Definition at line 297 of file BackendOptions.hpp.

References BackendOptions::BackendOption::GetName(), and BackendOptions::BackendOption::GetValue().

Referenced by ClBackendContext::ClBackendContext(), ClBackendModelContext::ClBackendModelContext(), NeonBackendModelContext::NeonBackendModelContext(), Optimize(), and RuntimeImpl::RuntimeImpl().

298 {
299  for (auto optionsGroup : options)
300  {
301  if (optionsGroup.GetBackendId() == backend)
302  {
303  for (size_t i=0; i < optionsGroup.GetOptionCount(); i++)
304  {
305  const BackendOptions::BackendOption option = optionsGroup.GetOption(i);
306  f(option.GetName(), option.GetValue());
307  }
308  }
309  }
310 }

◆ ParseStringBackendOption()

std::string armnn::ParseStringBackendOption ( const armnn::BackendOptions::Var value,
std::string  defaultValue 
)
inline

Definition at line 321 of file BackendOptions.hpp.

References BackendOptions::Var::AsString(), and BackendOptions::Var::IsString().

322 {
323  if (value.IsString())
324  {
325  return value.AsString();
326  }
327  return defaultValue;
328 }
std::string AsString() const

◆ ParseTuningLevel()

TuningLevel armnn::ParseTuningLevel ( const BackendOptions::Var value,
TuningLevel  defaultValue 
)

Definition at line 79 of file ClBackendContext.cpp.

References ARMNN_LOG, BackendOptions::Var::AsInt(), Exhaustive, BackendOptions::Var::IsInt(), None, and warning.

Referenced by ClBackendContext::ClBackendContext().

80 {
81  if (value.IsInt())
82  {
83  int v = value.AsInt();
84  if (v > static_cast<int>(TuningLevel::Exhaustive) ||
85  v < static_cast<int>(TuningLevel::None))
86  {
87  ARMNN_LOG(warning) << "Invalid GpuAcc tuning level ("<< v << ") selected. "
88  "Using default(" << static_cast<int>(defaultValue) << ")";
89  } else
90  {
91  return static_cast<TuningLevel>(v);
92  }
93  }
94  return defaultValue;
95 }
#define ARMNN_LOG(severity)
Definition: Logging.hpp:205

◆ PermuteTensor()

armnn::ConstTensor PermuteTensor ( const ConstTensorHandle tensor,
const PermutationVector permutationVector,
void *  permuteBuffer 
)

Definition at line 18 of file WorkloadUtils.cpp.

References ARMNN_ASSERT_MSG, ConstTensorHandle::GetConstTensor(), TensorInfo::GetDataType(), GetDataTypeSize(), TensorInfo::GetNumBytes(), TensorInfo::GetShape(), PermutationVector::GetSize(), ConstTensorHandle::GetTensorInfo(), Permute, armnnUtils::Permuted(), and TensorInfo::SetConstant().

Referenced by Convert1HWOTensorToAcl(), Convert1HWOtoMIHW(), ConvertWeightTensorFromArmnnToAcl(), and GatherTensorHandlePairs().

20 {
21  ARMNN_ASSERT_MSG(tensor, "Invalid input tensor");
22  ARMNN_ASSERT_MSG(permuteBuffer, "Invalid permute buffer");
23 
24  TensorInfo tensorInfo = tensor->GetTensorInfo();
25 
26  if (permutationVector.GetSize() > 0)
27  {
28  tensorInfo = armnnUtils::Permuted(tensorInfo, permutationVector);
29  armnnUtils::Permute(tensorInfo.GetShape(), permutationVector,
30  tensor->GetConstTensor<void>(), permuteBuffer,
31  GetDataTypeSize(tensorInfo.GetDataType()));
32  }
33  else
34  {
35  ::memcpy(permuteBuffer, tensor->GetConstTensor<void>(), tensorInfo.GetNumBytes());
36  }
37  tensorInfo.SetConstant(true);
38  return ConstTensor(tensorInfo, permuteBuffer);
39 }
void Permute(const armnn::TensorShape &dstShape, const armnn::PermutationVector &mappings, const void *src, void *dst, size_t dataTypeSize)
Definition: Permute.cpp:131
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
armnn::TensorShape Permuted(const armnn::TensorShape &srcShape, const armnn::PermutationVector &mappings)
Definition: Permute.cpp:98
constexpr unsigned int GetDataTypeSize(DataType dataType)
Definition: TypesUtils.hpp:151

◆ PolymorphicDowncast()

DestType armnn::PolymorphicDowncast ( SourceType *  value)

Polymorphic downcast for build in pointers only.

Usage: Child* pChild = PolymorphicDowncast<Child*>(pBase);

Template Parameters
DestTypePointer type to the target object (Child pointer type)
SourceTypePointer type to the source object (Base pointer type)
Parameters
valuePointer to the source object
Returns
Pointer of type DestType (Pointer of type child)

Definition at line 74 of file PolymorphicDowncast.hpp.

References ARMNN_POLYMORPHIC_CAST_CHECK.

Referenced by ClLayerSupport::IsLayerSupported(), and NeonLayerSupport::IsLayerSupported().

75 {
76  static_assert(std::is_pointer<DestType>::value,
77  "PolymorphicDowncast only works with pointer types.");
78 
79  ARMNN_POLYMORPHIC_CAST_CHECK(dynamic_cast<DestType>(value) == value);
80  return static_cast<DestType>(value);
81 }
#define ARMNN_POLYMORPHIC_CAST_CHECK(cond)

◆ PolymorphicPointerDowncast()

auto armnn::PolymorphicPointerDowncast ( const SourceType &  value)

Polymorphic downcast for shared pointers and build in pointers.

Usage: auto pChild = PolymorphicPointerDowncast<Child>(pBase)

Template Parameters
DestTypeType of the target object (Child type)
SourceTypePointer type to the source object (Base (shared) pointer type)
Parameters
valuePointer to the source object
Returns
Pointer of type DestType ((Shared) pointer of type child)

Definition at line 93 of file PolymorphicDowncast.hpp.

References ARMNN_POLYMORPHIC_CAST_CHECK.

94 {
95  ARMNN_POLYMORPHIC_CAST_CHECK(utility::DynamicPointerCast<DestType>(value)
96  == value);
97  return utility::StaticPointerCast<DestType>(value);
98 }
#define ARMNN_POLYMORPHIC_CAST_CHECK(cond)

◆ Pooling2d()

void Pooling2d ( Decoder< float > &  rInputDecoder,
Encoder< float > &  rOutputEncoder,
const TensorInfo inputInfo,
const TensorInfo outputInfo,
const Pooling2dDescriptor params 
)

Computes the Pooling2d operation.

Definition at line 142 of file Pooling2d.cpp.

References Decoder< IType >::DecodeTensor(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetDataLayout(), DataLayoutIndexed::GetHeightIndex(), TensorInfo::GetShape(), DataLayoutIndexed::GetWidthIndex(), Pooling2dDescriptor::m_DataLayout, Pooling2dDescriptor::m_PadBottom, Pooling2dDescriptor::m_PaddingMethod, Pooling2dDescriptor::m_PadLeft, Pooling2dDescriptor::m_PadRight, Pooling2dDescriptor::m_PadTop, Pooling2dDescriptor::m_PoolHeight, Pooling2dDescriptor::m_PoolType, Pooling2dDescriptor::m_PoolWidth, Pooling2dDescriptor::m_StrideX, Pooling2dDescriptor::m_StrideY, numeric_cast(), Pooling2d(), and Encoder< IType >::Set().

Referenced by Pooling2d(), and Pooling2dLayer::Pooling2dLayer().

147 {
148  const DataLayoutIndexed dataLayout(params.m_DataLayout);
149  auto channelsIndex = dataLayout.GetChannelsIndex();
150  auto heightIndex = dataLayout.GetHeightIndex();
151  auto widthIndex = dataLayout.GetWidthIndex();
152 
153  const int batchSize = armnn::numeric_cast<int>(outputInfo.GetShape()[0]);
154  const int channels = armnn::numeric_cast<int>(outputInfo.GetShape()[channelsIndex]);
155  const int heightOutput = armnn::numeric_cast<int>(outputInfo.GetShape()[heightIndex]);
156  const int widthOutput = armnn::numeric_cast<int>(outputInfo.GetShape()[widthIndex]);
157  const int heightInput = armnn::numeric_cast<int>(inputInfo.GetShape()[heightIndex]);
158  const int widthInput = armnn::numeric_cast<int>(inputInfo.GetShape()[widthIndex]);
159  const int padLeft = armnn::numeric_cast<int>(params.m_PadLeft);
160  const int padRight = armnn::numeric_cast<int>(params.m_PadRight);
161  const int padTop = armnn::numeric_cast<int>(params.m_PadTop);
162  const int padBottom = armnn::numeric_cast<int>(params.m_PadBottom);
163  const int strideX = armnn::numeric_cast<int>(params.m_StrideX);
164  const int strideY = armnn::numeric_cast<int>(params.m_StrideY);
165  const int poolHeight = armnn::numeric_cast<int>(params.m_PoolHeight);
166  const int poolWidth = armnn::numeric_cast<int>(params.m_PoolWidth);
167 
168  float defaultInitializer = DefaultInitializer(params.m_PoolType);
169 
170  Accumulator accumulate = GetAccumulator(params.m_PoolType);
171  Executor execute = GetExecutor(params.m_PoolType);
172 
173  // Check supported padding methods outside the loop to simplify
174  // the inner loop.
175  if (params.m_PaddingMethod != PaddingMethod::Exclude &&
176  params.m_PaddingMethod != PaddingMethod::IgnoreValue)
177  {
178  throw armnn::InvalidArgumentException("Unsupported padding type");
179  }
180 
181  const std::vector<float> decodedInputVec = rInputDecoder.DecodeTensor(inputInfo.GetShape());
182 
183  for (int n = 0; n < batchSize; n++)
184  {
185  for (int c = 0; c < channels; c++)
186  {
187  for (int yOutput = 0; yOutput < heightOutput; yOutput++)
188  {
189  // Calculate values independent of the x axis
190  int hstart = (yOutput * strideY) - padTop;
191  int hend = hstart + poolHeight;
192  // Clamp the pooling region inside the valid input area (which includes the padding).
193  // This is necessary because the final pooling in a row may overlap beyond the padding.
194  hend = std::min(hend, heightInput + padBottom);
195 
196  int height = hend - hstart;
197  bool hclamped = ClampRange(hstart, hend, heightInput);
198 
199  for (int xOutput = 0; xOutput < widthOutput; xOutput++)
200  {
201  int wstart = (xOutput * strideX) - padLeft;
202  int wend = wstart + poolWidth;
203 
204  // Clamp the pooling region inside the valid input area (which includes the padding).
205  // This is necessary because the final pooling in a row may overlap beyond the padding.
206  wend = std::min(wend, widthInput + padRight);
207 
208  float result = defaultInitializer;
209  float poolAreaSize = armnn::numeric_cast<float>(height * (wend - wstart));
210 
211  // Special case: when the pooling kernel is over a padding region and the padding
212  // size is larger or equal to the kernel and the kernel only covers
213  // padding and no real values, then we initialize the result as zero
214  // by convention. This is because we need to choose a value here and
215  // all values we have are padding, which we ignore.
216  if (OnPaddingOnly(hstart, hend, heightInput) ||
217  OnPaddingOnly(wstart, wend, widthInput))
218  {
219  result = 0.0f;
220 
221  int outputIndex;
222 
223  if(dataLayout.GetDataLayout() == DataLayout::NHWC)
224  {
225  outputIndex = n * heightOutput * widthOutput * channels +
226  yOutput * widthOutput * channels +
227  xOutput * channels +
228  c;
229  }
230  else
231  {
232  outputIndex = n * heightOutput * widthOutput * channels +
233  c * heightOutput * widthOutput +
234  yOutput * widthOutput +
235  xOutput;
236  }
237 
238  rOutputEncoder[static_cast<unsigned int>(outputIndex)];
239  rOutputEncoder.Set(result);
240  continue;
241  }
242 
243  bool clamped = hclamped |= ClampRange(wstart, wend, widthInput);
244 
245  if (clamped && params.m_PaddingMethod == PaddingMethod::Exclude)
246  {
247  // When we exclude the padding, it means we calculate with a smaller
248  // kernel size, so I changed the divisor here.
249  poolAreaSize = armnn::numeric_cast<float>((hend - hstart) * (wend - wstart));
250  }
251 
252  for (auto yInput = hstart; yInput < hend; yInput++)
253  {
254  for (auto xInput = wstart; xInput < wend; xInput++)
255  {
256 
257  int inputIndex;
258  if(dataLayout.GetDataLayout() == DataLayout::NHWC)
259  {
260  inputIndex = n * heightInput * widthInput * channels +
261  yInput * widthInput * channels +
262  xInput * channels +
263  c;
264 
265  }
266  else
267  {
268  inputIndex = n * heightInput * widthInput * channels +
269  c * heightInput * widthInput +
270  yInput * widthInput +
271  xInput;
272  }
273 
274  accumulate(result, decodedInputVec[static_cast<unsigned int>(inputIndex)]);
275  }
276  }
277 
278  execute(result, poolAreaSize);
279 
280  int outputIndex;
281 
282  if(dataLayout.GetDataLayout() == DataLayout::NHWC)
283  {
284  outputIndex = n * heightOutput * widthOutput * channels +
285  yOutput * widthOutput * channels +
286  xOutput * channels +
287  c;
288  }
289  else
290  {
291  outputIndex = n * heightOutput * widthOutput * channels +
292  c * heightOutput * widthOutput +
293  yOutput * widthOutput +
294  xOutput;
295  }
296 
297  rOutputEncoder[static_cast<unsigned int>(outputIndex)];
298  rOutputEncoder.Set(result);
299  }
300  }
301  }
302  }
303 }
uint32_t m_PadBottom
Padding bottom value in the height dimension.
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
uint32_t m_PadLeft
Padding left value in the width dimension.
uint32_t m_PoolWidth
Pooling width value.
virtual std::vector< float > DecodeTensor(const TensorShape &tensorShape, bool isDepthwise=false)=0
virtual void Set(IType right)=0
PaddingMethod m_PaddingMethod
The padding method to be used. (Exclude, IgnoreValue).
uint32_t m_PadTop
Padding top value in the height dimension.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_PoolHeight
Pooling height value.
uint32_t m_PadRight
Padding right value in the width dimension.
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
PoolingAlgorithm m_PoolType
The pooling algorithm to use (Max. Average, L2).
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.

◆ Pooling3d()

void Pooling3d ( Decoder< float > &  rInputDecoder,
Encoder< float > &  rOutputEncoder,
const TensorInfo inputInfo,
const TensorInfo outputInfo,
const Pooling3dDescriptor params 
)

Computes the Pooling3d operation.

Definition at line 172 of file Pooling3d.cpp.

References Decoder< IType >::DecodeTensor(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetDepthIndex(), DataLayoutIndexed::GetHeightIndex(), TensorInfo::GetShape(), DataLayoutIndexed::GetWidthIndex(), Pooling3dDescriptor::m_DataLayout, Pooling3dDescriptor::m_PadBack, Pooling3dDescriptor::m_PadBottom, Pooling3dDescriptor::m_PaddingMethod, Pooling3dDescriptor::m_PadFront, Pooling3dDescriptor::m_PadLeft, Pooling3dDescriptor::m_PadRight, Pooling3dDescriptor::m_PadTop, Pooling3dDescriptor::m_PoolDepth, Pooling3dDescriptor::m_PoolHeight, Pooling3dDescriptor::m_PoolType, Pooling3dDescriptor::m_PoolWidth, Pooling3dDescriptor::m_StrideX, Pooling3dDescriptor::m_StrideY, Pooling3dDescriptor::m_StrideZ, numeric_cast(), Pooling3d(), and Encoder< IType >::Set().

Referenced by Pooling3d(), and Pooling3dLayer::Pooling3dLayer().

177 {
178  const DataLayoutIndexed dataLayout(params.m_DataLayout);
179 
180  auto channelsIndex = dataLayout.GetChannelsIndex();
181 
182  auto depthIndex = dataLayout.GetDepthIndex();
183  auto heightIndex = dataLayout.GetHeightIndex();
184  auto widthIndex = dataLayout.GetWidthIndex();
185 
186  const int batchSize = armnn::numeric_cast<int>(outputInfo.GetShape()[0]);
187  const int channels = armnn::numeric_cast<int>(outputInfo.GetShape()[channelsIndex]);
188 
189  const int depthOutput = armnn::numeric_cast<int>(outputInfo.GetShape()[depthIndex]);
190  const int heightOutput = armnn::numeric_cast<int>(outputInfo.GetShape()[heightIndex]);
191  const int widthOutput = armnn::numeric_cast<int>(outputInfo.GetShape()[widthIndex]);
192 
193  const int depthInput = armnn::numeric_cast<int>(inputInfo.GetShape()[depthIndex]);
194  const int heightInput = armnn::numeric_cast<int>(inputInfo.GetShape()[heightIndex]);
195  const int widthInput = armnn::numeric_cast<int>(inputInfo.GetShape()[widthIndex]);
196 
197  const int padLeft = armnn::numeric_cast<int>(params.m_PadLeft);
198  const int padRight = armnn::numeric_cast<int>(params.m_PadRight);
199  const int padTop = armnn::numeric_cast<int>(params.m_PadTop);
200  const int padBottom = armnn::numeric_cast<int>(params.m_PadBottom);
201  const int padFront = armnn::numeric_cast<int>(params.m_PadFront);
202  const int padBack = armnn::numeric_cast<int>(params.m_PadBack);
203 
204  const int strideX = armnn::numeric_cast<int>(params.m_StrideX);
205  const int strideY = armnn::numeric_cast<int>(params.m_StrideY);
206  const int strideZ = armnn::numeric_cast<int>(params.m_StrideZ);
207 
208  const int poolHeight = armnn::numeric_cast<int>(params.m_PoolHeight);
209  const int poolWidth = armnn::numeric_cast<int>(params.m_PoolWidth);
210  const int poolDepth = armnn::numeric_cast<int>(params.m_PoolDepth);
211 
212  float defaultInitializer = DefaultInitializer(params.m_PoolType);
213  Accumulator accumulate = GetAccumulator(params.m_PoolType);
214  Executor execute = GetExecutor(params.m_PoolType);
215 
216  // Check supported padding methods outside the loop to simplify
217  // the inner loop.
218  if (params.m_PaddingMethod != PaddingMethod::Exclude &&
219  params.m_PaddingMethod != PaddingMethod::IgnoreValue)
220  {
221  throw armnn::InvalidArgumentException("Unsupported padding type");
222  }
223 
224  const std::vector<float> decodedInputVec = rInputDecoder.DecodeTensor(inputInfo.GetShape());
225 
226  for (int n = 0; n < batchSize; n++)
227  {
228  for (int c = 0; c < channels; c++)
229  {
230  for (int zOutput = 0; zOutput < depthOutput; zOutput++)
231  {
232  // Calculate values independent of the x and y axis
233  int dstart = (zOutput * strideZ) - padFront;
234  int dend = dstart + poolDepth;
235  // Clamp the pooling region inside the valid input area (which includes the padding).
236  // This is necessary because the final pooling in a row may overlap beyond the padding.
237  dend = std::min(dend, depthInput + padBack);
238 
239  int depth = dend - dstart;
240  bool dclamped = ClampRange(dstart, dend, depthInput);
241  int depthClamped = dend - dstart;
242 
243  for (int yOutput = 0; yOutput < heightOutput; yOutput++)
244  {
245  int hstart = (yOutput * strideY) - padTop;
246  int hend = hstart + poolHeight;
247  // Clamp the pooling region inside the valid input area (which includes the padding).
248  // This is necessary because the final pooling in a row may overlap beyond the padding.
249  hend = std::min(hend, heightInput + padBottom);
250 
251  int height = hend - hstart;
252  bool hclamped = ClampRange(hstart, hend, heightInput);
253  int heightClamped = hend - hstart;
254 
255  for (int xOutput = 0; xOutput < widthOutput; xOutput++)
256  {
257  int wstart = (xOutput * strideX) - padLeft;
258  int wend = wstart + poolWidth;
259  // Clamp the pooling region inside the valid input area (which includes the padding).
260  // This is necessary because the final pooling in a row may overlap beyond the padding.
261  wend = std::min(wend, widthInput + padRight);
262 
263  int width = wend - wstart;
264  bool wclamped = ClampRange(wstart, wend, widthInput);
265  int widthClamped = wend - wstart;
266 
267  float result = defaultInitializer;
268  float poolAreaSize = armnn::numeric_cast<float>(depth * height * width);
269 
270  // Special case: when the pooling kernel is over a padding region and the padding
271  // size is larger or equal to the kernel and the kernel only covers
272  // padding and no real values, then we initialize the result as zero
273  // by convention. This is because we need to choose a value here and
274  // all values we have are padding, which we ignore.
275  if (OnPaddingOnly(dstart, dend, depthInput) ||
276  OnPaddingOnly(hstart, hend, heightInput) ||
277  OnPaddingOnly(wstart, wend, widthInput))
278  {
279  result = 0.0f;
280 
281  int outputIndex = CalculateIndex(channels, depthOutput, heightOutput, widthOutput,
282  n, c, zOutput, yOutput, xOutput, dataLayout);
283 
284  rOutputEncoder[static_cast<unsigned int>(outputIndex)];
285  rOutputEncoder.Set(result);
286 
287  continue;
288  }
289 
290  bool clamped = (dclamped | hclamped | wclamped);
291 
292  if (clamped && params.m_PaddingMethod == PaddingMethod::Exclude)
293  {
294  // When we exclude the padding, it means we calculate with a smaller
295  // kernel size, so I changed the divisor here.
296  poolAreaSize = armnn::numeric_cast<float>(depthClamped * heightClamped * widthClamped);
297  }
298 
299  for (auto zInput = dstart; zInput < dend; zInput++)
300  {
301  for (auto yInput = hstart; yInput < hend; yInput++)
302  {
303  for (auto xInput = wstart; xInput < wend; xInput++)
304  {
305 
306  int inputIndex = CalculateIndex(channels, depthInput, heightInput, widthInput,
307  n, c, zInput, yInput, xInput, dataLayout);
308 
309  accumulate(result, decodedInputVec[static_cast<unsigned int>(inputIndex)]);
310  }
311  }
312  }
313 
314  execute(result, poolAreaSize);
315 
316  int outputIndex = CalculateIndex(channels, depthOutput, heightOutput, widthOutput,
317  n, c, zOutput, yOutput, xOutput, dataLayout);
318 
319  rOutputEncoder[static_cast<unsigned int>(outputIndex)];
320  rOutputEncoder.Set(result);
321  }
322  }
323  }
324  }
325  }
326 }
PoolingAlgorithm m_PoolType
The pooling algorithm to use (Max. Average, L2).
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
uint32_t m_PoolWidth
Pooling width value.
uint32_t m_PoolDepth
Pooling depth value.
virtual std::vector< float > DecodeTensor(const TensorShape &tensorShape, bool isDepthwise=false)=0
virtual void Set(IType right)=0
uint32_t m_PadRight
Padding right value in the width dimension.
DataLayout m_DataLayout
The data layout to be used (NCDHW, NDHWC).
uint32_t m_PadFront
Padding front value in the depth dimension.
uint32_t m_PoolHeight
Pooling height value.
uint32_t m_PadBack
Padding back value in the depth dimension.
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
uint32_t m_PadBottom
Padding bottom value in the height dimension.
uint32_t m_StrideZ
Stride value when proceeding through input for the depth dimension.
uint32_t m_PadLeft
Padding left value in the width dimension.
uint32_t m_PadTop
Padding top value in the height dimension.
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
PaddingMethod m_PaddingMethod
The padding method to be used. (Exclude, IgnoreValue).

◆ PreluImpl()

void PreluImpl ( const TensorInfo inputInfo,
const TensorInfo alphaInfo,
const TensorInfo outputInfo,
Decoder< float > &  inputData,
Decoder< float > &  alphaData,
Encoder< float > &  outputData 
)

Definition at line 13 of file PreluImpl.cpp.

References TensorInfo::GetShape(), and BroadcastLoop::Unroll().

Referenced by RefPreluWorkload::ExecuteAsync().

19 {
20  const TensorShape& inputShape = inputInfo.GetShape();
21  const TensorShape& alphaShape = alphaInfo.GetShape();
22  const TensorShape& outputShape = outputInfo.GetShape();
23 
24  // PReLU activation: f(x) = alpha * x for x < 0, f(x) = x for x >= 0
25  auto prelu = [](float x, float alpha)
26  {
27  return x < 0 ? alpha * x : x;
28  };
29 
30  BroadcastLoop(inputShape, alphaShape, outputShape).Unroll(prelu, 0, inputData, alphaData, outputData);
31 }

◆ PrintOutput()

void armnn::PrintOutput ( const TensorInfo inputInfo,
const T *  inputData,
LayerGuid  guid,
const std::string &  layerName,
unsigned int  slotIndex,
std::ostream &  os 
)

Definition at line 23 of file Debug.cpp.

References TensorInfo::GetNumDimensions(), TensorInfo::GetNumElements(), and TensorInfo::GetShape().

29 {
30  const unsigned int numDims = inputInfo.GetNumDimensions();
31  const unsigned int numElements = inputInfo.GetNumElements();
32  const TensorShape& inputShape = inputInfo.GetShape();
33 
34  std::vector<unsigned int> strides(numDims, 0);
35  strides[numDims - 1] = inputShape[numDims - 1];
36 
37  for (unsigned int i = 2; i <= numDims; i++)
38  {
39  strides[numDims - i] = strides[numDims - i + 1] * inputShape[numDims - i];
40  }
41 
42  os << "{ ";
43  os << "\"layerGuid\": " << guid << ", ";
44  os << "\"layerName\": \"" << layerName << "\", ";
45  os << "\"outputSlot\": " << slotIndex << ", ";
46  os << "\"shape\": ";
47 
48  os << "[";
49  for (unsigned int i = 0; i < numDims; i++)
50  {
51  os << inputShape[i];
52  if (i != numDims - 1)
53  {
54  os << ", ";
55  }
56  }
57  os << "], ";
58 
59  os << "\"min\": "
60  << static_cast<float>(*std::min_element(inputData, inputData + numElements)) << ", ";
61 
62  os << "\"max\": "
63  << static_cast<float>(*std::max_element(inputData, inputData + numElements)) << ", ";
64 
65  os << "\"data\": ";
66 
67  for (unsigned int i = 0; i < numElements; i++)
68  {
69  for (unsigned int j = 0; j < numDims; j++)
70  {
71  if (i % strides[j] == 0)
72  {
73  os << "[";
74  }
75  }
76 
77  os << static_cast<float>(inputData[i]);
78 
79  for (unsigned int j = 0; j < numDims; j++)
80  {
81  if ((i + 1) % strides[j] == 0)
82  {
83  os << "]";
84  }
85  }
86 
87  if (i != numElements - 1)
88  {
89  os << ", ";
90  }
91  }
92 
93  os << " }" << std::endl;
94 }

◆ ProfilingUpdateDescriptions()

void armnn::ProfilingUpdateDescriptions ( const std::string &  name,
const DescriptorType &  desc,
const WorkloadInfo infos,
const arm::pipe::ProfilingGuid  guid 
)
inline

< Profiler used

Definition at line 180 of file Profiling.hpp.

References ProfilerManager::GetInstance(), and IProfiler::IsProfilingEnabled().

184 {
185  IProfiler* profiler(ProfilerManager::GetInstance().GetProfiler()); ///< Profiler used
186  if (profiler && profiler->IsProfilingEnabled())
187  {
188  profiler->AddLayerDetails(name, desc, infos, guid);
189  }
190 }

◆ Quantize() [1/2]

void armnn::Quantize ( uint8_t *  quant,
const float *  dequant,
const TensorInfo info 
)
inline

Definition at line 115 of file RefWorkloadUtils.hpp.

References TensorInfo::GetNumElements(), TensorInfo::GetQuantizationOffset(), and TensorInfo::GetQuantizationScale().

116 {
117  for (size_t i = 0; i < info.GetNumElements(); i++)
118  {
119  quant[i] = armnn::Quantize<uint8_t>(dequant[i], info.GetQuantizationScale(), info.GetQuantizationOffset());
120  }
121 }

◆ Quantize() [2/2]

template int32_t Quantize< int32_t > ( float  value,
float  scale,
int32_t  offset 
)

Quantize a floating point data type into an 8-bit data type.

Explicit specialization of Quantize for int32_t.

Explicit specialization of Quantize for int16_t.

Explicit specialization of Quantize for uint8_t.

Explicit specialization of Quantize for int8_t.

Parameters
value- The value to quantize.
scale- The scale (must be non-zero).
offset- The offset.
Returns
- The quantized value calculated as round(value/scale)+offset.

Definition at line 30 of file TypesUtils.cpp.

References ARMNN_ASSERT.

31 {
32  static_assert(IsQuantizedType<QuantizedType>(), "Not an integer type.");
33  constexpr QuantizedType max = std::numeric_limits<QuantizedType>::max();
34  constexpr QuantizedType min = std::numeric_limits<QuantizedType>::lowest();
35  ARMNN_ASSERT(scale != 0.f);
36  ARMNN_ASSERT(!std::isnan(value));
37 
38  float clampedValue = std::min(std::max((static_cast<float>(offset) + static_cast<float>(round(value/scale))),
39  static_cast<float>(min)), static_cast<float>(max));
40  auto quantizedBits = static_cast<QuantizedType>(clampedValue);
41 
42  return quantizedBits;
43 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ Reduce()

void Reduce ( const TensorInfo inputInfo,
const TensorInfo outputInfo,
Decoder< float > &  input,
Encoder< float > &  output,
const std::vector< uint32_t >  axis,
const ReduceOperation  reduceOperation 
)

Definition at line 70 of file Reduce.cpp.

References ARMNN_ASSERT, Decoder< IType >::Get(), TensorInfo::GetNumDimensions(), TensorInfo::GetNumElements(), TensorInfo::GetShape(), Max, Mean, Min, NextIndex(), numeric_cast(), Prod, ReducedOutputOffset(), Encoder< IType >::Set(), and Sum.

76 {
77  armnn::TensorShape inputDims = inputInfo.GetShape();
78  unsigned int inputNumDims = inputInfo.GetNumDimensions();
79  unsigned int numOutputs = outputInfo.GetNumElements();
80 
81  // Initialise temp output
82  std::vector<float> tempOut(numOutputs);
83  switch(reduceOperation)
84  {
85  case ReduceOperation::Mean:
86  case ReduceOperation::Sum:
87  std::fill(tempOut.begin(), tempOut.end(), 0.0f);
88  break;
89  case ReduceOperation::Prod:
90  std::fill(tempOut.begin(), tempOut.end(), 1.0f);
91  break;
92  case ReduceOperation::Max:
93  std::fill(tempOut.begin(), tempOut.end(), -1 * std::numeric_limits<float>::max());
94  break;
95  case ReduceOperation::Min:
96  std::fill(tempOut.begin(), tempOut.end(), std::numeric_limits<float>::max());
97  break;
98  default:
99  throw armnn::InvalidArgumentException("Unknown reduce method: " +
100  std::to_string(static_cast<int>(reduceOperation)));
101  }
102 
103  // Initialise temp index
104  std::vector<unsigned int> tempIndex(inputNumDims, 0);
105 
106  std::vector<unsigned int> resolvedAxis = axis;
107  if (resolvedAxis.empty())
108  {
109  for (unsigned int idx = 0; idx < inputNumDims; ++idx)
110  {
111  resolvedAxis.push_back(idx);
112  }
113  }
114  auto numResolvedAxis = armnn::numeric_cast<unsigned int>(resolvedAxis.size());
115 
116  // Iterates through input_data and operates over the reduced axis
117  for (bool hasNext = true; hasNext; hasNext = NextIndex(inputNumDims, inputDims, tempIndex))
118  {
119  unsigned int inputOffset = ReducedOutputOffset(inputNumDims, inputDims, tempIndex, 0, {});
120  unsigned int outputOffset = ReducedOutputOffset(inputNumDims, inputDims, tempIndex,
121  numResolvedAxis, resolvedAxis);
122  input[inputOffset];
123  auto inputValue = input.Get();
124  switch(reduceOperation)
125  {
126  case ReduceOperation::Mean:
127  case ReduceOperation::Sum:
128  tempOut[outputOffset] += inputValue;
129  break;
130  case ReduceOperation::Prod:
131  tempOut[outputOffset] *= inputValue;
132  break;
133  case ReduceOperation::Max:
134  if (inputValue > tempOut[outputOffset])
135  {
136  tempOut[outputOffset] = inputValue;
137  }
138  break;
139  case ReduceOperation::Min:
140  if (inputValue < tempOut[outputOffset])
141  {
142  tempOut[outputOffset] = inputValue;
143  }
144  break;
145  default:
146  throw armnn::InvalidArgumentException("Unknown reduce method: " +
147  std::to_string(static_cast<int>(reduceOperation)));
148  }
149  }
150 
151  // Takes average by num of elements added to get MEAN
152  size_t numElementsInAxis = 1;
153  for (unsigned int idx = 0; idx < numResolvedAxis; ++idx)
154  {
155  unsigned int current = inputDims[resolvedAxis[idx]];
156  ARMNN_ASSERT(armnn::numeric_cast<float>(current) <
157  (std::numeric_limits<float>::max() / armnn::numeric_cast<float>(numElementsInAxis)));
158  numElementsInAxis *= current;
159  }
160 
161  for (unsigned int idx = 0; idx < numOutputs; ++idx)
162  {
163  output[idx];
164  if (reduceOperation == ReduceOperation::Mean)
165  {
166  if (numElementsInAxis > 0)
167  {
168  output.Set(tempOut[idx] / armnn::numeric_cast<float>(numElementsInAxis));
169  }
170  }
171  else
172  {
173  output.Set(tempOut[idx]);
174  }
175  }
176 }
bool NextIndex(const unsigned int numDims, const armnn::TensorShape &dims, std::vector< unsigned int > &current)
Definition: Reduce.cpp:19
unsigned int ReducedOutputOffset(const unsigned int numDims, const armnn::TensorShape &dims, std::vector< unsigned int > &index, const unsigned int numAxis, const std::vector< unsigned int > &axis)
Definition: Reduce.cpp:40
virtual void Set(IType right)=0
virtual IType Get() const =0
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
unsigned int GetNumDimensions() const
Function that returns the tensor rank.
Definition: Tensor.cpp:174
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ ReducedOutputOffset()

unsigned int armnn::ReducedOutputOffset ( const unsigned int  numDims,
const armnn::TensorShape dims,
std::vector< unsigned int > &  index,
const unsigned int  numAxis,
const std::vector< unsigned int > &  axis 
)

Definition at line 40 of file Reduce.cpp.

Referenced by Reduce().

45 {
46  unsigned int offset = 0;
47  for (unsigned int idx = 0; idx < numDims; ++idx)
48  {
49  bool isAxis = false;
50  if (!axis.empty())
51  {
52  for (unsigned int axisIdx = 0; axisIdx < numAxis; ++axisIdx)
53  {
54  if (idx == axis[axisIdx])
55  {
56  isAxis = true;
57  break;
58  }
59  }
60  }
61  if (!isAxis)
62  {
63  offset = offset * dims[idx] + index[idx];
64  }
65  }
66  return offset;
67 }

◆ RefBackendId()

constexpr const char* armnn::RefBackendId ( )

Definition at line 10 of file RefBackendId.hpp.

Referenced by RefBackend::GetIdStatic().

10 { return "CpuRef"; }

◆ RefTensorHandleFactoryId()

constexpr const char* armnn::RefTensorHandleFactoryId ( )

Definition at line 15 of file RefTensorHandleFactory.hpp.

Referenced by RefTensorHandleFactory::GetIdStatic().

15 { return "Arm/Ref/TensorHandleFactory"; }

◆ ReorderWeightChannelsForAcl()

ConstTensor armnn::ReorderWeightChannelsForAcl ( const ConstTensor weightHandle,
DataLayout  dataLayout,
void *  permuteBuffer 
)

Definition at line 67 of file WorkloadUtils.cpp.

References BaseTensor< MemoryType >::GetInfo(), TensorInfo::GetNumBytes(), BaseTensor< MemoryType >::GetShape(), NCHW, and NHWC.

68 {
69  DataType* weight = static_cast<DataType*>(permuteBuffer);
70  const TensorShape& weightShape = weightHandle.GetShape();
71  unsigned int multiplier;
72  unsigned int height;
73  unsigned int width;
74  unsigned int inputChannels;
75  switch (dataLayout)
76  {
77  case DataLayout::NHWC: //It actually is [ H, W, I, M ]
78  height = weightShape[0];
79  width = weightShape[1];
80  inputChannels = weightShape[2];
81  multiplier = weightShape[3];
82  break;
83  case DataLayout::NCHW: //It actually is [ M, I, H, W ]
84  default:
85  height = weightShape[2];
86  width = weightShape[3];
87  inputChannels = weightShape[1];
88  multiplier = weightShape[0];
89  break;
90  }
91 
92  std::vector<DataType> weightAclOrder(height*width*inputChannels*multiplier);
93  unsigned int destinationWeightsChannel;
94  unsigned int totalChannels = inputChannels * multiplier;
95  unsigned int channelSize = height * width;
96  unsigned int inputChannel = 0;
97 
98  for (unsigned int originWeightsChannel = 0; originWeightsChannel < totalChannels; originWeightsChannel++)
99  {
100  inputChannel = originWeightsChannel % inputChannels;
101  destinationWeightsChannel = (originWeightsChannel - inputChannel) / inputChannels + multiplier * inputChannel;
102 
103  for (unsigned int i = 0; i < channelSize; i++)
104  {
105  weightAclOrder[i + destinationWeightsChannel * channelSize] =
106  weight[i + originWeightsChannel * channelSize];
107  }
108  }
109 
110  ::memcpy(permuteBuffer, weightAclOrder.data(), weightHandle.GetInfo().GetNumBytes());
111  return ConstTensor(weightHandle.GetInfo(), permuteBuffer);
112 }
DataType
Definition: Types.hpp:48

◆ ReplaceLayers()

void armnn::ReplaceLayers ( OptimizationViews optimizationViews,
LayerType baseLayer,
std::vector< IConnectableLayer *> &  layers 
)

Definition at line 322 of file ArmComputeSubgraphUtils.hpp.

References OptimizationViews::AddSubstitution().

325 {
326  std::list<IConnectableLayer*> replacementLayers(layers.begin(), layers.end());
327 
328  SubgraphView substitutionSubgraph(baseLayer);
329  SubgraphView replacementSubgraph(std::move(replacementLayers),
330  CreateIInputsFrom({replacementLayers.front()}),
331  CreateIOutputsFrom({replacementLayers.back()}));
332 
333  optimizationViews.AddSubstitution({substitutionSubgraph, replacementSubgraph});
334 }

◆ ReportError()

void armnn::ReportError ( const std::string &  errorMessage,
Optional< std::vector< std::string > &>  errorMessages 
)

Definition at line 531 of file Network.cpp.

References ARMNN_LOG, and warning.

Referenced by AssignBackends(), CheckScaleSetOnQuantizedType(), Optimize(), and ReturnWithError().

533 {
534  std::stringstream fullErrorMessage;
535  fullErrorMessage << "ERROR: " << errorMessage;
536  ARMNN_LOG(warning) << fullErrorMessage.str();
537  if (errorMessages)
538  {
539  errorMessages.value().push_back(fullErrorMessage.str());
540  }
541 }
#define ARMNN_LOG(severity)
Definition: Logging.hpp:205

◆ ReportUntouchedLayers()

void armnn::ReportUntouchedLayers ( OptimizationViews optimizationViews,
std::map< LayerGuid, Layer *>  untouched 
)
inline

Definition at line 52 of file SubgraphUtils.hpp.

References OptimizationViews::AddUntouchedSubgraph().

Referenced by RefBackend::OptimizeSubgraphView(), NeonBackend::OptimizeSubgraphView(), and ClBackend::OptimizeSubgraphView().

53 {
54  std::vector<Layer*> untouchedVector;
55  for (const auto& pair : untouched)
56  {
57  Layer* layer = pair.second;
58  SubgraphView subgraphView({layer},
59  CreateIInputsFrom({layer}),
60  CreateIOutputsFrom({layer}));
61  optimizationViews.AddUntouchedSubgraph(std::move(subgraphView));
62  }
63 }

◆ ReportWarning()

void armnn::ReportWarning ( const std::string &  warningMessage,
Optional< std::vector< std::string > &>  warningMessages 
)

Definition at line 543 of file Network.cpp.

References ARMNN_LOG, and warning.

Referenced by ApplyBackendOptimizations(), and AttemptBackendAssignment().

545 {
546  std::stringstream fullWarningMessage;
547  fullWarningMessage << "WARNING: " << warningMessage;
548  ARMNN_LOG(warning) << fullWarningMessage.str();
549  if (warningMessages)
550  {
551  warningMessages.value().push_back(fullWarningMessage.str());
552  }
553 }
#define ARMNN_LOG(severity)
Definition: Logging.hpp:205

◆ RequiresCopy()

bool armnn::RequiresCopy ( ITensorHandleFactory::FactoryId  src,
ITensorHandleFactory::FactoryId  dst,
TensorHandleFactoryRegistry registry 
)

Definition at line 1229 of file Network.cpp.

References ITensorHandleFactory::GetExportFlags(), TensorHandleFactoryRegistry::GetFactory(), and ITensorHandleFactory::GetImportFlags().

Referenced by CalculateSlotOption().

1232 {
1233  if (src != dst)
1234  {
1235  ITensorHandleFactory* srcFactory = registry.GetFactory(src);
1236  ITensorHandleFactory* dstFactory = registry.GetFactory(dst);
1237 
1238  if (srcFactory && dstFactory &&
1239  (srcFactory->GetExportFlags() & dstFactory->GetImportFlags()) != 0)
1240  {
1241  return false;
1242  }
1243  return true;
1244  }
1245  return false;
1246 }

◆ ReshapeWeightsForAcl()

void ReshapeWeightsForAcl ( TensorInfo weightInfo,
DataLayout  dataLayout 
)

Definition at line 41 of file WorkloadUtils.cpp.

References TensorInfo::GetShape(), NCHW, NHWC, and TensorInfo::SetShape().

Referenced by ConvertWeightTensorFromArmnnToAcl(), ConvertWeightTensorInfoFromArmnnToAcl(), and GatherTensorHandlePairs().

42 {
43  // Reshape the weights in-place
44  const TensorShape& weightShape = weightInfo.GetShape();
45  switch (dataLayout)
46  {
47  case DataLayout::NHWC:
48  // The data layout is NHWC, reshape from [ H, W, I, M ] to [ 1, H, W, I * M ]
49  weightInfo.SetShape({ 1,
50  weightShape[0],
51  weightShape[1],
52  weightShape[2] * weightShape[3] });
53  weightInfo.SetShape({ 1,
54  weightShape[0] * weightShape[1],
55  weightShape[2],
56  weightShape[3] });
57  break;
58  case DataLayout::NCHW:
59  default:
60  // The data layout is NCHW, reshape from [ M, I, H, W ] to [ 1, I * M, H, W, ]
61  weightInfo.SetShape({ 1, weightShape[0] * weightShape[1], weightShape[2], weightShape[3] });
62  break;
63  }
64 }

◆ Resize()

void Resize ( Decoder< float > &  in,
const TensorInfo inputInfo,
Encoder< float > &  out,
const TensorInfo outputInfo,
DataLayoutIndexed  dataLayout,
armnn::ResizeMethod  resizeMethod,
bool  alignCorners,
bool  halfPixelCenters 
)

Definition at line 65 of file Resize.cpp.

References ARMNN_ASSERT, Bilinear, Decoder< IType >::Get(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetHeightIndex(), DataLayoutIndexed::GetIndex(), TensorInfo::GetShape(), DataLayoutIndexed::GetWidthIndex(), NearestNeighbor, Resize(), and Encoder< IType >::Set().

Referenced by Resize(), and ResizeLayer::ResizeLayer().

73 {
74  // alignCorners and halfPixelCenters cannot both be true
75  ARMNN_ASSERT(!(alignCorners && halfPixelCenters));
76 
77  // We follow the definition of TensorFlow and AndroidNN: the top-left corner of a texel in the output
78  // image is projected into the input image to figure out the interpolants and weights. Note that this
79  // will yield different results than if projecting the centre of output texels.
80 
81  const unsigned int batchSize = inputInfo.GetShape()[0];
82  const unsigned int channelCount = inputInfo.GetShape()[dataLayout.GetChannelsIndex()];
83 
84  const unsigned int inputHeight = inputInfo.GetShape()[dataLayout.GetHeightIndex()];
85  const unsigned int inputWidth = inputInfo.GetShape()[dataLayout.GetWidthIndex()];
86  const unsigned int outputHeight = outputInfo.GetShape()[dataLayout.GetHeightIndex()];
87  const unsigned int outputWidth = outputInfo.GetShape()[dataLayout.GetWidthIndex()];
88 
89  // How much to scale pixel coordinates in the output image, to get the corresponding pixel coordinates
90  // in the input image.
91  const float scaleY = CalculateResizeScale(inputHeight, outputHeight, alignCorners);
92  const float scaleX = CalculateResizeScale(inputWidth, outputWidth, alignCorners);
93 
94  TensorShape inputShape = inputInfo.GetShape();
95  TensorShape outputShape = outputInfo.GetShape();
96 
97  for (unsigned int n = 0; n < batchSize; ++n)
98  {
99  for (unsigned int c = 0; c < channelCount; ++c)
100  {
101  for (unsigned int y = 0; y < outputHeight; ++y)
102  {
103  // Corresponding real-valued height coordinate in input image.
104  float iy = PixelScaler(y, scaleY, halfPixelCenters, resizeMethod);
105 
106  // Discrete height coordinate of top-left texel (in the 2x2 texel area used for interpolation).
107  const float fiy = (resizeMethod == armnn::ResizeMethod::NearestNeighbor && alignCorners) ?
108  roundf(iy) : floorf(iy);
109  // Pixel scaling a value with Half Pixel Centers can be negative, if so set to 0
110  const unsigned int y0 = static_cast<unsigned int>(std::max(fiy, 0.0f));
111 
112  // Interpolation weight (range [0,1]).
113  const float yw = iy - fiy;
114 
115  for (unsigned int x = 0; x < outputWidth; ++x)
116  {
117  // Real-valued and discrete width coordinates in input image.
118  float ix = PixelScaler(x, scaleX, halfPixelCenters, resizeMethod);
119 
120  // Nearest Neighbour uses rounding to align to corners
121  const float fix = resizeMethod == armnn::ResizeMethod::NearestNeighbor && alignCorners ?
122  roundf(ix) : floorf(ix);
123  // Pixel scaling a value with Half Pixel Centers can be negative, if so set to 0
124  const unsigned int x0 = static_cast<unsigned int>(std::max(fix, 0.0f));
125 
126  // Interpolation weight (range [0,1]).
127  const float xw = ix - fix;
128 
129  unsigned int x1;
130  unsigned int y1;
131  // Half Pixel Centers uses the scaling to compute a weighted parameter for nearby pixels
132  if (halfPixelCenters)
133  {
134  x1 = std::min(static_cast<unsigned int>(std::ceil(ix)), inputWidth - 1u);
135  y1 = std::min(static_cast<unsigned int>(std::ceil(iy)), inputHeight - 1u);
136  }
137  // Discrete width/height coordinates of texels below and to the right of (x0, y0).
138  else
139  {
140  x1 = std::min(x0 + 1, inputWidth - 1u);
141  y1 = std::min(y0 + 1, inputHeight - 1u);
142  }
143 
144  float interpolatedValue;
145  switch (resizeMethod)
146  {
148  {
149  in[dataLayout.GetIndex(inputShape, n, c, y0, x0)];
150  float input1 = in.Get();
151  in[dataLayout.GetIndex(inputShape, n, c, y0, x1)];
152  float input2 = in.Get();
153  in[dataLayout.GetIndex(inputShape, n, c, y1, x0)];
154  float input3 = in.Get();
155  in[dataLayout.GetIndex(inputShape, n, c, y1, x1)];
156  float input4 = in.Get();
157 
158  const float ly0 = Lerp(input1, input2, xw); // lerp along row y0.
159  const float ly1 = Lerp(input3, input4, xw); // lerp along row y1.
160  interpolatedValue = Lerp(ly0, ly1, yw);
161  break;
162  }
164  {
165  // calculate euclidean distance to the 4 neighbours
166  auto distance00 = EuclideanDistance(fix, fiy, x0, y0);
167  auto distance01 = EuclideanDistance(fix, fiy, x0, y1);
168  auto distance10 = EuclideanDistance(fix, fiy, x1, y0);
169  auto distance11 = EuclideanDistance(fix, fiy, x1, y1);
170 
171  auto minimum = std::min( { distance00, distance01, distance10, distance11 } );
172 
173  unsigned int xNearest = 0;
174  unsigned int yNearest = 0;
175 
176  if (minimum == distance00)
177  {
178  xNearest = x0;
179  yNearest = y0;
180  }
181  else if (minimum == distance01)
182  {
183  xNearest = x0;
184  yNearest = y1;
185  }
186  else if (minimum == distance10)
187  {
188  xNearest = x1;
189  yNearest = y0;
190  }
191  else if (minimum == distance11)
192  {
193  xNearest = x1;
194  yNearest = y1;
195  }
196  else
197  {
198  throw armnn::InvalidArgumentException("Resize Nearest Neighbor failure");
199  }
200 
201  in[dataLayout.GetIndex(inputShape, n, c, yNearest, xNearest)];
202  interpolatedValue = in.Get();
203  break;
204  }
205  default:
206  throw armnn::InvalidArgumentException("Unknown resize method: " +
207  std::to_string(static_cast<int>(resizeMethod)));
208  }
209  out[dataLayout.GetIndex(outputShape, n, c, y, x)];
210  out.Set(interpolatedValue);
211  }
212  }
213  }
214  }
215 }
unsigned int GetWidthIndex() const
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
virtual void Set(IType right)=0
unsigned int GetHeightIndex() const
virtual IType Get() const =0
unsigned int GetIndex(const armnn::TensorShape &shape, unsigned int batchIndex, unsigned int channelIndex, unsigned int heightIndex, unsigned int widthIndex) const
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
unsigned int GetChannelsIndex() const

◆ ReturnWithError()

OptimizationResult armnn::ReturnWithError ( OptimizationResult  res,
const Layer layer,
const BackendSettings backendSettings,
Optional< std::vector< std::string > &>  errMessages 
)

Definition at line 555 of file Network.cpp.

References GetLayerTypeAsCString(), Layer::GetType(), OptimizationResult::m_Error, BackendSettings::m_PreferredBackends, and ReportError().

Referenced by AssignBackendsIConnectable(), and AttemptBackendAssignment().

559 {
560  std::stringstream failureMsg;
561  failureMsg << "Layer of type " << GetLayerTypeAsCString(layer->GetType())
562  << " is not supported on any preferred backend " << backendSettings.m_PreferredBackends;
563  ReportError(failureMsg.str(), errMessages);
564 
565  res.m_Error = true;
566  return res;
567 }
void ReportError(const std::string &errorMessage, Optional< std::vector< std::string > &> errorMessages)
Definition: Network.cpp:531
const char * GetLayerTypeAsCString(LayerType type)

◆ RevertConstantWeightsToFP32()

bool RevertConstantWeightsToFP32 ( Layer layer)

Definition at line 277 of file NetworkUtils.cpp.

References BFloat16, FloatingPointConverter::ConvertBFloat16ToFloat32(), Convolution2d, Float32, FullyConnected, IInputSlot::GetConnection(), InputSlot::GetConnection(), IConnectableLayer::GetInputSlot(), Layer::GetInputSlot(), IConnectableLayer::GetOutputSlot(), IOutputSlot::GetOwningIConnectableLayer(), IOutputSlot::GetTensorInfo(), Layer::GetType(), and TensorInfo::SetConstant().

Referenced by AttemptBackendAssignment().

278 {
279  if (layer->GetType() == LayerType::Convolution2d || layer->GetType() == LayerType::FullyConnected)
280  {
281  // Revert Weights on Constant Layer to FP32 so they can be accessed by Conv2d or FullyConnected
282  // This prevents a conversion layer being added in during backend assignment which blocks
283  // the RedirectMembersToConstantInputs backward compatibility workaround/optimization.
284  auto constantLayerInfo = layer->GetInputSlot(1).GetConnection()->GetTensorInfo();
285 
286  if (constantLayerInfo.IsConstant() && constantLayerInfo.GetDataType() == DataType::BFloat16)
287  {
288  std::vector<float> newValues(constantLayerInfo.GetNumElements());
289 
290  auto weightLayer = PolymorphicDowncast<ConstantLayer*>(
291  &layer->GetInputSlot(1).GetConnection()->GetOwningIConnectableLayer());
293  weightLayer->m_LayerOutput->GetConstTensor<BFloat16>(),
294  constantLayerInfo.GetNumElements(),
295  newValues.data());
296 
297  TensorInfo newInfo(constantLayerInfo.GetShape(), DataType::Float32);
298  newInfo.SetConstant(true);
299  ConstTensor newInput(newInfo, newValues);
300  weightLayer->m_LayerOutput.reset(new ScopedTensorHandle(newInput));
301  weightLayer->GetOutputSlot(0).SetTensorInfo(newInfo);
302 
303  // Connect Conv2d/FullyConnected to InputLayer directly leaving out
304  // the ConversionLayer to be cleaned up later
305  auto& conversionLayer = layer->GetInputSlot(0).GetConnection()->GetOwningIConnectableLayer();
306  auto actualInputOutputSlot = conversionLayer.GetInputSlot(0).GetConnection();
307 
308  auto& conversionLayerOutputSlot =
309  layer->GetInputSlot(0).GetConnection()->GetOwningIConnectableLayer().GetOutputSlot(0);
310  auto& conversionLayerInputSlot =
311  layer->GetInputSlot(0).GetConnection()->GetOwningIConnectableLayer().GetInputSlot(0);
312  actualInputOutputSlot->Disconnect(conversionLayerInputSlot);
313  conversionLayerOutputSlot.Disconnect(layer->GetInputSlot(0));
314 
315  actualInputOutputSlot->Connect(layer->GetInputSlot(0));
316 
317  return true;
318  }
319  }
320  return false;
321 }
static void ConvertBFloat16ToFloat32(const void *srcBFloat16Buffer, size_t numElements, float *dstFloat32Buffer)
void FullyConnected(const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rWeightsShape, Decoder< float > &rWeightDecoder, Decoder< float > *pBiasDecoder, const bool biasEnabled, const unsigned int K, const bool transposeWeights)
Performs a matrix multiplication and optionally adds a bias.

◆ RunClFunction()

void armnn::RunClFunction ( arm_compute::IFunction &  function,
const CheckLocation location 
)
inline

Definition at line 160 of file ClWorkloadUtils.hpp.

References Error, error, and WrapClError().

Referenced by ClFillWorkload::Execute(), ClPadWorkload::Execute(), ClAdditionWorkload::Execute(), ClSubtractionWorkload::Execute(), ClActivationWorkload::Execute(), ClExpWorkload::Execute(), ClPreluWorkload::Execute(), ClQuantizeWorkload::Execute(), ClConvertFp16ToFp32Workload::Execute(), ClRsqrtWorkload::Execute(), ClSinWorkload::Execute(), ClConvertFp32ToFp16Workload::Execute(), ClAbsWorkload::Execute(), ClLogWorkload::Execute(), ClSqrtWorkload::Execute(), ClLstmFloatWorkload::Execute(), ClCastWorkload::Execute(), ClNegWorkload::Execute(), ClSpaceToDepthWorkload::Execute(), ClNormalizationFloatWorkload::Execute(), ClFloorFloatWorkload::Execute(), ClResizeWorkload::Execute(), ClReshapeWorkload::Execute(), ClGatherWorkload::Execute(), ClInstanceNormalizationWorkload::Execute(), ClBatchToSpaceNdWorkload::Execute(), ClMaximumWorkload::Execute(), ClMinimumWorkload::Execute(), ClArgMinMaxWorkload::Execute(), ClChannelShuffleWorkload::Execute(), ClComparisonWorkload::Execute(), ClSliceWorkload::Execute(), ClL2NormalizationFloatWorkload::Execute(), ClDepthToSpaceWorkload::Execute(), ClDivisionWorkload::Execute(), ClPooling2dWorkload::Execute(), ClStridedSliceWorkload::Execute(), ClGatherNdWorkload::Execute(), ClSpaceToBatchNdWorkload::Execute(), ClPooling3dWorkload::Execute(), ClMultiplicationWorkload::Execute(), ClLogSoftmaxWorkload::Execute(), ClQuantizedLstmWorkload::Execute(), ClSoftmaxWorkload::Execute(), ClBatchNormalizationFloatWorkload::Execute(), ClDepthwiseConvolutionWorkload::Execute(), ClFullyConnectedWorkload::Execute(), ClConvolution3dWorkload::Execute(), ClTransposeWorkload::Execute(), ClTransposeConvolution2dWorkload::Execute(), ClPermuteWorkload::Execute(), and ClConvolution2dWorkload::Execute().

161 {
162  try
163  {
164  function.run();
165  }
166  catch (cl::Error& error)
167  {
168  throw WrapClError(error, location);
169  }
170 }
RuntimeException WrapClError(const cl::Error &clError, const CheckLocation &location)

◆ SelectTensorHandleStrategy()

OptimizationResult SelectTensorHandleStrategy ( Graph optGraph,
BackendsMap backends,
TensorHandleFactoryRegistry registry,
bool  importEnabled,
bool  exportEnabled,
Optional< std::vector< std::string > &>  errMessages 
)

Definition at line 1583 of file Network.cpp.

References ARMNN_ASSERT, ARMNN_SCOPED_PROFILING_EVENT, CalculateEdgeStrategy(), CalculateSlotOption(), CalculateSlotOptionForInput(), CalculateSlotOptionForOutput(), Graph::ForEachLayer(), Layer::GetBackendId(), OutputSlot::GetConnections(), Layer::GetNumOutputSlots(), Layer::GetOutputSlot(), Layer::GetType(), Input, ITensorHandleFactory::LegacyFactoryId, OptimizationResult::m_Error, Output, OutputSlot::SetEdgeStrategy(), OutputSlot::SetTensorHandleFactory(), and Undefined.

Referenced by Optimize().

1589 {
1590  ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "Optimizer_SelectTensorHandleStrategy");
1591  OptimizationResult result;
1592 
1593  optGraph.ForEachLayer([&backends, &registry, &result, &errMessages, importEnabled, exportEnabled](Layer* layer)
1594  {
1595  ARMNN_ASSERT(layer);
1596 
1597  // Lets make sure the backend is in our list of supported backends. Something went wrong during backend
1598  // assignment if this check fails
1599  ARMNN_ASSERT(backends.find(layer->GetBackendId()) != backends.end());
1600 
1601  // Check each output separately
1602  for (unsigned int slotIdx = 0; slotIdx < layer->GetNumOutputSlots(); slotIdx++)
1603  {
1604  OutputSlot& outputSlot = layer->GetOutputSlot(slotIdx);
1605 
1606  ITensorHandleFactory::FactoryId slotOption = ITensorHandleFactory::LegacyFactoryId;
1607 
1608  // Calculate the factory to use which results in the fewest copies being made.
1609  switch(layer->GetType())
1610  {
1611  case LayerType::Input:
1612  slotOption = CalculateSlotOptionForInput(backends, outputSlot, registry, importEnabled);
1613  break;
1614  case LayerType::Output:
1615  slotOption = CalculateSlotOptionForOutput(backends, outputSlot, registry);
1616  break;
1617  default:
1618  slotOption = CalculateSlotOption(backends, outputSlot, registry, exportEnabled);
1619  break;
1620  }
1621  outputSlot.SetTensorHandleFactory(slotOption);
1622 
1623  // Now determine the "best" edge strategy for each connection given the slotOption.
1624  unsigned int connectionIdx = 0;
1625  for (auto&& connection : outputSlot.GetConnections())
1626  {
1627  const Layer& connectedLayer = connection->GetOwningLayer();
1628 
1629  EdgeStrategy strategy = CalculateEdgeStrategy(backends, slotOption, *layer, connectedLayer,
1630  registry, importEnabled);
1631 
1632  if (strategy == EdgeStrategy::Undefined)
1633  {
1634  result.m_Error = true;
1635  if (errMessages)
1636  {
1637  errMessages.value().emplace_back("Could not find valid strategy required for compatibility"
1638  " between backends.");
1639  }
1640  return;
1641  }
1642 
1643  outputSlot.SetEdgeStrategy(connectionIdx, strategy);
1644 
1645  connectionIdx++;
1646  }
1647  }
1648  });
1649 
1650  return result;
1651 }
ITensorHandleFactory::FactoryId CalculateSlotOptionForOutput(BackendsMap &backends, OutputSlot &slot, TensorHandleFactoryRegistry &registry)
Definition: Network.cpp:1334
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
ITensorHandleFactory::FactoryId FactoryId
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
EdgeStrategy CalculateEdgeStrategy(BackendsMap &backends, ITensorHandleFactory::FactoryId srcFactoryId, const Layer &layer, const Layer &connectedLayer, TensorHandleFactoryRegistry &registry, bool importEnabled)
Definition: Network.cpp:1494
ITensorHandleFactory::FactoryId CalculateSlotOption(BackendsMap &backends, OutputSlot &outputSlot, TensorHandleFactoryRegistry &registry, bool exportEnabled)
Definition: Network.cpp:1344
ITensorHandleFactory::FactoryId CalculateSlotOptionForInput(BackendsMap &backends, OutputSlot &slot, TensorHandleFactoryRegistry &registry, bool importEnabled)
Definition: Network.cpp:1249

◆ SetAllLoggingSinks()

void SetAllLoggingSinks ( bool  standardOut,
bool  debugOut,
bool  coloured 
)

Definition at line 191 of file Logging.cpp.

Referenced by SimpleLogger< Level >::AddSink(), ConfigureLogging(), and TEST_SUITE().

192 {
193  SetLoggingSinks<LogSeverity::Trace>(standardOut, debugOut, coloured);
194  SetLoggingSinks<LogSeverity::Debug>(standardOut, debugOut, coloured);
195  SetLoggingSinks<LogSeverity::Info>(standardOut, debugOut, coloured);
196  SetLoggingSinks<LogSeverity::Warning>(standardOut, debugOut, coloured);
197  SetLoggingSinks<LogSeverity::Error>(standardOut, debugOut, coloured);
198  SetLoggingSinks<LogSeverity::Fatal>(standardOut, debugOut, coloured);
199 }

◆ SetClSliceData()

auto armnn::SetClSliceData ( const std::vector< unsigned int > &  m_begin,
const std::vector< unsigned int > &  m_size 
)
inline

Definition at line 92 of file ClWorkloadUtils.hpp.

Referenced by ClSliceWorkload::ClSliceWorkload().

94 {
95  // This function must translate the size vector given to an end vector
96  // expected by the ACL NESlice workload
99 
100  unsigned int num_dims = static_cast<unsigned int>(m_begin.size());
101 
102  // For strided slices, we have the relationship size = (end - begin) / stride
103  // For slice, we assume stride to be a vector of all ones, yielding the formula
104  // size = (end - begin) therefore we know end = size + begin
105  for (unsigned int i = 0; i < num_dims; i++)
106  {
107  unsigned int revertedIndex = num_dims - i - 1;
108 
109  starts.set(i, static_cast<int>(m_begin[revertedIndex]));
110  ends.set(i, static_cast<int>(m_begin[revertedIndex] + m_size[revertedIndex]));
111  }
112 
113  return std::make_tuple(starts, ends);
114 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates

◆ SetClStridedSliceData()

auto armnn::SetClStridedSliceData ( const std::vector< int > &  m_begin,
const std::vector< int > &  m_end,
const std::vector< int > &  m_stride 
)
inline

Definition at line 71 of file ClWorkloadUtils.hpp.

Referenced by ClStridedSliceWorkload::ClStridedSliceWorkload().

74 {
78 
79  unsigned int num_dims = static_cast<unsigned int>(m_begin.size());
80 
81  for (unsigned int i = 0; i < num_dims; i++) {
82  unsigned int revertedIndex = num_dims - i - 1;
83 
84  starts.set(i, static_cast<int>(m_begin[revertedIndex]));
85  ends.set(i, static_cast<int>(m_end[revertedIndex]));
86  strides.set(i, static_cast<int>(m_stride[revertedIndex]));
87  }
88 
89  return std::make_tuple(starts, ends, strides);
90 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates

◆ SetLogFilter()

void SetLogFilter ( LogSeverity  level)

Definition at line 73 of file Logging.cpp.

References ARMNN_ASSERT, ARMNN_FALLTHROUGH, Debug, SimpleLogger< Level >::Enable(), Error, Fatal, SimpleLogger< Level >::Get(), IgnoreUnused(), Info, Trace, and Warning.

Referenced by SimpleLogger< Level >::AddSink(), ConfigureLogging(), and TEST_SUITE().

74 {
75  SimpleLogger<LogSeverity::Trace>::Get().Enable(false);
76  SimpleLogger<LogSeverity::Debug>::Get().Enable(false);
77  SimpleLogger<LogSeverity::Info>::Get().Enable(false);
78  SimpleLogger<LogSeverity::Warning>::Get().Enable(false);
79  SimpleLogger<LogSeverity::Error>::Get().Enable(false);
80  SimpleLogger<LogSeverity::Fatal>::Get().Enable(false);
81  switch (level)
82  {
83  case LogSeverity::Trace:
84  SimpleLogger<LogSeverity::Trace>::Get().Enable(true);
86  case LogSeverity::Debug:
87  SimpleLogger<LogSeverity::Debug>::Get().Enable(true);
89  case LogSeverity::Info:
90  SimpleLogger<LogSeverity::Info>::Get().Enable(true);
92  case LogSeverity::Warning:
93  SimpleLogger<LogSeverity::Warning>::Get().Enable(true);
95  case LogSeverity::Error:
96  SimpleLogger<LogSeverity::Error>::Get().Enable(true);
98  case LogSeverity::Fatal:
99  SimpleLogger<LogSeverity::Fatal>::Get().Enable(true);
100  break;
101  default:
102  ARMNN_ASSERT(false);
103  }
104 }
void Debug(const TensorInfo &inputInfo, const T *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
Definition: Debug.cpp:97
#define ARMNN_FALLTHROUGH
Definition: Utils.hpp:37
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ SetLoggingSinks()

void armnn::SetLoggingSinks ( bool  standardOut,
bool  debugOut,
bool  coloured 
)
inline

Definition at line 167 of file Logging.cpp.

References SimpleLogger< Level >::AddSink(), SimpleLogger< Level >::Get(), and SimpleLogger< Level >::RemoveAllSinks().

168 {
169  SimpleLogger<Level>::Get().RemoveAllSinks();
170 
171  if (standardOut)
172  {
173  if (coloured)
174  {
175  SimpleLogger<Level>::Get().AddSink(
176  std::make_shared<StandardOutputColourSink>(Level));
177  } else
178  {
179  SimpleLogger<Level>::Get().AddSink(
180  std::make_shared<StandardOutputSink>());
181  }
182  }
183 
184  if (debugOut)
185  {
186  SimpleLogger<Level>::Get().AddSink(
187  std::make_shared<DebugOutputSink>());
188  }
189 }

◆ SetNeonSliceData()

auto armnn::SetNeonSliceData ( const std::vector< unsigned int > &  m_begin,
const std::vector< unsigned int > &  m_size 
)
inline

Definition at line 117 of file NeonWorkloadUtils.hpp.

References GetOutputTensorData(), and ITensorHandle::Map().

Referenced by NeonSliceWorkload::NeonSliceWorkload().

119 {
120  // This function must translate the size vector given to an end vector
121  // expected by the ACL NESlice workload
124 
125  unsigned int num_dims = static_cast<unsigned int>(m_begin.size());
126 
127  // For strided slices, we have the relationship size = (end - begin) / stride
128  // For slice, we assume stride to be a vector of all ones, yielding the formula
129  // size = (end - begin) therefore we know end = size + begin
130  for (unsigned int i = 0; i < num_dims; i++)
131  {
132  unsigned int revertedIndex = num_dims - i - 1;
133 
134  starts.set(i, static_cast<int>(m_begin[revertedIndex]));
135  ends.set(i, static_cast<int>(m_begin[revertedIndex] + m_size[revertedIndex]));
136  }
137 
138  return std::make_tuple(starts, ends);
139 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates

◆ SetNeonStridedSliceData()

auto armnn::SetNeonStridedSliceData ( const std::vector< int > &  m_begin,
const std::vector< int > &  m_end,
const std::vector< int > &  m_stride 
)
inline

Definition at line 95 of file NeonWorkloadUtils.hpp.

Referenced by NeonStridedSliceWorkload::NeonStridedSliceWorkload().

98 {
101  arm_compute::Coordinates strides;
102 
103  unsigned int num_dims = static_cast<unsigned int>(m_begin.size());
104 
105  for (unsigned int i = 0; i < num_dims; i++)
106  {
107  unsigned int revertedIndex = num_dims - i - 1;
108 
109  starts.set(i, static_cast<int>(m_begin[revertedIndex]));
110  ends.set(i, static_cast<int>(m_end[revertedIndex]));
111  strides.set(i, static_cast<int>(m_stride[revertedIndex]));
112  }
113 
114  return std::make_tuple(starts, ends, strides);
115 }
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates

◆ SetValueChecked()

◆ Slice()

void Slice ( const TensorInfo inputInfo,
const SliceDescriptor descriptor,
const void *  inputData,
void *  outputData,
unsigned int  dataTypeSize 
)

Definition at line 14 of file Slice.cpp.

References ARMNN_ASSERT, TensorShape::GetNumDimensions(), TensorInfo::GetShape(), IgnoreUnused(), SliceDescriptor::m_Begin, and SliceDescriptor::m_Size.

19 {
20  const TensorShape& inputShape = inputInfo.GetShape();
21  const unsigned int numDims = inputShape.GetNumDimensions();
22 
23  ARMNN_ASSERT(descriptor.m_Begin.size() == numDims);
24  ARMNN_ASSERT(descriptor.m_Size.size() == numDims);
25 
26  constexpr unsigned int maxNumDims = 4;
27  ARMNN_ASSERT(numDims <= maxNumDims);
28 
29  std::vector<unsigned int> paddedInput(4);
30  std::vector<unsigned int> paddedBegin(4);
31  std::vector<unsigned int> paddedSize (4);
32 
33  const unsigned int numPaddingDims = maxNumDims - numDims;
34  for (unsigned int i = 0u; i < maxNumDims; ++i)
35  {
36  if (i < numPaddingDims)
37  {
38  paddedInput[i] = 1u;
39  paddedBegin[i] = 0u;
40  paddedSize[i] = 1u;
41  }
42  else
43  {
44  const unsigned int j = i - numPaddingDims;
45  paddedInput[i] = inputShape[j];
46  paddedBegin[i] = descriptor.m_Begin[j];
47  paddedSize[i] = descriptor.m_Size[j];
48  }
49  }
50 
51  unsigned int dim0 = paddedInput[0];
52  unsigned int dim1 = paddedInput[1];
53  unsigned int dim2 = paddedInput[2];
54  unsigned int dim3 = paddedInput[3];
55 
56  unsigned int begin0 = paddedBegin[0];
57  unsigned int begin1 = paddedBegin[1];
58  unsigned int begin2 = paddedBegin[2];
59  unsigned int begin3 = paddedBegin[3];
60 
61  unsigned int size0 = paddedSize[0];
62  unsigned int size1 = paddedSize[1];
63  unsigned int size2 = paddedSize[2];
64  unsigned int size3 = paddedSize[3];
65 
66  ARMNN_ASSERT(begin0 + size0 <= dim0);
67  ARMNN_ASSERT(begin1 + size1 <= dim1);
68  ARMNN_ASSERT(begin2 + size2 <= dim2);
69  ARMNN_ASSERT(begin3 + size3 <= dim3);
70 
71  const unsigned char* input = reinterpret_cast<const unsigned char*>(inputData);
72  unsigned char* output = reinterpret_cast<unsigned char*>(outputData);
73 
74  IgnoreUnused(dim0);
75  for (unsigned int idx0 = begin0; idx0 < begin0 + size0; ++idx0)
76  {
77  for (unsigned int idx1 = begin1; idx1 < begin1 + size1; ++idx1)
78  {
79  for (unsigned int idx2 = begin2; idx2 < begin2 + size2; ++idx2)
80  {
81  for (unsigned int idx3 = begin3; idx3 < begin3 + size3; ++idx3)
82  {
83  const unsigned int inputOffset =
84  (((idx0 * dim1 + idx1) * dim2 + idx2) * dim3 + idx3) * dataTypeSize;
85 
86  ::memcpy(output, input + inputOffset, dataTypeSize);
87  output += dataTypeSize;
88  }
89  }
90  }
91  }
92 }
void IgnoreUnused(Ts &&...)
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14

◆ Softmax()

void Softmax ( Decoder< float > &  in,
Encoder< float > &  out,
const TensorInfo inputTensorInfo,
float  beta,
int  axis 
)

Computes the softmax function on some inputs, into outputs, with a shape given by tensorInfo.

Definition at line 17 of file Softmax.cpp.

References ARMNN_ASSERT_MSG, Decoder< IType >::Get(), TensorShape::GetNumDimensions(), TensorInfo::GetNumDimensions(), armnnUtils::GetNumElementsBetween(), TensorInfo::GetShape(), and Encoder< IType >::Set().

18 {
19  ARMNN_ASSERT_MSG(axis < static_cast<int>(inputTensorInfo.GetNumDimensions()),
20  "Required axis index greater than number of dimensions.");
21  ARMNN_ASSERT_MSG(axis >= -static_cast<int>(inputTensorInfo.GetNumDimensions()),
22  "Required axis index lower than negative of the number of dimensions");
23 
24  unsigned int uAxis = axis < 0 ?
25  inputTensorInfo.GetNumDimensions() - static_cast<unsigned int>(abs(axis))
26  : static_cast<unsigned int>(axis);
27 
28  const TensorShape& inputShape = inputTensorInfo.GetShape();
29  const unsigned int outerSize = armnnUtils::GetNumElementsBetween(inputShape, 0, uAxis);
30  const unsigned int axisSize = inputShape[uAxis];
31  const unsigned int innerSize = armnnUtils::GetNumElementsBetween(inputShape,
32  uAxis + 1,
33  inputShape.GetNumDimensions());
34 
35  for (unsigned int outer = 0; outer < outerSize; ++outer)
36  {
37  unsigned int inputBeginIdx = outer * axisSize * innerSize;
38  unsigned int inputEndIdx = inputBeginIdx + axisSize * innerSize;
39  unsigned int outputBeginIdx = outer * axisSize * innerSize;
40 
41  for (unsigned int inner = 0; inner < innerSize; ++inner, ++inputBeginIdx, ++inputEndIdx, ++outputBeginIdx)
42  {
43  // Find max
44  float maxValue = std::numeric_limits<float>::lowest();
45  for (unsigned int iter = inputBeginIdx; iter < inputEndIdx; iter += innerSize)
46  {
47  in[iter];
48  maxValue = std::max(maxValue, in.Get());
49  }
50 
51  // Compute sum
52  float sum = 0.0f;
53  for (unsigned int iter = inputBeginIdx; iter < inputEndIdx; iter += innerSize)
54  {
55  in[iter];
56  sum += std::exp((in.Get() - maxValue) * beta);
57  }
58 
59  // Compute result
60  unsigned int outputIter = outputBeginIdx;
61  out[outputIter];
62  for (unsigned int iter = inputBeginIdx; iter < inputEndIdx; iter += innerSize, outputIter += innerSize)
63  {
64  out[outputIter];
65  in[iter];
66  out.Set(std::exp((in.Get() - maxValue) * beta) / sum);
67  }
68  }
69  }
70 }
unsigned int GetNumElementsBetween(const armnn::TensorShape &shape, unsigned int firstAxisInclusive, unsigned int lastAxisExclusive)
virtual void Set(IType right)=0
virtual IType Get() const =0
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15

◆ SpaceToBatchNd()

void SpaceToBatchNd ( const TensorInfo inputInfo,
const TensorInfo outputInfo,
const SpaceToBatchNdDescriptor params,
Decoder< float > &  inputData,
Encoder< float > &  outputData 
)

Definition at line 34 of file SpaceToBatchNd.cpp.

References Decoder< IType >::Get(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetHeightIndex(), GetOffset(), TensorInfo::GetShape(), DataLayoutIndexed::GetWidthIndex(), SpaceToBatchNdDescriptor::m_BlockShape, SpaceToBatchNdDescriptor::m_DataLayout, SpaceToBatchNdDescriptor::m_PadList, Encoder< IType >::Set(), and SpaceToBatchNd().

Referenced by SpaceToBatchNd(), and SpaceToBatchNdLayer::SpaceToBatchNdLayer().

39 {
40  DataLayoutIndexed dataLayout = params.m_DataLayout;
41 
42  const TensorShape& inputShape = inputInfo.GetShape();
43  const TensorShape& outputShape = outputInfo.GetShape();
44 
45  const unsigned int channels = inputShape[dataLayout.GetChannelsIndex()];
46 
47  const unsigned int inputBatchSize = inputShape[0];
48  const unsigned int inputHeight = inputShape[dataLayout.GetHeightIndex()];
49  const unsigned int inputWidth = inputShape[dataLayout.GetWidthIndex()];
50 
51  const unsigned int outputBatchSize = outputShape[0];
52  const unsigned int outputHeight = outputShape[dataLayout.GetHeightIndex()];
53  const unsigned int outputWidth = outputShape[dataLayout.GetWidthIndex()];
54 
55  const unsigned int blockHeight = params.m_BlockShape[0];
56  const unsigned int blockWidth = params.m_BlockShape[1];
57 
58  const unsigned int paddingTop = params.m_PadList[0].first;
59  const unsigned int paddingLeft = params.m_PadList[1].first;
60 
61  for (unsigned int outB = 0; outB < outputBatchSize; outB++)
62  {
63  unsigned int inB = outB % inputBatchSize;
64 
65  unsigned int shiftW = (outB / inputBatchSize) % blockWidth;
66  unsigned int shiftH = (outB / inputBatchSize) / blockWidth;
67 
68  for (unsigned int outH = 0; outH < outputHeight; outH++)
69  {
70  for (unsigned int outW = 0; outW < outputWidth; outW++)
71  {
72  if (outH * blockHeight + shiftH < paddingTop ||
73  outH * blockHeight + shiftH >= paddingTop + inputHeight ||
74  outW * blockWidth + shiftW < paddingLeft ||
75  outW * blockWidth + shiftW >= paddingLeft + inputWidth)
76  {
77  for (unsigned int c = 0; c < channels; c++)
78  {
79  unsigned int outOffset = GetOffset(outputShape,
80  outB,
81  outH,
82  outW,
83  c,
84  dataLayout);
85  outputData += outOffset;
86  outputData.Set(0);
87  outputData -= outOffset;
88  }
89  }
90  else
91  {
92  for (unsigned int c = 0; c < channels; c++)
93  {
94  unsigned int inOffset = GetOffset(inputShape,
95  inB,
96  (outH * blockHeight + shiftH) - paddingTop,
97  (outW * blockWidth + shiftW) - paddingLeft,
98  c,
99  dataLayout);
100 
101  unsigned int outOffset = GetOffset(outputShape,
102  outB,
103  outH,
104  outW,
105  c,
106  dataLayout);
107 
108  outputData += outOffset;
109  inputData += inOffset;
110  outputData.Set(inputData.Get());
111  inputData -= inOffset;
112  outputData -= outOffset;
113  }
114  }
115  }
116  }
117  }
118 }
unsigned int GetWidthIndex() const
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
virtual void Set(IType right)=0
std::vector< std::pair< unsigned int, unsigned int > > m_PadList
Specifies the padding values for the input dimension: heightPad{top, bottom} widthPad{left, right}.
unsigned int GetHeightIndex() const
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
virtual IType Get() const =0
unsigned int GetOffset(const TensorShape &shape, unsigned int b, unsigned int h, unsigned int w, unsigned int c, const DataLayoutIndexed &dataLayout)
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
std::vector< unsigned int > m_BlockShape
Block shape value.
unsigned int GetChannelsIndex() const

◆ SpaceToDepth()

void SpaceToDepth ( const TensorInfo inputInfo,
const TensorInfo outputInfo,
const SpaceToDepthDescriptor params,
Decoder< float > &  inputData,
Encoder< float > &  outputData 
)

Definition at line 36 of file SpaceToDepth.cpp.

References Decoder< IType >::Get(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetHeightIndex(), GetOffset(), TensorInfo::GetShape(), DataLayoutIndexed::GetWidthIndex(), SpaceToDepthDescriptor::m_BlockSize, SpaceToDepthDescriptor::m_DataLayout, Encoder< IType >::Set(), and SpaceToDepth().

Referenced by SpaceToDepth(), and SpaceToDepthLayer::SpaceToDepthLayer().

41 {
42  DataLayoutIndexed dataLayout = params.m_DataLayout;
43 
44  const TensorShape& inputShape = inputInfo.GetShape();
45  const TensorShape& outputShape = outputInfo.GetShape();
46 
47  const unsigned int inputBatchSize = inputShape[0];
48  const unsigned int inputChannels = inputShape[dataLayout.GetChannelsIndex()];
49 
50  const unsigned int outputHeight = outputShape[dataLayout.GetHeightIndex()];
51  const unsigned int outputWidth = outputShape[dataLayout.GetWidthIndex()];
52  const unsigned int outputChannels = outputShape[dataLayout.GetChannelsIndex()];
53 
54  const unsigned int blockSize = params.m_BlockSize;
55 
56  if (blockSize == 0)
57  {
59  "Input shape must be divisible by block size in all spatial dimensions: Block size is"
60  " equal to zero");
61  }
62 
63  for (unsigned int outChannelIndex = 0; outChannelIndex < outputChannels; outChannelIndex++)
64  {
65  unsigned int inChannelIndex = outChannelIndex % inputChannels;
66 
67  unsigned int shiftW = (outChannelIndex / inputChannels) % blockSize;
68  unsigned int shiftH = (outChannelIndex / inputChannels) / blockSize;
69 
70  for (unsigned int outH = 0; outH < outputHeight; outH++)
71  {
72  for (unsigned int outW = 0; outW < outputWidth; outW++)
73  {
74  for (unsigned int inBatchIndex = 0; inBatchIndex < inputBatchSize; inBatchIndex++)
75  {
76  unsigned int inOffset = GetOffset(inputShape,
77  inChannelIndex,
78  (outH * blockSize + shiftH),
79  (outW * blockSize + shiftW),
80  inBatchIndex,
81  dataLayout);
82 
83  unsigned int outOffset = GetOffset(outputShape,
84  outChannelIndex,
85  outH,
86  outW,
87  inBatchIndex,
88  dataLayout);
89 
90  outputData += outOffset;
91  inputData += inOffset;
92  outputData.Set(inputData.Get());
93  inputData -= inOffset;
94  outputData -= outOffset;
95  }
96  }
97  }
98  }
99 }
unsigned int GetWidthIndex() const
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
virtual void Set(IType right)=0
unsigned int GetHeightIndex() const
virtual IType Get() const =0
unsigned int GetOffset(const TensorShape &shape, unsigned int b, unsigned int h, unsigned int w, unsigned int c, const DataLayoutIndexed &dataLayout)
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
unsigned int m_BlockSize
Scalar specifying the input block size. It must be >= 1.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
unsigned int GetChannelsIndex() const

◆ Split()

void Split ( const SplitterQueueDescriptor data,
std::vector< ITensorHandle *>  inputs,
std::vector< ITensorHandle *>  outputs 
)

Definition at line 21 of file Splitter.cpp.

References ARMNN_ASSERT, Encoder< IType >::Get(), TensorInfo::GetNumDimensions(), TensorInfo::GetShape(), GetTensorInfo(), SplitterQueueDescriptor::ViewOrigin::m_Origin, SplitterQueueDescriptor::m_ViewOrigins, and MaxNumOfTensorDimensions.

Referenced by RefSplitterWorkload::ExecuteAsync(), and Splitter().

24 {
25  const TensorInfo& inputInfo = GetTensorInfo(inputs[0]);
26 
27  std::unique_ptr<Decoder<float>> decoderPtr =
28  MakeDecoder<float>(inputInfo, inputs[0]->Map());
29  Decoder<float>& decoder = *decoderPtr;
30 
31  for (unsigned int index = 0; index < inputInfo.GetNumElements(); ++index)
32  {
33  unsigned int indices[MaxNumOfTensorDimensions] = { 0 };
34 
35  unsigned int indexRemainder = index;
36  unsigned int dimensionStride = inputInfo.GetNumElements();
37 
38  for (unsigned int i = 0; i<inputInfo.GetNumDimensions(); i++)
39  {
40  dimensionStride /= inputInfo.GetShape()[i];
41  indices[i] = indexRemainder / dimensionStride; // Use integer division to round down.
42  indexRemainder -= indices[i] * dimensionStride;
43  }
44 
45  for (unsigned int viewIdx = 0; viewIdx < data.m_ViewOrigins.size(); ++viewIdx)
46  {
47  SplitterQueueDescriptor::ViewOrigin const& view = data.m_ViewOrigins[viewIdx];
48 
49  //Split view extents are defined by the size of (the corresponding) input tensor.
50  const TensorInfo& outputInfo = GetTensorInfo(outputs[viewIdx]);
51  ARMNN_ASSERT(outputInfo.GetNumDimensions() == inputInfo.GetNumDimensions());
52 
53  // Check all dimensions to see if this element is inside the given input view.
54  bool insideView = true;
55  for (unsigned int i = 0; i<outputInfo.GetNumDimensions(); i++)
56  {
57  if (indices[i] < view.m_Origin[i])
58  {
59  insideView = false;
60  }
61  if (indices[i] >= view.m_Origin[i] + outputInfo.GetShape()[i])
62  {
63  insideView = false;
64  }
65  }
66 
67  if (insideView)
68  {
69  std::unique_ptr<Encoder<float>> encoderPtr =
70  MakeEncoder<float>(outputInfo, outputs[viewIdx]->Map());
71  Encoder<float>& encoder = *encoderPtr;
72 
73  unsigned int outIndex = 0;
74  unsigned int dimensionStride = 1;
75  float inputValue = 0.f;
76 
77  for (unsigned int i = outputInfo.GetNumDimensions(); i-- > 0;)
78  {
79  outIndex += dimensionStride * (indices[i] - view.m_Origin[i]);
80  dimensionStride *= outputInfo.GetShape()[i];
81  }
82 
83  decoder += index;
84  inputValue = decoder.Get();
85  decoder -= index;
86 
87  encoder += outIndex;
88  encoder.Set(inputValue);
89  break;
90  }
91  }
92  }
93 }
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
armnn::TensorInfo GetTensorInfo(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout, const armnn::DataType dataType)
Definition: TensorUtils.cpp:38
constexpr unsigned int MaxNumOfTensorDimensions
Definition: Types.hpp:31

◆ Splitter()

void armnn::Splitter ( const SplitterQueueDescriptor data,
std::vector< ITensorHandle *>  inputs,
std::vector< ITensorHandle *>  outputs 
)

Definition at line 17 of file Splitter.hpp.

References ARMNN_ASSERT, TensorInfo::GetNumDimensions(), TensorInfo::GetNumElements(), TensorInfo::GetShape(), GetTensorInfo(), SplitterQueueDescriptor::ViewOrigin::m_Origin, SplitterQueueDescriptor::m_ViewOrigins, MaxNumOfTensorDimensions, and Split().

20 {
21  const TensorInfo& inputInfo0 = GetTensorInfo(inputs[0]);
22 
23  for (unsigned int index = 0; index < inputInfo0.GetNumElements(); ++index)
24  {
25  unsigned int indices[MaxNumOfTensorDimensions] = { 0 };
26 
27  unsigned int indexRemainder = index;
28  unsigned int dimensionStride = inputInfo0.GetNumElements();
29 
30  for (unsigned int i = 0; i<inputInfo0.GetNumDimensions(); i++)
31  {
32  dimensionStride /= inputInfo0.GetShape()[i];
33  indices[i] = indexRemainder / dimensionStride; // Use integer division to round down.
34  indexRemainder -= indices[i] * dimensionStride;
35  }
36 
37  for (unsigned int viewIdx = 0; viewIdx < data.m_ViewOrigins.size(); ++viewIdx)
38  {
39  SplitterQueueDescriptor::ViewOrigin const& view = data.m_ViewOrigins[viewIdx];
40 
41  //Split view extents are defined by the size of (the corresponding) input tensor.
42  const TensorInfo& outputInfo = GetTensorInfo(outputs[viewIdx]);
43  ARMNN_ASSERT(outputInfo.GetNumDimensions() == inputInfo0.GetNumDimensions());
44 
45  // Check all dimensions to see if this element is inside the given input view.
46  bool insideView = true;
47  for (unsigned int i = 0; i<outputInfo.GetNumDimensions(); i++)
48  {
49  if (indices[i] < view.m_Origin[i])
50  {
51  insideView = false;
52  }
53  if (indices[i] >= view.m_Origin[i] + outputInfo.GetShape()[i])
54  {
55  insideView = false;
56  }
57  }
58 
59  if (insideView)
60  {
61  unsigned int outIndex = 0;
62  unsigned int dimensionStride = 1;
63 
64  for (unsigned int i = outputInfo.GetNumDimensions(); i-- > 0;)
65  {
66  outIndex += dimensionStride * (indices[i] - view.m_Origin[i]);
67  dimensionStride *= outputInfo.GetShape()[i];
68  }
69 
70  //We are within the view, to copy input data to the output corresponding to this view.
71  DataType* outputData = GetOutputTensorData<DataType>(viewIdx, data);
72  ARMNN_ASSERT(outputData);
73 
74  const DataType* inputData = GetInputTensorData<DataType>(0, data);
75  ARMNN_ASSERT(inputData);
76 
77  outputData[outIndex] = inputData[index];
78  }
79  }
80  }
81 }
DataType
Definition: Types.hpp:48
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
armnn::TensorInfo GetTensorInfo(unsigned int numberOfBatches, unsigned int numberOfChannels, unsigned int height, unsigned int width, const armnn::DataLayout dataLayout, const armnn::DataType dataType)
Definition: TensorUtils.cpp:38
constexpr unsigned int MaxNumOfTensorDimensions
Definition: Types.hpp:31

◆ Stack()

void Stack ( const StackQueueDescriptor data,
std::vector< std::unique_ptr< Decoder< float >>> &  inputs,
Encoder< float > &  output,
const TensorInfo inputInfo,
const TensorInfo outputInfo 
)

Definition at line 12 of file Stack.cpp.

References TensorInfo::GetNumDimensions(), TensorInfo::GetNumElements(), TensorInfo::GetShape(), StackDescriptor::m_Axis, QueueDescriptor::m_Inputs, StackDescriptor::m_NumInputs, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, and Encoder< IType >::Set().

17 {
18  unsigned int outputNumDims = outputInfo.GetNumDimensions();
19  unsigned int inputNumDims = inputInfo.GetNumDimensions();
20 
21  const armnn::TensorShape& outputDims = outputInfo.GetShape();
22  const armnn::TensorShape& inputDims = inputInfo.GetShape();
23 
24  unsigned int axis = data.m_Parameters.m_Axis;
25 
26  // Can perform a simple concatenation when axis == 0
27  if (!axis)
28  {
29  unsigned int numInputs = data.m_Parameters.m_NumInputs;
30  unsigned int inputLength = inputInfo.GetNumElements();
31 
32  for (unsigned int inputIdx=0; inputIdx<numInputs; ++inputIdx)
33  {
34  for (unsigned int elmt=0; elmt<inputLength; ++elmt)
35  {
36  (*inputs[inputIdx])[elmt];
37  output[(inputIdx * inputLength) + elmt];
38  output.Set(inputs[inputIdx]->Get());
39  }
40  }
41  return;
42  }
43 
44  const unsigned int iNumTensors = static_cast<unsigned int>(data.m_Inputs.size());
45  const unsigned int iBatchSize = inputDims[0];
46  const unsigned int iChannels = (inputNumDims > 1) ? inputDims[1] : 1;
47  const unsigned int iHeight = (inputNumDims > 2) ? inputDims[2] : 1;
48  const unsigned int iWidth = (inputNumDims > 3) ? inputDims[3] : 1;
49 
50  const unsigned int oBatchSize = outputDims[1];
51  const unsigned int oChannels = (outputNumDims > 2) ? outputDims[2] : 1;
52  const unsigned int oHeight = (outputNumDims > 3) ? outputDims[3] : 1;
53  const unsigned int oWidth = (outputNumDims > 4) ? outputDims[4] : 1;
54 
55  // Array to store the input coordinates
56  // iCoordinates[0] = i, iCoordinates[1] = bi, iCoordinates[2] = ci
57  // iCoordinates[3] = hi, iCoordinates[4] = wi, iCoordinates[5] = 0
58  // iCoordinates[5] will be always zero and used for not incrementing
59  // the output when the input has less than 4 dimensions
60  std::array<unsigned int, 6> iCoordinates{ 0 };
61 
62  // Array of pointers used to map the output coordinates to the input ones, in accordance with the axis
63  // This array is initialized with &iCoordinates[5] since this will be always zero
64  std::array<unsigned int *, 5> oCoordinates = { &iCoordinates[5],
65  &iCoordinates[5],
66  &iCoordinates[5],
67  &iCoordinates[5],
68  &iCoordinates[5] };
69 
70  // Set the axis coordinate
71  oCoordinates[axis] = &iCoordinates[0];
72 
73  // Map the output coordinates, accounting for the axis
74  unsigned int dim_shift = 0;
75  for(unsigned int dim = 0; dim < inputNumDims; ++dim)
76  {
77  if(dim == axis)
78  {
79  dim_shift++;
80  }
81  oCoordinates[dim + dim_shift] = &iCoordinates[dim + 1];
82  }
83 
84  // Alias for the input coordinates
85  unsigned int &i = iCoordinates[0];
86  unsigned int &bi = iCoordinates[1];
87  unsigned int &ci = iCoordinates[2];
88  unsigned int &hi = iCoordinates[3];
89  unsigned int &wi = iCoordinates[4];
90 
91  // Alias for the output coordinates
92  unsigned int &o = *(oCoordinates[0]);
93  unsigned int &bo = *(oCoordinates[1]);
94  unsigned int &co = *(oCoordinates[2]);
95  unsigned int &ho = *(oCoordinates[3]);
96  unsigned int &wo = *(oCoordinates[4]);
97 
98  // Stack tensors
99  for(; i < iNumTensors; ++(i))
100  {
101  for(bi = 0; bi < iBatchSize; ++(bi))
102  {
103  for(ci = 0; ci < iChannels; ++(ci))
104  {
105  for(hi = 0; hi < iHeight; ++(hi))
106  {
107  for(wi = 0; wi < iWidth; ++(wi))
108  {
109  output[o * oWidth * oHeight * oChannels * oBatchSize +
110  bo * oWidth * oHeight * oChannels +
111  co * oWidth * oHeight +
112  ho * oWidth +
113  wo];
114 
115  output.Set(inputs[i]->Get());
116 
117  ++(*(inputs[i]));
118  }
119  }
120  }
121  }
122  }
123 }
unsigned int GetNumElements() const
Function that calculates the tensor elements by multiplying all dimension size which are Specified...
Definition: Tensor.cpp:181
virtual void Set(IType right)=0

◆ StrEqual()

constexpr bool armnn::StrEqual ( const char *  strA,
const char(&)  strB[N] 
)

Definition at line 170 of file TypesUtils.hpp.

Referenced by ParseComputeDevice().

171 {
172  bool isEqual = true;
173  for (unsigned i = 0; isEqual && (i < N); ++i)
174  {
175  isEqual = (strA[i] == strB[i]);
176  }
177  return isEqual;
178 }

◆ StridedSlice()

void StridedSlice ( const TensorInfo inputInfo,
const StridedSliceDescriptor params,
const void *  inputData,
void *  outputData,
unsigned int  dataTypeSize 
)

Definition at line 90 of file StridedSlice.cpp.

References TensorInfo::GetShape(), and numeric_cast().

95 {
96  const unsigned char* input = reinterpret_cast<const unsigned char*>(inputData);
97  unsigned char* output = reinterpret_cast<unsigned char*>(outputData);
98 
99  const TensorShape inputShape = ExtendShape(inputInfo.GetShape(), 4);
100 
101  StridedSliceDescriptor paddedParams = params;
102 
103  // Pad parameters to 4 dimensions
104  PadParams(paddedParams, 4);
105 
106  const int start0 = paddedParams.GetStartForAxis(inputShape, 0);
107  const int stop0 = paddedParams.GetStopForAxis (inputShape, 0, start0);
108 
109  const int start1 = paddedParams.GetStartForAxis(inputShape, 1);
110  const int stop1 = paddedParams.GetStopForAxis (inputShape, 1, start1);
111 
112  const int start2 = paddedParams.GetStartForAxis(inputShape, 2);
113  const int stop2 = paddedParams.GetStopForAxis (inputShape, 2, start2);
114 
115  const int start3 = paddedParams.GetStartForAxis(inputShape, 3);
116  const int stop3 = paddedParams.GetStopForAxis (inputShape, 3, start3);
117 
118  const int step = armnn::numeric_cast<int>(dataTypeSize);
119 
120  for (int in0 = start0;
121  !LoopCondition(in0, stop0, paddedParams.m_Stride[0]);
122  in0 += paddedParams.m_Stride[0])
123  {
124  for (int in1 = start1;
125  !LoopCondition(in1, stop1, paddedParams.m_Stride[1]);
126  in1 += paddedParams.m_Stride[1])
127  {
128  for (int in2 = start2;
129  !LoopCondition(in2, stop2, paddedParams.m_Stride[2]);
130  in2 += paddedParams.m_Stride[2])
131  {
132  for (int in3 = start3;
133  !LoopCondition(in3, stop3, paddedParams.m_Stride[3]);
134  in3 += paddedParams.m_Stride[3])
135  {
136  int dim1 = armnn::numeric_cast<int>(inputShape[1]);
137  int dim2 = armnn::numeric_cast<int>(inputShape[2]);
138  int dim3 = armnn::numeric_cast<int>(inputShape[3]);
139 
140  int inputOffset = (((in0 * dim1 + in1) * dim2 + in2) * dim3 + in3) * step;
141  ::memcpy(output, input + inputOffset, dataTypeSize);
142  output += step;
143  }
144  }
145  }
146  }
147 }
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35

◆ StringToLogLevel()

LogSeverity armnn::StringToLogLevel ( std::string  level)
inline

Definition at line 36 of file Logging.hpp.

References Debug, Error, Fatal, Info, Trace, and Warning.

Referenced by DelegateOptions::SetLoggingSeverity().

37 {
38  // Transfer to lower case
39  std::transform(level.begin(), level.end(), level.begin(),
40  [](unsigned char c){ return std::tolower(c); }
41  );
42 
43  if (level == "trace")
44  {
45  return LogSeverity::Trace;
46  }
47  else if (level == "debug")
48  {
49  return LogSeverity::Debug;
50  }
51  else if (level == "info")
52  {
53  return LogSeverity::Info;
54  }
55  else if (level == "warning")
56  {
57  return LogSeverity::Warning;
58  }
59  else if (level == "error")
60  {
61  return LogSeverity::Error;
62  }
63  else if (level == "fatal")
64  {
65  return LogSeverity::Fatal;
66  }
67  else
68  {
69  throw armnn::Exception("Unknown severity level for logging: '" + level +
70  "'. Valid options: trace, debug, info, warning, error, fatal");
71  }
72 }
void Debug(const TensorInfo &inputInfo, const T *inputData, LayerGuid guid, const std::string &layerName, unsigned int slotIndex, bool outputsToFile)
Definition: Debug.cpp:97
Base class for all ArmNN exceptions so that users can filter to just those.
Definition: Exceptions.hpp:46

◆ swap() [1/2]

void armnn::swap ( OriginsDescriptor first,
OriginsDescriptor second 
)

Definition at line 350 of file Descriptors.cpp.

References ViewsDescriptor::swap, and swap().

Referenced by BackendId::operator=(), SquashEqualSiblingsImpl< Comparable >::Run(), and BackendRegistry::Swap().

351 {
352  using std::swap;
353  swap(first.m_NumViews, second.m_NumViews);
354  swap(first.m_NumDimensions, second.m_NumDimensions);
355  swap(first.m_ViewOrigins, second.m_ViewOrigins);
356  swap(first.m_ConcatAxis, second.m_ConcatAxis);
357 }
void swap(ViewsDescriptor &first, ViewsDescriptor &second)

◆ swap() [2/2]

void armnn::swap ( ViewsDescriptor first,
ViewsDescriptor second 
)

Definition at line 359 of file Descriptors.cpp.

References ViewsDescriptor::swap.

Referenced by swap().

360 {
361  using std::swap;
362  swap(first.m_Origins, second.m_Origins);
363  swap(first.m_ViewSizes, second.m_ViewSizes);
364 }
void swap(ViewsDescriptor &first, ViewsDescriptor &second)

◆ TopKSort()

void TopKSort ( unsigned int  k,
unsigned int *  indices,
const float *  values,
unsigned int  numElement 
)

Definition at line 24 of file DetectionPostProcess.cpp.

Referenced by DetectionPostProcess(), and NonMaxSuppression().

25 {
26  std::partial_sort(indices, indices + k, indices + numElement,
27  [&values](unsigned int i, unsigned int j) { return values[i] > values[j]; });
28 }

◆ TosaRefBackendId()

constexpr const char* armnn::TosaRefBackendId ( )

Definition at line 10 of file TosaRefBackendId.hpp.

Referenced by TosaRefBackend::GetIdStatic().

10 { return "TosaRef"; }

◆ TosaRefPreCompiledWorkloadValidate()

bool TosaRefPreCompiledWorkloadValidate ( std::string *  )

Definition at line 101 of file TosaRefPreCompiledWorkload.cpp.

102 {
103  return true;
104 }

◆ TosaRefTensorHandleFactoryId()

constexpr const char* armnn::TosaRefTensorHandleFactoryId ( )

Definition at line 15 of file TosaRefTensorHandleFactory.hpp.

Referenced by TosaRefTensorHandleFactory::GetIdStatic().

15 { return "Arm/TosaRef/TensorHandleFactory"; }

◆ TransposeConvolution2dImpl()

void TransposeConvolution2dImpl ( const TransposeConvolution2dDescriptor descriptor,
const TensorShape inputShape,
Decoder< float > &  inputDecoder,
const TensorShape outputShape,
Encoder< float > &  outputEncoder,
const TensorShape weightsShape,
Decoder< float > &  weightsDecoder,
Decoder< float > *  biasesDecoder 
)

Definition at line 15 of file TransposeConvolution2d.cpp.

References Decoder< IType >::DecodeTensor(), Decoder< IType >::Get(), DataLayoutIndexed::GetChannelsIndex(), DataLayoutIndexed::GetHeightIndex(), DataLayoutIndexed::GetIndex(), TensorShape::GetNumElements(), DataLayoutIndexed::GetWidthIndex(), TransposeConvolution2dDescriptor::m_BiasEnabled, TransposeConvolution2dDescriptor::m_DataLayout, TransposeConvolution2dDescriptor::m_PadLeft, TransposeConvolution2dDescriptor::m_PadTop, TransposeConvolution2dDescriptor::m_StrideX, TransposeConvolution2dDescriptor::m_StrideY, NHWC, and Encoder< IType >::Set().

Referenced by RefTransposeConvolution2dWorkload::ExecuteAsync().

23 {
24  if (descriptor.m_BiasEnabled && !biasesDecoder)
25  {
26  throw InvalidArgumentException("Biases enabled but no bias data provided");
27  }
28  const DataLayoutIndexed dataLayoutIndexed(descriptor.m_DataLayout);
29  const unsigned int channelsIndex = dataLayoutIndexed.GetChannelsIndex();
30  const unsigned int heightIndex = dataLayoutIndexed.GetHeightIndex();
31  const unsigned int widthIndex = dataLayoutIndexed.GetWidthIndex();
32 
33  const unsigned int numBatches = inputShape[0];
34 
35  const unsigned int inputWidth = inputShape[widthIndex];
36  const unsigned int inputHeight = inputShape[heightIndex];
37  const unsigned int inputDepth = inputShape[channelsIndex];
38 
39  const unsigned int weightsHeight = weightsShape[heightIndex];
40  const unsigned int weightsWidth = weightsShape[widthIndex];
41  const unsigned int weightsDepth = weightsShape[channelsIndex];
42 
43  const unsigned int outputHeight = outputShape[heightIndex];
44  const unsigned int outputWidth = outputShape[widthIndex];
45  const unsigned int outputDepth = outputShape[channelsIndex];
46 
47  const unsigned int paddingLeft = descriptor.m_PadLeft;
48  const unsigned int paddingTop = descriptor.m_PadTop;
49 
50  const unsigned int strideX = descriptor.m_StrideX;
51  const unsigned int strideY = descriptor.m_StrideY;
52 
53  std::vector<float> outputBuffer(outputShape.GetNumElements(), 0);
54 
55  const std::vector<float> inputVec = inputDecoder.DecodeTensor(inputShape);
56  const std::vector<float> filterVec = weightsDecoder.DecodeTensor(weightsShape);
57 
58  for (unsigned int batch = 0u; batch < numBatches; ++batch)
59  {
60  for (unsigned int yInput = 0u; yInput < inputHeight; ++yInput)
61  {
62  for (unsigned int xInput = 0u; xInput < inputWidth; ++xInput)
63  {
64  unsigned int xOutputOrigin = xInput * strideX - paddingLeft;
65  unsigned int yOutputOrigin = yInput * strideY - paddingTop;
66 
67  for (unsigned int dOutput = 0u; dOutput < outputDepth; ++dOutput)
68  {
69  for (unsigned int yWeights = 0u; yWeights < weightsHeight; ++yWeights)
70  {
71  for (unsigned int xWeights = 0u; xWeights < weightsWidth; ++xWeights)
72  {
73  unsigned int yOutput = yOutputOrigin + yWeights;
74  unsigned int xOutput = xOutputOrigin + xWeights;
75 
76  if (yOutput < outputHeight && xOutput< outputWidth)
77  {
78  for (unsigned int dInput = 0u; dInput < inputDepth; dInput++)
79  {
80  unsigned int inputIndex;
81  unsigned int outputIndex;
82  unsigned int weightsIndex;
83 
84  if(descriptor.m_DataLayout == armnn::DataLayout::NHWC)
85  {
86  inputIndex = batch * inputHeight * inputWidth * inputDepth +
87  yInput * inputWidth * inputDepth +
88  xInput * inputDepth +
89  dInput;
90 
91  weightsIndex = dOutput * weightsHeight * weightsWidth * weightsDepth +
92  yWeights * weightsWidth * weightsDepth +
93  xWeights * weightsDepth +
94  dInput;
95 
96  outputIndex = batch * outputHeight * outputWidth * outputDepth +
97  yOutput * outputWidth * outputDepth +
98  xOutput * outputDepth +
99  dOutput;
100  }
101  else
102  {
103  inputIndex = batch * inputDepth * inputHeight * inputWidth +
104  dInput * inputHeight * inputWidth +
105  yInput * inputWidth +
106  xInput;
107 
108  weightsIndex = dOutput * weightsDepth * weightsHeight * weightsWidth +
109  dInput * weightsHeight * weightsWidth +
110  yWeights * weightsWidth +
111  xWeights;
112 
113  outputIndex = batch * outputDepth * outputHeight * outputWidth +
114  dOutput * outputHeight * outputWidth +
115  yOutput * outputWidth +
116  xOutput;
117  }
118 
119  outputBuffer[outputIndex] += inputVec[inputIndex] * filterVec[weightsIndex];
120  }
121  }
122  }
123  }
124 
125  }
126  }
127  }
128  }
129 
130  // Apply bias (if enabled)
131  if (descriptor.m_BiasEnabled)
132  {
133  outputEncoder[0];
134  Decoder<float>& rBiasesDecoder = *biasesDecoder;
135 
136  for (unsigned int batch = 0u; batch < numBatches; ++batch)
137  {
138  for (unsigned int dOutput = 0u; dOutput < outputDepth; ++dOutput)
139  {
140  rBiasesDecoder[dOutput];
141  for (unsigned int yOutput = 0u; yOutput < outputHeight; ++yOutput)
142  {
143  for (unsigned int xOutput = 0u; xOutput < outputWidth; ++xOutput)
144  {
145  const unsigned int outputIndex =
146  dataLayoutIndexed.GetIndex(outputShape, batch, dOutput, yOutput, xOutput);
147  outputBuffer[outputIndex] += rBiasesDecoder.Get();
148  }
149  }
150  }
151  }
152  }
153  outputEncoder[0];
154  for (float output : outputBuffer)
155  {
156  outputEncoder.Set(output);
157  ++outputEncoder;
158  }
159 }
virtual std::vector< float > DecodeTensor(const TensorShape &tensorShape, bool isDepthwise=false)=0
virtual void Set(IType right)=0
virtual IType Get() const =0
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...

◆ TrueFunc()

bool armnn::TrueFunc ( Optional< std::string &>  reasonIfUnsupported,
Params &&...  params 
)

Definition at line 54 of file LayerSupportCommon.hpp.

References IgnoreUnused().

55 {
56  IgnoreUnused(reasonIfUnsupported);
57  IgnoreUnused(params...);
58  return true;
59 }
void IgnoreUnused(Ts &&...)

◆ ValidateSourcesMatchOptimizedNetwork()

void armnn::ValidateSourcesMatchOptimizedNetwork ( std::vector< BackendOptions optimizedOptions,
const INetworkProperties networkProperties 
)

This function performs a sanity check to ensure that the combination of input and output memory source matches the values for importEnabled and exportEnabled that were specified during optimization.

During optimization the tensor handle factories are chosen based on whether import and export are enabled. If the user then specifies something incompatible here it can lead to problems.

Parameters
optimizedOptions
networkProperties

Definition at line 98 of file LoadedNetwork.cpp.

References BackendOptions::Var::AsBool(), BackendOptions::BackendOption::GetName(), BackendOptions::BackendOption::GetValue(), INetworkProperties::m_InputSource, INetworkProperties::m_OutputSource, and Undefined.

Referenced by LoadedNetwork::MakeLoadedNetwork().

100 {
101  // Find the "Global" backend options. During the optimize phase the values of importEnabled and exportEnabled are
102  // added as backend options.
103  const vector<BackendOptions>::iterator& backendItr =
104  find_if(optimizedOptions.begin(), optimizedOptions.end(), [](const BackendOptions& backend) {
105  if (backend.GetBackendId().Get() == "Global")
106  {
107  return true;
108  }
109  else
110  {
111  return false;
112  }
113  });
114  bool importEnabled = false;
115  bool exportEnabled = false;
116  if (backendItr != optimizedOptions.end())
117  {
118  // Find the importEnabled and exportEnabled values.
119  for (size_t i = 0; i < backendItr->GetOptionCount(); i++)
120  {
121  const BackendOptions::BackendOption& option = backendItr->GetOption(i);
122  if (option.GetName() == "ImportEnabled")
123  {
124  importEnabled = option.GetValue().AsBool();
125  }
126  if (option.GetName() == "ExportEnabled")
127  {
128  exportEnabled = option.GetValue().AsBool();
129  }
130  }
131  }
132 
133  // Now that we have values for import and export compare them to the MemorySource variables.
134  // Any value of MemorySource that's not "Undefined" implies that we need to do an import of some kind.
135  if ((networkProperties.m_InputSource == MemorySource::Undefined && importEnabled) ||
136  (networkProperties.m_InputSource != MemorySource::Undefined && !importEnabled))
137  {
138  auto message = fmt::format("The input memory source specified, '{0}',", networkProperties.m_InputSource);
139  if (!importEnabled)
140  {
141  message.append(" requires that memory import be enabled. However, "
142  "it was disabled when this network was optimized.");
143  }
144  else
145  {
146  message.append(" requires that memory import be disabled. However, "
147  "it was enabled when this network was optimized.");
148  }
149  throw InvalidArgumentException(message);
150  }
151 
152  if ((networkProperties.m_OutputSource == MemorySource::Undefined && exportEnabled) ||
153  (networkProperties.m_OutputSource != MemorySource::Undefined && !exportEnabled))
154  {
155  auto message = fmt::format("The output memory source specified, '{0}',", networkProperties.m_OutputSource);
156  if (!exportEnabled)
157  {
158  message.append(" requires that memory export be enabled. However, "
159  "it was disabled when this network was optimized.");
160  }
161  else
162  {
163  message.append(" requires that memory export be disabled. However, "
164  "it was enabled when this network was optimized.");
165  }
166  throw InvalidArgumentException(message);
167  }
168 } // anonymous

◆ VerifyClContextBuffer()

bool armnn::VerifyClContextBuffer ( flatbuffers::Verifier &  verifier)
inline

Definition at line 157 of file ClContextSchema_generated.h.

References ClContextIdentifier().

158  {
159  return verifier.VerifyBuffer<armnn::ClContext>(ClContextIdentifier());
160 }
const char * ClContextIdentifier()

◆ VerifySizePrefixedClContextBuffer()

bool armnn::VerifySizePrefixedClContextBuffer ( flatbuffers::Verifier &  verifier)
inline

Definition at line 162 of file ClContextSchema_generated.h.

References ClContextIdentifier().

163  {
164  return verifier.VerifySizePrefixedBuffer<armnn::ClContext>(ClContextIdentifier());
165 }
const char * ClContextIdentifier()

◆ VerifyTensorInfoDataType()

void armnn::VerifyTensorInfoDataType ( const armnn::TensorInfo info,
armnn::DataType  dataType 
)
inline

Definition at line 351 of file TypesUtils.hpp.

References TensorInfo::GetDataType(), GetDataTypeName(), and TensorInfo::GetShape().

352 {
353  if (info.GetDataType() != dataType)
354  {
355  std::stringstream ss;
356  ss << "Unexpected datatype:" << armnn::GetDataTypeName(info.GetDataType())
357  << " for tensor:" << info.GetShape()
358  << ". The type expected to be: " << armnn::GetDataTypeName(dataType);
359  throw armnn::Exception(ss.str());
360  }
361 }
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
constexpr const char * GetDataTypeName(DataType dataType)
Definition: TypesUtils.hpp:202
DataType GetDataType() const
Definition: Tensor.hpp:198
Base class for all ArmNN exceptions so that users can filter to just those.
Definition: Exceptions.hpp:46

◆ WrapClError()

RuntimeException armnn::WrapClError ( const cl::Error clError,
const CheckLocation location 
)
inline

Definition at line 152 of file ClWorkloadUtils.hpp.

References Exception::what().

Referenced by ClWorkloadFactory::AfterWorkloadsCreated(), and RunClFunction().

153 {
154  std::stringstream message;
155  message << "CL error: " << clError.what() << ". Error code: " << clError.err();
156 
157  return RuntimeException(message.str(), location);
158 }

Variable Documentation

◆ cpuAccCapabilities

const BackendCapabilities cpuAccCapabilities("CpuAcc", { {"NonConstWeights", false}, {"AsyncExecution", false}, {"ProtectedContentAllocation", false}, {"ConstantTensorsAsInputs", true}, {"PreImportIOTensors", false}, {"ExternallyManagedMemory", true}, {"MultiAxisPacking", false}, {"SingleAxisPacking", true} })

◆ cpuRefCapabilities

const BackendCapabilities cpuRefCapabilities("CpuRef", { {"NonConstWeights", true}, {"AsyncExecution", true}, {"ProtectedContentAllocation", false}, {"ConstantTensorsAsInputs", true}, {"PreImportIOTensors", true}, {"ExternallyManagedMemory", true}, {"MultiAxisPacking", false}, {"SingleAxisPacking", true} })

◆ EXPIRE_RATE

constexpr unsigned int EXPIRE_RATE = 3U

Variable to control expire rate of priority queue.

Definition at line 37 of file Types.hpp.

Referenced by Threadpool::TerminateThreadPool().

◆ g_AggregateProfilingEventsByInference

constexpr bool g_AggregateProfilingEventsByInference = true

Definition at line 37 of file Profiling.cpp.

◆ g_ProfilingEventCountHint

constexpr std::size_t g_ProfilingEventCountHint = 1024

Definition at line 29 of file Profiling.cpp.

◆ g_WriteProfilingEventSequence

constexpr bool g_WriteProfilingEventSequence = true

Definition at line 32 of file Profiling.cpp.

◆ g_WriteReportToStdOutOnProfilerDestruction

constexpr bool g_WriteReportToStdOutOnProfilerDestruction = false

Definition at line 41 of file Profiling.cpp.

◆ gpuAccCapabilities

const BackendCapabilities gpuAccCapabilities("GpuAcc", { {"NonConstWeights", false}, {"AsyncExecution", false}, {"ProtectedContentAllocation", true}, {"ConstantTensorsAsInputs", true}, {"PreImportIOTensors", false}, {"ExternallyManagedMemory", true}, {"MultiAxisPacking", false}, {"SingleAxisPacking", true} })

◆ LOWEST_CAPTURE_PERIOD

constexpr unsigned int LOWEST_CAPTURE_PERIOD = 10000u

The lowest performance data capture interval we support is 10 miliseconds.

Definition at line 34 of file Types.hpp.

◆ MaxNumOfTensorDimensions

◆ oldCpuRefCapabilities

const std::set<armnn::BackendCapability> oldCpuRefCapabilities
Initial value:
{
}
Constant weights can be accessed through the descriptors, On the other hand, non-const weights can be...

Definition at line 24 of file RefBackend.hpp.

◆ paddingRequiredLayers

const std::set<armnn::LayerType> paddingRequiredLayers
Initial value:
{
LayerType::Convolution2d,
LayerType::DepthwiseConvolution2d,
LayerType::Lstm,
LayerType::Mean,
LayerType::QuantizedLstm,
LayerType::TransposeConvolution2d
}
float Dequantize(QuantizedType value, float scale, int32_t offset)
Dequantize an 8-bit data type into a floating point data type.
Definition: TypesUtils.cpp:46
void Stack(const StackQueueDescriptor &data, std::vector< std::unique_ptr< Decoder< float >>> &inputs, Encoder< float > &output, const TensorInfo &inputInfo, const TensorInfo &outputInfo)
Definition: Stack.cpp:12
void DepthToSpace(const TensorInfo &inputInfo, const DepthToSpaceDescriptor &descriptor, const void *inputData, void *outputData, unsigned int dataTypeSize)
void ArgMinMax(Decoder< float > &in, OUT *out, const TensorInfo &inputTensorInfo, const TensorInfo &outputTensorInfo, ArgMinMaxFunction function, int axis)
Definition: ArgMinMax.cpp:16
void Permute(const armnn::TensorShape &dstShape, const armnn::PermutationVector &mappings, const void *src, void *dst, size_t dataTypeSize)
Definition: Permute.cpp:131
void Gather(const TensorInfo &paramsInfo, const TensorInfo &indicesInfo, const TensorInfo &outputInfo, Decoder< float > &params, const int32_t *indices, Encoder< float > &output, const int32_t axis)
Definition: Gather.cpp:17
QuantizedType Quantize(float value, float scale, int32_t offset)
Quantize a floating point data type into an 8-bit data type.
Definition: TypesUtils.cpp:30
void Pooling2d(Decoder< float > &rInputDecoder, Encoder< float > &rOutputEncoder, const TensorInfo &inputInfo, const TensorInfo &outputInfo, const Pooling2dDescriptor &params)
Computes the Pooling2d operation.
Definition: Pooling2d.cpp:142
void FullyConnected(const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rWeightsShape, Decoder< float > &rWeightDecoder, Decoder< float > *pBiasDecoder, const bool biasEnabled, const unsigned int K, const bool transposeWeights)
Performs a matrix multiplication and optionally adds a bias.

Definition at line 16 of file NeonTensorHandleFactory.hpp.

Referenced by NeonTensorHandleFactory::GetCapabilities().

◆ tl_Profiler

thread_local IProfiler* tl_Profiler = nullptr

Definition at line 591 of file Profiling.cpp.

Referenced by ProfilerManager::GetProfiler().

◆ wordSize

constexpr size_t wordSize = sizeof(size_t) * 8