ArmNN
 22.11
TfLiteParser.cpp
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1 //
2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "TfLiteParser.hpp"
7 
9 #include "armnn/LstmParams.hpp"
10 
11 #include <armnn/BackendOptions.hpp>
12 #include <armnn/Descriptors.hpp>
13 #include <armnn/Exceptions.hpp>
14 #include <armnn/Logging.hpp>
15 #include <armnn/Tensor.hpp>
17 #include <armnn/TypesUtils.hpp>
18 #include <armnn/utility/Assert.hpp>
21 
22 // armnnUtils:
23 #include <armnnUtils/Permute.hpp>
25 
26 #include <ParserHelper.hpp>
27 #include <VerificationHelpers.hpp>
28 
29 // The generated code based on the Tf Lite schema:
30 #include <schema_generated.h>
31 
32 #include <flatbuffers/flexbuffers.h>
33 
34 #include <fmt/format.h>
35 
36 #include <algorithm>
37 #include <iostream>
38 #include <limits>
39 #include <numeric>
40 
41 #define ARMNN_THROW_PARSE_EXCEPTION(msg) \
42  { \
43  throw armnn::ParseException( static_cast<const std::stringstream&>( std::stringstream() << msg \
44  << ": " \
45  << CHECK_LOCATION().AsString()).str()); \
46  }
47 
48 using namespace armnn;
50 namespace armnnTfLiteParser
51 {
52 
53 ITfLiteParser::ITfLiteParser(const armnn::Optional<TfLiteParserOptions>& options) :
54  pTfLiteParserImpl(new TfLiteParserImpl(options)) {}
55 
56 ITfLiteParser::~ITfLiteParser() = default;
57 
58 ITfLiteParser* ITfLiteParser::CreateRaw(const armnn::Optional<TfLiteParserOptions>& options)
59 {
60  return new ITfLiteParser(options);
61 }
62 
63 ITfLiteParserPtr ITfLiteParser::Create(const armnn::Optional<TfLiteParserOptions>& options)
64 {
65  return ITfLiteParserPtr(CreateRaw(options), &ITfLiteParser::Destroy);
66 }
67 
68 void ITfLiteParser::Destroy(ITfLiteParser* parser)
69 {
70  delete parser;
71 }
72 
73 armnn::INetworkPtr ITfLiteParser::CreateNetworkFromBinaryFile(const char* graphFile)
74 {
75  return pTfLiteParserImpl->CreateNetworkFromBinaryFile(graphFile);
76 }
77 
78 armnn::INetworkPtr ITfLiteParser::CreateNetworkFromBinary(const std::vector<uint8_t>& binaryContent)
79 {
80  return pTfLiteParserImpl->CreateNetworkFromBinary(binaryContent);
81 }
82 
83 BindingPointInfo ITfLiteParser::GetNetworkInputBindingInfo(size_t subgraphId,
84  const std::string& name) const
85 {
86  return pTfLiteParserImpl->GetNetworkInputBindingInfo(subgraphId, name);
87 }
88 
89 BindingPointInfo ITfLiteParser::GetNetworkOutputBindingInfo(size_t subgraphId,
90  const std::string& name) const
91 {
92  return pTfLiteParserImpl->GetNetworkOutputBindingInfo(subgraphId, name);
93 }
94 
95 size_t ITfLiteParser::GetSubgraphCount() const
96 {
97  return pTfLiteParserImpl->GetSubgraphCount();
98 }
99 
100 std::vector<std::string> ITfLiteParser::GetSubgraphInputTensorNames(size_t subgraphId) const
101 {
102  return pTfLiteParserImpl->GetSubgraphInputTensorNames(subgraphId);
103 }
104 
105 std::vector<std::string> ITfLiteParser::GetSubgraphOutputTensorNames(size_t subgraphId) const
106 {
107  return pTfLiteParserImpl->GetSubgraphOutputTensorNames(subgraphId);
108 }
109 
110 namespace
111 {
112 
113 const uint32_t VIRTUAL_OPERATOR_ID = std::numeric_limits<uint32_t>::max();
114 
115 void CheckSubgraph(const TfLiteParserImpl::ModelPtr& model,
116  size_t subgraphIndex,
117  const CheckLocation& location)
118 {
119  if (model.get() == nullptr)
120  {
121  throw ParseException(
122  fmt::format("{} was called with invalid (null) model. "
123  "Possible reason is that the model is not yet loaded and Unpack(ed). "
124  "subgraph:{} at {}",
125  location.m_Function,
126  subgraphIndex,
127  location.FileLine()));
128  }
129  else if (subgraphIndex >= model->subgraphs.size())
130  {
131  throw ParseException(
132  fmt::format("{} was called with an invalid subgraph index. "
133  "subgraph:{} at {}",
134  location.m_Function,
135  subgraphIndex,
136  location.FileLine()));
137  }
138 }
139 
140 #define CHECK_SUBGRAPH(MODEL, SUBGRAPH_INDEX) \
141  CheckSubgraph(MODEL, SUBGRAPH_INDEX, CHECK_LOCATION())
142 
143 void CheckModel(const TfLiteParserImpl::ModelPtr& model,
144  size_t subgraphIndex,
145  size_t operatorIndex,
146  const CheckLocation& location)
147 {
148  if (model.get() == nullptr)
149  {
150  throw ParseException(
151  fmt::format("{} was called with invalid (null) model. "
152  "Possible reason is that the model is not yet loaded and Unpack(ed). "
153  "subgraph:{} operator:{} at {}",
154  location.m_Function,
155  subgraphIndex,
156  operatorIndex,
157  location.FileLine()));
158  }
159  else if (subgraphIndex >= model->subgraphs.size())
160  {
161  throw ParseException(
162  fmt::format("{} was called with an invalid subgraph index. "
163  "subgraph:{} operator:{} at {}",
164  location.m_Function,
165  subgraphIndex,
166  operatorIndex,
167  location.FileLine()));
168  }
169  else if (operatorIndex >= model->subgraphs[subgraphIndex]->operators.size() &&
170  operatorIndex != VIRTUAL_OPERATOR_ID)
171  {
172  throw ParseException(
173  fmt::format("{} was called with an invalid operator index. "
174  "subgraph:{} operator:{} at {}",
175  location.m_Function,
176  subgraphIndex,
177  operatorIndex,
178  location.FileLine()));
179  }
180 }
181 
182 #define CHECK_MODEL(MODEL, SUBGRAPH_INDEX, OPERATOR_INDEX) \
183  CheckModel(MODEL, SUBGRAPH_INDEX, OPERATOR_INDEX, CHECK_LOCATION())
184 
185 void CheckTensor(const TfLiteParserImpl::ModelPtr& model,
186  size_t subgraphIndex,
187  size_t tensorIndex,
188  const CheckLocation& location)
189 {
190  // not checking model, because I assume CHECK_MODEL already run
191  // and checked that. An assert would do.
192  ARMNN_ASSERT_MSG(model.get() != nullptr, "Expecting a valid model in this function");
193 
194  // also subgraph index should be checked by CHECK_MODEL so
195  // I only add an assert here
196  ARMNN_ASSERT_MSG(subgraphIndex < model->subgraphs.size(), "Expecting a valid subgraph index");
197 
198  // the tensor index is the only one to check here
199  if (tensorIndex >= model->subgraphs[subgraphIndex]->tensors.size())
200  {
201  throw ParseException(
202  fmt::format("{} was called with an invalid tensor index. "
203  "subgraph:{} tensor:{} at {}",
204  location.m_Function,
205  subgraphIndex,
206  tensorIndex,
207  location.FileLine()));
208  }
209 }
210 
211 #define CHECK_TENSOR(MODEL, SUBGRAPH_INDEX, TENSOR_INDEX) \
212  CheckTensor(MODEL, SUBGRAPH_INDEX, TENSOR_INDEX, CHECK_LOCATION())
213 
214 void CheckTensorPtr(TfLiteParserImpl::TensorRawPtr rawPtr,
215  const CheckLocation& location)
216 {
217  if (rawPtr == nullptr)
218  {
219  throw ParseException(
220  fmt::format("{} was called with a null tensor pointer at {}", location.m_Function, location.FileLine()));
221  }
222 }
223 
224 #define CHECK_TENSOR_PTR(TENSOR_PTR) \
225  CheckTensorPtr(TENSOR_PTR, CHECK_LOCATION())
226 
227 void CheckBuffer(const TfLiteParserImpl::ModelPtr& model,
228  size_t bufferIndex,
229  const CheckLocation& location)
230 {
231  if (model.get() == nullptr)
232  {
233  throw ParseException(
234  fmt::format("{} was called with invalid (null) model. "
235  "Possible reason is that the model is not yet loaded and Unpack(ed). "
236  "buffer:{} at {}",
237  location.m_Function,
238  bufferIndex,
239  location.FileLine()));
240  }
241  else if (bufferIndex >= model->buffers.size())
242  {
243  throw ParseException(
244  fmt::format("{} was called with an invalid buffer index. "
245  "buffer index:{} at {}",
246  location.m_Function,
247  bufferIndex,
248  location.FileLine()));
249  }
250  else if (model->buffers[bufferIndex].get() == nullptr)
251  {
252  throw ParseException(
253  fmt::format("The buffer #{} is null. {}",
254  bufferIndex,
255  location.AsString()));
256  }
257 }
258 
259 #define CHECK_BUFFER(MODEL, BUFFER_INDEX) \
260  CheckBuffer(MODEL, BUFFER_INDEX, CHECK_LOCATION())
261 
262 void CheckBufferSize(TfLiteParserImpl::BufferRawPtr bufferPtr,
263  const armnn::TensorInfo& tensorInfo,
264  uint32_t bufferId,
265  const CheckLocation& location)
266 {
267  if (bufferPtr == nullptr)
268  {
269  throw ParseException(
270  fmt::format("BufferPtr is null for buffer:{}. {}",
271  bufferId,
272  location.AsString()));
273  }
274  else if(tensorInfo.GetNumElements() > bufferPtr->data.size() ||
275  tensorInfo.GetNumBytes() > bufferPtr->data.size())
276  {
277  std::stringstream ss;
278  ss << "Buffer #" << bufferId << " has " << bufferPtr->data.size() << " bytes. "
279  << "For tensor: " << tensorInfo.GetShape()
280  << " expecting: " << tensorInfo.GetNumBytes() << " bytes and "
281  << tensorInfo.GetNumElements() << " elements. " << location.AsString();
282  throw ParseException(ss.str());
283  }
284 }
285 
286 
287 tflite::BuiltinOperator GetOpCode(const TfLiteParserImpl::ModelPtr& model, size_t subgraphIndex, size_t operatorIndex)
288 {
289  const auto& operatorPtr = model->subgraphs[subgraphIndex]->operators[operatorIndex];
290  auto opcodeIndex = operatorPtr->opcode_index;
291 
292 // work around the introduction of the deprecated_builtin_code introduced in 2.4 in a backwards compatible manner
293 #if defined(ARMNN_POST_TFLITE_2_3)
294  auto opcode = std::max(model->operator_codes[opcodeIndex]->builtin_code,
295  static_cast<tflite::BuiltinOperator>(model->operator_codes[opcodeIndex]->deprecated_builtin_code));
296 #else
297  auto opcode = model->operator_codes[opcodeIndex]->builtin_code;
298 #endif
299  return opcode;
300 }
301 
302 std::vector<unsigned int> GetUIntBuffer(armnn::TensorInfo info,
303  const TfLiteParserImpl::ModelPtr& model,
304  size_t bufferIndex)
305 {
306  TfLiteParserImpl::BufferRawPtr bufferPtr = TfLiteParserImpl::GetBuffer(model, bufferIndex);
307  std::vector<unsigned int> buffer(info.GetNumElements());
308 
309  if (info.GetDataType() == DataType::Signed32)
310  {
311  ::memcpy(buffer.data(), bufferPtr->data.data(), bufferPtr->data.size());
312  }
313  else if (info.GetDataType() == DataType::Signed64)
314  {
315  std::vector<uint64_t> uint64Buffer(info.GetNumElements());
316  ::memcpy(uint64Buffer.data(), bufferPtr->data.data(), bufferPtr->data.size());
317  buffer.assign(std::begin(uint64Buffer), std::end(uint64Buffer));
318  }
319  return buffer;
320 }
321 
322 #define CHECK_BUFFER_SIZE(BUFFER_PTR, TENSOR_INFO, BUFFER_ID) \
323  CheckBufferSize(BUFFER_PTR, TENSOR_INFO, BUFFER_ID, CHECK_LOCATION())
324 
325 bool IsActivationSupported(tflite::ActivationFunctionType activationType)
326 {
327  switch(activationType)
328  {
329  case tflite::ActivationFunctionType_NONE:
330  case tflite::ActivationFunctionType_RELU:
331  case tflite::ActivationFunctionType_RELU6:
332  case tflite::ActivationFunctionType_TANH:
333  {
334  return true;
335  }
336  default:
337  {
338  return false;
339  }
340  }
341 }
342 
343 #define CHECK_SUPPORTED_FUSED_ACTIVATION(OPTION, SUBGRAPH_INDEX, OPERATOR_INDEX) \
344  do { \
345  if (IsActivationSupported(OPTION->fused_activation_function) == false) \
346  { \
347  throw ParseException( \
348  fmt::format("TfLite parser doesn't suppport fused activation: " \
349  "{}/{} in {} subgraph:{} operator:{} at {}", \
350  OPTION->fused_activation_function, \
351  tflite::EnumNameActivationFunctionType(\
352  OPTION->fused_activation_function), \
353  __func__, \
354  SUBGRAPH_INDEX, \
355  OPERATOR_INDEX, \
356  CHECK_LOCATION().FileLine())); \
357  } \
358  } while(false)
359 
360 
361 std::vector<unsigned int> AsUnsignedVector(const std::vector<int32_t>& in)
362 {
363  std::vector<unsigned int> result;
364  result.reserve(in.size());
365  for (auto& i : in)
366  {
367  // If the location of the input data is -1 then the input should be ignored.
368  if (i == -1)
369  {
370  continue;
371  }
372  result.push_back(CHECKED_NON_NEGATIVE(i));
373  }
374  return result;
375 }
376 
377 bool IsOptionalOperandPresent(int input)
378 {
379  return (input >= 0);
380 }
381 
382 void CalcPadding(uint32_t inputSize,
383  uint32_t filterSize,
384  uint32_t stride,
385  uint32_t dilation,
386  uint32_t& paddingFront,
387  uint32_t& paddingBack,
388  tflite::Padding padding)
389 {
390  paddingFront = 0;
391  paddingBack = 0;
392  if (padding == tflite::Padding_SAME)
393  {
394  uint32_t outputSize = (inputSize + stride - 1) / stride;
395  uint32_t dilatedSize = filterSize + (dilation - 1) * (filterSize - 1);
396  uint32_t temp = (outputSize - 1) * stride + dilatedSize;
397  if (temp > inputSize)
398  {
399  paddingFront = (temp - inputSize) / 2;
400  paddingBack = (temp - inputSize) - paddingFront;
401  }
402  }
403 }
404 
406  const std::vector<unsigned int>& shape,
407  const bool outputTensor = false)
408 {
409  armnn::DataType type;
410  CHECK_TENSOR_PTR(tensorPtr);
411 
412  switch (tensorPtr->type)
413  {
414  case tflite::TensorType_UINT8:
416  break;
417  case tflite::TensorType_FLOAT32:
419  break;
420  case tflite::TensorType_FLOAT16:
422  break;
423  case tflite::TensorType_INT8:
424  if (tensorPtr->quantization->zero_point.size() == 1)
425  {
426  // Per-tensor
428  }
429  else
430  {
431  // Per-channel
433  }
434  break;
435  case tflite::TensorType_INT16:
437  break;
438  case tflite::TensorType_INT32:
440  break;
441  case tflite::TensorType_INT64:
443  break;
444  case tflite::TensorType_BOOL:
446  break;
447  default:
448  {
449  CheckLocation location = CHECK_LOCATION();
450  throw ParseException(
451  fmt::format("Unsupported data type {} = {} for tensor: {}. {}",
452  tensorPtr->type,
453  tflite::EnumNameTensorType(tensorPtr->type),
454  tensorPtr->name,
455  location.AsString()));
456  }
457  }
458  TensorShape tensorShape;
459 
460  std::vector<unsigned int> safeShape = shape;
461  if (shape.size() == 0)
462  {
463  safeShape.push_back(1);
464  }
465 
466  if (!outputTensor)
467  {
468  tensorShape = TensorShape(armnn::numeric_cast<unsigned int>(safeShape.size()), safeShape.data());
469  }
470  else
471  {
472  size_t shapeSignatureSize = tensorPtr->shape_signature.size();
473 
474  // If a shape signature exists we will use that to infer dynamic tensors
475  if (shapeSignatureSize != 0)
476  {
477  // If the shape is incompatible with the shape signature override the shape
478  if (shapeSignatureSize != shape.size())
479  {
480  safeShape = {};
481 
482  for (unsigned int i = 0; i < shapeSignatureSize; ++i)
483  {
484  unsigned int dim = tensorPtr->shape_signature[i] > -1 ?
485  static_cast<unsigned int>(tensorPtr->shape_signature[i]) : 0;
486  safeShape.push_back(dim);
487  }
488  }
489 
490  std::unique_ptr<bool[]> dimMask = std::make_unique<bool[]>(tensorPtr->shape_signature.size());
491  for (unsigned int i = 0; i < tensorPtr->shape_signature.size(); ++i)
492  {
493  dimMask[i] = tensorPtr->shape_signature[i] == -1 ? false : true;
494  }
495  tensorShape = TensorShape(static_cast<unsigned int>(safeShape.size()), safeShape.data(), dimMask.get());
496  }
497  // If there is no shape signature treat the tensor as dynamic if the shape has a size of zero
498  else if (shape.size() == 0)
499  {
500  tensorShape = TensorShape(1, false);
501  }
502  else
503  {
504  tensorShape = TensorShape(armnn::numeric_cast<unsigned int>(shape.size()), shape.data());
505  }
506  }
507 
508  float quantizationScale = 0.0f;
509  int32_t quantizationOffset = 0;
510 
511  if (tensorPtr->quantization.get())
512  {
513  if (tensorPtr->quantization->scale.size() <= 1)
514  {
515  CHECK_VALID_SIZE(tensorPtr->quantization->zero_point.size(), 0, 1);
516  CHECK_VALID_SIZE(tensorPtr->quantization->zero_point.size(), 0, 1);
517 
518  if (tensorPtr->quantization->scale.size() == 1)
519  {
520  quantizationScale = tensorPtr->quantization->scale[0];
521  }
522  if (tensorPtr->quantization->zero_point.size() == 1)
523  {
524  // NOTE: we lose precision here when converting from 64 bit to 32
525  // but this is what we support at the moment in ArmNN
526  quantizationOffset = armnn::numeric_cast<int32_t>(tensorPtr->quantization->zero_point[0]);
527  }
528 
529  armnn::TensorInfo result(tensorShape,
530  type,
531  quantizationScale,
532  quantizationOffset);
533  return result;
534  }
535  else
536  {
537  std::vector<float> quantizationScales;
538  std::vector<int32_t> quantizationOffsets;
539 
540  // Scale
541  std::copy(tensorPtr->quantization->scale.begin(),
542  tensorPtr->quantization->scale.end(),
543  std::back_inserter(quantizationScales));
544 
545  // QSymmS8 Per-axis
546  armnn::TensorInfo result(tensorShape,
547  type,
548  quantizationScales,
549  armnn::numeric_cast<unsigned int>(tensorPtr->quantization->quantized_dimension));
550  return result;
551  }
552  }
553  else
554  {
555  armnn::TensorInfo result(tensorShape,
556  type,
557  quantizationScale,
558  quantizationOffset);
559  return result;
560  }
561 }
562 
564 {
565  auto const& dimensions = AsUnsignedVector(tensorPtr->shape);
566  return ToTensorInfo(tensorPtr, dimensions);
567 }
568 
570  const bool outputTensor)
571 {
572  auto const& dimensions = AsUnsignedVector(tensorPtr->shape);
573  return ToTensorInfo(tensorPtr, dimensions, outputTensor);
574 }
575 
576 template<typename T>
577 std::pair<armnn::ConstTensor, std::unique_ptr<T[]>>
578 CreateConstTensorImpl(TfLiteParserImpl::BufferRawPtr bufferPtr,
580  armnn::TensorInfo& tensorInfo,
582 {
583  IgnoreUnused(tensorPtr);
584  ARMNN_ASSERT_MSG(tensorPtr != nullptr, "tensorPtr is null");
585  ARMNN_ASSERT_MSG(bufferPtr != nullptr,
586  fmt::format("Buffer for buffer:{} is null", tensorPtr->buffer).c_str());
587 
588  std::unique_ptr<T[]> data(new T[tensorInfo.GetNumElements()]);
589 
590  if (permutationVector.has_value() && permutationVector.value().GetSize() > 0)
591  {
592  tensorInfo = armnnUtils::Permuted(tensorInfo, permutationVector.value());
593  armnnUtils::Permute(tensorInfo.GetShape(), permutationVector.value(),
594  reinterpret_cast<const T*>(bufferPtr->data.data()), data.get(), sizeof(T));
595  }
596  else
597  {
598  ::memcpy(data.get(), bufferPtr->data.data(), tensorInfo.GetNumBytes());
599  }
600 
601  // Make sure isConstant flag is set.
602  tensorInfo.SetConstant();
603 
604  return std::make_pair(ConstTensor(tensorInfo, data.get()), std::move(data));
605 }
606 
607 armnn::LayerBindingId GenerateLayerBindingId(size_t subgraphIndex, size_t tensorIndex)
608 {
609  // generate the binding id by shifting the tensor id by 8 bit
610  // and add the subgraph id, which allows 256 subgraphs
611  return static_cast<armnn::LayerBindingId>((tensorIndex<<8)+subgraphIndex);
612 }
613 
614 bool CheckShape(const armnn::TensorShape& actual, const std::vector<int32_t>& expected)
615 {
616  const unsigned int actualSize = actual.GetNumDimensions();
617  if (actualSize != expected.size())
618  {
619  return false;
620  }
621 
622  for (unsigned int i = 0u; i < actualSize; i++)
623  {
624  if (expected[i] < 0 ||
625  actual[i] != static_cast<unsigned int>(expected[i]))
626  {
627  return false;
628  }
629  }
630 
631  return true;
632 }
633 
634 bool CheckShape(const armnn::TensorShape& actual, const armnn::TensorShape& expected)
635 {
636  std::vector<int32_t> expectedVec;
637  for (uint32_t i = 0; i < expected.GetNumDimensions(); i++)
638  {
639  expectedVec.push_back(expected[i]);
640  }
641  return CheckShape(actual, expectedVec);
642 }
643 
644 void CheckMatchingQuantization(const TensorInfo& first,
645  const TensorInfo& second,
646  const std::string& descName,
647  std::string const& firstName,
648  std::string const& secondName)
649 {
650  if (!first.IsQuantized() ||
651  !second.IsQuantized())
652  {
653  // Not a quantized type, ignore the validation
654  return;
655  }
656 
657  DataType firstDataType = first.GetDataType();
658  DataType secondDataType = second.GetDataType();
659 
660  if (firstDataType != secondDataType)
661  {
662  throw InvalidArgumentException(descName + ": " + firstName + " and " + secondName +
663  " must be of the same quantized type, " +
664  firstName + " is " + GetDataTypeName(firstDataType) + ", " +
665  secondName + " is " + GetDataTypeName(secondDataType));
666  }
667 
668  if (!first.IsTypeSpaceMatch(second))
669  {
670  throw InvalidArgumentException(descName + ": " + firstName + " and " + secondName +
671  " must have the same quantization space, " +
672  firstName + " has offset " + std::to_string(first.GetQuantizationOffset()) +
673  " and scale " + std::to_string(first.GetQuantizationScale()) + ", " +
674  secondName + " has offset " + std::to_string(second.GetQuantizationOffset()) +
675  " and scale " + std::to_string(second.GetQuantizationScale()));
676  }
677 }
678 
679 } // <anonymous>
680 
681 TfLiteParserImpl::TfLiteParserImpl(const Optional<ITfLiteParser::TfLiteParserOptions>& options)
682 : m_Options(options)
683 , m_Network(nullptr, nullptr)
684 , m_ParserFunctions(tflite::BuiltinOperator_MAX+1, &TfLiteParserImpl::ParseUnsupportedOperator)
685 {
686  // register supported operators
687  m_ParserFunctions[tflite::BuiltinOperator_ABS] = &TfLiteParserImpl::ParseAbs;
688  m_ParserFunctions[tflite::BuiltinOperator_ADD] = &TfLiteParserImpl::ParseAdd;
689  m_ParserFunctions[tflite::BuiltinOperator_ARG_MIN] = &TfLiteParserImpl::ParseArgMin;
690  m_ParserFunctions[tflite::BuiltinOperator_ARG_MAX] = &TfLiteParserImpl::ParseArgMax;
691  m_ParserFunctions[tflite::BuiltinOperator_AVERAGE_POOL_2D] = &TfLiteParserImpl::ParseAveragePool2D;
692  m_ParserFunctions[tflite::BuiltinOperator_BATCH_TO_SPACE_ND] = &TfLiteParserImpl::ParseBatchToSpaceND;
693  m_ParserFunctions[tflite::BuiltinOperator_BATCH_MATMUL] = &TfLiteParserImpl::ParseBatchMatMul;
694  m_ParserFunctions[tflite::BuiltinOperator_CAST] = &TfLiteParserImpl::ParseCast;
695  m_ParserFunctions[tflite::BuiltinOperator_CONCATENATION] = &TfLiteParserImpl::ParseConcatenation;
696  m_ParserFunctions[tflite::BuiltinOperator_CONV_2D] = &TfLiteParserImpl::ParseConv2D;
697  // Conv3D support was added in TF 2.5, so for backwards compatibility a hash define is needed.
698  #if defined(ARMNN_POST_TFLITE_2_4)
699  m_ParserFunctions[tflite::BuiltinOperator_CONV_3D] = &TfLiteParserImpl::ParseConv3D;
700  #endif
701  m_ParserFunctions[tflite::BuiltinOperator_CUSTOM] = &TfLiteParserImpl::ParseCustomOperator;
702  m_ParserFunctions[tflite::BuiltinOperator_DEPTH_TO_SPACE] = &TfLiteParserImpl::ParseDepthToSpace;
703  m_ParserFunctions[tflite::BuiltinOperator_DEPTHWISE_CONV_2D] = &TfLiteParserImpl::ParseDepthwiseConv2D;
704  m_ParserFunctions[tflite::BuiltinOperator_DEQUANTIZE] = &TfLiteParserImpl::ParseDequantize;
705  m_ParserFunctions[tflite::BuiltinOperator_DIV] = &TfLiteParserImpl::ParseDiv;
706  m_ParserFunctions[tflite::BuiltinOperator_ELU] = &TfLiteParserImpl::ParseElu;
707  m_ParserFunctions[tflite::BuiltinOperator_EQUAL] = &TfLiteParserImpl::ParseEqual;
708  m_ParserFunctions[tflite::BuiltinOperator_EXP] = &TfLiteParserImpl::ParseExp;
709  m_ParserFunctions[tflite::BuiltinOperator_EXPAND_DIMS] = &TfLiteParserImpl::ParseExpandDims;
710  m_ParserFunctions[tflite::BuiltinOperator_FLOOR_DIV] = &TfLiteParserImpl::ParseFloorDiv;
711  m_ParserFunctions[tflite::BuiltinOperator_FULLY_CONNECTED] = &TfLiteParserImpl::ParseFullyConnected;
712  m_ParserFunctions[tflite::BuiltinOperator_GATHER] = &TfLiteParserImpl::ParseGather;
713  m_ParserFunctions[tflite::BuiltinOperator_GATHER_ND] = &TfLiteParserImpl::ParseGatherNd;
714  m_ParserFunctions[tflite::BuiltinOperator_GREATER] = &TfLiteParserImpl::ParseGreater;
715  m_ParserFunctions[tflite::BuiltinOperator_GREATER_EQUAL] = &TfLiteParserImpl::ParseGreaterOrEqual;
716  m_ParserFunctions[tflite::BuiltinOperator_HARD_SWISH] = &TfLiteParserImpl::ParseHardSwish;
717  m_ParserFunctions[tflite::BuiltinOperator_LEAKY_RELU] = &TfLiteParserImpl::ParseLeakyRelu;
718  m_ParserFunctions[tflite::BuiltinOperator_LESS] = &TfLiteParserImpl::ParseLess;
719  m_ParserFunctions[tflite::BuiltinOperator_LESS_EQUAL] = &TfLiteParserImpl::ParseLessOrEqual;
720  m_ParserFunctions[tflite::BuiltinOperator_LOCAL_RESPONSE_NORMALIZATION]
721  = &TfLiteParserImpl::ParseLocalResponseNormalization;
722  m_ParserFunctions[tflite::BuiltinOperator_LOG] = &TfLiteParserImpl::ParseLog;
723  m_ParserFunctions[tflite::BuiltinOperator_LOGICAL_NOT] = &TfLiteParserImpl::ParseLogicalNot;
724  m_ParserFunctions[tflite::BuiltinOperator_LOGISTIC] = &TfLiteParserImpl::ParseLogistic;
725  m_ParserFunctions[tflite::BuiltinOperator_LOG_SOFTMAX] = &TfLiteParserImpl::ParseLogSoftmax;
726  m_ParserFunctions[tflite::BuiltinOperator_L2_NORMALIZATION] = &TfLiteParserImpl::ParseL2Normalization;
727  m_ParserFunctions[tflite::BuiltinOperator_MAX_POOL_2D] = &TfLiteParserImpl::ParseMaxPool2D;
728  m_ParserFunctions[tflite::BuiltinOperator_MAXIMUM] = &TfLiteParserImpl::ParseMaximum;
729  m_ParserFunctions[tflite::BuiltinOperator_MEAN] = &TfLiteParserImpl::ParseMean;
730  m_ParserFunctions[tflite::BuiltinOperator_MINIMUM] = &TfLiteParserImpl::ParseMinimum;
731  m_ParserFunctions[tflite::BuiltinOperator_MIRROR_PAD] = &TfLiteParserImpl::ParseMirrorPad;
732  m_ParserFunctions[tflite::BuiltinOperator_MUL] = &TfLiteParserImpl::ParseMul;
733  m_ParserFunctions[tflite::BuiltinOperator_NEG] = &TfLiteParserImpl::ParseNeg;
734  m_ParserFunctions[tflite::BuiltinOperator_NOT_EQUAL] = &TfLiteParserImpl::ParseNotEqual;
735  m_ParserFunctions[tflite::BuiltinOperator_PACK] = &TfLiteParserImpl::ParsePack;
736  m_ParserFunctions[tflite::BuiltinOperator_PAD] = &TfLiteParserImpl::ParsePad;
737  m_ParserFunctions[tflite::BuiltinOperator_PADV2] = &TfLiteParserImpl::ParsePad;
738  m_ParserFunctions[tflite::BuiltinOperator_PRELU] = &TfLiteParserImpl::ParsePrelu;
739  m_ParserFunctions[tflite::BuiltinOperator_QUANTIZE] = &TfLiteParserImpl::ParseQuantize;
740  m_ParserFunctions[tflite::BuiltinOperator_RELU] = &TfLiteParserImpl::ParseRelu;
741  m_ParserFunctions[tflite::BuiltinOperator_RELU6] = &TfLiteParserImpl::ParseRelu6;
742  m_ParserFunctions[tflite::BuiltinOperator_REDUCE_MAX] = &TfLiteParserImpl::ParseReduceMax;
743  m_ParserFunctions[tflite::BuiltinOperator_REDUCE_MIN] = &TfLiteParserImpl::ParseReduceMin;
744  m_ParserFunctions[tflite::BuiltinOperator_REDUCE_PROD] = &TfLiteParserImpl::ParseReduceProd;
745  m_ParserFunctions[tflite::BuiltinOperator_RESHAPE] = &TfLiteParserImpl::ParseReshape;
746  m_ParserFunctions[tflite::BuiltinOperator_RESIZE_BILINEAR] = &TfLiteParserImpl::ParseResizeBilinear;
747  m_ParserFunctions[tflite::BuiltinOperator_RESIZE_NEAREST_NEIGHBOR] = &TfLiteParserImpl::ParseResizeNearestNeighbor;
748  m_ParserFunctions[tflite::BuiltinOperator_RSQRT] = &TfLiteParserImpl::ParseRsqrt;
749  m_ParserFunctions[tflite::BuiltinOperator_SQRT] = &TfLiteParserImpl::ParseSqrt;
750  m_ParserFunctions[tflite::BuiltinOperator_SHAPE] = &TfLiteParserImpl::ParseShape;
751  m_ParserFunctions[tflite::BuiltinOperator_SIN] = &TfLiteParserImpl::ParseSin;
752  m_ParserFunctions[tflite::BuiltinOperator_SLICE] = &TfLiteParserImpl::ParseSlice;
753  m_ParserFunctions[tflite::BuiltinOperator_SOFTMAX] = &TfLiteParserImpl::ParseSoftmax;
754  m_ParserFunctions[tflite::BuiltinOperator_SPACE_TO_BATCH_ND] = &TfLiteParserImpl::ParseSpaceToBatchND;
755  m_ParserFunctions[tflite::BuiltinOperator_SPLIT] = &TfLiteParserImpl::ParseSplit;
756  m_ParserFunctions[tflite::BuiltinOperator_SPLIT_V] = &TfLiteParserImpl::ParseSplitV;
757  m_ParserFunctions[tflite::BuiltinOperator_SQUEEZE] = &TfLiteParserImpl::ParseSqueeze;
758  m_ParserFunctions[tflite::BuiltinOperator_STRIDED_SLICE] = &TfLiteParserImpl::ParseStridedSlice;
759  m_ParserFunctions[tflite::BuiltinOperator_SUB] = &TfLiteParserImpl::ParseSub;
760  m_ParserFunctions[tflite::BuiltinOperator_SUM] = &TfLiteParserImpl::ParseSum;
761  m_ParserFunctions[tflite::BuiltinOperator_TANH] = &TfLiteParserImpl::ParseTanH;
762  m_ParserFunctions[tflite::BuiltinOperator_TRANSPOSE] = &TfLiteParserImpl::ParseTranspose;
763  m_ParserFunctions[tflite::BuiltinOperator_TRANSPOSE_CONV] = &TfLiteParserImpl::ParseTransposeConv;
764  m_ParserFunctions[tflite::BuiltinOperator_UNIDIRECTIONAL_SEQUENCE_LSTM]
765  = &TfLiteParserImpl::ParseUnidirectionalSequenceLSTM;
766  m_ParserFunctions[tflite::BuiltinOperator_UNPACK] = &TfLiteParserImpl::ParseUnpack;
767 
768  // register supported custom operators
769  m_CustomParserFunctions["TFLite_Detection_PostProcess"] = &TfLiteParserImpl::ParseDetectionPostProcess;
770 }
771 
772 void TfLiteParserImpl::ResetParser()
773 {
774  m_Network = armnn::INetworkPtr(nullptr, nullptr);
775  m_Model = nullptr;
776  m_SubgraphConnections.clear();
777  m_OverridenOutputShapes.clear();
778  m_ConstantsToDequantize.clear();
779  m_ConstantsToBeCreated.clear();
780 }
781 
783 {
784  ResetParser();
785  m_Model = LoadModelFromFile(graphFile);
786  return CreateNetworkFromModel();
787 }
788 
789 INetworkPtr TfLiteParserImpl::CreateNetworkFromBinary(const std::vector<uint8_t>& binaryContent)
790 {
791  ResetParser();
792  m_Model = LoadModelFromBinary(binaryContent.data(), binaryContent.size());
793  return CreateNetworkFromModel();
794 }
795 
796 
797 armnn::INetworkPtr TfLiteParserImpl::LoadModel(std::unique_ptr<tflite::ModelT> model)
798 {
799  ResetParser();
800  m_Model = std::move(model);
801 
802  return CreateNetworkFromModel();
803 }
804 
805 INetworkPtr TfLiteParserImpl::CreateNetworkFromModel()
806 {
807 
808  using NetworkOptions = std::vector<BackendOptions>;
809  NetworkOptions networkOptions = {};
810  if (m_Options)
811  {
812  if (m_Options.value().m_InferAndValidate)
813  {
814  BackendOptions shapeInferenceMethodOption("ShapeInferenceMethod",
815  {
816  { "InferAndValidate", true }
817  });
818 
819  networkOptions.push_back(shapeInferenceMethodOption);
820  }
821  if (m_Options.value().m_AllowExpandedDims)
822  {
823  BackendOptions shapeInferenceMethodOption("AllowExpandedDims",
824  {
825  { "AllowExpandedDims", true }
826  });
827 
828  networkOptions.push_back(shapeInferenceMethodOption);
829  }
830  }
831  m_Network = INetwork::Create(networkOptions);
832  ARMNN_ASSERT(m_Model.get() != nullptr);
833 
834  if (m_Model->subgraphs.size() != 1)
835  {
836  throw ParseException(
837  fmt::format("Current TfLite parser only supports 1 subgraph. Current one has: {} {}",
838  m_Model->subgraphs.size(),
839  CHECK_LOCATION().AsString()));
840  }
841 
842  size_t subgraphIndex = 0;
843  size_t operatorIndex = 0;
844  try
845  {
846  for (SubgraphPtr const& subgraph : m_Model->subgraphs)
847  {
848  m_SubgraphConnections.emplace_back(subgraph->tensors.size());
849  for (OperatorPtr const& op : subgraph->operators)
850  {
851  auto const& opCodePtr = m_Model->operator_codes[op->opcode_index];
852 
853 // work around the introduction of the deprecated_builtin_code introduced in 2.4 in a backwards compatible manner
854 #if defined(ARMNN_POST_TFLITE_2_3)
855  auto builtinCode = std::max(opCodePtr->builtin_code,
856  static_cast<tflite::BuiltinOperator>(opCodePtr->deprecated_builtin_code));
857 #else
858  auto builtinCode = opCodePtr->builtin_code;
859 #endif
860 
861  if (builtinCode > tflite::BuiltinOperator_MAX)
862  {
863  throw ParseException(fmt::format("Operator code {} is out of range 0-{}. "
864  "subgraph:{} operator idx:{}. {}",
865  builtinCode, tflite::BuiltinOperator_MAX, subgraphIndex,
866  operatorIndex, CHECK_LOCATION().AsString()));
867  }
868 
869  // lookup and call the parser function
870  auto& parserFunction = m_ParserFunctions[builtinCode];
871  (this->*parserFunction)(subgraphIndex, operatorIndex);
872  ++operatorIndex;
873  }
874 
875  SetupInputLayers(subgraphIndex);
876  SetupOutputLayers(subgraphIndex);
877  SetupConstantLayers(subgraphIndex);
878 
879  ++subgraphIndex;
880  operatorIndex = 0;
881  }
882  }
883  catch (const ParseException& e)
884  {
885  std::stringstream errorString;
886  errorString << "Failed to parse operator #" << operatorIndex << " within subgraph #"
887  << subgraphIndex << " error: " << e.what();
888  ARMNN_LOG(error) << errorString.str();
889  std::stringstream errors;
890  errors << errorString.str() << "\n";
891  throw ParseException(errors.str());
892  }
893 
894  // establish the connections from the layer outputs to the inputs of the subsequent layers
895  for (subgraphIndex = 0; subgraphIndex < m_SubgraphConnections.size(); ++subgraphIndex)
896  {
897  for (size_t tensorIndex = 0; tensorIndex < m_SubgraphConnections[subgraphIndex].size(); ++tensorIndex)
898  {
899  if (m_SubgraphConnections[subgraphIndex][tensorIndex].outputSlot != nullptr)
900  {
901  for (size_t inputSlotIdx = 0;
902  inputSlotIdx < m_SubgraphConnections[subgraphIndex][tensorIndex].inputSlots.size();
903  ++inputSlotIdx)
904  {
905  m_SubgraphConnections[subgraphIndex][tensorIndex].outputSlot->Connect(
906  *(m_SubgraphConnections[subgraphIndex][tensorIndex].inputSlots[inputSlotIdx]));
907  }
908  }
909  }
910  }
911  return std::move(m_Network);
912 }
913 
914 std::unique_ptr<float[]> AsFloatArray(TfLiteParserImpl::BufferRawPtr bufferPtr,
915  const TensorInfo& tensorInfo)
916 {
917  if (tensorInfo.GetDataType() == DataType::QAsymmS8 || tensorInfo.GetDataType() == DataType::QSymmS8 ||
918  tensorInfo.GetDataType() == DataType::QAsymmU8)
919  {
920  std::unique_ptr<float[]> buffer(new float[tensorInfo.GetNumElements()]);
921 
922  if (tensorInfo.HasPerAxisQuantization())
923  {
924  unsigned int axis = tensorInfo.GetQuantizationDim().value();
925  auto axisDimensionality = tensorInfo.GetShape()[axis];
926  auto axisFactor = armnnUtils::GetNumElementsAfter(tensorInfo.GetShape(), axis);
927 
928  for (unsigned int i = 0; i < tensorInfo.GetNumDimensions(); ++i)
929  {
930  unsigned int axisIndex = (i / axisFactor) % axisDimensionality;
931  buffer[i] = Dequantize<int8_t>(bufferPtr->data[i], tensorInfo.GetQuantizationScales()[axisIndex],
932  tensorInfo.GetQuantizationOffset());
933  }
934  }
935  else
936  {
937  for (unsigned int i = 0; i < tensorInfo.GetNumElements(); ++i)
938  {
939  buffer[i] = Dequantize<int8_t>(bufferPtr->data[i], tensorInfo.GetQuantizationScale(),
940  tensorInfo.GetQuantizationOffset());
941  }
942  }
943  return buffer;
944  }
945  throw ParseException(
946  fmt::format("Unsupported input/weights combination: Input {} not supported with Weights {}",
947  GetDataTypeName(DataType::Float32),
948  GetDataTypeName(tensorInfo.GetDataType()),
949  CHECK_LOCATION().AsString()));
950 }
951 
952 void TfLiteParserImpl::RegisterProducerOfTensor(size_t subgraphIndex,
953  size_t tensorIndex,
954  armnn::IOutputSlot* slot)
955 {
956  CHECK_TENSOR(m_Model, subgraphIndex, tensorIndex);
957  ARMNN_ASSERT(m_SubgraphConnections.size() > subgraphIndex);
958  ARMNN_ASSERT(m_SubgraphConnections[subgraphIndex].size() > tensorIndex);
959 
960  TensorSlots & tensorSlots = m_SubgraphConnections[subgraphIndex][tensorIndex];
961 
962  if (slot->GetOwningIConnectableLayer().GetType() != LayerType::Constant)
963  {
964 
965  // assuming there is only one producer for that tensor
966  if (tensorSlots.outputSlot != nullptr)
967  {
968  throw ParseException(fmt::format("Another layer has already registered itself as the producer of "
969  "subgraph:{} tensor:{} {}",
970  subgraphIndex,
971  tensorIndex,
972  CHECK_LOCATION().AsString()));
973  }
974  }
975  tensorSlots.outputSlot = slot;
976 }
977 
978 void TfLiteParserImpl::RegisterConsumerOfTensor(size_t subgraphIndex,
979  size_t tensorIndex,
980  armnn::IInputSlot* slot)
981 {
982  CHECK_TENSOR(m_Model, subgraphIndex, tensorIndex);
983  ARMNN_ASSERT(m_SubgraphConnections.size() > subgraphIndex);
984  ARMNN_ASSERT(m_SubgraphConnections[subgraphIndex].size() > tensorIndex);
985 
986  TensorSlots& tensorSlots = m_SubgraphConnections[subgraphIndex][tensorIndex];
987  tensorSlots.inputSlots.push_back(slot);
988 }
989 
990 void TfLiteParserImpl::ParseCustomOperator(size_t subgraphIndex, size_t operatorIndex)
991 {
992  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
993 
994  // NOTE: By default we presume the custom operator is not supported
995  auto customParserFunction = &TfLiteParserImpl::ParseUnsupportedOperator;
996 
997  // Identify custom code defined for custom operator
998  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
999  const auto& customCode = m_Model->operator_codes[operatorPtr->opcode_index]->custom_code;
1000 
1001  // Find parser function that correspondes to custom code (if any)
1002  auto iterator = m_CustomParserFunctions.find(customCode);
1003  if (iterator != m_CustomParserFunctions.end())
1004  {
1005  customParserFunction = iterator->second;
1006  }
1007 
1008  // Run parser function
1009  (this->*customParserFunction)(subgraphIndex, operatorIndex);
1010 }
1011 
1012 void TfLiteParserImpl::ParseUnsupportedOperator(size_t subgraphIndex, size_t operatorIndex)
1013 {
1014  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1015 
1016  const auto & operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1017 
1018  auto opcodeIndex = operatorPtr->opcode_index;
1019 
1020 // work around the introduction of the deprecated_builtin_code introduced in 2.4 in a backwards compatible manner
1021 #if defined(ARMNN_POST_TFLITE_2_3)
1022  auto opcode = std::max(m_Model->operator_codes[opcodeIndex]->builtin_code,
1023  static_cast<tflite::BuiltinOperator>(m_Model->operator_codes[opcodeIndex]->deprecated_builtin_code));
1024 #else
1025  auto opcode = m_Model->operator_codes[opcodeIndex]->builtin_code;
1026 #endif
1027 
1028  if (!m_Options || !m_Options.value().m_StandInLayerForUnsupported)
1029  {
1030  // Do not add StandInLayer, throw ParseException instead
1031  throw ParseException(
1032  fmt::format("Operator not supported. "
1033  "subgraph:{} operator:{} "
1034  "opcode_index:{} opcode:{} / {} {}",
1035  subgraphIndex,
1036  operatorIndex,
1037  opcodeIndex,
1038  opcode,
1039  tflite::EnumNameBuiltinOperator(opcode),
1040  CHECK_LOCATION().AsString()));
1041  }
1042 
1043  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1044  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1045 
1046  const unsigned int numInputs = armnn::numeric_cast<unsigned int>(inputs.size());
1047  const unsigned int numOutputs = armnn::numeric_cast<unsigned int>(outputs.size());
1048 
1049  StandInDescriptor descriptor(numInputs, numOutputs);
1050  auto layerName = fmt::format("StandIn:{}:{}:{}", subgraphIndex, operatorIndex, opcode);
1051 
1052  // Add a non-executable StandInLayer as a placeholder for any unsupported operator
1053  IConnectableLayer* layer = m_Network->AddStandInLayer(descriptor, layerName.c_str());
1054  ARMNN_ASSERT(layer != nullptr);
1055 
1056  for (unsigned int i = 0u; i < numOutputs; ++i)
1057  {
1058  layer->GetOutputSlot(i).SetTensorInfo(ToTensorInfo(outputs[i], true));
1059  }
1060 
1061  auto inputTensorIds = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1062  auto outputTensorIds = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1063 
1064  RegisterInputSlots(subgraphIndex, operatorIndex, layer, inputTensorIds);
1065  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIds);
1066 }
1067 
1068 void TfLiteParserImpl::ParseCast(size_t subgraphIndex, size_t operatorIndex)
1069 {
1070  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1071 
1072  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1073  CHECK_VALID_SIZE(inputs.size(), 1);
1074  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1075  CHECK_VALID_SIZE(outputs.size(), 1);
1076 
1077  auto layerName = fmt::format("Cast:{}:{}", subgraphIndex, operatorIndex);
1078 
1079  IConnectableLayer* layer = m_Network->AddCastLayer(layerName.c_str());
1080  ARMNN_ASSERT(layer != nullptr);
1081 
1082  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1083  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1084 
1085  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1086  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1087 
1088  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1089  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
1090 }
1091 
1092 void TfLiteParserImpl::ParseConv2D(size_t subgraphIndex, size_t operatorIndex)
1093 {
1094  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1095 
1096  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1097  const auto* options = operatorPtr->builtin_options.AsConv2DOptions();
1098 
1099  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
1100 
1101  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1102  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1103  CHECK_VALID_SIZE(outputs.size(), 1);
1104 
1106  inputs.size() == 3 ?
1107  desc.m_BiasEnabled = true : desc.m_BiasEnabled = false;
1108  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1109  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1110  desc.m_DataLayout = armnn::DataLayout::NHWC;
1111  desc.m_DilationX = CHECKED_NON_NEGATIVE(options->dilation_w_factor);
1112  desc.m_DilationY = CHECKED_NON_NEGATIVE(options->dilation_h_factor);
1113 
1114  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1115  armnn::TensorInfo filterTensorInfo = ToTensorInfo(inputs[1]);
1116 
1117  // assuming input is NHWC
1118  unsigned int inputHeight = inputTensorInfo.GetShape()[1];
1119  unsigned int inputWidth = inputTensorInfo.GetShape()[2];
1120 
1121  // assuming the filter is OHWI : Output, H, W, Input
1122  // which is essentially the same as NHWC
1123  unsigned int filterHeight = filterTensorInfo.GetShape()[1];
1124  unsigned int filterWidth = filterTensorInfo.GetShape()[2];
1125 
1126  CalcPadding(inputHeight, filterHeight, desc.m_StrideY,
1127  desc.m_DilationY, desc.m_PadTop, desc.m_PadBottom, options->padding);
1128  CalcPadding(inputWidth, filterWidth, desc.m_StrideX,
1129  desc.m_DilationX, desc.m_PadLeft, desc.m_PadRight, options->padding);
1130 
1131  // Add the first input and weights tensor to the registration list.
1132  // The constant weights will be added by SetupConstantLayers.
1133  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1134  std::vector<unsigned int> tensorIndexesToRegister = { inputTensorIndexes[0], inputTensorIndexes[1] };
1135 
1136  auto layerName = fmt::format("Conv2D:{}:{}", subgraphIndex, operatorIndex);
1137  armnn::IConnectableLayer* layer = m_Network->AddConvolution2dLayer(desc, layerName.c_str());
1138 
1139  if (IsConstTensor(inputs[1]) && inputTensorInfo.GetDataType() == DataType::Float32 &&
1140  (filterTensorInfo.GetDataType() == DataType::QAsymmU8 ||
1141  filterTensorInfo.GetDataType() == DataType::QAsymmS8))
1142  {
1143  m_ConstantsToDequantize.emplace_back(inputs[1]->buffer);
1144  }
1145 
1146  if (desc.m_BiasEnabled)
1147  {
1148  armnn::TensorInfo biasTensorInfo = ToTensorInfo(inputs[2]);
1149 
1150  // Add the biases input to the registration list, a constant layer will be added by SetupConstantLayers.
1151  tensorIndexesToRegister.emplace_back(inputTensorIndexes[2]);
1152 
1153  if (IsConstTensor(inputs[2]) && inputTensorInfo.GetDataType() == DataType::Float32 &&
1154  (filterTensorInfo.GetDataType() == DataType::QAsymmU8 ||
1155  filterTensorInfo.GetDataType() == DataType::QAsymmS8))
1156  {
1157  m_ConstantsToDequantize.emplace_back(inputs[2]->buffer);
1158  }
1159  }
1160 
1161  ARMNN_ASSERT(layer != nullptr);
1162 
1163  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1164  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1165 
1166  // register the input connection slots for the layer, connections are made after all layers have been created
1167  // only the tensors for the inputs are relevant, exclude the const tensors
1168  RegisterInputSlots(subgraphIndex, operatorIndex, layer, tensorIndexesToRegister);
1169 
1170  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
1171  // register the output connection slots for the layer, connections are made after all layers have been created
1172  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1173  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, { outputTensorIndexes[0] });
1174 }
1175 
1176 // Conv3D support was added in TF 2.5, so for backwards compatibility a hash define is needed.
1177 #if defined(ARMNN_POST_TFLITE_2_4)
1178 void TfLiteParserImpl::ParseConv3D(size_t subgraphIndex, size_t operatorIndex)
1179 {
1180  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1181 
1182  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1183  const auto* options = operatorPtr->builtin_options.AsConv3DOptions();
1184 
1185  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
1186 
1188  desc.m_BiasEnabled = false;
1190  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1191  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1192  desc.m_StrideZ = CHECKED_NON_NEGATIVE(options->stride_d);
1193  desc.m_DilationX = CHECKED_NON_NEGATIVE(options->dilation_w_factor);
1194  desc.m_DilationY = CHECKED_NON_NEGATIVE(options->dilation_h_factor);
1195  desc.m_DilationZ = CHECKED_NON_NEGATIVE(options->dilation_d_factor);
1196 
1197  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1198  CHECK_VALID_SIZE(inputs.size(), 2, 3);
1199 
1200  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1201  CHECK_VALID_SIZE(outputs.size(), 1);
1202 
1203  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1204  armnn::TensorInfo filterTensorInfo = ToTensorInfo(inputs[1]);
1205 
1206  // Assuming input is NDHWC
1207  unsigned int inputDepth = inputTensorInfo.GetShape()[1];
1208  unsigned int inputHeight = inputTensorInfo.GetShape()[2];
1209  unsigned int inputWidth = inputTensorInfo.GetShape()[3];
1210 
1211  // Assuming the filter is DHWIO : Depth, Height, Width, OutputChannels, InputChannels
1212  unsigned int filterDepth = filterTensorInfo.GetShape()[0];
1213  unsigned int filterHeight = filterTensorInfo.GetShape()[1];
1214  unsigned int filterWidth = filterTensorInfo.GetShape()[2];
1215 
1216  CalcPadding(inputDepth, filterDepth, desc.m_StrideZ,
1217  desc.m_DilationZ, desc.m_PadFront, desc.m_PadBack, options->padding);
1218  CalcPadding(inputHeight, filterHeight, desc.m_StrideY,
1219  desc.m_DilationY, desc.m_PadTop, desc.m_PadBottom, options->padding);
1220  CalcPadding(inputWidth, filterWidth, desc.m_StrideX,
1221  desc.m_DilationX, desc.m_PadLeft, desc.m_PadRight, options->padding);
1222 
1223  auto filterTensorAndData = CreateConstTensorNonPermuted(inputs[1], filterTensorInfo, inputTensorInfo.GetDataType());
1224 
1225  auto layerName = fmt::format("Conv3D:{}:{}", subgraphIndex, operatorIndex);
1226 
1227  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1228  // Add the first input and weights tensor to the registration list.
1229  // The constant weights will be added by SetupConstantLayers.
1230  std::vector<unsigned int> tensorIndexesToRegister = {inputTensorIndexes[0], inputTensorIndexes[1]};
1231 
1232  if (inputs.size() == 3)
1233  {
1234  desc.m_BiasEnabled = true;
1235 
1236  // Add the biases input to the registration list, a constant layer will be added by SetupConstantLayers.
1237  tensorIndexesToRegister.emplace_back(inputTensorIndexes[2]);
1238  }
1239 
1240  armnn::IConnectableLayer* layer = m_Network->AddConvolution3dLayer(desc, layerName.c_str());
1241  ARMNN_ASSERT(layer != nullptr);
1242 
1243  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1244  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1245 
1246  // Register the input connection slots for the layer, connections are made after all layers have been created
1247  RegisterInputSlots(subgraphIndex, operatorIndex, layer, tensorIndexesToRegister);
1248 
1249  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
1250  // Register the output connection slots for the layer, connections are made after all layers have been created
1251  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1252  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1253 }
1254 #endif
1255 
1256 void TfLiteParserImpl::ParseDepthwiseConv2D(size_t subgraphIndex, size_t operatorIndex)
1257 {
1258  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1259 
1260  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1261  const auto* options = operatorPtr->builtin_options.AsDepthwiseConv2DOptions();
1262 
1263  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
1264 
1266  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1267  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1269  CHECKED_NON_NEGATIVE(options->depth_multiplier);
1270 
1271  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1272  CHECK_VALID_SIZE(inputs.size(), 2, 3);
1273  if (inputs.size() == 3)
1274  {
1275  desc.m_BiasEnabled = true;
1276  }
1277 
1278  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1279  CHECK_VALID_SIZE(outputs.size(), 1);
1280  desc.m_DilationX = CHECKED_NON_NEGATIVE(options->dilation_w_factor);
1281  desc.m_DilationY = CHECKED_NON_NEGATIVE(options->dilation_h_factor);
1282 
1283  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1284  armnn::TensorInfo filterTensorInfo = ToTensorInfo(inputs[1]);
1285 
1286  // Assuming input is NHWC
1287  unsigned int inputHeight = inputTensorInfo.GetShape()[1];
1288  unsigned int inputWidth = inputTensorInfo.GetShape()[2];
1289 
1290  // TensorflowLite weights come in the format [1, H, W, I * M]
1291  unsigned int filterHeight = filterTensorInfo.GetShape()[1];
1292  unsigned int filterWidth = filterTensorInfo.GetShape()[2];
1293 
1294  CalcPadding(inputHeight, filterHeight, desc.m_StrideY,
1295  desc.m_DilationY, desc.m_PadTop, desc.m_PadBottom, options->padding);
1296  CalcPadding(inputWidth, filterWidth, desc.m_StrideX,
1297  desc.m_DilationX, desc.m_PadLeft, desc.m_PadRight, options->padding);
1298 
1299  // ArmNN uses the same filter tensor layout at TfLite [1, H, W, O] no need for any permutation
1300  auto layerName = fmt::format("DepthwiseConv2D:{}:{}", subgraphIndex, operatorIndex);
1301 
1302  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1303  // Add the first input and weights tensor to the registration list.
1304  // The constant weights will be added by SetupConstantLayers.
1305  std::vector<unsigned int> tensorIndexesToRegister = {inputTensorIndexes[0], inputTensorIndexes[1]};
1306 
1307  armnn::IConnectableLayer* layer = m_Network->AddDepthwiseConvolution2dLayer(desc, layerName.c_str());
1308 
1309  if (desc.m_BiasEnabled)
1310  {
1311  desc.m_BiasEnabled = true;
1312  TensorInfo biasTensorInfo = ToTensorInfo(inputs[2]);
1313 
1314  // Add the biases input to the registration list, a constant layer will be added by SetupConstantLayers.
1315  tensorIndexesToRegister.emplace_back(inputTensorIndexes[2]);
1316  }
1317  ARMNN_ASSERT(layer != nullptr);
1318 
1319  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1320  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1321 
1322  // register the input connection slots for the layer, connections are made after all layers have been created
1323  // only the tensors for the inputs are relevant, exclude the const tensors
1324  RegisterInputSlots(subgraphIndex, operatorIndex, layer, tensorIndexesToRegister);
1325 
1326  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
1327  // register the output connection slots for the layer, connections are made after all layers have been created
1328  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1329  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1330 }
1331 
1332 void TfLiteParserImpl::ParseDequantize(size_t subgraphIndex, size_t operatorIndex)
1333 {
1334  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1335 
1336  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1337  CHECK_VALID_SIZE(inputs.size(), 1);
1338 
1339  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1340  CHECK_VALID_SIZE(outputs.size(), 1);
1341 
1342  auto layerName = fmt::format("Dequantize:{}:{}", subgraphIndex, operatorIndex);
1343 
1344  IConnectableLayer* layer = m_Network->AddDequantizeLayer(layerName.c_str());
1345  ARMNN_ASSERT(layer != nullptr);
1346 
1347  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1348  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1349 
1350  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1351  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1352 
1353  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1354  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
1355 }
1356 
1357 void TfLiteParserImpl::ParseExpandDims(size_t subgraphIndex, size_t operatorIndex)
1358 {
1359  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1360 
1361  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1362  CHECK_VALID_SIZE(inputs.size(), 2);
1363 
1364  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1365  CHECK_VALID_SIZE(outputs.size(), 1);
1366 
1367  auto layerName = fmt::format("ExpandDims:{}:{}", subgraphIndex, operatorIndex);
1368 
1369  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1370  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1371 
1372  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1373 
1374  ReshapeDescriptor reshapeDesc;
1375 
1376  if (outputTensorInfo.GetShape().AreAllDimensionsSpecified())
1377  {
1378  reshapeDesc.m_TargetShape = outputTensorInfo.GetShape();
1379  }
1380  else
1381  {
1382  int32_t axis = inputs[1]->shape[0];
1383 
1384  int32_t inputDimSize = static_cast<int32_t>(inputTensorInfo.GetShape().GetNumDimensions());
1385 
1386  if (axis > inputDimSize || axis < 0 - (inputDimSize + 1))
1387  {
1388  throw ParseException("axis must be in range [0 - (inputDimSize + 1), inputDimSize] inclusive");
1389  }
1390 
1391  if(axis < 0)
1392  {
1393  axis = inputDimSize + axis + 1;
1394  }
1395 
1396  std::vector<unsigned int> shape(static_cast<unsigned int>(inputDimSize) + 1);
1397  unsigned int inputShapeIndex = 0;
1398  for (unsigned int i = 0; i < static_cast<unsigned int>(inputDimSize + 1); ++i)
1399  {
1400  if (i == static_cast<unsigned int>(axis))
1401  {
1402  shape[i] = 1;
1403  }
1404  else
1405  {
1406  shape[i] = inputTensorInfo.GetShape()[inputShapeIndex];
1407  ++inputShapeIndex;
1408  }
1409  }
1410 
1411  reshapeDesc.m_TargetShape = TensorShape(static_cast<unsigned int>(inputDimSize + 1), shape.data());
1412  }
1413 
1414  IConnectableLayer* layer = m_Network->AddReshapeLayer(reshapeDesc, layerName.c_str());
1415  ARMNN_ASSERT(layer != nullptr);
1416  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1417 
1418  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1419  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1420 
1421  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1422  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1423 }
1424 
1425 void TfLiteParserImpl::ParseTranspose(size_t subgraphIndex, size_t operatorIndex)
1426 {
1427  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1428 
1429  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1430  CHECK_VALID_SIZE(inputs.size(), 1, 2);
1431 
1432  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1433  CHECK_VALID_SIZE(outputs.size(), 1);
1434 
1435  auto layerName = fmt::format("Transpose:{}:{}", subgraphIndex, operatorIndex);
1436  TransposeDescriptor desc;
1437 
1438  if (inputs.size() == 2)
1439  {
1440  armnn::TensorInfo permuteTensorInfo = ToTensorInfo(inputs[1]);
1441  BufferRawPtr permuteBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
1442  auto numPermVecElements = permuteTensorInfo.GetNumElements();
1443  std::vector<unsigned int> permuteShape(numPermVecElements);
1444  ::memcpy(permuteShape.data(), permuteBufferPtr->data.data(), permuteTensorInfo.GetNumBytes());
1445  PermutationVector permutationVector(permuteShape.data(), permuteTensorInfo.GetNumElements());
1446 
1447  desc = TransposeDescriptor(permutationVector);
1448  }
1449 
1450  TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1451  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1452  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1453 
1454  IConnectableLayer* layer = m_Network->AddTransposeLayer(desc, layerName.c_str());
1455  ARMNN_ASSERT(layer != nullptr);
1456  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1457 
1458  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1459  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1460 
1461  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1462  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1463 }
1464 
1465 void TfLiteParserImpl::ParseTransposeConv(size_t subgraphIndex, size_t operatorIndex)
1466 {
1467  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1468 
1469  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1470  const auto* options = operatorPtr->builtin_options.AsTransposeConvOptions();
1471 
1473  desc.m_BiasEnabled = false;
1474  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1475  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1477 
1478  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1479  if (inputs.size() == 4)
1480  {
1481  desc.m_BiasEnabled = true;
1482  }
1483  else
1484  {
1485  CHECK_VALID_SIZE(inputs.size(), 3);
1486  }
1487 
1488  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1489  CHECK_VALID_SIZE(outputs.size(), 1);
1490 
1491  if (inputs[0])
1492  {
1493  armnn::TensorInfo tensorInfo = ToTensorInfo(inputs[0]);
1494  std::vector<int> output_shape(tensorInfo.GetNumElements());
1495  if (tensorInfo.GetDataType() == DataType::Signed32)
1496  {
1497  ::memcpy(output_shape.data(), GetBuffer(m_Model, inputs[0]->buffer)->data.data(), tensorInfo.GetNumBytes());
1498  }
1499  if (tensorInfo.GetDataType() == DataType::QAsymmU8)
1500  {
1501  for(unsigned int i=0; i < tensorInfo.GetNumElements(); i++)
1502  {
1503  output_shape[i] = GetBuffer(m_Model, inputs[0]->buffer)->data.data()[i];
1504  }
1505  }
1506  // Change from signed to unsigned int to store in TransposeConvolution2dDescriptor.
1507  for (int dimension : output_shape)
1508  {
1509  desc.m_OutputShape.push_back(static_cast<unsigned int>(dimension));
1510  }
1511  desc.m_OutputShapeEnabled = true;
1512  }
1513  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[2]);
1514  armnn::TensorInfo filterTensorInfo = ToTensorInfo(inputs[1]);
1515 
1516  // TfLite uses NHWC tensors
1517  const unsigned int inputHeight = inputTensorInfo.GetShape()[1];
1518  const unsigned int inputWidth = inputTensorInfo.GetShape()[2];
1519 
1520  const unsigned int filterHeight = filterTensorInfo.GetShape()[1];
1521  const unsigned int filterWidth = filterTensorInfo.GetShape()[2];
1522 
1523  CalcPadding(inputHeight,
1524  filterHeight,
1525  desc.m_StrideY,
1526  1, // DilationY
1527  desc.m_PadTop,
1528  desc.m_PadBottom,
1529  options->padding);
1530 
1531  CalcPadding(inputWidth,
1532  filterWidth,
1533  desc.m_StrideX,
1534  1, // DilationX
1535  desc.m_PadLeft,
1536  desc.m_PadRight,
1537  options->padding);
1538 
1539  auto filterTensorAndData = CreateConstTensorNonPermuted(inputs[1], filterTensorInfo, inputTensorInfo.GetDataType());
1540 
1541  armnn::IConnectableLayer* layer = nullptr;
1542  auto layerName = fmt::format("TransposeConv:{}:{}", subgraphIndex, operatorIndex);
1543 
1544  if (desc.m_BiasEnabled)
1545  {
1546  auto biasTensorInfo = ToTensorInfo(inputs[3]);
1547  auto biasConstTensor = CreateConstTensorNonPermuted(inputs[3], biasTensorInfo, inputTensorInfo.GetDataType());
1548  layer = m_Network->AddTransposeConvolution2dLayer(desc,
1549  filterTensorAndData.first,
1550  biasConstTensor.first,
1551  layerName.c_str());
1552  }
1553  else
1554  {
1555  layer = m_Network->AddTransposeConvolution2dLayer(desc,
1556  filterTensorAndData.first,
1557  EmptyOptional(),
1558  layerName.c_str());
1559  }
1560 
1561  ARMNN_ASSERT(layer != nullptr);
1562 
1563  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1564  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1565 
1566  // only the tensors for the inputs are relevant, exclude the const (filter) tensor
1567  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1568  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[2]});
1569 
1570  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1571  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1572 }
1573 
1574 void TfLiteParserImpl::ParseAveragePool2D(size_t subgraphIndex, size_t operatorIndex)
1575 {
1576  ParsePool(subgraphIndex, operatorIndex, PoolingAlgorithm::Average);
1577 }
1578 
1579 void TfLiteParserImpl::ParseBatchMatMul(size_t subgraphIndex, size_t operatorIndex)
1580 {
1581  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1582 
1583  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1584  CHECK_VALID_SIZE(inputs.size(), 2);
1585 
1586  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1587  CHECK_VALID_SIZE(outputs.size(), 1);
1588 
1589  auto layerName = fmt::format("BatchMatMul:{}:{}", subgraphIndex, operatorIndex);
1590 
1591  TensorInfo inputXTensorInfo = ToTensorInfo(inputs[0]);
1592  TensorInfo inputYTensorInfo = ToTensorInfo(inputs[1]);
1593 
1594  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1595 
1596  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1597  const auto* options = operatorPtr->builtin_options.AsBatchMatMulOptions();
1598 
1599  // Adjoint in tensorflow lite performs transpose operation
1600  BatchMatMulDescriptor descriptor(options->adj_x,
1601  options->adj_y,
1602  false,
1603  false);
1604  // Arbitrary DataLayout
1605 
1606  IConnectableLayer* layer = m_Network->AddBatchMatMulLayer(descriptor, layerName.c_str());
1607  ARMNN_ASSERT(layer != nullptr);
1608 
1609  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1610 
1611  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1612  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
1613 
1614  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1615  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1616 }
1617 
1618 void TfLiteParserImpl::ParseBatchToSpaceND(size_t subgraphIndex, size_t operatorIndex)
1619 {
1620  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1621 
1622  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1623  CHECK_VALID_SIZE(inputs.size(), 3);
1624 
1625  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1626  CHECK_VALID_SIZE(outputs.size(), 1);
1627 
1628  armnn::TensorInfo blockShapeTensorInfo = ToTensorInfo(inputs[1]);
1629  BufferRawPtr blockShapeBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
1630 
1631  armnn::TensorInfo cropsTensorInfo = ToTensorInfo(inputs[2]);
1632  BufferRawPtr cropsBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
1633 
1634  std::vector<unsigned int> blockShape(blockShapeTensorInfo.GetNumElements());
1635  ::memcpy(blockShape.data(), blockShapeBufferPtr->data.data(), blockShapeTensorInfo.GetNumBytes());
1636 
1637  std::vector<unsigned int> cropsVector(cropsTensorInfo.GetNumElements());
1638  ::memcpy(cropsVector.data(), cropsBufferPtr->data.data(), cropsTensorInfo.GetNumBytes());
1639 
1640  size_t step = 2;
1641  std::vector<std::pair<unsigned int, unsigned int>> crops;
1642  for (unsigned int i = 0; i < cropsTensorInfo.GetNumElements() / step; ++i)
1643  {
1644  crops.emplace_back(cropsVector[i * step], cropsVector[i * step + 1]);
1645  }
1646 
1648  desc.m_BlockShape = blockShape;
1649  desc.m_Crops = crops;
1651 
1652  auto layerName = fmt::format("BatchToSpaceND:{}:{}", subgraphIndex, operatorIndex);
1653 
1654  TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1655  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1656  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1657 
1658  IConnectableLayer* layer = m_Network->AddBatchToSpaceNdLayer(desc, layerName.c_str());
1659  ARMNN_ASSERT(layer != nullptr);
1660  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1661 
1662  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1663  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1664 
1665  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1666  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1667 }
1668 
1669 void TfLiteParserImpl::ParseL2Normalization(size_t subgraphIndex, size_t operatorIndex)
1670 {
1671  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1672 
1673  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1674  CHECK_VALID_SIZE(inputs.size(), 1);
1675 
1676  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1677  CHECK_VALID_SIZE(outputs.size(), 1);
1678 
1681  auto layerName = fmt::format("L2Normalization:{}:{}", subgraphIndex, operatorIndex);
1682  IConnectableLayer* layer = m_Network->AddL2NormalizationLayer(desc, layerName.c_str());
1683 
1684  ARMNN_ASSERT(layer != nullptr);
1685 
1686  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1687  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1688 
1689  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1690  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1691 
1692  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1693  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1694 }
1695 
1696 void TfLiteParserImpl::ParseMaxPool2D(size_t subgraphIndex, size_t operatorIndex)
1697 {
1698  ParsePool(subgraphIndex, operatorIndex, PoolingAlgorithm::Max);
1699 }
1700 
1701 void TfLiteParserImpl::ParseMaximum(size_t subgraphIndex, size_t operatorIndex)
1702 {
1703  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1704 
1705  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1706  CHECK_VALID_SIZE(inputs.size(), 2);
1707 
1708  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1709  CHECK_VALID_SIZE(outputs.size(), 1);
1710 
1711  auto layerName = fmt::format("Maximum:{}:{}", subgraphIndex, operatorIndex);
1712 
1713  TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1714  TensorInfo input1TensorInfo = ToTensorInfo(inputs[1]);
1715  CheckMatchingQuantization(inputTensorInfo, input1TensorInfo, layerName, "Input 0", "Input 1");
1716 
1717  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1718  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1719 
1720  IConnectableLayer* layer = m_Network->AddMaximumLayer(layerName.c_str());
1721  ARMNN_ASSERT(layer != nullptr);
1722  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1723 
1724  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1725  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
1726 
1727  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1728  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1729 }
1730 
1731 void TfLiteParserImpl::ParseMinimum(size_t subgraphIndex, size_t operatorIndex)
1732 {
1733  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1734 
1735  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1736  CHECK_VALID_SIZE(inputs.size(), 2);
1737 
1738  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1739  CHECK_VALID_SIZE(outputs.size(), 1);
1740 
1741  auto layerName = fmt::format("Minimum:{}:{}", subgraphIndex, operatorIndex);
1742 
1743  TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1744  TensorInfo input1TensorInfo = ToTensorInfo(inputs[1]);
1745  CheckMatchingQuantization(inputTensorInfo, input1TensorInfo, layerName, "Input 0", "Input 1");
1746 
1747  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1748  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1749 
1750  IConnectableLayer* layer = m_Network->AddMinimumLayer(layerName.c_str());
1751  ARMNN_ASSERT(layer != nullptr);
1752  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1753 
1754  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1755  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
1756 
1757  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1758  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1759 }
1760 
1761 void TfLiteParserImpl::ParsePool(size_t subgraphIndex,
1762  size_t operatorIndex,
1763  PoolingAlgorithm algorithm)
1764 {
1765  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1766 
1767  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1768  const auto* options = operatorPtr->builtin_options.AsPool2DOptions();
1769 
1770  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
1771 
1772  std::string layerName;
1773 
1774  switch (algorithm)
1775  {
1776  case PoolingAlgorithm::Average:
1777  layerName =
1778  fmt::format("AveragePool2D:{}:{}", subgraphIndex, operatorIndex);
1779  break;
1780  case PoolingAlgorithm::Max:
1781  layerName =
1782  fmt::format("MaxPool2D:{}:{}", subgraphIndex, operatorIndex);
1783  break;
1784  default:
1785  ARMNN_ASSERT_MSG(false, "Unsupported Pooling Algorithm");
1786  }
1787 
1788  Pooling2dDescriptor desc;
1789 
1790  desc.m_PoolType = algorithm;
1791  desc.m_StrideX = CHECKED_NON_NEGATIVE(options->stride_w);
1792  desc.m_StrideY = CHECKED_NON_NEGATIVE(options->stride_h);
1793  desc.m_PoolWidth = CHECKED_NON_NEGATIVE(options->filter_width);
1794  desc.m_PoolHeight = CHECKED_NON_NEGATIVE(options->filter_height);
1795  desc.m_PaddingMethod = PaddingMethod::Exclude;
1796  desc.m_OutputShapeRounding = OutputShapeRounding::Floor;
1798 
1799  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1800  CHECK_VALID_SIZE(inputs.size(), 1);
1801  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1802 
1803  // assuming input is NHWC
1804  unsigned int inputHeight = inputTensorInfo.GetShape()[1];
1805  unsigned int inputWidth = inputTensorInfo.GetShape()[2];
1806 
1807  CalcPadding(inputHeight, desc.m_PoolHeight, desc.m_StrideY, 1u,
1808  desc.m_PadTop, desc.m_PadBottom, options->padding);
1809  CalcPadding(inputWidth, desc.m_PoolWidth, desc.m_StrideX, 1u,
1810  desc.m_PadLeft, desc.m_PadRight, options->padding);
1811 
1812  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1813  CHECK_VALID_SIZE(outputs.size(), 1);
1814 
1815  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1816  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1817 
1818  IConnectableLayer* layer = m_Network->AddPooling2dLayer(desc, layerName.c_str());
1819  ARMNN_ASSERT(layer != nullptr);
1820  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1821 
1822  // register the input connection slots for the layer, connections are made after all layers have been created
1823  // only the tensors for the inputs are relevant, exclude the const tensors
1824  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1825  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1826 
1827  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
1828  // register the output connection slots for the layer, connections are made after all layers have been created
1829  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1830  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1831 }
1832 
1833 void TfLiteParserImpl::ParseSlice(size_t subgraphIndex, size_t operatorIndex)
1834 {
1835  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1836 
1837  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1838  CHECK_VALID_SIZE(inputs.size(), 3);
1839  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1840  CHECK_VALID_SIZE(outputs.size(), 1);
1841 
1842  SliceDescriptor desc;
1843 
1844  // set begin tensor info for slice descriptor
1845  armnn::TensorInfo beginTensorInfo = ToTensorInfo(inputs[1]);
1846  BufferRawPtr beginBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
1847 
1848  std::vector<unsigned int> begin(beginTensorInfo.GetNumElements());
1849  ::memcpy(begin.data(), beginBufferPtr->data.data(), beginTensorInfo.GetNumBytes());
1850 
1851  // set size tensor info for slice descriptor
1852  armnn::TensorInfo sizeTensorInfo = ToTensorInfo(inputs[2]);
1853  BufferRawPtr sizeBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
1854 
1855  std::vector<int> signedSize(sizeTensorInfo.GetNumElements(), 1);
1856 
1857  // if size buffer data is not specified, all contents of size vector remain as values of 1
1858  if (sizeBufferPtr->data.data())
1859  {
1860  ::memcpy(signedSize.data(), sizeBufferPtr->data.data(), sizeTensorInfo.GetNumBytes());
1861  }
1862 
1863  std::vector<unsigned int> size(sizeTensorInfo.GetNumElements());
1864  TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
1865 
1866  for (unsigned int i = 0; i < signedSize.size(); ++i)
1867  {
1868  int signedValue = signedSize[i];
1869 
1870  if (signedValue < -1 || signedValue > static_cast<int>(inputTensorInfo.GetShape()[i] - begin[i]))
1871  {
1872  throw ParseException(fmt::format("Invalid value for size {} size must be in range "
1873  "[-1, inputDimSize - begin] [-1, {}] inclusive {}",
1874  signedValue,
1875  inputTensorInfo.GetShape()[i] - begin[i],
1876  CHECK_LOCATION().AsString()));
1877  }
1878 
1879  if (signedValue == -1)
1880  {
1881  size[i] = inputTensorInfo.GetShape()[i] - begin[i];
1882  }
1883  else
1884  {
1885  size[i] = static_cast<unsigned int>(signedValue);
1886  }
1887  }
1888 
1889  desc = SliceDescriptor(begin, size);
1890 
1891  auto layerName = fmt::format("Slice:{}:{}", subgraphIndex, operatorIndex);
1892 
1893  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1894  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
1895 
1896  IConnectableLayer* const layer = m_Network->AddSliceLayer(desc, layerName.c_str());
1897  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1898 
1899  // register the input connection slots for the layer, connections are made after all layers have been created
1900  // only the tensors for the inputs are relevant, exclude the const tensors
1901  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1902  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1903 
1904  // register the output connection slots for the layer, connections are made after all layers have been created
1905  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1906  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1907 }
1908 
1909 void TfLiteParserImpl::ParseSoftmax(size_t subgraphIndex, size_t operatorIndex)
1910 {
1911  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1912  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
1913  const auto* options = operatorPtr->builtin_options.AsSoftmaxOptions();
1914 
1915  SoftmaxDescriptor desc;
1916  desc.m_Beta = options->beta;
1917 
1918  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1919  CHECK_VALID_SIZE(inputs.size(), 1);
1920  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1921  CHECK_VALID_SIZE(outputs.size(), 1);
1922 
1923  auto layerName = fmt::format("Softmax:{}:{}", subgraphIndex, operatorIndex);
1924  IConnectableLayer* const layer = m_Network->AddSoftmaxLayer(desc, layerName.c_str());
1925 
1926  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1927  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1928 
1929  // register the input connection slots for the layer, connections are made after all layers have been created
1930  // only the tensors for the inputs are relevant, exclude the const tensors
1931  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1932  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1933 
1934  // register the output connection slots for the layer, connections are made after all layers have been created
1935  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1936  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1937 }
1938 
1939 void TfLiteParserImpl::ParseLogSoftmax(size_t subgraphIndex, size_t operatorIndex)
1940 {
1941  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1942 
1943  LogSoftmaxDescriptor desc;
1944 
1945  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1946  CHECK_VALID_SIZE(inputs.size(), 1);
1947  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1948  CHECK_VALID_SIZE(outputs.size(), 1);
1949 
1950  auto layerName = fmt::format("LogSoftmax:{}:{}", subgraphIndex, operatorIndex);
1951  IConnectableLayer* const layer = m_Network->AddLogSoftmaxLayer(desc, layerName.c_str());
1952 
1953  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
1954  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
1955 
1956  // register the input connection slots for the layer, connections are made after all layers have been created
1957  // only the tensors for the inputs are relevant, exclude the const tensors
1958  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
1959  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
1960 
1961  // register the output connection slots for the layer, connections are made after all layers have been created
1962  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
1963  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
1964 }
1965 
1966 void TfLiteParserImpl::ParseSpaceToBatchND(size_t subgraphIndex, size_t operatorIndex)
1967 {
1968  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
1969 
1970  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
1971  CHECK_VALID_SIZE(inputs.size(), 3);
1972 
1973  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
1974  CHECK_VALID_SIZE(outputs.size(), 1);
1975 
1976  armnn::TensorInfo blockShapeTensorInfo = ToTensorInfo(inputs[1]);
1977  BufferRawPtr blockShapeBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
1978 
1979  armnn::TensorInfo padListTensorInfo = ToTensorInfo(inputs[2]);
1980  BufferRawPtr padListBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
1981 
1982  std::vector<unsigned int> blockShape(blockShapeTensorInfo.GetNumElements());
1983  ::memcpy(blockShape.data(), blockShapeBufferPtr->data.data(), blockShapeTensorInfo.GetNumBytes());
1984 
1985  std::vector<unsigned int> padListVector(padListTensorInfo.GetNumElements());
1986  ::memcpy(padListVector.data(), padListBufferPtr->data.data(), padListTensorInfo.GetNumBytes());
1987 
1988  size_t step = 2;
1989  std::vector<std::pair<unsigned int, unsigned int>> padList;
1990  for (unsigned int i = 0; i < padListTensorInfo.GetNumElements() / step; ++i)
1991  {
1992  padList.emplace_back(padListVector[i * step], padListVector[i * step + 1]);
1993  }
1994 
1996  desc.m_BlockShape = blockShape;
1997  desc.m_PadList = padList;
1999 
2000  auto layerName = fmt::format("SpaceToBatchND:{}:{}", subgraphIndex, operatorIndex);
2001 
2002  TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2003  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2004  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
2005 
2006  IConnectableLayer* layer = m_Network->AddSpaceToBatchNdLayer(desc, layerName.c_str());
2007  ARMNN_ASSERT(layer != nullptr);
2008  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2009 
2010  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2011  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2012 
2013  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2014  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2015 }
2016 
2018  const armnn::TensorInfo& inputTensorInfo)
2019 {
2020  CHECK_VALID_SIZE(squeezeDims.size(), 0, 1, 2, 3, 4);
2021  static const uint32_t dimensionSequence[] = { 0, 1, 2, 3 };
2022 
2023  if (inputTensorInfo.GetNumDimensions() > 4)
2024  {
2025  std::stringstream ss;
2026  ss << "Input tensor has unexpected number of dimensions:" << inputTensorInfo.GetNumDimensions()
2027  << " shape:" << inputTensorInfo.GetShape() << " "
2028  << CHECK_LOCATION().AsString();
2029  throw ParseException(ss.str());
2030  }
2031 
2032  if (squeezeDims.empty())
2033  {
2034  squeezeDims.assign(dimensionSequence,
2035  dimensionSequence+inputTensorInfo.GetNumDimensions());
2036  }
2037 
2038  std::vector<uint32_t> outputDims;
2039  for(unsigned int i = 0; i < inputTensorInfo.GetNumDimensions(); i++)
2040  {
2041  bool skipSqueeze = (std::find(squeezeDims.begin(), squeezeDims.end(), i) == squeezeDims.end());
2042  auto currentDimension = inputTensorInfo.GetShape()[i];
2043  if (skipSqueeze || currentDimension != 1)
2044  {
2045  outputDims.push_back(currentDimension);
2046  }
2047  }
2048 
2049  if (outputDims.size() > 4)
2050  {
2051  std::stringstream ss;
2052  ss << "Output tensor has unexpected number of dimensions:" << inputTensorInfo.GetNumDimensions()
2053  << " shape:" << inputTensorInfo.GetShape() << " "
2054  << CHECK_LOCATION().AsString();
2055  throw ParseException(ss.str());
2056  }
2057 
2058  TensorShape outShape = TensorShape(static_cast<unsigned int>(outputDims.size()),
2059  outputDims.data());
2060 
2061  // we need to preserve the tensor type and the quantization data as well
2062  TensorInfo outTensorInfo = inputTensorInfo;
2063  outTensorInfo.SetShape(outShape);
2064 
2065  return outTensorInfo;
2066 }
2067 
2068 void TfLiteParserImpl::ParseShape(size_t subgraphIndex, size_t operatorIndex)
2069 {
2070  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2071 
2072  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2073  CHECK_VALID_SIZE(inputs.size(), 1);
2074  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2075  CHECK_VALID_SIZE(outputs.size(), 1);
2076 
2077  auto layerName = fmt::format("Shape:{}:{}", subgraphIndex, operatorIndex);
2078 
2079  IConnectableLayer* layer = m_Network->AddShapeLayer(layerName.c_str());
2080  ARMNN_ASSERT(layer != nullptr);
2081 
2082 
2083  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2084  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2085 
2086  // Check if output tensor type is Signed32 or Signed64
2087  if (outputTensorInfo.GetDataType() != armnn::DataType::Signed32 &&
2088  outputTensorInfo.GetDataType() != armnn::DataType::Signed64)
2089  {
2090  throw ParseException(
2091  fmt::format(
2092  "Output tensor data type is not supported. (Supported types: Signed32 & Signed64) {}",
2093  CHECK_LOCATION().AsString()));
2094  }
2095 
2096  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2097  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2098 
2099  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2100  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
2101 }
2102 
2103 void TfLiteParserImpl::ParseSqueeze(size_t subgraphIndex, size_t operatorIndex)
2104 {
2105  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2106 
2107  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2108  CHECK_VALID_SIZE(inputs.size(), 1);
2109 
2110  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2111  CHECK_VALID_SIZE(outputs.size(), 1);
2112 
2113  const auto & operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2114  const auto * options = operatorPtr->builtin_options.AsSqueezeOptions();
2115  auto layerName = fmt::format("Squeeze:{}:{}", subgraphIndex, operatorIndex);
2116 
2117  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2118 
2119  std::vector<uint32_t> squeezeDim;
2120  // A single negative dim index is interpreted as a negative index in python
2121  // Meaning the index will be the shape size plus the negative index value
2122  if (options->squeeze_dims.size() == 1 && options->squeeze_dims[0] < 0)
2123  {
2124  int32_t dim = static_cast<int32_t>(inputTensorInfo.GetShape().GetNumDimensions()) + options->squeeze_dims[0];
2125  squeezeDim.push_back(static_cast<uint32_t>(dim));
2126  }
2127  else
2128  {
2129  squeezeDim = AsUnsignedVector(options->squeeze_dims);
2130  }
2131 
2132  armnn::TensorInfo outputTensorInfo = TfLiteParserImpl::OutputShapeOfSqueeze(squeezeDim, inputTensorInfo);
2133 
2134  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
2135 
2136  ReshapeDescriptor reshapeDesc;
2137  reshapeDesc.m_TargetShape = outputTensorInfo.GetShape();
2138 
2139  IConnectableLayer* layer = m_Network->AddReshapeLayer(reshapeDesc, layerName.c_str());
2140  ARMNN_ASSERT(layer != nullptr);
2141  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2142 
2143  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2144  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2145 
2146  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2147  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2148 }
2149 
2150 void TfLiteParserImpl::ParseStridedSlice(size_t subgraphIndex, size_t operatorIndex)
2151 {
2152  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2153 
2154  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2155  CHECK_VALID_SIZE(inputs.size(), 4);
2156 
2157  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2158  CHECK_VALID_SIZE(outputs.size(), 1);
2159 
2160  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2161  const auto* options = operatorPtr->builtin_options.AsStridedSliceOptions();
2162 
2164  desc.m_BeginMask = options->begin_mask;
2165  desc.m_EllipsisMask = options->ellipsis_mask;
2166  desc.m_EndMask = options->end_mask;
2167  desc.m_NewAxisMask = options->new_axis_mask;
2168  desc.m_ShrinkAxisMask = options->shrink_axis_mask;
2170 
2171  armnn::TensorInfo beginTensorInfo = ToTensorInfo(inputs[1]);
2172  BufferRawPtr beginBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2173 
2174  std::vector<int> begin(beginTensorInfo.GetNumElements());
2175  ::memcpy(begin.data(), beginBufferPtr->data.data(), beginTensorInfo.GetNumBytes());
2176 
2177  armnn::TensorInfo endTensorInfo = ToTensorInfo(inputs[2]);
2178  BufferRawPtr endBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
2179 
2180  std::vector<int> end(endTensorInfo.GetNumElements());
2181  ::memcpy(end.data(), endBufferPtr->data.data(), endTensorInfo.GetNumBytes());
2182 
2183  armnn::TensorInfo strideTensorInfo = ToTensorInfo(inputs[3]);
2184  BufferRawPtr strideBufferPtr = GetBuffer(m_Model, inputs[3]->buffer);
2185 
2186  std::vector<int> stride(strideTensorInfo.GetNumElements());
2187  ::memcpy(stride.data(), strideBufferPtr->data.data(), strideTensorInfo.GetNumBytes());
2188 
2189  desc.m_Begin = begin;
2190  desc.m_End = end;
2191  desc.m_Stride = stride;
2192 
2193  auto layerName = fmt::format("StridedSlice:{}:{}", subgraphIndex, operatorIndex);
2194  IConnectableLayer* layer = m_Network->AddStridedSliceLayer(desc, layerName.c_str());
2195  ARMNN_ASSERT(layer != nullptr);
2196 
2197  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2198  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2199 
2200  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2201  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2202 
2203  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2204  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2205 }
2206 
2207 void TfLiteParserImpl::ParseSub(size_t subgraphIndex, size_t operatorIndex)
2208 {
2209  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2210 
2211  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2212  const auto* options = operatorPtr->builtin_options.AsSubOptions();
2213 
2214  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2215  CHECK_VALID_SIZE(inputs.size(), 2);
2216 
2217  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2218  CHECK_VALID_SIZE(outputs.size(), 1);
2219 
2220  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2221  armnn::TensorInfo input1TensorInfo = ToTensorInfo(inputs[1]);
2222 
2223  auto layerName = fmt::format("Sub:{}:{}", subgraphIndex, operatorIndex);
2224  IConnectableLayer* layer = m_Network->AddSubtractionLayer(layerName.c_str());
2225  ARMNN_ASSERT(layer != nullptr);
2226 
2227  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2228  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2229 
2230  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2231  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2232 
2233  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
2234 
2235  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2236  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2237 }
2238 
2239 void TfLiteParserImpl::ParseDiv(size_t subgraphIndex, size_t operatorIndex)
2240 {
2241  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2242 
2243  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2244  const auto* options = operatorPtr->builtin_options.AsDivOptions();
2245 
2246  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2247  CHECK_VALID_SIZE(inputs.size(), 2);
2248 
2249  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2250  CHECK_VALID_SIZE(outputs.size(), 1);
2251 
2252  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2253  armnn::TensorInfo input1TensorInfo = ToTensorInfo(inputs[1]);
2254 
2255  auto layerName = fmt::format("Div:{}:{}", subgraphIndex, operatorIndex);
2256  IConnectableLayer* layer = m_Network->AddDivisionLayer(layerName.c_str());
2257  ARMNN_ASSERT(layer != nullptr);
2258 
2259  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2260  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2261 
2262  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2263  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2264  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
2265 
2266  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2267  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2268 }
2269 
2270 void TfLiteParserImpl::ParseFloorDiv(size_t subgraphIndex, size_t operatorIndex)
2271 {
2272  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2273 
2274  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2275  CHECK_VALID_SIZE(inputs.size(), 2);
2276 
2277  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2278  CHECK_VALID_SIZE(outputs.size(), 1);
2279 
2280  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2281  armnn::TensorInfo input1TensorInfo = ToTensorInfo(inputs[1]);
2282 
2283  auto layerName = fmt::format("Div:{}:{}", subgraphIndex, operatorIndex);
2284  IConnectableLayer* layer = m_Network->AddDivisionLayer(layerName.c_str());
2285  ARMNN_ASSERT(layer != nullptr);
2286 
2287  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2288  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2289 
2290  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2291  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2292  layer = AddFusedFloorLayer(layer, 0);
2293 
2294  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2295  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2296 }
2297 
2298 void TfLiteParserImpl::ParseAdd(size_t subgraphIndex, size_t operatorIndex)
2299 {
2300  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2301 
2302  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2303  const auto* options = operatorPtr->builtin_options.AsAddOptions();
2304 
2305  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2306  CHECK_VALID_SIZE(inputs.size(), 2);
2307 
2308  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2309  CHECK_VALID_SIZE(outputs.size(), 1);
2310 
2311  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2312  armnn::TensorInfo input1TensorInfo = ToTensorInfo(inputs[1]);
2313 
2314  auto layerName = fmt::format("Add:{}:{}", subgraphIndex, operatorIndex);
2315  IConnectableLayer* layer = m_Network->AddAdditionLayer(layerName.c_str());
2316  ARMNN_ASSERT(layer != nullptr);
2317 
2318  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2319  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2320 
2321  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2322  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2323  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
2324 
2325  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2326  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2327 }
2328 
2329 void TfLiteParserImpl::ParseMul(size_t subgraphIndex, size_t operatorIndex)
2330 {
2331  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2332 
2333  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2334  const auto* options = operatorPtr->builtin_options.AsMulOptions();
2335 
2336  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2337  CHECK_VALID_SIZE(inputs.size(), 2);
2338 
2339  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2340  CHECK_VALID_SIZE(outputs.size(), 1);
2341 
2342  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2343  armnn::TensorInfo input1TensorInfo = ToTensorInfo(inputs[1]);
2344 
2345  auto layerName = fmt::format("Mul:{}:{}", subgraphIndex, operatorIndex);
2346  IConnectableLayer* layer = m_Network->AddMultiplicationLayer(layerName.c_str());
2347  ARMNN_ASSERT(layer != nullptr);
2348 
2349  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2350  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2351 
2352  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2353  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
2354  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
2355 
2356  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2357  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2358 }
2359 
2360 void TfLiteParserImpl::ParseMean(size_t subgraphIndex, size_t operatorIndex)
2361 {
2362  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2363 
2364  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2365 
2366  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2367  CHECK_VALID_SIZE(outputs.size(), 1);
2368 
2369  armnn::TensorInfo dimTensorInfo = ToTensorInfo(inputs[1]);
2370  BufferRawPtr bufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2371 
2372  armnn::MeanDescriptor desc;
2373  std::vector<unsigned int> axis(dimTensorInfo.GetNumElements());
2374  ::memcpy(axis.data(), bufferPtr->data.data(), dimTensorInfo.GetNumBytes());
2375  desc.m_Axis = axis;
2376 
2377  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2378  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2379 
2380  desc.m_KeepDims =
2381  inputTensorInfo.GetNumDimensions() == outputTensorInfo.GetNumDimensions() ?
2382  true : false;
2383 
2384  auto layerName = fmt::format("Mean:{}:{}", subgraphIndex, operatorIndex);
2385  IConnectableLayer* layer = m_Network->AddMeanLayer(desc, layerName.c_str());
2386  ARMNN_ASSERT(layer != nullptr);
2387 
2388  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2389 
2390  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2391  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2392 
2393  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2394  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2395 }
2396 
2397 void TfLiteParserImpl::ParsePad(size_t subgraphIndex, size_t operatorIndex)
2398 {
2399  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2400 
2401  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2402 
2403  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2404  CHECK_VALID_SIZE(outputs.size(), 1);
2405 
2406  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2407  armnn::TensorInfo padTensorInfo = ToTensorInfo(inputs[1]);
2408 
2409  std::vector<unsigned int> padBuffer = GetUIntBuffer(padTensorInfo, m_Model, inputs[1]->buffer);
2410 
2411  size_t step = 2;
2412  armnn::PadDescriptor desc;
2413  auto opcode = GetOpCode(m_Model, subgraphIndex, operatorIndex);
2414 
2415  if (opcode == tflite::BuiltinOperator_PAD)
2416  {
2417  CHECK_VALID_SIZE(inputs.size(), 2);
2418 
2419  if (inputTensorInfo.IsQuantized())
2420  {
2421  desc.m_PadValue = static_cast<float>(inputTensorInfo.GetQuantizationOffset());
2422  }
2423  }
2424  else if (opcode == tflite::BuiltinOperator_PADV2)
2425  {
2426  CHECK_VALID_SIZE(inputs.size(), 3);
2427 
2428  armnn::TensorInfo padValueTensorInfo = ToTensorInfo(inputs[2]);
2429 
2430  if (padValueTensorInfo.GetNumElements() != 1)
2431  {
2432  ARMNN_THROW_PARSE_EXCEPTION("Multiple padding values are not supported in PADV2");
2433  }
2434  BufferRawPtr padValueBufferPtr = GetBuffer(m_Model, inputs[2]->buffer);
2435 
2436  // Get the pad value from the input tensor
2437  if (padValueBufferPtr->data.size() > 0)
2438  {
2439  switch (padValueTensorInfo.GetDataType())
2440  {
2442  {
2443  std::vector<float> padValueBuffer(padValueTensorInfo.GetNumElements());
2444  ::memcpy(padValueBuffer.data(), padValueBufferPtr->data.data(), padValueBufferPtr->data.size());
2445  desc.m_PadValue = padValueBuffer[0];
2446  break;
2447  }
2449  {
2450  std::vector<uint8_t> padValueBuffer(padValueTensorInfo.GetNumElements());
2451  ::memcpy(padValueBuffer.data(), padValueBufferPtr->data.data(), padValueBufferPtr->data.size());
2452  desc.m_PadValue = armnn::Dequantize<uint8_t>(padValueBuffer[0],
2453  padValueTensorInfo.GetQuantizationScale(),
2454  padValueTensorInfo.GetQuantizationOffset());
2455  break;
2456  }
2459  {
2460  std::vector<int8_t> padValueBuffer(padValueTensorInfo.GetNumElements());
2461  ::memcpy(padValueBuffer.data(), padValueBufferPtr->data.data(), padValueBufferPtr->data.size());
2462  desc.m_PadValue = armnn::Dequantize<int8_t>(padValueBuffer[0],
2463  padValueTensorInfo.GetQuantizationScale(),
2464  padValueTensorInfo.GetQuantizationOffset());
2465  break;
2466  }
2467  default: ARMNN_THROW_PARSE_EXCEPTION("Unsupported DataType");
2468  }
2469  }
2470  else if (inputTensorInfo.IsQuantized())
2471  {
2472  desc.m_PadValue = static_cast<float>(inputTensorInfo.GetQuantizationOffset());
2473  }
2474  }
2475 
2476  for (unsigned int i = 0; i < padTensorInfo.GetNumElements() / step; ++i)
2477  {
2478  desc.m_PadList.emplace_back(padBuffer[i * step], padBuffer[i * step + 1]);
2479  }
2480 
2481  auto layerName = (opcode == tflite::BuiltinOperator_PAD) ? fmt::format("Pad:{}:{}", subgraphIndex, operatorIndex)
2482  : fmt::format("PadV2:{}:{}", subgraphIndex, operatorIndex);
2483  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2484 
2485  IConnectableLayer* layer = m_Network->AddPadLayer(desc, layerName.c_str());
2486  ARMNN_ASSERT(layer != nullptr);
2487  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2488 
2489  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2490  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2491 
2492  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2493  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2494 }
2495 
2496 void TfLiteParserImpl::ParseMirrorPad(size_t subgraphIndex, size_t operatorIndex)
2497 {
2498  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2499 
2500  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2501  CHECK_VALID_SIZE(inputs.size(), 2);
2502 
2503  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2504  CHECK_VALID_SIZE(outputs.size(), 1);
2505 
2506  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2507 
2508  armnn::TensorInfo padTensorInfo = ToTensorInfo(inputs[1]);
2509  BufferRawPtr bufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2510 
2511  std::vector<unsigned int> padBuffer(padTensorInfo.GetNumElements());
2512  ::memcpy(padBuffer.data(), bufferPtr->data.data(), padTensorInfo.GetNumBytes());
2513 
2514  size_t step = 2;
2515  armnn::PadDescriptor desc;
2516  for (unsigned int i = 0; i < padTensorInfo.GetNumElements() / step; ++i)
2517  {
2518  desc.m_PadList.emplace_back(padBuffer[i * step], padBuffer[i * step + 1]);
2519  }
2520 
2521  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2522  const auto* options = operatorPtr->builtin_options.AsMirrorPadOptions();
2523 
2524  if (options->mode == tflite::MirrorPadMode_REFLECT)
2525  {
2526  desc.m_PaddingMode = PaddingMode::Reflect;
2527  }
2528  else if (options->mode == tflite::MirrorPadMode_SYMMETRIC)
2529  {
2530  desc.m_PaddingMode = PaddingMode::Symmetric;
2531  }
2532  else
2533  {
2534  ARMNN_THROW_PARSE_EXCEPTION("PaddingMode must be either REFLECT or SYMMETRIC");
2535  }
2536 
2537  // If padding mode is Reflect then both paddings must be no greater than inputShape(i) - 1.
2538  // If padding mode is Symmetric then both paddings must be no greater than inputShape(i).
2539  auto inputShape = inputTensorInfo.GetShape();
2540  auto padList = desc.m_PadList;
2541 
2542  const unsigned int isReflect = static_cast<unsigned int>(desc.m_PaddingMode == PaddingMode::Reflect);
2543  for(unsigned int i = 0; i < padList.size(); ++i)
2544  {
2545  if(padList.at(i).first > (inputShape[i] - isReflect) ||
2546  padList.at(i).second > (inputShape[i] - isReflect))
2547  {
2548  ARMNN_THROW_PARSE_EXCEPTION("Padding values must be less (Reflect) or "
2549  "equal (Symmetric) to the dimension size.");
2550  }
2551  }
2552 
2553  auto layerName = fmt::format("MirrorPad:{}:{}", subgraphIndex, operatorIndex);
2554  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2555 
2556  IConnectableLayer* layer = m_Network->AddPadLayer(desc, layerName.c_str());
2557  ARMNN_ASSERT(layer != nullptr);
2558  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2559 
2560  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2561  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2562 
2563  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2564  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2565 }
2566 
2567 void TfLiteParserImpl::ParsePrelu(size_t subgraphIndex, size_t operatorIndex)
2568 {
2569  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2570 
2571  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2572  CHECK_VALID_SIZE(inputs.size(), 2);
2573 
2574  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2575  CHECK_VALID_SIZE(outputs.size(), 1);
2576 
2577  auto layerName = fmt::format("Prelu:{}:{}", subgraphIndex, operatorIndex);
2578 
2579  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2580  armnn::TensorInfo alphaTensorInfo = ToTensorInfo(inputs[1]);
2581  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2582  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
2583 
2584  IConnectableLayer* layer = m_Network->AddPreluLayer(layerName.c_str());
2585  ARMNN_ASSERT(layer != nullptr);
2586  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2587 
2588  if (IsConstTensor(inputs[1]))
2589  {
2590  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2591  armnn::IInputSlot* slot = &(layer->GetInputSlot(0));
2592  RegisterConsumerOfTensor(subgraphIndex, inputTensorIndexes[0], slot);
2593 
2594  auto alphaTensorAndData = CreateConstTensorNonPermuted(inputs[1], alphaTensorInfo,
2595  inputTensorInfo.GetDataType());
2596  std::string constLayerName = fmt::format("Constant:{}", inputs[1]->name);
2597  IConnectableLayer* constLayer =
2598  m_Network->AddConstantLayer(alphaTensorAndData.first, constLayerName.c_str());
2599  ARMNN_ASSERT(constLayer != nullptr);
2600 
2601  constLayer->GetOutputSlot(0).SetTensorInfo(alphaTensorInfo);
2602  constLayer->GetOutputSlot(0).Connect(layer->GetInputSlot(1));
2603  RegisterOutputSlots(subgraphIndex,
2604  VIRTUAL_OPERATOR_ID,
2605  constLayer,
2606  { inputTensorIndexes[1] });
2607  }
2608  else
2609  {
2610  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2611  RegisterInputSlots(subgraphIndex, operatorIndex, layer, inputTensorIndexes);
2612  }
2613 
2614  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2615  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
2616 }
2617 
2618 void TfLiteParserImpl::ParseQuantize(size_t subgraphIndex, size_t operatorIndex)
2619 {
2620  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2621 
2622  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2623  CHECK_VALID_SIZE(inputs.size(), 1);
2624 
2625  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2626  CHECK_VALID_SIZE(outputs.size(), 1);
2627 
2628  auto layerName = fmt::format("Quantize:{}:{}", subgraphIndex, operatorIndex);
2629 
2630  IConnectableLayer* layer = m_Network->AddQuantizeLayer(layerName.c_str());
2631  ARMNN_ASSERT(layer != nullptr);
2632 
2633  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2634  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2635 
2636  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2637  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2638 
2639  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2640  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
2641 }
2642 
2643 void TfLiteParserImpl::ParseRelu(size_t subgraphIndex, size_t operatorIndex)
2644 {
2645  ParseActivation(subgraphIndex,operatorIndex, ActivationFunction::ReLu);
2646 }
2647 
2648 void TfLiteParserImpl::ParseRelu6(size_t subgraphIndex, size_t operatorIndex)
2649 {
2650  ParseActivation(subgraphIndex,operatorIndex, ActivationFunction::BoundedReLu);
2651 }
2652 
2653 void TfLiteParserImpl::ParseLeakyRelu(size_t subgraphIndex, size_t operatorIndex)
2654 {
2655  ParseActivation(subgraphIndex, operatorIndex, ActivationFunction::LeakyReLu);
2656 }
2657 
2658 void TfLiteParserImpl::ParseLogistic(size_t subgraphIndex, size_t operatorIndex)
2659 {
2660  ParseActivation(subgraphIndex,operatorIndex,ActivationFunction::Sigmoid);
2661 }
2662 
2663 void TfLiteParserImpl::ParseTanH(size_t subgraphIndex, size_t operatorIndex)
2664 {
2665  ParseActivation(subgraphIndex,operatorIndex,ActivationFunction::TanH);
2666 }
2667 
2668 void TfLiteParserImpl::ParseElu(size_t subgraphIndex, size_t operatorIndex)
2669 {
2670  ParseActivation(subgraphIndex, operatorIndex, ActivationFunction::Elu);
2671 }
2672 
2673 void TfLiteParserImpl::ParseHardSwish(size_t subgraphIndex, size_t operatorIndex)
2674 {
2675  ParseActivation(subgraphIndex, operatorIndex, ActivationFunction::HardSwish);
2676 }
2677 
2678 void TfLiteParserImpl::ParseActivation(size_t subgraphIndex, size_t operatorIndex, ActivationFunction activationType)
2679 {
2680  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2681  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2682  IgnoreUnused(operatorPtr);
2683 
2684  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2685  CHECK_VALID_SIZE(inputs.size(), 1);
2686 
2687  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2688  CHECK_VALID_SIZE(outputs.size(), 1);
2689 
2690  auto layerName = fmt::format("Activation:");
2691  ActivationDescriptor activationDesc;
2692  activationDesc.m_Function = activationType;
2693 
2694  switch (activationType)
2695  {
2696  case ActivationFunction::ReLu:
2697  {
2698  layerName += fmt::format("RELU:{}:{}", subgraphIndex, operatorIndex);
2699  break;
2700  }
2701  case ActivationFunction::BoundedReLu:
2702  {
2703  layerName += fmt::format("RELU6:{}:{}", subgraphIndex, operatorIndex);
2704  activationDesc.m_A = 6.0f;
2705  activationDesc.m_B = 0.0f;
2706  break;
2707  }
2708  case ActivationFunction::Sigmoid:
2709  {
2710  layerName += fmt::format("SIGMOID:{}:{}", subgraphIndex, operatorIndex);
2711  break;
2712  }
2713  case ActivationFunction::TanH:
2714  {
2715  layerName += fmt::format("TANH:{}:{}", subgraphIndex, operatorIndex);
2716  activationDesc.m_A = 1.0f;
2717  activationDesc.m_B = 1.0f;
2718  break;
2719  }
2720  case ActivationFunction::LeakyReLu:
2721  {
2722  layerName += fmt::format("LEAKYRELU:{}:{}", subgraphIndex, operatorIndex);
2723  const auto* options = operatorPtr->builtin_options.AsLeakyReluOptions();
2724  activationDesc.m_A = options->alpha;
2725  break;
2726  }
2727  case ActivationFunction::Elu:
2728  {
2729  layerName += fmt::format("ELU:{}:{}", subgraphIndex, operatorIndex);
2730  activationDesc.m_A = 1.0f;
2731  break;
2732  }
2733  case ActivationFunction::HardSwish:
2734  {
2735  layerName += fmt::format("HARDSWISH:{}:{}", subgraphIndex, operatorIndex);
2736  break;
2737  }
2738  default:
2739  {
2740  throw ParseException(
2741  fmt::format("Unexpected ActivationFunction[{}] when creating layerName {} ",
2742  static_cast<int>(activationType), CHECK_LOCATION().AsString()));
2743  }
2744  }
2745 
2746  IConnectableLayer* const layer = m_Network->AddActivationLayer(activationDesc, layerName.c_str());
2747 
2748  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
2749  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
2750 
2751  // register the input connection slots for the layer, connections are made after all layers have been created
2752  // only the tensors for the inputs are relevant, exclude the const tensors
2753  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2754  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2755 
2756  // register the output connection slots for the layer, connections are made after all layers have been created
2757  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2758  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2759 }
2761  const std::vector<int32_t>& targetDimsIn)
2762 {
2763  std::vector<unsigned int> outputDims(targetDimsIn.begin(), targetDimsIn.end());
2764  const auto stretchDim = std::find(targetDimsIn.begin(), targetDimsIn.end(), -1);
2765 
2766  if (stretchDim != targetDimsIn.end())
2767  {
2768  if (std::find(std::next(stretchDim), targetDimsIn.end(), -1) != targetDimsIn.end())
2769  {
2770  throw ParseException(
2771  fmt::format("At most one component of shape can be -1 {}", CHECK_LOCATION().AsString()));
2772  }
2773 
2774  auto targetNumElements =
2775  armnn::numeric_cast<unsigned int>(
2776  std::accumulate(targetDimsIn.begin(), targetDimsIn.end(), -1, std::multiplies<int32_t>()));
2777 
2778  auto stretchIndex = static_cast<size_t>(std::distance(targetDimsIn.begin(), stretchDim));
2779  outputDims[stretchIndex] = inputTensorInfo.GetNumElements() / targetNumElements;
2780  }
2781 
2782  TensorShape outputShape = TensorShape(static_cast<unsigned int>(outputDims.size()), outputDims.data());
2783 
2784  TensorInfo reshapeInfo = inputTensorInfo;
2785  reshapeInfo.SetShape(outputShape);
2786 
2787  return reshapeInfo;
2788 }
2789 
2790 void TfLiteParserImpl::ParseReshape(size_t subgraphIndex, size_t operatorIndex)
2791 {
2792  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2793 
2794  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2795 
2796  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2797  CHECK_VALID_SIZE(outputs.size(), 1);
2798 
2799  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2800  const auto* options = operatorPtr->builtin_options.AsReshapeOptions();
2801  auto layerName = fmt::format("Reshape:{}:{}", subgraphIndex, operatorIndex);
2802 
2803  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
2804  armnn::TensorInfo actualOutputTensorInfo = ToTensorInfo(outputs[0]);
2805  CheckMatchingQuantization(inputTensorInfo, actualOutputTensorInfo, layerName, "Input 0", "Output 0");
2806 
2807  // Extracting new shape for the output
2808  // There are two ways it can be passed
2809  // * First is to define the target shape in the operator built-in options
2810  // * Second is to pass it as a second input tensor
2811  std::vector<int32_t> targetShape;
2812  bool targetShapeFound = false;
2813  // Check if built-in options were given
2814  if (options != nullptr)
2815  {
2816  // make sure the parameter is given
2817  if (options->new_shape.empty() == false)
2818  {
2819  targetShape = options->new_shape;
2820  targetShapeFound = true;
2821  }
2822  }
2823 
2824  // If there is no built-in option given or if the built-in new_shape parameter was empty
2825  if (!targetShapeFound)
2826  {
2827  // Check for a second input tensor
2828  if (inputs.size() > 1 && inputs[1] != nullptr)
2829  {
2830  if (inputs[1]->is_variable)
2831  {
2832  ARMNN_THROW_PARSE_EXCEPTION( "Target shapes defined in non-const input tensors is not supported");
2833  }
2834 
2835  if (inputs[1]->shape.size() != 1)
2836  {
2837  ARMNN_THROW_PARSE_EXCEPTION("Target 'shape' input is not a 1D tensor");
2838  }
2839 
2840  if (inputs[1]->type != tflite::TensorType_INT32)
2841  {
2842  ARMNN_THROW_PARSE_EXCEPTION("Target 'shape' input is not an int32 type");
2843  }
2844 
2845  // Extract target shape from input
2846  auto bufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2847  auto values = reinterpret_cast<const int32_t*>(bufferPtr->data.data());
2848  if (values)
2849  {
2850  for (int i = 0; i < inputs[1]->shape[0]; ++i)
2851  {
2852  targetShape.push_back(values[i]);
2853  }
2854  }
2855  else
2856  {
2857  try
2858  {
2859  // We attempt to infer during Runtime.
2860  TensorShape reshapeShapes = ToTensorInfo(inputs[1]).GetShape();
2861  // The parser only supports shape (batch, -1) or (-1) for non-constant shape input.
2862  if (reshapeShapes[0] > 2)
2863  {
2864  throw ParseException(fmt::format("Invalid input shape '{}' in Reshape layer '{}' {}. "
2865  "When inferring during runtime, the parser only supports "
2866  "shape (batch, -1) or (-1) for target shape input.",
2867  reshapeShapes[0],
2868  layerName,
2869  CHECK_LOCATION().AsString()));
2870  }
2871 
2872  const int32_t numInputElements = inputTensorInfo.GetNumElements();
2873  const int32_t inputTensorShape = inputTensorInfo.GetShape()[0];
2874  if (reshapeShapes[0] == 1)
2875  {
2876  targetShape = {numInputElements};
2877  }
2878  else if (reshapeShapes[0] == 2)
2879  {
2880  targetShape = {inputTensorShape, numInputElements / inputTensorShape};
2881  }
2882  }
2883  catch (const std::exception& exc)
2884  {
2885  ARMNN_THROW_PARSE_EXCEPTION("Failed attempt to infer during runtime the target shape input for "
2886  "Reshape operation. Reshape operator target shape input buffer data "
2887  "is null. " << exc.what());
2888  }
2889  }
2890  }
2891  else
2892  {
2893  ARMNN_THROW_PARSE_EXCEPTION("Target shape not defined in reshape parameters or input tensor. "
2894  "At least one method required");
2895  }
2896  }
2897 
2898  armnn::TensorInfo reshapeOutputTensorInfo =
2899  TfLiteParserImpl::OutputShapeOfReshape(inputTensorInfo, targetShape);
2900 
2901  // Check for valid input size and that reshape parameters equal output shape
2902  // The output shape can be provided to us in 2 ways:
2903  // 1. through the normal 'shape' parameter given by outputs[indx]->shape
2904  // 2. through additional parameter 'shape_signature' given by outputs[indx]->buffer.
2905  // This parameter can sometimes contain -1 value not visible in the 'shape' parameter.
2906  const armnn::TensorShape& reshapeOutputTensorShape = reshapeOutputTensorInfo.GetShape();
2907  if (inputs.size() > 1 && !CheckShape(reshapeOutputTensorShape, outputs[0]->shape))
2908  {
2909  // Attempt to extract output shape from secondary 'shape_signature'
2910  // parameter and try to CheckShape() with this param.
2911  std::vector<int32_t> secondaryOutputTargetShape = outputs[0]->shape_signature;
2912 
2913  // if outputs[0]->shape_signature contain a -1 value, we need to compute its actual value
2914  // from reshape input in order to correctly verify reshape parameters equal output shape
2915  armnn::TensorInfo secondaryReshapeOutputTensorInfo =
2916  TfLiteParserImpl::OutputShapeOfReshape(inputTensorInfo, secondaryOutputTargetShape);
2917 
2918  if (!CheckShape(reshapeOutputTensorShape, secondaryReshapeOutputTensorInfo.GetShape()))
2919  {
2920  std::stringstream ss;
2921  ss << "New shape defined in reshape parameters "
2922  << reshapeOutputTensorShape
2923  << " does not equal output shape "
2924  << actualOutputTensorInfo.GetShape()
2925  << ": "
2926  << CHECK_LOCATION().AsString();
2927  throw ParseException(ss.str());
2928  }
2929  }
2930 
2931  ReshapeDescriptor reshapeDesc;
2932  reshapeDesc.m_TargetShape = reshapeOutputTensorInfo.GetShape();
2933 
2934  IConnectableLayer* layer = m_Network->AddReshapeLayer(reshapeDesc, layerName.c_str());
2935  ARMNN_ASSERT(layer != nullptr);
2936  layer->GetOutputSlot(0).SetTensorInfo(reshapeOutputTensorInfo);
2937 
2938  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
2939  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
2940 
2941  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
2942  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
2943 }
2944 
2945 void TfLiteParserImpl::ParseResizeBilinear(size_t subgraphIndex, size_t operatorIndex)
2946 {
2947  ParseResize(subgraphIndex, operatorIndex, ResizeMethod::Bilinear);
2948 }
2949 
2950 void TfLiteParserImpl::ParseResizeNearestNeighbor(size_t subgraphIndex, size_t operatorIndex)
2951 {
2952  ParseResize(subgraphIndex, operatorIndex, ResizeMethod::NearestNeighbor);
2953 }
2954 
2955 void TfLiteParserImpl::ParseResize(size_t subgraphIndex, size_t operatorIndex, ResizeMethod resizeMethod)
2956 {
2957  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
2958 
2959  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
2960  CHECK_VALID_SIZE(inputs.size(), 2);
2961 
2962  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
2963  CHECK_VALID_SIZE(outputs.size(), 1);
2964 
2965  armnn::TensorInfo sizeTensorInfo = ToTensorInfo(inputs[1]);
2966 
2967  // Data for the parsed tensor args (size) must be stored locally.
2968  std::vector<int32_t> sizeTensorData(sizeTensorInfo.GetNumElements());
2969 
2970  BufferRawPtr sizeBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
2971  ::memcpy(sizeTensorData.data(), sizeBufferPtr->data.data(), sizeTensorInfo.GetNumBytes());
2972 
2973  ResizeDescriptor desc;
2974  desc.m_Method = resizeMethod;
2975  desc.m_TargetHeight = static_cast<uint32_t> (sizeTensorData[0]);
2976  desc.m_TargetWidth = static_cast<uint32_t> (sizeTensorData[1]);
2977  desc.m_DataLayout = armnn::DataLayout::NHWC;
2978 
2979  auto layerName = fmt::format("Resize:");
2980 
2981  switch (resizeMethod)
2982  {
2983  case ResizeMethod::Bilinear:
2984  {
2985  layerName += fmt::format("BILINEAR:{}:{}", subgraphIndex, operatorIndex);
2986 
2987  const auto & operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
2988  const auto * options = operatorPtr->builtin_options.AsResizeBilinearOptions();
2989 
2990  desc.m_AlignCorners = options->align_corners;
2991  break;
2992  }
2993  case ResizeMethod::NearestNeighbor:
2994  {
2995  layerName += fmt::format("NEARESTNEIGHBOR:{}:{}", subgraphIndex, operatorIndex);
2996  break;
2997  }
2998  default:
2999  {
3000  throw ParseException(
3001  fmt::format("Unexpected ResizeMethod[{}] when creating layerName {} ",
3002  static_cast<int>(resizeMethod), CHECK_LOCATION().AsString()));
3003  }
3004  }
3005 
3006  TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
3007  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
3008  CheckMatchingQuantization(inputTensorInfo, outputTensorInfo, layerName, "Input 0", "Output 0");
3009 
3010  IConnectableLayer* layer = m_Network->AddResizeLayer(desc, layerName.c_str());
3011  ARMNN_ASSERT(layer != nullptr);
3012  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3013 
3014  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3015  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
3016 
3017  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3018  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
3019 }
3020 
3021 void TfLiteParserImpl::ParseConcatenation(size_t subgraphIndex, size_t operatorIndex)
3022 {
3023  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3024 
3025  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3026  const auto* options = operatorPtr->builtin_options.AsConcatenationOptions();
3027 
3028  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
3029 
3030  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3031  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3032  CHECK_VALID_SIZE(outputs.size(), 1);
3033 
3034  unsigned int numConcatView = static_cast<unsigned int>(inputs.size());
3035  uint32_t inputRank = ToTensorInfo(inputs[0]).GetNumDimensions();
3036 
3037  const unsigned int concatDimInput = static_cast<unsigned int>(
3038  (static_cast<int>(inputRank) + options->axis) % static_cast<int>(inputRank));
3039 
3040  OriginsDescriptor concatDescriptor(static_cast<uint32_t>(numConcatView), inputRank);
3041  concatDescriptor.SetConcatAxis(concatDimInput);
3042 
3043  unsigned int mergeDimOrigin = 0;
3044 
3045  for (unsigned int viewIndex = 0; viewIndex < numConcatView; ++viewIndex)
3046  {
3047  TensorInfo inputTensorInfo = ToTensorInfo(inputs[viewIndex]);
3048 
3049  // This set up concatDescriptor view origin
3051  inputTensorInfo, concatDescriptor, concatDimInput, viewIndex, mergeDimOrigin);
3052  }
3053 
3054  auto layerName = fmt::format("Concatenation:{}:{}", subgraphIndex, operatorIndex);
3055  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
3056 
3057  IConnectableLayer* layer = m_Network->AddConcatLayer(concatDescriptor, layerName.c_str());
3058  ARMNN_ASSERT(layer != nullptr);
3059  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3060 
3061  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3062  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes});
3063 
3064  // add fused activation layer
3065  layer = AddFusedActivationLayer(layer, 0, options->fused_activation_function);
3066 
3067  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3068  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
3069 }
3070 
3071 void TfLiteParserImpl::ParseFullyConnected(size_t subgraphIndex, size_t operatorIndex)
3072 {
3073  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3074 
3075  const auto& operatorRfr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3076  const auto options = operatorRfr->builtin_options.AsFullyConnectedOptions();
3077 
3078  CHECK_SUPPORTED_FUSED_ACTIVATION(options, subgraphIndex, operatorIndex);
3079 
3081  desc.m_BiasEnabled = false;
3082  desc.m_TransposeWeightMatrix = true;
3083 
3084  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3085  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3086  CHECK_VALID_SIZE(outputs.size(), 1);
3087 
3088  armnn::TensorInfo filterTensorInfo = ToTensorInfo(inputs[1]);
3089 
3090  // Fully Connected Layer accepts two dimensional weights input
3091  int32_t weightsDimension = static_cast<int32_t>(filterTensorInfo.GetNumDimensions());
3092  if (weightsDimension != 2)
3093  {
3094  throw ParseException(
3095  fmt::format("Dimension {} for Fully Connected weights is not supported by Armnn. "
3096  "Node {}",
3097  weightsDimension,
3098  CHECK_LOCATION().AsString()));
3099  }
3100 
3101  armnn::IConnectableLayer* layer = nullptr;
3102  auto layerName = fmt::format("FullyConnected:{}:{}", subgraphIndex, operatorIndex);
3103 
3104  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3105  // Add the first input tensor to the registration list
3106  std::vector<unsigned int> tensorIndexesToRegister = {inputTensorIndexes[0]};
3107  std::vector<unsigned int> ignoreInputWhenRegister = {};
3108  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
3109 
3110  desc.m_ConstantWeights = IsConstTensor(inputs[1]);
3111 
3112  // Add the weights input to the registration list, constant layers will be added by SetupConstantLayers if constant.
3113  tensorIndexesToRegister.emplace_back(inputTensorIndexes[1]);
3114 
3115  if (desc.m_ConstantWeights && inputTensorInfo.GetDataType() == DataType::Float32 &&
3116  (filterTensorInfo.GetDataType() == DataType::QAsymmU8 ||
3117  filterTensorInfo.GetDataType() == DataType::QAsymmS8))
3118  {
3119  m_ConstantsToDequantize.emplace_back(inputs[1]->buffer);
3120  }
3121 
3122  if (inputs.size() == 3)
3123  {
3124  desc.m_BiasEnabled = true;
3125  armnn::TensorInfo biasTensorInfo = ToTensorInfo(inputs[2]);
3126 
3127  // Add the biases input to the registration list, constant layer will be added by SetupConstantLayers.
3128  tensorIndexesToRegister.emplace_back(inputTensorIndexes[2]);
3129 
3130  if (desc.m_ConstantWeights && inputTensorInfo.GetDataType() == DataType::Float32 &&
3131  (biasTensorInfo.GetDataType() == DataType::QAsymmU8 ||
3132  biasTensorInfo.GetDataType() == DataType::QAsymmS8))
3133  {
3134  m_ConstantsToDequantize.emplace_back(inputs[2]->buffer);
3135  }
3136  }
3137 
3138  // Filters and biases are always passed to fully connected as inputs
3139  layer = m_Network->AddFullyConnectedLayer(desc, layerName.c_str());
3140 
3141  ARMNN_ASSERT(layer != nullptr);
3142 
3143  unsigned int startingSlotIndex = 0;
3144  if (inputTensorInfo.GetNumDimensions() > 2)
3145  {
3146  // Add reshape to flatten to 2D [batch_size, input_size],
3147  // where "input_size" corresponds to the number of inputs to the layer,
3148  // matching the second dimension of weights,
3149  // and "batch_size" is calculated by dividing the number of elements by "input_size".
3150  std::vector<unsigned int> reshapedDimensions(2);
3151  reshapedDimensions[1] = filterTensorInfo.GetShape()[1];
3152  reshapedDimensions[0] = inputTensorInfo.GetNumElements() / reshapedDimensions[1];
3153 
3154  if (inputTensorInfo.GetNumElements() % reshapedDimensions[1] != 0)
3155  {
3156  throw ParseException(
3157  fmt::format("Failed to deduce input tensor shape from filter size {} {}",
3158  reshapedDimensions[1],
3159  CHECK_LOCATION().AsString()));
3160  }
3161 
3162  armnn::TensorInfo reshapedTensorInfo = ToTensorInfo(inputs[0]);
3163  reshapedTensorInfo.SetShape(armnn::TensorShape{ 2, reshapedDimensions.data() });
3164 
3165  std::string reshapeLayerName = fmt::format("Reshape_for:{}", layer->GetName());
3166  armnn::ReshapeDescriptor reshapeDescriptor;
3167  reshapeDescriptor.m_TargetShape = reshapedTensorInfo.GetShape();
3168  armnn::IConnectableLayer* reshapeLayer = m_Network->AddReshapeLayer(reshapeDescriptor, layerName.c_str());
3169 
3170  reshapeLayer->GetOutputSlot(0).SetTensorInfo(reshapedTensorInfo);
3171  reshapeLayer->GetOutputSlot(0).Connect(layer->GetInputSlot(0));
3172 
3173  RegisterInputSlots(subgraphIndex, operatorIndex, reshapeLayer, {inputTensorIndexes[0]});
3174  // Fc layer connects to the reshape layer, so we skip the first input slot when registering fc's input slots
3175  tensorIndexesToRegister.erase(tensorIndexesToRegister.begin());
3176  startingSlotIndex = 1;
3177  }
3178 
3179  RegisterInputSlots(subgraphIndex, operatorIndex, layer, tensorIndexesToRegister, startingSlotIndex);
3180 
3181  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
3182  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3183 
3184  // we need to add the activation layer and fortunately we don't need to care about the data layout
3185  armnn::IConnectableLayer* fusedActivationLayer = AddFusedActivationLayer(layer, 0,
3186  options->fused_activation_function);
3187 
3188  // register the output connection slots for the layer, connections are made after all layers have been created
3189  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3190  RegisterOutputSlots(subgraphIndex, operatorIndex, fusedActivationLayer, {outputTensorIndexes[0]});
3191 }
3192 
3193 void TfLiteParserImpl::ParseDetectionPostProcess(size_t subgraphIndex, size_t operatorIndex)
3194 {
3195  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3196 
3197  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3198 
3199  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3200  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3201  CHECK_VALID_SIZE(outputs.size(), 4);
3202 
3203  // Obtain custom options from flexbuffers
3204  auto custom_options = operatorPtr->custom_options;
3205  const flexbuffers::Map& m = flexbuffers::GetRoot(custom_options.data(), custom_options.size()).AsMap();
3206 
3207  // Obtain descriptor information from tf lite
3209  desc.m_MaxDetections = m["max_detections"].AsUInt32();
3210  desc.m_MaxClassesPerDetection = m["max_classes_per_detection"].AsUInt32();
3211  desc.m_NmsScoreThreshold = m["nms_score_threshold"].AsFloat();
3212  desc.m_NmsIouThreshold = m["nms_iou_threshold"].AsFloat();
3213  desc.m_NumClasses = m["num_classes"].AsUInt32();
3214  desc.m_ScaleH = m["h_scale"].AsFloat();
3215  desc.m_ScaleW = m["w_scale"].AsFloat();
3216  desc.m_ScaleX = m["x_scale"].AsFloat();
3217  desc.m_ScaleY = m["y_scale"].AsFloat();
3218 
3219  if (!(m["use_regular_nms"].IsNull()))
3220  {
3221  desc.m_UseRegularNms = m["use_regular_nms"].AsBool();
3222  }
3223  if (!(m["detections_per_class"].IsNull()))
3224  {
3225  desc.m_DetectionsPerClass = m["detections_per_class"].AsUInt32();
3226  }
3227 
3228  if (desc.m_NmsIouThreshold <= 0.0f || desc.m_NmsIouThreshold > 1.0f)
3229  {
3230  throw InvalidArgumentException("DetectionPostProcessTFLiteParser: Intersection over union threshold "
3231  "must be positive and less than or equal to 1.");
3232  }
3233 
3234  armnn::TensorInfo anchorTensorInfo = ToTensorInfo(inputs[2]);
3235  auto anchorTensorAndData = CreateConstTensorNonPermuted(inputs[2], anchorTensorInfo);
3236 
3237  auto layerName = fmt::format("DetectionPostProcess:{}:{}", subgraphIndex, operatorIndex);
3238  IConnectableLayer* layer = m_Network->AddDetectionPostProcessLayer(desc, anchorTensorAndData,
3239  layerName.c_str());
3240 
3241  ARMNN_ASSERT(layer != nullptr);
3242 
3243  // The model does not specify the output shapes.
3244  // The output shapes are calculated from the max_detection and max_classes_per_detection.
3245  unsigned int numDetectedBox = desc.m_MaxDetections * desc.m_MaxClassesPerDetection;
3246  m_OverridenOutputShapes.push_back({ 1, numDetectedBox, 4 });
3247  m_OverridenOutputShapes.push_back({ 1, numDetectedBox });
3248  m_OverridenOutputShapes.push_back({ 1, numDetectedBox });
3249  m_OverridenOutputShapes.push_back({ 1 });
3250 
3251  for (unsigned int i = 0 ; i < outputs.size() ; ++i)
3252  {
3253  armnn::TensorInfo detectionBoxOutputTensorInfo = ToTensorInfo(outputs[i], m_OverridenOutputShapes[i]);
3254  layer->GetOutputSlot(i).SetTensorInfo(detectionBoxOutputTensorInfo);
3255  }
3256 
3257  // Register the input connection slots for the layer, connections are made after all layers have been created
3258  // only the tensors for the inputs are relevant, exclude the const tensors
3259  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3260  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
3261 
3262  // Register the output connection slots for the layer, connections are made after all layers have been created
3263  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3264  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0],
3265  outputTensorIndexes[1],
3266  outputTensorIndexes[2],
3267  outputTensorIndexes[3]});
3268 }
3269 
3270 /// The TfLite Pack operator is equivalent to the ArmNN Stack operator
3271 void TfLiteParserImpl::ParsePack(size_t subgraphIndex, size_t operatorIndex)
3272 {
3273  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3274 
3275  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3276  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3277  CHECK_VALID_SIZE(outputs.size(), 1);
3278 
3279  if (inputs.size() < 1)
3280  {
3281  throw ParseException("Pack must have at least one input.");
3282  }
3283 
3284  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3285  const auto* options = operatorPtr->builtin_options.AsPackOptions();
3286 
3287  StackDescriptor desc;
3288  desc.m_Axis = static_cast<uint32_t>(options->axis);
3289  desc.m_NumInputs = static_cast<uint32_t>(inputs.size());
3290 
3291  // Use the tensor shape of the first input as the "correct" input shape in the descriptor
3292  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
3293  desc.m_InputShape = inputTensorInfo.GetShape();
3294 
3295  auto layerName = fmt::format("Pack:{}:{}", subgraphIndex, operatorIndex);
3296  IConnectableLayer* layer = m_Network->AddStackLayer(desc, layerName.c_str());
3297 
3298  ARMNN_ASSERT(layer != nullptr);
3299 
3300  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
3301  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3302 
3303  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3304  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes});
3305 
3306  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3307  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
3308 }
3309 
3310 void TfLiteParserImpl::ParseUnidirectionalSequenceLSTM(size_t subgraphIndex, size_t operatorIndex)
3311 {
3312  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3313 
3314  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3315  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3316 
3317  if (inputs.size() < 2)
3318  {
3319  throw ParseException("UnidirectionalSequenceLSTM must have at least 2 input.");
3320  }
3321 
3322  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3323  const auto& subgraphPtr = m_Model->subgraphs[subgraphIndex];
3324  const auto nodeParams = operatorPtr->builtin_options.AsUnidirectionalSequenceLSTMOptions();
3325  CHECK_SUPPORTED_FUSED_ACTIVATION(nodeParams, subgraphIndex, operatorIndex);
3326  auto inputTensorInfo = ToTensorInfo(inputs[0]);
3327  auto outputTensorInfo = ToTensorInfo(outputs[0]);
3328 
3329  // Set the params structure for the AddUnidirectionalSequenceLstmLayer call
3330  // Please refer to each operand at
3331  // https://www.tensorflow.org/mlir/tfl_ops#tflunidirectional_sequence_lstm_tflunidirectionalsequencelstmop
3332  armnn::LstmInputParams params;
3333 
3334  if (IsOptionalOperandPresent(operatorPtr->inputs[1]))
3335  {
3336  params.m_InputToInputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[1]].get(),
3337  inputTensorInfo).first;
3338  }
3339 
3340  params.m_InputToForgetWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[2]].get(),
3341  inputTensorInfo).first;
3342  params.m_InputToCellWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[3]].get(),
3343  inputTensorInfo).first;
3344  params.m_InputToOutputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[4]].get(),
3345  inputTensorInfo).first;
3346 
3347  // Recurrent weight tensors of size {n_cell, n_output}
3348  if (IsOptionalOperandPresent(operatorPtr->inputs[5]))
3349  {
3350  params.m_RecurrentToInputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[5]].get(),
3351  inputTensorInfo).first;
3352  }
3353 
3354  params.m_RecurrentToForgetWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[6]].get(),
3355  inputTensorInfo).first;
3356  params.m_RecurrentToCellWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[7]].get(),
3357  inputTensorInfo).first;
3358  params.m_RecurrentToOutputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[8]].get(),
3359  inputTensorInfo).first;
3360 
3361  // Peephole weights tensors of size {n_cell}, representing a diagonal matrix.
3362  if (IsOptionalOperandPresent(operatorPtr->inputs[9]))
3363  {
3364  params.m_CellToInputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[9]].get(),
3365  inputTensorInfo).first;
3366  }
3367 
3368  if (IsOptionalOperandPresent(operatorPtr->inputs[10]))
3369  {
3370  params.m_CellToForgetWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[10]].get(),
3371  inputTensorInfo).first;
3372  }
3373 
3374  if (IsOptionalOperandPresent(operatorPtr->inputs[11]))
3375  {
3376  params.m_CellToOutputWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[11]].get(),
3377  inputTensorInfo).first;
3378  }
3379 
3380  // Gates bias tensors of size {n_cell}
3381  if (IsOptionalOperandPresent(operatorPtr->inputs[12]))
3382  {
3383  params.m_InputGateBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[12]].get(),
3384  inputTensorInfo).first;
3385  }
3386 
3387  params.m_ForgetGateBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[13]].get(),
3388  inputTensorInfo).first;
3389  params.m_CellBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[14]].get(),
3390  inputTensorInfo).first;
3391  params.m_OutputGateBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[15]].get(),
3392  inputTensorInfo).first;
3393 
3394  // Projection weight tensor of size {n_output, n_cell}
3395  if (IsOptionalOperandPresent(operatorPtr->inputs[16]))
3396  {
3397  params.m_ProjectionWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[16]].get(),
3398  inputTensorInfo).first;
3399  }
3400  // Projection bias tensor of size {n_output}
3401  if (IsOptionalOperandPresent(operatorPtr->inputs[17]))
3402  {
3403  params.m_ProjectionBias = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[17]].get(),
3404  inputTensorInfo).first;
3405  }
3406 
3407  // These state tensors are defined as variable tensors, and will be modified by this op.
3408  armnn::TensorInfo outputStateInInfo = ToTensorInfo(subgraphPtr->tensors[operatorPtr->inputs[18]].get());
3409  m_ConstantsToBeCreated.push_back(operatorPtr->inputs[18]);
3410  armnn::TensorInfo cellStateInInfo = ToTensorInfo(subgraphPtr->tensors[operatorPtr->inputs[19]].get());
3411  m_ConstantsToBeCreated.push_back(operatorPtr->inputs[19]);
3412 
3413  // Layer norm coefficient tensors of size {n_cell}, representing a diagonal matrix.
3414  if (inputs.size() >= 21 && IsOptionalOperandPresent(operatorPtr->inputs[20]))
3415  {
3416  params.m_InputLayerNormWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[20]].get(),
3417  inputTensorInfo).first;
3418  }
3419 
3420  if (inputs.size() >= 22 && IsOptionalOperandPresent(operatorPtr->inputs[21]))
3421  {
3422  params.m_ForgetLayerNormWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[21]].get(),
3423  inputTensorInfo).first;
3424  }
3425 
3426  if (inputs.size() >= 23 && IsOptionalOperandPresent(operatorPtr->inputs[22]))
3427  {
3428  params.m_CellLayerNormWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[22]].get(),
3429  inputTensorInfo).first;
3430  }
3431 
3432  if (inputs.size() >= 24 && IsOptionalOperandPresent(operatorPtr->inputs[23]))
3433  {
3434  params.m_OutputLayerNormWeights = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->inputs[23]].get(),
3435  inputTensorInfo).first;
3436  }
3437 
3438  // set the layer descriptor
3440  desc.m_ActivationFunc = nodeParams->fused_activation_function;
3441  desc.m_ClippingThresCell = nodeParams->cell_clip;
3442  desc.m_ClippingThresProj = nodeParams->proj_clip;
3443  desc.m_CifgEnabled = (params.m_InputToInputWeights == nullptr
3444  || params.m_RecurrentToInputWeights == nullptr
3445  || params.m_InputGateBias == nullptr);
3446  desc.m_PeepholeEnabled = (params.m_CellToForgetWeights != nullptr || params.m_CellToOutputWeights != nullptr);
3447  desc.m_ProjectionEnabled = (params.m_ProjectionWeights != nullptr);
3448  desc.m_LayerNormEnabled = (params.m_InputLayerNormWeights != nullptr
3449  || params.m_ForgetLayerNormWeights != nullptr
3450  || params.m_CellLayerNormWeights != nullptr
3451  || params.m_OutputLayerNormWeights != nullptr);
3452  desc.m_TimeMajor = nodeParams->time_major;
3453 
3454  if (operatorPtr->intermediates.size() > 3 && desc.m_LayerNormEnabled)
3455  {
3456  auto inputIntermediate = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[0]].get(),
3457  inputTensorInfo).first;
3458  auto inputIntermediateTensorInfo = inputIntermediate->GetInfo();
3459  desc.m_InputIntermediateScale = inputIntermediateTensorInfo.GetQuantizationScale();
3460 
3461  auto forgetIntermediate = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[1]].get(),
3462  inputTensorInfo).first;
3463  auto forgetIntermediateTensorInfo = forgetIntermediate->GetInfo();
3464  desc.m_ForgetIntermediateScale = forgetIntermediateTensorInfo.GetQuantizationScale();
3465 
3466  auto cellIntermediate = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[2]].get(),
3467  inputTensorInfo).first;
3468  auto cellIntermediateTensorInfo = cellIntermediate->GetInfo();
3469  desc.m_CellIntermediateScale = cellIntermediateTensorInfo.GetQuantizationScale();
3470 
3471  auto outputIntermediate = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[3]].get(),
3472  inputTensorInfo).first;
3473  auto outputIntermediateTensorInfo = outputIntermediate->GetInfo();
3474  desc.m_OutputIntermediateScale = outputIntermediateTensorInfo.GetQuantizationScale();
3475  }
3476  else
3477  {
3478  float defaultIntermediate = std::pow(2, -12);
3479  desc.m_InputIntermediateScale = defaultIntermediate;
3480  desc.m_ForgetIntermediateScale = defaultIntermediate;
3481  desc.m_CellIntermediateScale = defaultIntermediate;
3482  desc.m_OutputIntermediateScale = defaultIntermediate;
3483  }
3484 
3485  if (operatorPtr->intermediates.size() > 4)
3486  {
3487  auto hiddentensor = CreateConstTensorPtr(subgraphPtr->tensors[operatorPtr->intermediates[4]].get(),
3488  inputTensorInfo).first;
3489 
3490  desc.m_HiddenStateScale = hiddentensor->GetInfo().GetQuantizationScale();
3491  desc.m_HiddenStateZeroPoint = hiddentensor->GetInfo().GetQuantizationOffset();
3492  }
3493  unsigned int batchSize = inputTensorInfo.GetShape()[0];
3494  unsigned int outputSize = outputTensorInfo.GetShape()[2];
3495  unsigned int numUnits = cellStateInInfo.GetShape()[1];
3496 
3497  armnn::DataType dataType = inputTensorInfo.GetDataType();
3498  float qScale = inputTensorInfo.GetQuantizationScale();
3499  float qOffset = inputTensorInfo.GetQuantizationOffset();
3500 
3501  armnn::TensorInfo scratchBufferTensorInfo({batchSize, numUnits * 3}, dataType, qScale, qOffset);
3502  if (!desc.m_CifgEnabled)
3503  {
3504  scratchBufferTensorInfo = armnn::TensorInfo({batchSize, numUnits * 4}, dataType, qScale, qOffset);
3505  }
3506  armnn::TensorInfo cellStateOutTensorInfo({batchSize, numUnits},
3507  cellStateInInfo.GetDataType(),
3508  cellStateInInfo.GetQuantizationScale(),
3509  cellStateInInfo.GetQuantizationOffset());
3510  armnn::TensorInfo outputStateOutTensorInfo({batchSize, outputSize}, dataType, qScale, qOffset);
3511 
3512  armnn::LstmInputParamsInfo paramsInfo;
3513  paramsInfo.m_InputToForgetWeights = &(params.m_InputToForgetWeights->GetInfo());
3514  paramsInfo.m_InputToCellWeights = &(params.m_InputToCellWeights->GetInfo());
3515  paramsInfo.m_InputToOutputWeights = &(params.m_InputToOutputWeights->GetInfo());
3516  paramsInfo.m_RecurrentToForgetWeights = &(params.m_RecurrentToForgetWeights->GetInfo());
3517  paramsInfo.m_RecurrentToCellWeights = &(params.m_RecurrentToCellWeights->GetInfo());
3518  paramsInfo.m_RecurrentToOutputWeights = &(params.m_RecurrentToOutputWeights->GetInfo());
3519  paramsInfo.m_ForgetGateBias = &(params.m_ForgetGateBias->GetInfo());
3520  paramsInfo.m_CellBias = &(params.m_CellBias->GetInfo());
3521  paramsInfo.m_OutputGateBias = &(params.m_OutputGateBias->GetInfo());
3522 
3523  if (!desc.m_CifgEnabled)
3524  {
3525  paramsInfo.m_InputToInputWeights = &(params.m_InputToInputWeights->GetInfo());
3526  paramsInfo.m_RecurrentToInputWeights = &(params.m_RecurrentToInputWeights->GetInfo());
3527  if (params.m_CellToInputWeights != nullptr)
3528  {
3529  paramsInfo.m_CellToInputWeights = &(params.m_CellToInputWeights->GetInfo());
3530  }
3531  paramsInfo.m_InputGateBias = &(params.m_InputGateBias->GetInfo());
3532  }
3533 
3534  if (desc.m_ProjectionEnabled)
3535  {
3536  paramsInfo.m_ProjectionWeights = &(params.m_ProjectionWeights->GetInfo());
3537  if (params.m_ProjectionBias != nullptr)
3538  {
3539  paramsInfo.m_ProjectionBias = &(params.m_ProjectionBias->GetInfo());
3540  }
3541  }
3542 
3543  if (desc.m_PeepholeEnabled)
3544  {
3545  paramsInfo.m_CellToForgetWeights = &(params.m_CellToForgetWeights->GetInfo());
3546  paramsInfo.m_CellToOutputWeights = &(params.m_CellToOutputWeights->GetInfo());
3547  }
3548 
3549  if (desc.m_LayerNormEnabled)
3550  {
3551  if(!desc.m_CifgEnabled)
3552  {
3553  paramsInfo.m_InputLayerNormWeights = &(params.m_InputLayerNormWeights->GetInfo());
3554  }
3555  paramsInfo.m_ForgetLayerNormWeights = &(params.m_ForgetLayerNormWeights->GetInfo());
3556  paramsInfo.m_CellLayerNormWeights = &(params.m_CellLayerNormWeights->GetInfo());
3557  paramsInfo.m_OutputLayerNormWeights = &(params.m_OutputLayerNormWeights->GetInfo());
3558  }
3559 
3560  auto layerName = fmt::format("UnidirectionalSequenceLSTM:{}:{}", subgraphIndex, operatorIndex);
3561  armnn::IConnectableLayer* layer = m_Network->AddUnidirectionalSequenceLstmLayer(desc, params);
3562  ARMNN_ASSERT(layer != nullptr);
3563 
3564  // register the input connection slots for the layer, connections are made after all layers have been created
3565  // only the tensors for the inputs are relevant, exclude the const tensors
3566  auto inputTensorIndexes = AsUnsignedVector({operatorPtr->inputs[0],
3567  operatorPtr->inputs[18],
3568  operatorPtr->inputs[19]});
3569  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0],
3570  inputTensorIndexes[1],
3571  inputTensorIndexes[2]});
3572 
3573  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3574 
3575  layer->GetOutputSlot(0).SetTensorInfo(outputStateOutTensorInfo);
3576  layer->GetOutputSlot(1).SetTensorInfo(cellStateOutTensorInfo);
3577  layer->GetOutputSlot(2).SetTensorInfo(outputTensorInfo);
3578 
3579  unsigned int tensorIndex = outputTensorIndexes[0];
3580  armnn::IOutputSlot* slot = &(layer->GetOutputSlot(2));
3581  RegisterProducerOfTensor(subgraphIndex, tensorIndex, slot);
3582 }
3583 
3584 void TfLiteParserImpl::ParseUnpack(size_t subgraphIndex, size_t operatorIndex)
3585 {
3586  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3587 
3588  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3589  const auto* options = operatorPtr->builtin_options.AsUnpackOptions();
3590 
3591  // This unpackAxis indicates the axis to unpack
3592  const unsigned int unpackAxis = CHECKED_NON_NEGATIVE(options->axis);
3593 
3594  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3595  CHECK_VALID_SIZE(inputs.size(), 1);
3596 
3597  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
3598 
3599  if (unpackAxis >= inputTensorInfo.GetNumDimensions())
3600  {
3601  throw ParseException(
3602  fmt::format("The unpack axis: {} cannot be greater than or equal to "
3603  "the number of input dimension {} {}",
3604  unpackAxis,
3605  inputTensorInfo.GetNumDimensions(),
3606  CHECK_LOCATION().AsString()));
3607  }
3608 
3609  unsigned int unpackNum = CHECKED_NON_NEGATIVE(options->num);
3610  // If num is not defined, automatically infer from the length of the dimension axis.
3611  if(unpackNum == 0)
3612  {
3613  unpackNum = inputTensorInfo.GetShape()[unpackAxis];
3614  }
3615 
3616  // If unpack number cannot be inferred and is still zero, throw ParseException.
3617  if(unpackNum == 0)
3618  {
3619  throw ParseException("Number to unpack must greater than zero.");
3620  }
3621 
3622  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3623  CHECK_VALID_SIZE(outputs.size(), unpackNum);
3624 
3625  auto inputDimSize = inputTensorInfo.GetNumDimensions();
3626  std::vector<unsigned int> unpackDimSizes(inputDimSize);
3627 
3628  // Add current input shape to unpackDimSizes
3629  for (unsigned int i = 0; i < inputDimSize; ++i)
3630  {
3631  unpackDimSizes[i] = inputTensorInfo.GetShape()[i];
3632  }
3633 
3634  if (unpackDimSizes[unpackAxis] != unpackNum)
3635  {
3636  throw ParseException("Number to unpack must be the same as length of the dimension to "
3637  "unpack along.");
3638  }
3639 
3640  unpackDimSizes[unpackAxis] /= unpackNum;
3641 
3642  SplitterDescriptor splitDesc(unpackNum, static_cast<unsigned int>(unpackDimSizes.size()));
3643  for (unsigned int j = 0; j < unpackNum; ++j)
3644  {
3645  // Set the size of the views.
3646  for (unsigned int dimIdx = 0; dimIdx < unpackDimSizes.size(); ++dimIdx)
3647  {
3648  splitDesc.SetViewSize(j, dimIdx, unpackDimSizes[dimIdx]);
3649  }
3650  splitDesc.SetViewOriginCoord(j, unpackAxis, unpackDimSizes[unpackAxis] * j);
3651  }
3652 
3653  auto layerName = fmt::format("Unpack:{}:{}", subgraphIndex, operatorIndex);
3654  IConnectableLayer* layer = m_Network->AddSplitterLayer(splitDesc, layerName.c_str());
3655  ARMNN_ASSERT(layer != nullptr);
3656 
3657  TensorShape splitOutShape = TensorShape(static_cast<unsigned int>(unpackDimSizes.size()),
3658  unpackDimSizes.data());
3659 
3660  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3661  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
3662 
3663  std::vector<unsigned int> reshapeDims;
3664  for (unsigned int axis = 0; axis < splitOutShape.GetNumDimensions(); ++axis)
3665  {
3666  if (axis != unpackAxis)
3667  {
3668  reshapeDims.push_back(splitOutShape[axis]);
3669  }
3670  }
3671 
3672  TensorShape reshapeOutputShape(splitOutShape.GetNumDimensions() -1, reshapeDims.data());
3673 
3674  // Create reshape to remove the unpacked dimension for unpack operator of each output from Splitter.
3675  for (unsigned int k = 0; k < layer->GetNumOutputSlots(); ++k)
3676  {
3677  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[k], true);
3678  std::string reshapeLayerName = fmt::format("Reshape_for:{}", layer->GetName());
3680  desc.m_TargetShape = reshapeOutputShape;
3681  armnn::IConnectableLayer* reshapeLayer = m_Network->AddReshapeLayer(desc, layerName.c_str());
3682 
3683  layer->GetOutputSlot(k).SetTensorInfo(armnn::TensorInfo(splitOutShape,
3684  outputTensorInfo.GetDataType(),
3685  outputTensorInfo.GetQuantizationScale(),
3686  outputTensorInfo.GetQuantizationOffset()));
3687  layer->GetOutputSlot(k).Connect(reshapeLayer->GetInputSlot(0));
3688 
3689  reshapeLayer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
3690 
3691  uint32_t reshapedOutputId = CHECKED_NON_NEGATIVE(operatorPtr->outputs[k]);
3692  armnn::IOutputSlot* slot = &(reshapeLayer->GetOutputSlot(0));
3693  RegisterProducerOfTensor(subgraphIndex, reshapedOutputId, slot);
3694  }
3695 }
3696 
3697 void TfLiteParserImpl::ParseSplit(size_t subgraphIndex, size_t operatorIndex)
3698 {
3699  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3700 
3701  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3702  const auto* options = operatorPtr->builtin_options.AsSplitOptions();
3703 
3704  const unsigned int numSplits = CHECKED_NON_NEGATIVE(options->num_splits);
3705 
3706  // If number of splits cannot be inferred and is zero, throw ParseException.
3707  if(numSplits == 0)
3708  {
3709  throw ParseException("Number to splits must greater than zero.");
3710  }
3711 
3712  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3713  CHECK_VALID_SIZE(inputs.size(), 2);
3714  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3715  CHECK_VALID_SIZE(outputs.size(), numSplits);
3716 
3717  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[1]);
3718  armnn::TensorInfo axisTensorInfo = ToTensorInfo(inputs[0]);
3719  ARMNN_ASSERT(axisTensorInfo.GetNumElements() == 1);
3720 
3721  BufferRawPtr axisBufferPtr = GetBuffer(m_Model, inputs[0]->buffer);
3722  if (axisBufferPtr == nullptr)
3723  {
3724  throw ParseException(
3725  fmt::format("Operation has invalid inputs. Failed to read axis. {}",
3726  CHECK_LOCATION().AsString()));
3727  }
3728 
3729  std::vector<int32_t> axisData(axisTensorInfo.GetNumElements());
3730  ::memcpy(axisData.data(), axisBufferPtr->data.data(), axisTensorInfo.GetNumBytes());
3731  int32_t axis = axisData[0];
3732 
3733  auto inputDimensions = static_cast<int32_t>(inputTensorInfo.GetNumDimensions());
3734  if (((axis < -inputDimensions) && (axis < 0)) || ((axis >= inputDimensions) && (axis > 0)))
3735  {
3736  // Square bracket denotes inclusive n while parenthesis denotes exclusive n
3737  // E.g. Rank 4 tensor can have axis in range [-4, 3)
3738  // -1 == 3, -2 == 2, -3 == 1, -4 == 0
3739  throw ParseException(
3740  fmt::format("Operation has invalid axis: {}. Axis must be in range [-n, n) {}",
3741  axis,
3742  CHECK_LOCATION().AsString()));
3743  }
3744 
3745  const unsigned int splitDim = armnnUtils::GetUnsignedAxis(inputTensorInfo.GetNumDimensions(), axis);
3746 
3747  auto inputDimSize = inputTensorInfo.GetNumDimensions();
3748  if (inputDimSize > MaxNumOfTensorDimensions)
3749  {
3750  throw ParseException(
3751  fmt::format("The number of dimensions: {} for input tensors of the split op cannot be greater than {} {}",
3752  inputTensorInfo.GetNumDimensions(),
3754  CHECK_LOCATION().AsString()));
3755  }
3756 
3757  std::vector<unsigned int> splitterDimSizes(inputDimSize);
3758 
3759  // Add current input shape to splitterDimSizes
3760  for (unsigned int i = 0; i < inputDimSize; ++i)
3761  {
3762  splitterDimSizes[i] = inputTensorInfo.GetShape()[i];
3763  }
3764 
3765  if (splitterDimSizes[splitDim] % numSplits != 0)
3766  {
3767  throw ParseException("Number of splits must evenly divide the dimension");
3768  }
3769  splitterDimSizes[splitDim] /= numSplits;
3770 
3771  SplitterDescriptor splitDesc(numSplits, inputDimSize);
3772  for (unsigned int j = 0; j < numSplits; ++j)
3773  {
3774  // Set the size of the views.
3775  for (unsigned int dimIdx = 0; dimIdx < splitterDimSizes.size(); ++dimIdx)
3776  {
3777  splitDesc.SetViewSize(j, dimIdx, splitterDimSizes[dimIdx]);
3778  }
3779  splitDesc.SetViewOriginCoord(j, splitDim, splitterDimSizes[splitDim] * j);
3780  }
3781 
3782  auto layerName = fmt::format("Split:{}:{}", subgraphIndex, operatorIndex);
3783  IConnectableLayer* layer = m_Network->AddSplitterLayer(splitDesc, layerName.c_str());
3784  ARMNN_ASSERT(layer != nullptr);
3785 
3786  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3787  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[1]});
3788 
3789  for (unsigned int k = 0; k < layer->GetNumOutputSlots(); ++k)
3790  {
3791  armnn::TensorInfo tensorInfo = ToTensorInfo(outputs[k], true);
3792  layer->GetOutputSlot(k).SetTensorInfo(tensorInfo);
3793  }
3794 
3795  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3796  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
3797 }
3798 
3799 unsigned int ComputeWrappedIndex(int idx, unsigned int numDimsIn)
3800 {
3801  int numDims = armnn::numeric_cast<int>(numDimsIn);
3802  int v = idx < 0 ? numDims + idx : idx;
3803  ARMNN_ASSERT(v >= 0);
3804  ARMNN_ASSERT(v < numDims);
3805 
3806  return static_cast<unsigned int>(v);
3807 }
3808 
3809 void TfLiteParserImpl::ParseSplitV(size_t subgraphIndex, size_t operatorIndex)
3810 {
3811  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3812 
3813  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
3814  const auto* options = operatorPtr->builtin_options.AsSplitVOptions();
3815 
3816  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3817  CHECK_VALID_SIZE(inputs.size(), 3);
3818 
3819  auto& inputTensor = inputs[0];
3820  auto& splitsTensor = inputs[1];
3821  auto& axisTensor = inputs[2];
3822 
3823  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputTensor);
3824  armnn::TensorInfo splitsInfo = ToTensorInfo(splitsTensor);
3825  armnn::TensorInfo axisTensorInfo = ToTensorInfo(axisTensor);
3826  ARMNN_ASSERT(axisTensorInfo.GetNumElements() == 1);
3827 
3828  // Inputs
3829  auto inputDimSize = inputTensorInfo.GetNumDimensions();
3830  if (inputDimSize > MaxNumOfTensorDimensions)
3831  {
3832  throw ParseException(
3833  fmt::format("The number of dimensions: {} for input tensors of the "
3834  "SplitV op cannot be greater than {} {}",
3835  inputTensorInfo.GetNumDimensions(),
3837  CHECK_LOCATION().AsString()));
3838  }
3839 
3840  // Get split axis
3841  BufferRawPtr axisBufferPtr = GetBuffer(m_Model, axisTensor->buffer);
3842  if (axisBufferPtr == nullptr)
3843  {
3844  throw ParseException(
3845  fmt::format("Operation has invalid inputs. Failed to read axis. {}",
3846  CHECK_LOCATION().AsString()));
3847  }
3848 
3849  std::vector<int> axisData(axisTensorInfo.GetNumElements());
3850  ::memcpy(axisData.data(), axisBufferPtr->data.data(), axisTensorInfo.GetNumBytes());
3851  int32_t axis = axisData[0];
3852 
3853  auto inputDimensions = static_cast<int32_t>(inputTensorInfo.GetNumDimensions());
3854  if (((axis < -inputDimensions) && (axis < 0)) || ((axis >= inputDimensions) && (axis > 0)))
3855  {
3856  // Square bracket denotes inclusive n while parenthesis denotes exclusive n
3857  // E.g. Rank 4 tensor can have axis in range [-4, 3)
3858  // -1 == 3, -2 == 2, -3 == 1, -4 == 0
3859  throw ParseException(
3860  fmt::format("Operation has invalid axis: {}. Axis must be in range [-n, n) {}",
3861  axis,
3862  CHECK_LOCATION().AsString()));
3863  }
3864  const unsigned int splitDim = ComputeWrappedIndex(axis, inputTensorInfo.GetNumDimensions());
3865 
3866  // Set split sizes
3867  CHECK_VALID_SIZE(splitsInfo.GetNumDimensions(), 1);
3868  unsigned int numSplits{0};
3869 
3870  if(options)
3871  {
3872  numSplits = CHECKED_NON_NEGATIVE(options->num_splits);
3873  }
3874  else
3875  {
3876  numSplits = splitsInfo.GetNumElements();
3877  }
3878 
3879  if (numSplits <=0)
3880  {
3881  throw ParseException("SplitV has invalid number of splits");
3882  }
3883 
3884  std::vector<int> splitsData(numSplits);
3885  BufferRawPtr splitsBufferPtr = GetBuffer(m_Model, splitsTensor->buffer);
3886  ::memcpy(splitsData.data(), splitsBufferPtr->data.data(), splitsInfo.GetNumBytes());
3887 
3888  unsigned int idx = 0;
3889  int numInferred{0};
3890  unsigned int inferIdx{0};
3891  int splitSum{0};
3892  for (auto split : splitsData)
3893  {
3894  if (split < 0)
3895  {
3896  numInferred++;
3897  inferIdx = idx;
3898  }
3899  else
3900  {
3901  splitSum += split;
3902  }
3903  idx++;
3904  }
3905  // Check for inferred Axis
3906  if (numInferred == 0)
3907  {
3908  if (splitSum != armnn::numeric_cast<int>(inputTensorInfo.GetShape()[splitDim]))
3909  {
3910  throw ParseException("SplitV split_sizes does not sum to the dimension of value along split_dim.");
3911  }
3912  }
3913  else if (numInferred == 1)
3914  {
3915  splitsData[inferIdx] = armnn::numeric_cast<int>(inputTensorInfo.GetShape()[splitDim]) - splitSum;
3916  }
3917  else
3918  {
3919  throw ParseException("Cannot infer split size for more than one split");
3920  }
3921 
3922  //Ouput size validation
3923  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3924  CHECK_VALID_SIZE(outputs.size(), numSplits);
3925 
3926  // Setup Armnn descriptor
3927  SplitterDescriptor splitDesc(numSplits, inputDimSize);
3928  unsigned int accumSplit = 0;
3929  for (unsigned int j = 0; j < numSplits; ++j)
3930  {
3931  unsigned int splitSize = armnn::numeric_cast<unsigned int>(splitsData[j]);
3932 
3933  // Set the size of the views.
3934  for (unsigned int dimIdx = 0; dimIdx < inputTensorInfo.GetNumDimensions(); ++dimIdx)
3935  {
3936  unsigned int dimSize = inputTensorInfo.GetShape()[dimIdx];
3937  if (dimIdx == splitDim)
3938  {
3939  dimSize = splitSize;
3940  }
3941  splitDesc.SetViewSize(j, dimIdx, dimSize);
3942  }
3943 
3944  splitDesc.SetViewOriginCoord(j, splitDim, accumSplit);
3945  accumSplit += splitSize;
3946  }
3947 
3948  auto layerName = fmt::format("SplitV:{}:{}", subgraphIndex, operatorIndex);
3949  IConnectableLayer* layer = m_Network->AddSplitterLayer(splitDesc, layerName.c_str());
3950  ARMNN_ASSERT(layer != nullptr);
3951 
3952  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
3953  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
3954 
3955  for (unsigned int k = 0; k < layer->GetNumOutputSlots(); ++k)
3956  {
3957  armnn::TensorInfo tensorInfo = ToTensorInfo(outputs[k], true);
3958  layer->GetOutputSlot(k).SetTensorInfo(tensorInfo);
3959  }
3960 
3961  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
3962  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
3963 }
3964 
3965 void TfLiteParserImpl::ParseArgMin(size_t subgraphIndex, size_t operatorIndex)
3966 {
3967  ParseArgMinMax(subgraphIndex, operatorIndex, armnn::ArgMinMaxFunction::Min);
3968 }
3969 
3970 void TfLiteParserImpl::ParseArgMax(size_t subgraphIndex, size_t operatorIndex)
3971 {
3972  ParseArgMinMax(subgraphIndex, operatorIndex, armnn::ArgMinMaxFunction::Max);
3973 }
3974 
3975 void TfLiteParserImpl::ParseArgMinMax(size_t subgraphIndex, size_t operatorIndex, ArgMinMaxFunction argMinMaxFunction)
3976 {
3977  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
3978  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
3979  CHECK_VALID_SIZE(inputs.size(), 2);
3980 
3981  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
3982  CHECK_VALID_SIZE(outputs.size(), 1);
3983 
3984  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
3985  armnn::TensorInfo axisTensorInfo = ToTensorInfo(inputs[1]);
3986  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0]);
3987  ARMNN_ASSERT(axisTensorInfo.GetNumElements() == 1);
3988 
3989  // Check if output tensor type is Signed32 or Signed64
3990  if (outputTensorInfo.GetDataType() != armnn::DataType::Signed32 &&
3991  outputTensorInfo.GetDataType() != armnn::DataType::Signed64)
3992  {
3993  throw ParseException(
3994  fmt::format(
3995  "Output tensor data type is not supported. (Supported types: Signed32 & Signed64) {}",
3996  CHECK_LOCATION().AsString()));
3997  }
3998 
3999  // Get const axis value from model and set it to descriptor.
4000  BufferRawPtr axisBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
4001  if (axisBufferPtr == nullptr)
4002  {
4003  throw ParseException(
4004  fmt::format("Operation has invalid inputs. Failed to read axis. {}",
4005  CHECK_LOCATION().AsString()));
4006  }
4007 
4008  std::vector<int32_t> axisData(axisTensorInfo.GetNumElements());
4009  ::memcpy(axisData.data(), axisBufferPtr->data.data(), axisTensorInfo.GetNumBytes());
4010  int32_t axis = axisData.front();
4011 
4012  auto inputDimensions = static_cast<int32_t>(inputTensorInfo.GetNumDimensions());
4013  if (((axis < -inputDimensions) && (axis < 0)) || ((axis >= inputDimensions) && (axis > 0)))
4014  {
4015  // Square bracket denotes inclusive n while parenthesis denotes exclusive n
4016  // E.g. Rank 4 tensor can have axis in range [-4, 3)
4017  // -1 == 3, -2 == 2, -3 == 1, -4 == 0
4018  throw ParseException(
4019  fmt::format("Operation has invalid axis: {}. Axis must be in range [-n, n) {}",
4020  axis,
4021  CHECK_LOCATION().AsString()));
4022  }
4023 
4024  ArgMinMaxDescriptor desc;
4025  desc.m_Axis = axis;
4026  desc.m_Function = argMinMaxFunction;
4027 
4028  // Register a ArgMin/ArgMax layer.
4029  auto layerName = argMinMaxFunction == ArgMinMaxFunction::Max ? "ArgMax:{}:{}" : "ArgMin:{}:{}";
4030  auto layerNameFormatted = fmt::format(layerName, subgraphIndex, operatorIndex);
4031  IConnectableLayer *layer = m_Network->AddArgMinMaxLayer(desc, layerNameFormatted.c_str());
4032  ARMNN_ASSERT(layer != nullptr);
4033  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4034 
4035  // Register input tensor to the layer.
4036  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4037  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4038 
4039  // Register output tensor to the layer.
4040  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4041  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
4042 }
4043 
4044 void TfLiteParserImpl::ParseGather(size_t subgraphIndex, size_t operatorIndex)
4045 {
4046  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4047 
4048  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4049  CHECK_VALID_SIZE(inputs.size(), 2);
4050  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4051  CHECK_VALID_SIZE(outputs.size(), 1);
4052 
4053  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
4054  armnn::TensorInfo indicesTensorInfo = ToTensorInfo(inputs[1]);
4055  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
4056 
4057  armnn::GatherDescriptor gatherDescriptor;
4058 
4059  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
4060  const auto* options = operatorPtr->builtin_options.AsGatherOptions();
4061  auto axis = options->axis;
4062 
4063  auto inputDimensions = static_cast<int32_t>(inputTensorInfo.GetNumDimensions());
4064  auto indicesDimensions = indicesTensorInfo.GetNumDimensions();
4065  auto outputDimensions = outputTensorInfo.GetNumDimensions();
4066  if (((axis < -inputDimensions) && (axis < 0)) || ((axis >= inputDimensions) && (axis > 0)))
4067  {
4068  throw ParseException(
4069  fmt::format("Operation has invalid axis: {} It is out of bounds [ -{}, {} ) {}",
4070  axis,
4071  inputDimensions, inputDimensions,
4072  CHECK_LOCATION().AsString()));
4073  }
4074  if (outputDimensions != static_cast<unsigned int>(inputDimensions) + indicesDimensions - 1)
4075  {
4076  throw ParseException(
4077  fmt::format("Operation has invalid output dimensions: {} Output must be an ({} + {} - 1) -D tensor {}",
4078  outputDimensions,
4079  inputDimensions, indicesDimensions,
4080  CHECK_LOCATION().AsString()));
4081  }
4082 
4083  gatherDescriptor.m_Axis = axis;
4084 
4085  auto layerName = fmt::format("Gather:{}:{}", subgraphIndex, operatorIndex);
4086  IConnectableLayer* layer = m_Network->AddGatherLayer(gatherDescriptor, layerName.c_str());
4087  ARMNN_ASSERT(layer != nullptr);
4088  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4089 
4090  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4091  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
4092 
4093  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4094  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4095 }
4096 
4097 void TfLiteParserImpl::ParseGatherNd(size_t subgraphIndex, size_t operatorIndex)
4098 {
4099  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4100 
4101  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4102  CHECK_VALID_SIZE(inputs.size(), 2);
4103  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4104  CHECK_VALID_SIZE(outputs.size(), 1);
4105 
4106  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
4107  armnn::TensorInfo indicesTensorInfo = ToTensorInfo(inputs[1]);
4108  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
4109 
4110  auto layerName = fmt::format("GatherNd:{}:{}", subgraphIndex, operatorIndex);
4111  IConnectableLayer* layer = m_Network->AddGatherNdLayer(layerName.c_str());
4112  ARMNN_ASSERT(layer != nullptr);
4113  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4114 
4115  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4116  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
4117 
4118  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4119  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4120 }
4121 
4122 void TfLiteParserImpl::ParseDepthToSpace(size_t subgraphIndex, size_t operatorIndex)
4123 {
4124  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4125 
4126  TfLiteParserImpl::TensorRawPtrVector inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4127  CHECK_VALID_SIZE(inputs.size(), 1);
4128  TfLiteParserImpl::TensorRawPtrVector outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4129  CHECK_VALID_SIZE(outputs.size(), 1);
4130 
4131  armnn::DepthToSpaceDescriptor descriptor;
4132 
4133  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
4134  const auto* options = operatorPtr->builtin_options.AsDepthToSpaceOptions();
4135  auto blockSize = options->block_size;
4136  if (blockSize < 2)
4137  {
4138  throw ParseException(
4139  fmt::format("Operation has invalid block size: {} Block size should be >= 2 {}",
4140  blockSize,
4141  CHECK_LOCATION().AsString()));
4142  }
4143  descriptor.m_BlockSize = armnn::numeric_cast<uint32_t>(blockSize);
4144 
4145  auto layerName = fmt::format("DepthToSpace:{}:{}", subgraphIndex, operatorIndex);
4146  IConnectableLayer* layer = m_Network->AddDepthToSpaceLayer(descriptor, layerName.c_str());
4147  ARMNN_ASSERT(layer != nullptr);
4148  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
4149  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4150 
4151  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4152  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4153 
4154  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4155  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4156 }
4157 
4158 void TfLiteParserImpl::ParseSum(size_t subgraphIndex, size_t operatorIndex)
4159 {
4160  ParseReduce(subgraphIndex, operatorIndex, armnn::ReduceOperation::Sum);
4161 }
4162 
4163 void TfLiteParserImpl::ParseReduceProd(size_t subgraphIndex, size_t operatorIndex)
4164 {
4165  ParseReduce(subgraphIndex, operatorIndex, armnn::ReduceOperation::Prod);
4166 }
4167 
4168 void TfLiteParserImpl::ParseReduceMax(size_t subgraphIndex, size_t operatorIndex)
4169 {
4170  ParseReduce(subgraphIndex, operatorIndex, armnn::ReduceOperation::Max);
4171 }
4172 
4173 void TfLiteParserImpl::ParseReduceMin(size_t subgraphIndex, size_t operatorIndex)
4174 {
4175  ParseReduce(subgraphIndex, operatorIndex, armnn::ReduceOperation::Min);
4176 }
4177 
4178 void TfLiteParserImpl::ParseReduce(size_t subgraphIndex, size_t operatorIndex, ReduceOperation reduceOperation)
4179 {
4180  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4181 
4182  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
4183  const auto* options = operatorPtr->builtin_options.AsReducerOptions();
4184 
4185  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4186  CHECK_VALID_SIZE(inputs.size(), 2);
4187 
4188  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4189  CHECK_VALID_SIZE(outputs.size(), 1);
4190 
4191  auto layerName = fmt::format("Reduce:{}:{}", subgraphIndex, operatorIndex);
4192 
4193  armnn::TensorInfo inputTensorInfo0 = ToTensorInfo(inputs[0]);
4194  armnn::TensorInfo inputTensorInfo1 = ToTensorInfo(inputs[1]);
4195 
4196  ReduceDescriptor desc;
4197  BufferRawPtr axisBufferPtr = GetBuffer(m_Model, inputs[1]->buffer);
4198  // Get const axis value from model and set it to descriptor.
4199  if (axisBufferPtr != nullptr)
4200  {
4201  std::vector<int32_t> axisData(inputTensorInfo1.GetNumElements());
4202  ::memcpy(axisData.data(), axisBufferPtr->data.data(), inputTensorInfo1.GetNumBytes());
4203 
4204  // Convert the axis to unsigned int and remove duplicates.
4205  auto rank = static_cast<int32_t>(inputTensorInfo0.GetNumDimensions());
4206  std::set<unsigned int> uniqueAxis;
4207  std::transform(axisData.begin(),
4208  axisData.end(),
4209  std::inserter(uniqueAxis, uniqueAxis.begin()),
4210  [rank](int i)->unsigned int{
4211  return static_cast<uint32_t>(((i + rank) % rank)); });
4212  desc.m_vAxis.assign(uniqueAxis.begin(), uniqueAxis.end());
4213  }
4214  else
4215  {
4216  for (uint32_t i = 0; i < inputTensorInfo0.GetNumDimensions(); ++i)
4217  {
4218  desc.m_vAxis.push_back(i);
4219  }
4220  }
4221 
4222  desc.m_KeepDims = options->keep_dims;
4223  desc.m_ReduceOperation = reduceOperation;
4224 
4225  // Register a new layer object, Sum.
4226  IConnectableLayer* layer = m_Network->AddReduceLayer(desc, layerName.c_str());
4227 
4228  armnn::TensorInfo outputTensorInfo = ToTensorInfo(outputs[0]);
4229  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4230 
4231  // Register input tensor to the layer.
4232  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4233  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4234 
4235  // Register output tensor to the layer.
4236  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4237  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
4238 }
4239 
4240 void TfLiteParserImpl::ParseLocalResponseNormalization(size_t subgraphIndex, size_t operatorIndex)
4241 {
4242  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4243 
4244  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4245  CHECK_VALID_SIZE(inputs.size(), 1);
4246 
4247  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4248  CHECK_VALID_SIZE(outputs.size(), 1);
4249 
4250  auto layerName = fmt::format("LRN:{}:{}", subgraphIndex, operatorIndex);
4251  std::string layerNameFormatted = fmt::format(layerName, subgraphIndex, operatorIndex);
4252 
4253  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
4254 
4255  const auto& operatorPtr = m_Model->subgraphs[subgraphIndex]->operators[operatorIndex];
4256  const auto* options = operatorPtr->builtin_options.AsLocalResponseNormalizationOptions();
4257 
4258  armnn::NormalizationDescriptor descriptor;
4262  descriptor.m_NormSize = static_cast<uint32_t>(options->radius);
4263  descriptor.m_K = options->bias;
4264  descriptor.m_Alpha = options->alpha;
4265  descriptor.m_Beta = options->beta;
4266 
4267  // ArmNN expects normSize to be the full size of the normalization
4268  // window rather than the radius as in TfLite.
4269  descriptor.m_NormSize = 1 + (2 * descriptor.m_NormSize);
4270 
4271  IConnectableLayer* layer = m_Network->AddNormalizationLayer(descriptor, layerNameFormatted.c_str());
4272  ARMNN_ASSERT(layer != nullptr);
4273 
4274  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
4275  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4276 
4277  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4278  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4279 
4280  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4281  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4282 }
4283 
4284 void TfLiteParserImpl::ParseAbs(size_t subgraphIndex, size_t operatorIndex)
4285 {
4286  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Abs);
4287 }
4288 
4289 void TfLiteParserImpl::ParseExp(size_t subgraphIndex, size_t operatorIndex)
4290 {
4291  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Exp);
4292 }
4293 
4294 void TfLiteParserImpl::ParseLog(size_t subgraphIndex, size_t operatorIndex)
4295 {
4296  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Log);
4297 }
4298 
4299 void TfLiteParserImpl::ParseLogicalNot(size_t subgraphIndex, size_t operatorIndex)
4300 {
4301  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::LogicalNot);
4302 }
4303 
4304 void TfLiteParserImpl::ParseNeg(size_t subgraphIndex, size_t operatorIndex)
4305 {
4306  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Neg);
4307 }
4308 
4309 void TfLiteParserImpl::ParseRsqrt(size_t subgraphIndex, size_t operatorIndex)
4310 {
4311  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Rsqrt);
4312 }
4313 
4314 void TfLiteParserImpl::ParseSin(size_t subgraphIndex, size_t operatorIndex)
4315 {
4316  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Sin);
4317 }
4318 
4319 void TfLiteParserImpl::ParseSqrt(size_t subgraphIndex, size_t operatorIndex)
4320 {
4321  ParseElementwiseUnary(subgraphIndex, operatorIndex, armnn::UnaryOperation::Sqrt);
4322 }
4323 
4324 void TfLiteParserImpl::ParseElementwiseUnary(size_t subgraphIndex, size_t operatorIndex, UnaryOperation unaryOperation)
4325 {
4326  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4327 
4328  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4329  CHECK_VALID_SIZE(inputs.size(), 1);
4330 
4331  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4332  CHECK_VALID_SIZE(outputs.size(), 1);
4333 
4334  std::string layerName = std::string(GetUnaryOperationAsCString(unaryOperation)) + ":{}:{}";
4335  std::string layerNameFormatted = fmt::format(layerName, subgraphIndex, operatorIndex);
4336 
4338  desc.m_Operation = unaryOperation;
4339  IConnectableLayer* layer = m_Network->AddElementwiseUnaryLayer(desc, layerNameFormatted.c_str());
4340  ARMNN_ASSERT(layer != nullptr);
4341 
4342  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
4343  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4344 
4345  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4346  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0]});
4347 
4348  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4349  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, outputTensorIndexes);
4350 }
4351 
4352 void TfLiteParserImpl::ParseEqual(size_t subgraphIndex, size_t operatorIndex)
4353 {
4354  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::Equal);
4355 }
4356 
4357 void TfLiteParserImpl::ParseNotEqual(size_t subgraphIndex, size_t operatorIndex)
4358 {
4359  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::NotEqual);
4360 }
4361 
4362 void TfLiteParserImpl::ParseGreater(size_t subgraphIndex, size_t operatorIndex)
4363 {
4364  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::Greater);
4365 }
4366 
4367 void TfLiteParserImpl::ParseGreaterOrEqual(size_t subgraphIndex, size_t operatorIndex)
4368 {
4369  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::GreaterOrEqual);
4370 }
4371 
4372 void TfLiteParserImpl::ParseLess(size_t subgraphIndex, size_t operatorIndex)
4373 {
4374  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::Less);
4375 }
4376 
4377 void TfLiteParserImpl::ParseLessOrEqual(size_t subgraphIndex, size_t operatorIndex)
4378 {
4379  ParseComparison(subgraphIndex, operatorIndex, armnn::ComparisonOperation::LessOrEqual);
4380 }
4381 
4382 void TfLiteParserImpl::ParseComparison(size_t subgraphIndex, size_t operatorIndex,
4383  ComparisonOperation comparisonOperation)
4384 {
4385  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4386 
4387  auto inputs = GetInputs(m_Model, subgraphIndex, operatorIndex);
4388  CHECK_VALID_SIZE(inputs.size(), 2);
4389 
4390  auto outputs = GetOutputs(m_Model, subgraphIndex, operatorIndex);
4391  CHECK_VALID_SIZE(outputs.size(), 1);
4392 
4393  auto layerName = std::string(GetComparisonOperationAsCString(comparisonOperation)) + ":{}:{}";
4394  std::string layerNameFormatted = fmt::format(layerName, subgraphIndex, operatorIndex);
4395 
4396  armnn::TensorInfo inputTensorInfo = ToTensorInfo(inputs[0]);
4397  armnn::TensorInfo input1TensorInfo = ToTensorInfo(inputs[1]);
4398  CheckMatchingQuantization(inputTensorInfo, input1TensorInfo, layerNameFormatted, "Input 0", "Input 1");
4399 
4400  ComparisonDescriptor desc;
4401  desc.m_Operation = comparisonOperation;
4402  IConnectableLayer* layer = m_Network->AddComparisonLayer(desc, layerNameFormatted.c_str());
4403  ARMNN_ASSERT(layer != nullptr);
4404 
4405  TensorInfo outputTensorInfo = ToTensorInfo(outputs[0], true);
4406  layer->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
4407 
4408  auto inputTensorIndexes = AsUnsignedVector(GetInputTensorIds(m_Model, subgraphIndex, operatorIndex));
4409  RegisterInputSlots(subgraphIndex, operatorIndex, layer, {inputTensorIndexes[0], inputTensorIndexes[1]});
4410 
4411  auto outputTensorIndexes = AsUnsignedVector(GetOutputTensorIds(m_Model, subgraphIndex, operatorIndex));
4412  RegisterOutputSlots(subgraphIndex, operatorIndex, layer, {outputTensorIndexes[0]});
4413 }
4414 
4415 armnn::IConnectableLayer* TfLiteParserImpl::AddFusedActivationLayer(armnn::IConnectableLayer* prevLayer,
4416  unsigned int outputSlot,
4417  tflite::ActivationFunctionType activationType)
4418 {
4419  ActivationDescriptor activationDesc;
4420  std::string layerName = prevLayer->GetName();
4421 
4422  switch(activationType)
4423  {
4424  case tflite::ActivationFunctionType_NONE:
4425  {
4426  // this is a no-op: return previous layer
4427  return prevLayer;
4428  }
4429  case tflite::ActivationFunctionType_RELU:
4430  {
4431  activationDesc.m_Function = ActivationFunction::ReLu;
4432  layerName += ":RELU";
4433  break;
4434  }
4435  case tflite::ActivationFunctionType_RELU6:
4436  {
4437  activationDesc.m_Function = ActivationFunction::BoundedReLu;
4438  activationDesc.m_A = 6.0f;
4439  activationDesc.m_B = 0.0f;
4440  layerName += ":RELU6";
4441  break;
4442  }
4443  case tflite::ActivationFunctionType_TANH:
4444  {
4445  activationDesc.m_Function = ActivationFunction::TanH;
4446  activationDesc.m_A = 1.0f;
4447  activationDesc.m_B = 1.0f;
4448  layerName += ":TANH";
4449  break;
4450  }
4451 
4452  // I only put these here as a reminder what others we could support
4453  case tflite::ActivationFunctionType_RELU_N1_TO_1:
4454  case tflite::ActivationFunctionType_SIGN_BIT:
4455  default:
4456  {
4457  throw ParseException(
4458  fmt::format("TfLite parser doesn't suppport fused activation: "
4459  "{}/{} {} ",
4460  activationType,
4461  tflite::EnumNameActivationFunctionType(activationType),
4462  CHECK_LOCATION().AsString()));
4463 
4464  }
4465  }
4466 
4467  IConnectableLayer* activationLayer =
4468  m_Network->AddActivationLayer(activationDesc, layerName.c_str());
4469 
4470  auto & prevOutputSlot = prevLayer->GetOutputSlot(outputSlot);
4471  prevOutputSlot.Connect(activationLayer->GetInputSlot(0));
4472  activationLayer->GetOutputSlot(0).SetTensorInfo(prevOutputSlot.GetTensorInfo());
4473  return activationLayer;
4474 }
4475 
4476 armnn::IConnectableLayer* TfLiteParserImpl::AddFusedFloorLayer(armnn::IConnectableLayer* prevLayer,
4477  unsigned int outputSlot)
4478 {
4479 
4480  auto& prevOutputSlot = prevLayer->GetOutputSlot(outputSlot);
4481  DataType dataType = prevOutputSlot.GetTensorInfo().GetDataType();
4482 
4483  if (dataType == DataType::Signed32)
4484  {
4485  return prevLayer;
4486  }
4487 
4488  std::string layerName = prevLayer->GetName();
4489  IConnectableLayer* floorLayer = m_Network->AddFloorLayer(layerName.c_str());
4490 
4491  prevOutputSlot.Connect(floorLayer->GetInputSlot(0));
4492  floorLayer->GetOutputSlot(0).SetTensorInfo(prevOutputSlot.GetTensorInfo());
4493 
4494  return floorLayer;
4495 }
4496 
4498 {
4499  if (fileName == nullptr)
4500  {
4501  throw InvalidArgumentException(fmt::format("Invalid (null) file name {}",
4502  CHECK_LOCATION().AsString()));
4503  }
4504  std::error_code errorCode;
4505  fs::path pathToFile(fileName);
4506  if (!fs::exists(pathToFile, errorCode))
4507  {
4508  //fmt::format() could not be used here (format error)
4509  std::stringstream msg;
4510  msg << "Cannot find the file (" << fileName << ") errorCode: " << errorCode
4511  << " " << CHECK_LOCATION().AsString();
4512 
4513  throw FileNotFoundException(msg.str());
4514  }
4515  std::ifstream file(fileName, std::ios::binary);
4516  std::string fileContent((std::istreambuf_iterator<char>(file)), std::istreambuf_iterator<char>());
4517  return LoadModelFromBinary(reinterpret_cast<const uint8_t *>(fileContent.c_str()),
4518  fileContent.size());
4519 }
4520 
4522 {
4523  if (binaryContent == nullptr)
4524  {
4525  throw InvalidArgumentException(fmt::format("Invalid (null) binary content {}",
4526  CHECK_LOCATION().AsString()));
4527  }
4528  flatbuffers::Verifier verifier(binaryContent, len);
4529  if (verifier.VerifyBuffer<tflite::Model>() == false)
4530  {
4531  throw ParseException(
4532  fmt::format("Buffer doesn't conform to the expected Tensorflow Lite "
4533  "flatbuffers format. size:{} {}",
4534  len,
4535  CHECK_LOCATION().AsString()));
4536  }
4537  return tflite::UnPackModel(binaryContent);
4538 }
4539 
4541  size_t subgraphIndex,
4542  size_t operatorIndex)
4543 {
4544  CHECK_MODEL(model, subgraphIndex, operatorIndex);
4545 
4546  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4547  const auto& operatorPtr = subgraphPtr->operators[operatorIndex];
4548 
4549  size_t inputCount = operatorPtr->inputs.size();
4550  TensorRawPtrVector result;
4551  for (size_t i = 0; i < inputCount; ++i)
4552  {
4553  // If the input location is -1 then assume input is turned off.
4554  if (operatorPtr->inputs[i] == -1)
4555  {
4556  continue;
4557  }
4558  else
4559  {
4560  uint32_t inputId = CHECKED_NON_NEGATIVE(operatorPtr->inputs[i]);
4561  result.push_back(subgraphPtr->tensors[inputId].get());
4562  }
4563  }
4564  return result;
4565 }
4566 
4568  size_t subgraphIndex,
4569  size_t operatorIndex)
4570 {
4571  CHECK_MODEL(model, subgraphIndex, operatorIndex);
4572 
4573  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4574  const auto& operatorPtr = subgraphPtr->operators[operatorIndex];
4575 
4576  size_t outputCount = operatorPtr->outputs.size();
4577  TensorRawPtrVector result(outputCount);
4578  for (size_t i = 0; i < outputCount; ++i)
4579  {
4580  uint32_t outputId = CHECKED_NON_NEGATIVE(operatorPtr->outputs[i]);
4581  CHECK_TENSOR(model, subgraphIndex, outputId);
4582  result[i] = subgraphPtr->tensors[outputId].get();
4583  }
4584  return result;
4585 }
4586 
4588  size_t subgraphIndex)
4589 {
4590  CHECK_SUBGRAPH(model, subgraphIndex);
4591  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4592 
4593  size_t inputCount = subgraphPtr->inputs.size();
4594  TensorIdRawPtrVector result(inputCount);
4595  for (size_t i = 0; i < inputCount; ++i)
4596  {
4597  uint32_t inputId = CHECKED_NON_NEGATIVE(subgraphPtr->inputs[i]);
4598  CHECK_TENSOR(model, subgraphIndex, inputId);
4599  result[i] = std::make_pair(inputId, subgraphPtr->tensors[inputId].get());
4600  }
4601  return result;
4602 }
4603 
4605  size_t subgraphIndex)
4606 {
4607  CHECK_SUBGRAPH(model, subgraphIndex);
4608  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4609 
4610  size_t outputCount = subgraphPtr->outputs.size();
4611  TensorIdRawPtrVector result(outputCount);
4612  for (size_t i = 0; i < outputCount; ++i)
4613  {
4614  uint32_t outputId = CHECKED_NON_NEGATIVE(subgraphPtr->outputs[i]);
4615  result[i] = std::make_pair(outputId, subgraphPtr->tensors[outputId].get());
4616  }
4617  return result;
4618 }
4619 
4620 std::vector<int32_t>& TfLiteParserImpl::GetInputTensorIds(const ModelPtr& model,
4621  size_t subgraphIndex,
4622  size_t operatorIndex)
4623 {
4624  CHECK_MODEL(model, subgraphIndex, operatorIndex);
4625  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4626  const auto& operatorPtr = subgraphPtr->operators[operatorIndex];
4627  return operatorPtr->inputs;
4628 }
4629 
4630 std::vector<int32_t>& TfLiteParserImpl::GetOutputTensorIds(const ModelPtr& model,
4631  size_t subgraphIndex,
4632  size_t operatorIndex)
4633 {
4634  CHECK_MODEL(model, subgraphIndex, operatorIndex);
4635  const auto& subgraphPtr = model->subgraphs[subgraphIndex];
4636  const auto& operatorPtr = subgraphPtr->operators[operatorIndex];
4637  return operatorPtr->outputs;
4638 }
4639 
4640 void TfLiteParserImpl::RegisterInputSlots(size_t subgraphIndex,
4641  size_t operatorIndex,
4642  IConnectableLayer* layer,
4643  const std::vector<unsigned int>& tensorIndexes,
4644  unsigned int startingSlotIndex)
4645 {
4646  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4647  ARMNN_ASSERT(layer != nullptr);
4648 
4649  if (tensorIndexes.size() + startingSlotIndex != layer->GetNumInputSlots())
4650  {
4651  throw ParseException(
4652  fmt::format("The number of tensor inputs ({}) does not match the number expected ({})"
4653  " for subgraph:{} operator index:{} {}",
4654  tensorIndexes.size(),
4655  layer->GetNumInputSlots(),
4656  subgraphIndex,
4657  operatorIndex,
4658  CHECK_LOCATION().AsString()));
4659  }
4660 
4661  for (unsigned int index = 0; index < tensorIndexes.size() ; ++index)
4662  {
4663  unsigned int tensorIndex = tensorIndexes[index];
4664  armnn::IInputSlot* slot = &(layer->GetInputSlot(startingSlotIndex + index));
4665  RegisterConsumerOfTensor(subgraphIndex, tensorIndex, slot);
4666  }
4667 }
4668 
4669 void TfLiteParserImpl::RegisterOutputSlots(size_t subgraphIndex,
4670  size_t operatorIndex,
4671  IConnectableLayer* layer,
4672  const std::vector<unsigned int>& tensorIndexes)
4673 {
4674  CHECK_MODEL(m_Model, subgraphIndex, operatorIndex);
4675  ARMNN_ASSERT(layer != nullptr);
4676  if (tensorIndexes.size() != layer->GetNumOutputSlots())
4677  {
4678  throw ParseException(
4679  fmt::format("The number of tensor outputs ({}) does not match the number expected ({})"
4680  " for subgraph:{} operator index:{} {}",
4681  tensorIndexes.size(),
4682  layer->GetNumOutputSlots(),
4683  subgraphIndex,
4684  operatorIndex,
4685  CHECK_LOCATION().AsString()));
4686  }
4687 
4688  for (unsigned int slotIndex = 0; slotIndex < layer->GetNumOutputSlots(); ++slotIndex)
4689  {
4690  unsigned int tensorIndex = tensorIndexes[slotIndex];
4691  armnn::IOutputSlot* slot = &(layer->GetOutputSlot(slotIndex));
4692  RegisterProducerOfTensor(subgraphIndex, tensorIndex, slot);
4693  }
4694 }
4695 
4696 void TfLiteParserImpl::SetupInputLayers(size_t subgraphIndex)
4697 {
4698  CHECK_SUBGRAPH(m_Model, subgraphIndex);
4699 
4700  auto inputs = GetSubgraphInputs(m_Model, subgraphIndex);
4701  for (auto const& tensorIdAndPtr : inputs)
4702  {
4703  auto bindingId = GenerateLayerBindingId(subgraphIndex, tensorIdAndPtr.first);
4704  IConnectableLayer* layer =
4705  m_Network->AddInputLayer(bindingId, tensorIdAndPtr.second->name.c_str());
4706 
4707  auto tensorInfo = ToTensorInfo(tensorIdAndPtr.second);
4708  layer->GetOutputSlot(0).SetTensorInfo(tensorInfo);
4709 
4710  RegisterOutputSlots(subgraphIndex,
4711  VIRTUAL_OPERATOR_ID,
4712  layer,
4713  { static_cast<uint32_t>(tensorIdAndPtr.first) });
4714  }
4715 }
4716 
4717 void TfLiteParserImpl::SetupOutputLayers(size_t subgraphIndex)
4718 {
4719  CHECK_SUBGRAPH(m_Model, subgraphIndex);
4720 
4721  auto outputs = GetSubgraphOutputs(m_Model, subgraphIndex);
4722  for (auto const& tensorIdAndPtr : outputs)
4723  {
4724  auto bindingId = GenerateLayerBindingId(subgraphIndex, tensorIdAndPtr.first);
4725  IConnectableLayer* layer =
4726  m_Network->AddOutputLayer(bindingId, tensorIdAndPtr.second->name.c_str());
4727 
4728  RegisterInputSlots(subgraphIndex,
4729  VIRTUAL_OPERATOR_ID,
4730  layer,
4731  { static_cast<uint32_t>(tensorIdAndPtr.first) });
4732  }
4733 }
4734 
4735 void TfLiteParserImpl::SetupConstantLayers(size_t subgraph)
4736 {
4737  CHECK_SUBGRAPH(m_Model, subgraph);
4738 
4739  const auto & subgraphPtr = m_Model->subgraphs[subgraph];
4740  for (unsigned int subgraphIndex = 0; subgraphIndex < m_SubgraphConnections.size(); ++subgraphIndex)
4741  {
4742  for (unsigned int tensorIndex = 0; tensorIndex < m_SubgraphConnections[subgraphIndex].size(); ++tensorIndex)
4743  {
4744  if (m_SubgraphConnections[subgraphIndex][tensorIndex].outputSlot == nullptr &&
4745  m_SubgraphConnections[subgraphIndex][tensorIndex].inputSlots.size() > 0)
4746  {
4747  TensorRawPtr tensorPtr = subgraphPtr->tensors[tensorIndex].get();
4748 
4749  if (IsConstTensor(tensorPtr))
4750  {
4751  armnn::TensorInfo tensorInfo = ToTensorInfo(tensorPtr);
4752  armnn::DataType dataType = tensorInfo.GetDataType();
4753 
4754  if (std::find(m_ConstantsToDequantize.begin(), m_ConstantsToDequantize.end(), tensorPtr->buffer)
4755  != m_ConstantsToDequantize.end())
4756  {
4757  dataType = DataType::Float32;
4758  }
4759  auto tensorAndData = CreateConstTensorNonPermuted(tensorPtr, tensorInfo, dataType);
4760 
4761  std::string layerName = fmt::format("Constant:{}", tensorPtr->name);
4762  IConnectableLayer *layer = m_Network->AddConstantLayer(tensorAndData.first, layerName.c_str());
4763 
4764  layer->GetOutputSlot(0).SetTensorInfo(tensorAndData.first.GetInfo());
4765  RegisterOutputSlots(subgraphIndex,
4766  VIRTUAL_OPERATOR_ID,
4767  layer,
4768  { tensorIndex });
4769  }
4770  else if (ShouldConstantTensorBeCreated(tensorIndex))
4771  {
4772  armnn::TensorInfo tensorInfo = ToTensorInfo(tensorPtr);
4773  armnn::DataType dataType = tensorInfo.GetDataType();
4774 
4775  if (std::find(m_ConstantsToDequantize.begin(), m_ConstantsToDequantize.end(), tensorPtr->buffer)
4776  != m_ConstantsToDequantize.end())
4777  {
4778  dataType = DataType::Float32;
4779  }
4780  // Make sure isConstant flag is set.
4781  tensorInfo.SetConstant();
4782  tensorInfo.SetDataType(dataType);
4783 
4784  auto tensorAndData = ConstTensor(tensorInfo, std::vector<uint8_t>(tensorInfo.GetNumBytes()));
4785 
4786  std::string layerName = fmt::format("Constant:{}", tensorPtr->name);
4787  IConnectableLayer* layer = m_Network->AddConstantLayer(tensorAndData, layerName.c_str());
4788 
4789  layer->GetOutputSlot(0).SetTensorInfo(tensorInfo);
4790  RegisterOutputSlots(subgraphIndex,
4791  VIRTUAL_OPERATOR_ID,
4792  layer,
4793  {tensorIndex});
4794  }
4795  else
4796  {
4797  throw ParseException(
4798  fmt::format("Invalid Tensor: Tensor should be constant. {}",
4799  CHECK_LOCATION().AsString()));
4800  }
4801  }
4802  }
4803  }
4804 }
4805 
4806 // example usage: BufferRawPtr bufferPtr = GetBuffer(m_Model, inputs[0]->buffer);
4808 {
4809  CHECK_BUFFER(model, bufferIndex);
4810  return model->buffers[bufferIndex].get();
4811 }
4812 
4813 template<typename T>
4814 std::pair<armnn::ConstTensor, TfLiteParserImpl::SupportedDataStorage>
4815 TfLiteParserImpl::CreateConstTensorAndStoreData(TfLiteParserImpl::BufferRawPtr bufferPtr,
4817  armnn::TensorInfo& tensorInfo,
4819 {
4820  // Make sure isConstant flag is set.
4821  tensorInfo.SetConstant();
4822 
4823  auto constData = CreateConstTensorImpl<T>(bufferPtr,
4824  tensorPtr,
4825  tensorInfo,
4826  permutationVector);
4827  TfLiteParserImpl::SupportedDataStorage storage(std::move(constData.second));
4828  return std::make_pair(constData.first, std::move(storage));
4829 }
4830 
4831 bool TfLiteParserImpl::ShouldConstantTensorBeCreated(unsigned int tensorIndex)
4832 {
4833  // If the TensorIndex appears in the list of ConstantsToBeCreated then return true
4834  return (std::find(m_ConstantsToBeCreated.begin(), m_ConstantsToBeCreated.end(), tensorIndex)
4835  != m_ConstantsToBeCreated.end());
4836 }
4837 
4838 bool TfLiteParserImpl::IsConstTensor(TensorRawPtr tensorPtr)
4839 {
4840  CHECK_TENSOR_PTR(tensorPtr);
4841  bool isConst = true;
4842 
4843  auto buffer = GetBuffer(m_Model, tensorPtr->buffer);
4844  if (buffer->data.size() == 0)
4845  {
4846  isConst = false;
4847  }
4848 
4849  return isConst;
4850 }
4851 
4852 std::pair<armnn::ConstTensor, TfLiteParserImpl::SupportedDataStorage>
4853 TfLiteParserImpl::CreateConstTensorPermuted(TensorRawPtr tensorPtr,
4854  armnn::TensorInfo& tensorInfo,
4856 {
4857  CHECK_TENSOR_PTR(tensorPtr);
4858  auto bufferPtr = GetBuffer(m_Model, tensorPtr->buffer);
4859  CHECK_BUFFER_SIZE(bufferPtr, tensorInfo, tensorPtr->buffer);
4860 
4861  // Make sure isConstant flag is set.
4862  tensorInfo.SetConstant();
4863 
4864  switch (tensorInfo.GetDataType())
4865  {
4867  return CreateConstTensorAndStoreData<float>(bufferPtr,
4868  tensorPtr,
4869  tensorInfo,
4870  permutationVector);
4872  return CreateConstTensorAndStoreData<uint8_t>(bufferPtr,
4873  tensorPtr,
4874  tensorInfo,
4875  permutationVector);
4877  return CreateConstTensorAndStoreData<int8_t>(bufferPtr,
4878  tensorPtr,
4879  tensorInfo,
4880  permutationVector);
4882  return CreateConstTensorAndStoreData<int8_t>(bufferPtr,
4883  tensorPtr,
4884  tensorInfo,
4885  permutationVector);
4887  return CreateConstTensorAndStoreData<int32_t>(bufferPtr,
4888  tensorPtr,
4889  tensorInfo,
4890  permutationVector);
4891  default:
4892  {
4893  std::stringstream errString;
4894  errString << "Unexpected datatype when creating const tensor: "
4895  << armnn::GetDataTypeName(tensorInfo.GetDataType())
4896  << " shape:" << tensorInfo.GetShape()
4897  << CHECK_LOCATION().AsString();
4898  throw ParseException(errString.str());
4899  }
4900  }
4901 }
4902 
4903 armnn::ConstTensor TfLiteParserImpl::CreateConstTensorNonPermuted(TensorRawPtr tensorPtr,
4904  armnn::TensorInfo& tensorInfo)
4905 {
4906  CHECK_TENSOR_PTR(tensorPtr);
4907  auto bufferPtr = GetBuffer(m_Model, tensorPtr->buffer);
4908  CHECK_BUFFER_SIZE(bufferPtr, tensorInfo, tensorPtr->buffer);
4909 
4910  // Make sure isConstant flag is set.
4911  tensorInfo.SetConstant();
4912 
4913  return ConstTensor(tensorInfo, bufferPtr->data.data());
4914 }
4915 
4916 std::pair<armnn::ConstTensor, std::unique_ptr<float[]>>
4917 TfLiteParserImpl::CreateConstTensorNonPermuted(TensorRawPtr tensorPtr,
4918  armnn::TensorInfo& tensorInfo,
4919  armnn::DataType inputDataType)
4920 {
4921  CHECK_TENSOR_PTR(tensorPtr);
4922  auto bufferPtr = GetBuffer(m_Model, tensorPtr->buffer);
4923  CHECK_BUFFER_SIZE(bufferPtr, tensorInfo, tensorPtr->buffer);
4924 
4925  // Make sure isConstant flag is set.
4926  tensorInfo.SetConstant();
4927 
4928  if (inputDataType == DataType::Float32 && tensorInfo.GetDataType() != DataType::Float32)
4929  {
4930  TensorInfo constTensorInfo(tensorInfo.GetShape(), DataType::Float32, 0.0f, 0, true);
4931  std::unique_ptr<float[]> data = AsFloatArray(bufferPtr, tensorInfo);
4932  return std::make_pair(ConstTensor(constTensorInfo, data.get()), std::move(data));
4933  }
4934  else
4935  {
4936  return std::make_pair(ConstTensor(tensorInfo, bufferPtr->data.data()), std::unique_ptr<float[]>());
4937  }
4938 }
4939 
4940 std::pair<armnn::ConstTensor*, std::unique_ptr<float[]>>
4941 TfLiteParserImpl::CreateConstTensorPtr(TensorRawPtr tensorPtr, armnn::TensorInfo& inputTensorInfo)
4942 {
4943  CHECK_TENSOR_PTR(tensorPtr);
4944  armnn::TensorInfo tensorInfo = ToTensorInfo(tensorPtr);
4945  auto bufferPtr = GetBuffer(m_Model, tensorPtr->buffer);
4946  CHECK_BUFFER_SIZE(bufferPtr, tensorInfo, tensorPtr->buffer);
4947 
4948  // Make sure isConstant flag is set.
4949  tensorInfo.SetConstant();
4950 
4951  if (inputTensorInfo.GetDataType() == DataType::Float32 && tensorInfo.GetDataType() != DataType::Float32)
4952  {
4953  TensorInfo constTensorInfo(tensorInfo.GetShape(), DataType::Float32, 0.0f, 0, true);
4954  std::unique_ptr<float[]> data = AsFloatArray(bufferPtr, tensorInfo);
4955  return std::make_pair(new ConstTensor(constTensorInfo, data.get()), std::move(data));
4956  }
4957  else
4958  {
4959  return std::make_pair(new ConstTensor(tensorInfo, bufferPtr->data.data()), std::unique_ptr<float[]>());
4960  }
4961 }
4962 
4964  const std::string& name) const
4965 {
4966  CHECK_SUBGRAPH(m_Model, subgraphId);
4967  auto inputs = GetSubgraphInputs(m_Model, subgraphId);
4968  for (auto const& input : inputs)
4969  {
4970  if (input.second->name == name)
4971  {
4972  auto bindingId = GenerateLayerBindingId(subgraphId, input.first);
4973  auto inputTensorInfo = ToTensorInfo(input.second);
4974  // Input tensors are always treated as constant tensors during network execution.
4975  inputTensorInfo.SetConstant(true);
4976  return std::make_pair(bindingId, inputTensorInfo);
4977  }
4978  }
4979 
4980  std::stringstream bindings;
4981  for (auto const& input : inputs)
4982  {
4983  bindings << "'" << input.second->name << "' ";
4984  }
4985 
4986  throw ParseException(
4987  fmt::format("No input binding found for subgraph:{} and name:{}. "
4988  "Possible inputs are: [{}] {}",
4989  subgraphId,
4990  name,
4991  bindings.str(),
4992  CHECK_LOCATION().AsString()));
4993 }
4994 
4996  const std::string& name) const
4997 {
4998  CHECK_SUBGRAPH(m_Model, subgraphId);
4999  auto outputs = GetSubgraphOutputs(m_Model, subgraphId);
5000  for (unsigned int i = 0; i < outputs.size(); ++i)
5001  {
5002  auto const output = outputs[i];
5003  if (output.second->name == name)
5004  {
5005  auto bindingId = GenerateLayerBindingId(subgraphId, output.first);
5006  std::vector<unsigned int> shape = m_OverridenOutputShapes.size() > 0 ?
5007  m_OverridenOutputShapes[i] : AsUnsignedVector(output.second->shape);
5008  return std::make_pair(bindingId, ToTensorInfo(output.second, shape));
5009  }
5010  }
5011 
5012  std::stringstream bindings;
5013  for (auto const& output : outputs)
5014  {
5015  bindings << "'" << output.second->name << "' ";
5016  }
5017 
5018  throw ParseException(
5019  fmt::format("No output binding found for subgraph:{} and name:{}. "
5020  "Possible outputs are: [{}] {}",
5021  subgraphId,
5022  name,
5023  bindings.str(),
5024  CHECK_LOCATION().AsString()));
5025 }
5026 
5028 {
5029  return m_Model->subgraphs.size();
5030 }
5031 
5032 std::vector<std::string> TfLiteParserImpl::GetSubgraphInputTensorNames(size_t subgraphId) const
5033 {
5034  CHECK_SUBGRAPH(m_Model, subgraphId);
5035  auto inputs = GetSubgraphInputs(m_Model, subgraphId);
5036  std::vector<std::string> result;
5037  result.reserve(inputs.size());
5038  for (auto const& input : inputs)
5039  {
5040  result.push_back(input.second->name);
5041  }
5042  return result;
5043 }
5044 
5045 std::vector<std::string> TfLiteParserImpl::GetSubgraphOutputTensorNames(size_t subgraphId) const
5046 {
5047  CHECK_SUBGRAPH(m_Model, subgraphId);
5048  auto outputs = GetSubgraphOutputs(m_Model, subgraphId);
5049  std::vector<std::string> result;
5050  result.reserve(outputs.size());
5051  for (auto const& output : outputs)
5052  {
5053  result.push_back(output.second->name);
5054  }
5055  return result;
5056 }
5057 
5058 const std::string TfLiteParserImpl::GetVersion()
5059 {
5060  return TFLITE_PARSER_VERSION;
5061 }
5062 
5063 TfLiteParserImpl::SupportedDataStorage::SupportedDataStorage(std::unique_ptr<float[]>&& data)
5064 : m_FloatData(std::move(data))
5065 , m_Uint8Data(nullptr)
5066 , m_Int8Data(nullptr)
5067 , m_Int32Data(nullptr)
5068 {
5069 }
5070 
5071 TfLiteParserImpl::SupportedDataStorage::SupportedDataStorage(std::unique_ptr<uint8_t[]>&& data)
5072 : m_FloatData(nullptr)
5073 , m_Uint8Data(std::move(data))
5074 , m_Int8Data(nullptr)
5075 , m_Int32Data(nullptr)
5076 {
5077 }
5078 
5079 TfLiteParserImpl::SupportedDataStorage::SupportedDataStorage(std::unique_ptr<int8_t[]>&& data)
5080 : m_FloatData(nullptr)
5081 , m_Uint8Data(nullptr)
5082 , m_Int8Data(std::move(data))
5083 , m_Int32Data(nullptr)
5084 {
5085 }
5086 
5087 TfLiteParserImpl::SupportedDataStorage::SupportedDataStorage(std::unique_ptr<int32_t[]>&& data)
5088 : m_FloatData(nullptr)
5089 , m_Uint8Data(nullptr)
5090 , m_Int8Data(nullptr)
5091 , m_Int32Data(std::move(data))
5092 {
5093 }
5094 
5095 } // armnnTfLiteParser
bool m_BiasEnabled
Enable/disable bias.
#define CHECK_MODEL(MODEL, SUBGRAPH_INDEX, OPERATOR_INDEX)
std::unique_ptr< tflite::ModelT > ModelPtr
static TensorIdRawPtrVector GetSubgraphOutputs(const ModelPtr &model, size_t subgraphIndex)
virtual unsigned int GetNumOutputSlots() const =0
Returns the number of connectable output slots.
const ConstTensor * m_ProjectionWeights
Definition: LstmParams.hpp:55
UnaryOperation m_Operation
Specifies the elementwiseUnary operation to execute.
uint32_t m_Axis
0-based axis along which to stack the input tensors.
A ViewsDescriptor for the SplitterLayer.
Interface for a layer that is connectable to other layers via InputSlots and OutputSlots.
Definition: INetwork.hpp:68
float m_ScaleW
Center size encoding scale weight.
bool IsTypeSpaceMatch(const TensorInfo &other) const
Check that the types are the same and, if quantize, that the quantization parameters are the same...
Definition: Tensor.cpp:432
const ConstTensor * m_CellBias
Definition: LstmParams.hpp:53
uint32_t m_PadBottom
Padding bottom value in the height dimension.
bool m_BiasEnabled
Enable/disable bias.
virtual unsigned int GetNumInputSlots() const =0
Returns the number of connectable input slots.
float m_K
Kappa value used for the across channel normalization equation.
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
#define ARMNN_THROW_PARSE_EXCEPTION(msg)
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
uint32_t m_PadBottom
Padding bottom value in the height dimension.
uint32_t m_PadLeft
Padding left value in the width dimension.
const tflite::TensorT * TensorRawPtr
std::string AsString() const
Definition: Exceptions.hpp:29
int32_t m_ShrinkAxisMask
Shrink axis mask value. If set, the nth specification shrinks the dimensionality by 1...
A ReshapeDescriptor for the ReshapeLayer.
bool AreAllDimensionsSpecified() const
Checks if there is at least one dimension not specified.
Definition: Tensor.cpp:241
std::vector< int > m_Begin
Begin values for the input that will be sliced.
const ConstTensor * m_CellToOutputWeights
Definition: LstmParams.hpp:50
const tflite::BufferT * BufferRawPtr
uint32_t m_PadBack
Padding back value in the depth dimension.
float m_PadValue
Optional value to use for padding, defaults to 0.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
A ComparisonDescriptor for the ComparisonLayer.
Definition: Descriptors.hpp:89
float m_ScaleX
Center size encoding scale x.
TensorShape m_InputShape
Required shape of all input tensors.
bool m_TransposeWeightMatrix
Enable/disable transpose weight matrix.
bool HasPerAxisQuantization() const
Definition: Tensor.cpp:446
uint32_t m_PoolWidth
Pooling width value.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
A Convolution2dDescriptor for the Convolution2dLayer.
float m_Alpha
Alpha value for the normalization equation.
uint32_t m_PadLeft
Padding left value in the width dimension.
bool m_KeepDims
if true then output shape has no change.
bool m_BiasEnabled
Enable/disable bias.
const ConstTensor * m_CellToInputWeights
Definition: LstmParams.hpp:48
std::vector< unsigned int > m_OutputShape
Optional< unsigned int > GetQuantizationDim() const
Definition: Tensor.cpp:494
unsigned int GetNumBytes() const
Definition: Tensor.cpp:427
ResizeMethod m_Method
The Interpolation method to use (Bilinear, NearestNeighbor).
float m_Beta
Exponentiation value.
armnn::INetworkPtr CreateNetworkFromBinaryFile(const char *graphFile)
Create the network from a flatbuffers binary file on disk.
const ConstTensor * m_InputGateBias
Definition: LstmParams.hpp:51
PaddingMethod m_PaddingMethod
The padding method to be used. (Exclude, IgnoreValue).
BindingPointInfo GetNetworkOutputBindingInfo(size_t subgraphId, const std::string &name) const
Retrieve binding info (layer id and tensor info) for the network output identified by the given layer...
ArgMinMaxFunction m_Function
Specify if the function is to find Min or Max.
Definition: Descriptors.hpp:81
uint32_t m_DetectionsPerClass
Detections per classes, used in Regular NMS.
bool m_OutputShapeEnabled
Output shape if it has been specified.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
#define CHECK_BUFFER(MODEL, BUFFER_INDEX)
virtual const char * what() const noexcept override
Definition: Exceptions.cpp:32
#define ARMNN_LOG(severity)
Definition: Logging.hpp:205
uint32_t m_PadTop
Padding top value in the height dimension.
const ConstTensor * m_RecurrentToCellWeights
Definition: LstmParams.hpp:46
std::vector< BackendOptions > NetworkOptions
uint32_t m_PadBottom
Padding bottom value in the height dimension.
std::vector< std::string > GetSubgraphOutputTensorNames(size_t subgraphId) const
Return the output tensor names for a given subgraph.
bool m_BiasEnabled
Enable/disable bias.
void ProcessConcatInputTensorInfo(armnn::TensorInfo &inputTensorInfo, armnn::OriginsDescriptor &concatDescriptor, const unsigned int &concatAxis, unsigned int inputIndex, unsigned int &mergeDimOrigin)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
std::vector< std::pair< unsigned int, unsigned int > > m_PadList
Specifies the padding for input dimension.
const ConstTensor * m_ForgetLayerNormWeights
Definition: LstmParams.hpp:58
ReduceOperation m_ReduceOperation
Specifies the reduction operation to execute.
std::unique_ptr< ITfLiteParser, void(*)(ITfLiteParser *parser)> ITfLiteParserPtr
const ConstTensor * m_CellToForgetWeights
Definition: LstmParams.hpp:49
std::unique_ptr< tflite::OperatorT > OperatorPtr
unsigned int ComputeWrappedIndex(int idx, unsigned int numDimsIn)
Copyright (c) 2021 ARM Limited and Contributors.
void IgnoreUnused(Ts &&...)
uint32_t m_PadBottom
Padding bottom value in the height dimension.
int32_t m_BeginMask
Begin mask value.
static armnn::TensorInfo OutputShapeOfReshape(const armnn::TensorInfo &inputTensorInfo, const std::vector< int32_t > &targetDimsIn)
SizeType GetSize() const
Definition: Types.hpp:338
int32_t m_EndMask
End mask value.
A SpaceToDepthDescriptor for the SpaceToDepthLayer.
PoolingAlgorithm
Definition: Types.hpp:136
std::vector< std::pair< unsigned int, unsigned int > > m_PadList
Specifies the padding values for the input dimension: heightPad{top, bottom} widthPad{left, right}.
std::vector< float > GetQuantizationScales() const
Definition: Tensor.cpp:451
uint32_t m_DilationX
Dilation along x axis.
uint32_t m_DilationY
Dilation factor value for height dimension.
A BatchToSpaceNdDescriptor for the BatchToSpaceNdLayer.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
int LayerBindingId
Type of identifiers for bindable layers (inputs, outputs).
Definition: Types.hpp:290
const ConstTensor * m_OutputGateBias
Definition: LstmParams.hpp:54
#define TFLITE_PARSER_VERSION
TFLITE_PARSER_VERSION: "X.Y.Z" where: X = Major version number Y = Minor version number Z = Patch ver...
Definition: Version.hpp:25
virtual void SetTensorInfo(const TensorInfo &tensorInfo)=0
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
NormalizationAlgorithmMethod m_NormMethodType
Normalization method algorithm to use (LocalBrightness, LocalContrast).
#define CHECK_TENSOR(MODEL, SUBGRAPH_INDEX, TENSOR_INDEX)
constexpr const char * GetDataTypeName(DataType dataType)
Definition: TypesUtils.hpp:202
void SetShape(const TensorShape &newShape)
Definition: Tensor.hpp:193
armnn::INetworkPtr CreateNetworkFromBinary(const std::vector< uint8_t > &binaryContent)
Create the network from a flatbuffers binary.
A ResizeDescriptor for the ResizeLayer.
static BufferRawPtr GetBuffer(const ModelPtr &model, size_t bufferIndex)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
uint32_t m_MaxClassesPerDetection
Maximum numbers of classes per detection, used in Fast NMS.
std::vector< unsigned int > m_Axis
Values for the dimensions to reduce.
A StackDescriptor for the StackLayer.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
constexpr char const * GetUnaryOperationAsCString(UnaryOperation operation)
Definition: TypesUtils.hpp:71
TensorShape m_TargetShape
Target shape value.
armnn::INetworkPtr CreateNetworkFromBinaryFile(const char *graphFile)
Create the network from a flatbuffers binary file on disk.
uint32_t m_PoolHeight
Pooling height value.
uint32_t m_MaxDetections
Maximum numbers of detections.
A PadDescriptor for the PadLayer.
std::unique_ptr< onnx::ModelProto > ModelPtr
Definition: OnnxParser.hpp:23
const ConstTensor * m_InputLayerNormWeights
Definition: LstmParams.hpp:57
#define CHECK_SUBGRAPH(MODEL, SUBGRAPH_INDEX)
ComparisonOperation
Definition: Types.hpp:108
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
ReduceOperation
Definition: Types.hpp:143
::android::nn::Model Model
Helper classes.
BindingPointInfo GetNetworkInputBindingInfo(size_t subgraphId, const std::string &name) const
Retrieve binding info (layer id and tensor info) for the network input identified by the given layer ...
bool CheckShape(const armnn::TensorShape &actual, const std::vector< uint32_t > &expected)
static ModelPtr LoadModelFromBinary(const uint8_t *binaryContent, size_t len)
DataType
Definition: Types.hpp:48
float m_NmsIouThreshold
Intersection over union threshold.
const ConstTensor * m_RecurrentToOutputWeights
Definition: LstmParams.hpp:47
An LstmDescriptor for the LstmLayer.
uint32_t m_PadRight
Padding right value in the width dimension.
std::vector< TensorIdRawPtr > TensorIdRawPtrVector
uint32_t m_DilationX
Dilation factor value for width dimension.
uint32_t m_PadTop
Padding top value in the height dimension.
std::string FileLine() const
Definition: Exceptions.hpp:37
Status SetViewSize(uint32_t view, uint32_t coord, uint32_t value)
Set the size of the views.
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
int32_t m_NewAxisMask
New axis mask value.
bool m_KeepDims
Enable/disable keep dimensions. If true, then the reduced dimensions that are of length 1 are kept...
static std::vector< int32_t > & GetInputTensorIds(const ModelPtr &model, size_t subgraphIndex, size_t operatorIndex)
std::vector< unsigned int > m_BlockShape
Block shape values.
An output connection slot for a layer.
Definition: INetwork.hpp:41
A L2NormalizationDescriptor for the L2NormalizationLayer.
const ConstTensor * m_ProjectionBias
Definition: LstmParams.hpp:56
int32_t GetQuantizationOffset() const
Definition: Tensor.cpp:478
An ArgMinMaxDescriptor for ArgMinMaxLayer.
Definition: Descriptors.hpp:67
static const std::string GetVersion()
Retrieve version in X.Y.Z form.
float GetQuantizationScale() const
Definition: Tensor.cpp:461
DataType GetDataType() const
Definition: Tensor.hpp:198
An OriginsDescriptor for the ConcatLayer.
A ReduceDescriptor for the REDUCE operators.
bool has_value() const noexcept
Definition: Optional.hpp:53
A FullyConnectedDescriptor for the FullyConnectedLayer.
int32_t m_EllipsisMask
Ellipsis mask value.
bool m_BiasEnabled
Enable/disable bias.
static ModelPtr LoadModelFromFile(const char *fileName)
const TensorInfo * m_InputToForgetWeights
Definition: LstmParams.hpp:90
A tensor defined by a TensorInfo (shape and data type) and an immutable backing store.
Definition: Tensor.hpp:327
unsigned int GetUnsignedAxis(const unsigned int inputDimension, const int axis)
A GatherDescriptor for the GatherLayer.
#define CHECK_VALID_SIZE(ACTUAL,...)
uint32_t m_NumClasses
Number of classes.
#define CHECKED_NON_NEGATIVE(VALUE)
std::vector< TensorRawPtr > TensorRawPtrVector
virtual const IConnectableLayer & GetOwningIConnectableLayer() const =0
size_t GetSubgraphCount() const
Return the number of subgraphs in the parsed model.
uint32_t m_PadTop
Padding top value in the height dimension.
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
A StandInDescriptor for the StandIn layer.
bool m_UseRegularNms
Use Regular NMS.
uint32_t m_PadFront
Padding front value in the depth dimension.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
std::vector< unsigned int > m_BlockShape
Block shape value.
std::vector< int > m_Stride
Stride values for the input that will be sliced.
An ActivationDescriptor for the ActivationLayer.
Definition: Descriptors.hpp:36
const TensorInfo & GetInfo() const
Definition: Tensor.hpp:295
#define CHECK_LOCATION()
Definition: Exceptions.hpp:203
void SetDataType(DataType type)
Definition: Tensor.hpp:199
uint32_t m_NumInputs
Number of input tensors.
uint32_t m_PadLeft
Padding left value in the width dimension.
uint32_t m_ActivationFunc
The activation function to use.
A SliceDescriptor for the SliceLayer.
armnn::INetworkPtr LoadModel(std::unique_ptr< tflite::ModelT > model)
A Convolution3dDescriptor for the Convolution3dLayer.
std::unique_ptr< tflite::SubGraphT > SubgraphPtr
uint32_t m_PadRight
Padding right value in the width dimension.
virtual LayerType GetType() const =0
Returns the armnn::LayerType of this layer.
A BatchMatMulDescriptor for the BatchMatMul operator.
PaddingMode m_PaddingMode
Specifies the Padding mode (Constant, Reflect or Symmetric)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
#define CHECK_TENSOR_PTR(TENSOR_PTR)
std::vector< uint32_t > m_vAxis
The indices of the dimensions to reduce.
float m_ScaleH
Center size encoding scale height.
ComparisonOperation m_Operation
Specifies the comparison operation to execute.
std::vector< int > m_End
End values for the input that will be sliced.
const ConstTensor * m_CellLayerNormWeights
Definition: LstmParams.hpp:59
const ConstTensor * m_ForgetGateBias
Definition: LstmParams.hpp:52
A SpaceToBatchNdDescriptor for the SpaceToBatchNdLayer.
const ConstTensor * m_InputToCellWeights
Definition: LstmParams.hpp:42
static TensorIdRawPtrVector GetSubgraphInputs(const ModelPtr &model, size_t subgraphIndex)
DataLayout m_DataLayout
The data layout to be used (NDHWC, NCDHW).
const ConstTensor * m_InputToOutputWeights
Definition: LstmParams.hpp:43
Struct for the users to pass backend specific options.
NormalizationAlgorithmChannel m_NormChannelType
Normalization channel algorithm to use (Across, Within).
float m_A
Alpha upper bound value used by the activation functions. (BoundedReLu, Linear, TanH, Elu).
Definition: Descriptors.hpp:61
static TensorRawPtrVector GetInputs(const ModelPtr &model, size_t subgraphIndex, size_t operatorIndex)
const armnnSerializer::TensorInfo * TensorRawPtr
static TensorRawPtrVector GetOutputs(const ModelPtr &model, size_t subgraphIndex, size_t operatorIndex)
std::pair< armnn::ConstTensor, std::unique_ptr< T[]> > CreateConstTensorImpl(const T *bufferPtr, armnn::TensorInfo &tensorInfo, const armnn::Optional< armnn::PermutationVector &> permutationVector)
Definition: OnnxParser.cpp:566
uint32_t m_PadLeft
Padding left value in the width dimension.
EmptyOptional is used to initialize the Optional class in case we want to have default value for an O...
Definition: Optional.hpp:32
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
static std::vector< int32_t > & GetOutputTensorIds(const ModelPtr &model, size_t subgraphIndex, size_t operatorIndex)
#define CHECK_SUPPORTED_FUSED_ACTIVATION(OPTION, SUBGRAPH_INDEX, OPERATOR_INDEX)
int32_t m_Axis
The axis in params to gather indices from.
A ElementwiseUnaryDescriptor for the ElementwiseUnaryLayer.
std::unique_ptr< float[]> AsFloatArray(TfLiteParserImpl::BufferRawPtr bufferPtr, const TensorInfo &tensorInfo)
PoolingAlgorithm m_PoolType
The pooling algorithm to use (Max. Average, L2).
const ConstTensor * m_RecurrentToForgetWeights
Definition: LstmParams.hpp:45
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
std::vector< std::pair< unsigned int, unsigned int > > m_Crops
The values to crop from the input dimension.
uint32_t m_PadTop
Padding top value in the height dimension.
unsigned int GetNumDimensions() const
Function that returns the tensor rank.
Definition: Tensor.cpp:174
ArgMinMaxFunction
Definition: Types.hpp:102
OutputShapeRounding m_OutputShapeRounding
The rounding method for the output shape. (Floor, Ceiling).
constexpr char const * GetComparisonOperationAsCString(ComparisonOperation operation)
Definition: TypesUtils.hpp:57
void SetConcatAxis(unsigned int concatAxis)
Set the concatenation axis value.
virtual const IInputSlot & GetInputSlot(unsigned int index) const =0
Get a const input slot handle by slot index.
ResizeMethod
Definition: Types.hpp:152
const ConstTensor * m_RecurrentToInputWeights
Definition: LstmParams.hpp:44
A MeanDescriptor for the MeanLayer.
void SetConstant(const bool IsConstant=true)
Marks the data corresponding to this tensor info as constant.
Definition: Tensor.cpp:514
UnaryOperation
Definition: Types.hpp:124
armnn::BindingPointInfo BindingPointInfo
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35
armnn::TensorInfo ToTensorInfo(TensorRawPtr tensorPtr)
uint32_t m_PadRight
Padding right value in the width dimension.
A TransposeDescriptor for the TransposeLayer.
A StridedSliceDescriptor for the StridedSliceLayer.
virtual const TensorInfo & GetTensorInfo() const =0
virtual const IOutputSlot & GetOutputSlot(unsigned int index) const =0
Get the const output slot handle by slot index.
int m_Axis
Axis to reduce across the input tensor.
Definition: Descriptors.hpp:83
virtual const char * GetName() const =0
Returns the name of the layer.
unsigned int GetNumElementsAfter(const armnn::TensorShape &shape, unsigned int axis)
float m_ScaleY
Center size encoding scale y.
float m_NmsScoreThreshold
NMS score threshold.
std::unique_ptr< INetwork, void(*)(INetwork *network)> INetworkPtr
Definition: INetwork.hpp:253
virtual int Connect(IInputSlot &destination)=0
Krichevsky 2012: Local Brightness Normalization.
const char * m_Function
Definition: Exceptions.hpp:16
A Pooling2dDescriptor for the Pooling2dLayer.
const ConstTensor * m_OutputLayerNormWeights
Definition: LstmParams.hpp:60
A NormalizationDescriptor for the NormalizationLayer.
static armnn::TensorInfo OutputShapeOfSqueeze(std::vector< uint32_t > squeezeDims, const armnn::TensorInfo &inputTensorInfo)
std::vector< std::string > GetSubgraphInputTensorNames(size_t subgraphId) const
Return the input tensor names for a given subgraph.
unsigned int GetNumDimensions() const
Definition: Tensor.hpp:195
#define CHECK_BUFFER_SIZE(BUFFER_PTR, TENSOR_INFO, BUFFER_ID)
uint32_t m_DilationZ
Dilation along z axis.
float m_B
Beta lower bound value used by the activation functions. (BoundedReLu, Linear, TanH).
Definition: Descriptors.hpp:63
bool IsQuantized() const
Definition: Tensor.cpp:504
armnn::TensorShape Permuted(const armnn::TensorShape &srcShape, const armnn::PermutationVector &mappings)
Definition: Permute.cpp:98
A SoftmaxDescriptor for the SoftmaxLayer.
float m_Beta
Beta value for the normalization equation.
uint32_t m_StrideZ
Stride value when proceeding through input for the depth dimension.
bool IsActivationSupported(const BackendId &backend, const TensorInfo &input, const TensorInfo &output, const ActivationDescriptor &descriptor, char *reasonIfUnsupported=nullptr, size_t reasonIfUnsupportedMaxLength=1024)
Deprecated in favor of IBackend and ILayerSupport interfaces.
uint32_t m_NormSize
Depth radius value.
Status SetViewOriginCoord(uint32_t view, uint32_t coord, uint32_t value)
Set the view origin coordinates.
ActivationFunction m_Function
The activation function to use (Sigmoid, TanH, Linear, ReLu, BoundedReLu, SoftReLu, LeakyReLu, Abs, Sqrt, Square, Elu).
Definition: Descriptors.hpp:59
An input connection slot for a layer.
Definition: INetwork.hpp:25
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
A DepthwiseConvolution2dDescriptor for the DepthwiseConvolution2dLayer.
constexpr unsigned int MaxNumOfTensorDimensions
Definition: Types.hpp:31
uint32_t m_DilationY
Dilation along y axis.
unsigned int GetNumElements() const
Definition: Tensor.hpp:196
const ConstTensor * m_InputToForgetWeights
Definition: LstmParams.hpp:41
ActivationFunction
Definition: Types.hpp:86
uint32_t m_PadRight
Padding right value in the width dimension.
bool m_ConstantWeights
Enable/disable constant weights and biases.
const ConstTensor * m_InputToInputWeights
Definition: LstmParams.hpp:40