ArmNN
 22.08
TransposeConvolution2dTestImpl.hpp File Reference

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Functions

template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > SimpleTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > PaddedTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > StridedTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > MultiChannelTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > TransposeConvolution2dPerAxisQuantTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 

Function Documentation

◆ MultiChannelTransposeConvolution2dTest()

LayerTestResult<T, 4> MultiChannelTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 491 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_BiasEnabled, TransposeConvolution2dDescriptor::m_DataLayout, TransposeConvolution2dDescriptor::m_StrideX, TransposeConvolution2dDescriptor::m_StrideY, and armnn::NHWC.

496 {
497  using namespace armnn;
498 
499  TensorShape inputShape = { 1, 1, 2, 2 };
500  TensorShape outputShape = { 1, 2, 5, 5 };
501 
502  // OIHW for NCHW; OHWI for NHWC
503  TensorShape weightsShape = { 2, 1, 3, 3 };
504  TensorShape biasesShape = { 2 };
505 
506  TensorInfo inputInfo(inputShape, ArmnnType);
507  TensorInfo outputInfo(outputShape, ArmnnType);
508  TensorInfo weightsInfo(weightsShape, ArmnnType);
509  TensorInfo biasesInfo(biasesShape, ArmnnBType);
510 
511  std::vector<float> inputData =
512  {
513  1.f, 2.f,
514  3.f, 4.f,
515  };
516 
517  std::vector<float> weightsData =
518  {
519  1.f, 3.f, 5.f,
520  7.f, 9.f, 11.f,
521  13.f, 15.f, 17.f,
522 
523  2.f, 4.f, 6.f,
524  8.f, 10.f, 12.f,
525  14.f, 16.f, 18.f
526  };
527 
528  std::vector<float> biasesData = { -1.5f, -2.0f };
529 
530  std::vector<float> expectedOutputData =
531  {
532  -0.5f, 1.5f, 5.5f, 4.5f, 8.5f,
533  5.5f, 7.5f, 23.5f, 16.5f, 20.5f,
534  14.5f, 22.5f, 60.5f, 40.5f, 52.5f,
535  19.5f, 25.5f, 59.5f, 34.5f, 42.5f,
536  37.5f, 43.5f, 101.5f, 58.5f, 66.5f,
537 
538  0.0f, 2.0f, 8.0f, 6.0f, 10.0f,
539  6.0f, 8.0f, 26.0f, 18.0f, 22.0f,
540  18.0f, 26.0f, 70.0f, 46.0f, 58.0f,
541  22.0f, 28.0f, 66.0f, 38.0f, 46.0f,
542  40.0f, 46.0f, 108.0f, 62.0f, 70.0f
543  };
544 
546  descriptor.m_StrideX = 2;
547  descriptor.m_StrideY = 2;
548  descriptor.m_BiasEnabled = true;
549  descriptor.m_DataLayout = layout;
550 
551  // swizzle data if needed
552  if (layout == armnn::DataLayout::NHWC)
553  {
554  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
555  }
556 
557  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
558  memoryManager,
559  tensorHandleFactory,
560  descriptor,
561  inputInfo,
562  inputData,
563  outputInfo,
564  expectedOutputData,
565  weightsInfo,
566  weightsData,
567  biasesInfo,
568  biasesData);
569 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
bool m_BiasEnabled
Enable/disable bias.
Copyright (c) 2021 ARM Limited and Contributors.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.

◆ PaddedTransposeConvolution2dTest()

LayerTestResult<T, 4> PaddedTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 309 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_PadLeft, and armnn::NHWC.

315 {
316  using namespace armnn;
317 
318  constexpr unsigned int batches = 1u;
319  constexpr unsigned int channels = 1u;
320 
321  constexpr unsigned int wInput = 4u;
322  constexpr unsigned int hInput = wInput;
323 
324  constexpr unsigned int wOutput = 2u;
325  constexpr unsigned int hOutput = wOutput;
326 
327  constexpr unsigned int wWeights = 3u;
328  constexpr unsigned int hWeights = wWeights;
329 
330  TensorShape inputShape = { batches, channels, hInput, wInput };
331  TensorShape outputShape = { batches, channels, hOutput, wOutput };
332  TensorShape weightsShape = { batches, channels, hWeights, wWeights };
333 
334  TensorInfo inputInfo(inputShape, ArmnnType);
335  TensorInfo outputInfo(outputShape, ArmnnType);
336  TensorInfo weightsInfo(weightsShape, ArmnnType);
337  TensorInfo biasesInfo({ channels }, ArmnnBType);
338 
339  std::vector<float> inputData =
340  {
341  1.f, 3.f, 2.f, 1.f,
342  1.f, 3.f, 3.f, 1.f,
343  2.f, 1.f, 1.f, 3.f,
344  3.f, 2.f, 3.f, 3.f
345  };
346 
347  std::vector<float> weightsData =
348  {
349  1.f, 2.f, 3.f,
350  0.f, 1.f, 0.f,
351  2.f, 1.f, 2.f
352  };
353 
354  std::vector<float> biasesData = { 1.f };
355 
356  std::vector<float> expectedOutputData =
357  {
358  21.f, 21.f,
359  28.f, 27.f
360  };
361 
362  if (biasEnabled)
363  {
364  // apply bias to expected output data
365  std::transform(expectedOutputData.begin(), expectedOutputData.end(), expectedOutputData.begin(),
366  [&](float f) -> float { return f + biasesData[0]; });
367  }
368 
370  descriptor.m_PadLeft = 2;
371  descriptor.m_PadRight = 2;
372  descriptor.m_PadTop = 2;
373  descriptor.m_PadBottom = 2;
374  descriptor.m_StrideX = 1;
375  descriptor.m_StrideY = 1;
376  descriptor.m_BiasEnabled = biasEnabled;
377  descriptor.m_DataLayout = layout;
378 
379  // swizzle data if needed
380  if (layout == armnn::DataLayout::NHWC)
381  {
382  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
383  }
384 
385  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
386  memoryManager,
387  tensorHandleFactory,
388  descriptor,
389  inputInfo,
390  inputData,
391  outputInfo,
392  expectedOutputData,
393  weightsInfo,
394  weightsData,
395  biasesInfo,
396  biasesData);
397 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Copyright (c) 2021 ARM Limited and Contributors.
uint32_t m_PadLeft
Padding left value in the width dimension.

◆ SimpleTransposeConvolution2dTest()

LayerTestResult<T, 4> SimpleTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 220 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_StrideX, and armnn::NHWC.

226 {
227  using namespace armnn;
228 
229  constexpr unsigned int batches = 1u;
230  constexpr unsigned int channels = 1u;
231 
232  constexpr unsigned int wInput = 3u;
233  constexpr unsigned int hInput = wInput;
234 
235  constexpr unsigned int wOutput = 5u;
236  constexpr unsigned int hOutput = wOutput;
237 
238  constexpr unsigned int wWeights = 3u;
239  constexpr unsigned int hWeights = wWeights;
240 
241  TensorShape inputShape = { batches, channels, hInput, wInput };
242  TensorShape outputShape = { batches, channels, hOutput, wOutput };
243  TensorShape weightsShape = { batches, channels, hWeights, wWeights };
244 
245  TensorInfo inputInfo(inputShape, ArmnnType);
246  TensorInfo outputInfo(outputShape, ArmnnType);
247  TensorInfo weightsInfo(weightsShape, ArmnnType);
248  TensorInfo biasesInfo({ channels }, ArmnnBType);
249 
250  std::vector<float> inputData =
251  {
252  1.f, 1.f, 1.f,
253  1.f, 1.f, 1.f,
254  1.f, 1.f, 1.f
255  };
256 
257  std::vector<float> weightsData =
258  {
259  1.f, 2.f, 3.f,
260  4.f, 5.f, 6.f,
261  7.f, 8.f, 9.f
262  };
263 
264  std::vector<float> biasesData = { 1.f };
265 
266  std::vector<float> expectedOutputData =
267  {
268  1.f, 3.f, 6.f, 5.f, 3.f,
269  5.f, 12.f, 21.f, 16.f, 9.f,
270  12.f, 27.f, 45.f, 33.f, 18.f,
271  11.f, 24.f, 39.f, 28.f, 15.f,
272  7.f, 15.f, 24.f, 17.f, 9.f
273  };
274 
275  if (biasEnabled)
276  {
277  // apply bias to expected output data
278  std::transform(expectedOutputData.begin(), expectedOutputData.end(), expectedOutputData.begin(),
279  [&](float f) -> float { return f + biasesData[0]; });
280  }
281 
283  descriptor.m_StrideX = 1;
284  descriptor.m_StrideY = 1;
285  descriptor.m_BiasEnabled = biasEnabled;
286  descriptor.m_DataLayout = layout;
287 
288  // swizzle data if needed
289  if (layout == armnn::DataLayout::NHWC)
290  {
291  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
292  }
293 
294  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
295  memoryManager,
296  tensorHandleFactory,
297  descriptor,
298  inputInfo,
299  inputData,
300  outputInfo,
301  expectedOutputData,
302  weightsInfo,
303  weightsData,
304  biasesInfo,
305  biasesData);
306 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Copyright (c) 2021 ARM Limited and Contributors.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.

◆ StridedTransposeConvolution2dTest()

LayerTestResult<T, 4> StridedTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 400 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_StrideX, and armnn::NHWC.

406 {
407  using namespace armnn;
408 
409  constexpr unsigned int batches = 1u;
410  constexpr unsigned int channels = 1u;
411 
412  constexpr unsigned int wInput = 3u;
413  constexpr unsigned int hInput = wInput;
414 
415  constexpr unsigned int wOutput = 7u;
416  constexpr unsigned int hOutput = wOutput;
417 
418  constexpr unsigned int wWeights = 3u;
419  constexpr unsigned int hWeights = wWeights;
420 
421  TensorShape inputShape = { batches, channels, hInput, wInput };
422  TensorShape outputShape = { batches, channels, hOutput, wOutput };
423  TensorShape weightsShape = { batches, channels, hWeights, wWeights };
424 
425  TensorInfo inputInfo(inputShape, ArmnnType);
426  TensorInfo outputInfo(outputShape, ArmnnType);
427  TensorInfo weightsInfo(weightsShape, ArmnnType);
428  TensorInfo biasesInfo({ channels }, ArmnnBType);
429 
430  std::vector<float> inputData =
431  {
432  1.f, 1.f, 1.f,
433  1.f, 1.f, 1.f,
434  1.f, 1.f, 1.f
435  };
436 
437  std::vector<float> weightsData =
438  {
439  1.f, 2.f, 3.f,
440  4.f, 5.f, 6.f,
441  7.f, 8.f, 9.f
442  };
443 
444  std::vector<float> biasesData = { 1.f };
445 
446  std::vector<float> expectedOutputData =
447  {
448  1.f, 2.f, 4.f, 2.f, 4.f, 2.f, 3.f,
449  4.f, 5.f, 10.f, 5.f, 10.f, 5.f, 6.f,
450  8.f, 10.f, 20.f, 10.f, 20.f, 10.f, 12.f,
451  4.f, 5.f, 10.f, 5.f, 10.f, 5.f, 6.f,
452  8.f, 10.f, 20.f, 10.f, 20.f, 10.f, 12.f,
453  4.f, 5.f, 10.f, 5.f, 10.f, 5.f, 6.f,
454  7.f, 8.f, 16.f, 8.f, 16.f, 8.f, 9.f
455  };
456 
457  if (biasEnabled)
458  {
459  // apply bias to expected output data
460  std::transform(expectedOutputData.begin(), expectedOutputData.end(), expectedOutputData.begin(),
461  [&](float f) -> float { return f + biasesData[0]; });
462  }
463 
465  descriptor.m_StrideX = 2;
466  descriptor.m_StrideY = 2;
467  descriptor.m_BiasEnabled = biasEnabled;
468  descriptor.m_DataLayout = layout;
469 
470  // swizzle data if needed
471  if (layout == armnn::DataLayout::NHWC)
472  {
473  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
474  }
475 
476  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
477  memoryManager,
478  tensorHandleFactory,
479  descriptor,
480  inputInfo,
481  inputData,
482  outputInfo,
483  expectedOutputData,
484  weightsInfo,
485  weightsData,
486  biasesInfo,
487  biasesData);
488 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Copyright (c) 2021 ARM Limited and Contributors.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.

◆ TransposeConvolution2dPerAxisQuantTest()

LayerTestResult<uint8_t, 4> TransposeConvolution2dPerAxisQuantTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 571 of file TransposeConvolution2dTestImpl.cpp.

References AllocateAndCopyDataToITensorHandle(), CopyDataFromITensorHandle(), CopyDataToITensorHandle(), ITensorHandleFactory::CreateTensorHandle(), IWorkloadFactory::CreateWorkload(), TensorInfo::GetNumElements(), TensorInfo::GetShape(), TransposeConvolution2dDescriptor::m_BiasEnabled, TransposeConvolution2dDescriptor::m_DataLayout, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, TransposeConvolution2dDescriptor::m_StrideX, TransposeConvolution2dDescriptor::m_StrideY, armnn::NHWC, PermuteTensorNchwToNhwc(), armnn::QAsymmU8, armnn::QSymmS8, armnn::Signed32, and armnn::TransposeConvolution2d.

Referenced by TEST_SUITE().

576 {
577  using namespace armnn;
578 
579  const DataType inputType = DataType::QAsymmU8;
580  const DataType kernelType = DataType::QSymmS8;
581  const DataType biasType = DataType::Signed32;
582 
583  TensorInfo inputInfo ({ 1, 1, 2, 2 }, inputType, 0.50f, 10);
584  TensorInfo outputInfo({ 1, 2, 5, 5 }, inputType, 0.50f, 10);
585 
586  const std::vector<float> quantScales{ 0.25f, 0.5f };
587  constexpr unsigned int quantDimension = 0;
588 
589  TensorInfo kernelInfo({ 2, 1, 3, 3 }, kernelType, quantScales, quantDimension);
590 
591  const std::vector<float> biasQuantScales{ 0.125f, 0.25f };
592  TensorInfo biasInfo({ 2 }, biasType, biasQuantScales, quantDimension);
593 
594  std::vector<uint8_t> inputData =
595  {
596  12, 14,
597  16, 18
598  };
599 
600  std::vector<int8_t> kernelData =
601  {
602  4, 12, 20,
603  28, 36, 44,
604  52, 60, 68,
605 
606  4, 8, 12,
607  16, 20, 24,
608  28, 32, 36
609  };
610 
611  std::vector<int32_t> biasData = { -12, -8 };
612 
613  std::vector<uint8_t> actualOutput(outputInfo.GetNumElements());
614 
615  std::vector<uint8_t> expectedOutputData =
616  {
617  9, 13, 21, 19, 27,
618  21, 25, 57, 43, 51,
619  39, 55, 131, 91, 115,
620  49, 61, 129, 79, 95,
621  85, 97, 213, 127, 143,
622 
623  10, 14, 26, 22, 30,
624  22, 26, 62, 46, 54,
625  46, 62, 150, 102, 126,
626  54, 66, 142, 86, 102,
627  90, 102, 226, 134, 150
628  };
629 
630  if (layout == DataLayout::NHWC)
631  {
632  PermuteTensorNchwToNhwc(inputInfo, inputData);
633  PermuteTensorNchwToNhwc(kernelInfo, kernelData);
634  PermuteTensorNchwToNhwc(outputInfo, expectedOutputData);
635  }
636 
638  descriptor.m_StrideX = 2;
639  descriptor.m_StrideY = 2;
640  descriptor.m_BiasEnabled = true;
641  descriptor.m_DataLayout = layout;
642 
643  std::unique_ptr<ITensorHandle> inputHandle = tensorHandleFactory.CreateTensorHandle(inputInfo);
644  std::unique_ptr<ITensorHandle> outputHandle = tensorHandleFactory.CreateTensorHandle(outputInfo);
645 
646  WorkloadInfo workloadInfo;
647  ScopedTensorHandle weightTensor(kernelInfo);
648  ScopedTensorHandle biasTensor(biasInfo);
649 
650  AllocateAndCopyDataToITensorHandle(&weightTensor, kernelData.data());
651  AllocateAndCopyDataToITensorHandle(&biasTensor, biasData.data());
652 
654  queueDescriptor.m_Parameters = descriptor;
655  queueDescriptor.m_Weight = &weightTensor;
656  queueDescriptor.m_Bias = &biasTensor;
657 
658  AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
659  AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
660 
661  std::unique_ptr<IWorkload> workload = workloadFactory.CreateWorkload(armnn::LayerType::TransposeConvolution2d,
662  queueDescriptor,
663  workloadInfo);
664  inputHandle->Allocate();
665  outputHandle->Allocate();
666 
667  CopyDataToITensorHandle(inputHandle.get(), inputData.data());
668 
669  ExecuteWorkload(*workload, memoryManager);
670 
671  CopyDataFromITensorHandle(actualOutput.data(), outputHandle.get());
672 
673  return LayerTestResult<uint8_t, 4>(actualOutput,
674  expectedOutputData,
675  outputHandle->GetShape(),
676  outputInfo.GetShape());
677 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
bool m_BiasEnabled
Enable/disable bias.
Copyright (c) 2021 ARM Limited and Contributors.
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
DataType
Definition: Types.hpp:48
void CopyDataFromITensorHandle(void *mem, const armnn::ITensorHandle *tensorHandle)
void PermuteTensorNchwToNhwc(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Contains information about TensorInfos of a layer.
virtual std::unique_ptr< IWorkload > CreateWorkload(LayerType type, const QueueDescriptor &descriptor, const WorkloadInfo &info) const
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo) const =0