ArmNN
 22.08
Functions
RefEndToEndTests.cpp File Reference
#include <backendsCommon/test/EndToEndTestImpl.hpp>
#include <backendsCommon/test/ActivationEndToEndTestImpl.hpp>
#include <backendsCommon/test/ArgMinMaxEndToEndTestImpl.hpp>
#include <backendsCommon/test/BatchToSpaceNdEndToEndTestImpl.hpp>
#include <backendsCommon/test/ChannelShuffleEndToEndTestImpl.hpp>
#include <backendsCommon/test/ComparisonEndToEndTestImpl.hpp>
#include <backendsCommon/test/ConcatEndToEndTestImpl.hpp>
#include <backendsCommon/test/Convolution3dEndToEndTestImpl.hpp>
#include <backendsCommon/test/DepthToSpaceEndToEndTestImpl.hpp>
#include <backendsCommon/test/DequantizeEndToEndTestImpl.hpp>
#include <backendsCommon/test/DetectionPostProcessEndToEndTestImpl.hpp>
#include <backendsCommon/test/ElementwiseUnaryEndToEndTestImpl.hpp>
#include <backendsCommon/test/FillEndToEndTestImpl.hpp>
#include <backendsCommon/test/FullyConnectedEndToEndTestImpl.hpp>
#include <backendsCommon/test/GatherEndToEndTestImpl.hpp>
#include <backendsCommon/test/GatherNdEndToEndTestImpl.hpp>
#include <backendsCommon/test/InstanceNormalizationEndToEndTestImpl.hpp>
#include <backendsCommon/test/LogSoftmaxEndToEndTestImpl.hpp>
#include <backendsCommon/test/PreluEndToEndTestImpl.hpp>
#include <backendsCommon/test/QLstmEndToEndTestImpl.hpp>
#include <backendsCommon/test/RankEndToEndTestImpl.hpp>
#include <backendsCommon/test/ResizeEndToEndTestImpl.hpp>
#include <backendsCommon/test/SpaceToDepthEndToEndTestImpl.hpp>
#include <backendsCommon/test/SplitterEndToEndTestImpl.hpp>
#include <backendsCommon/test/StridedSliceAsyncEndToEndTest.hpp>
#include <backendsCommon/test/TransposeConvolution2dEndToEndTestImpl.hpp>
#include <doctest/doctest.h>

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Functions

 TEST_SUITE ("RefEndToEnd")
 

Function Documentation

◆ TEST_SUITE()

TEST_SUITE ( "RefEndToEnd"  )

Definition at line 36 of file RefEndToEndTests.cpp.

References armnn::BoundedReLu, IOutputSlot::Connect(), armnn::CpuRef, IRuntime::Create(), INetwork::Create(), armnn::Equal, armnn::error, armnn::Float32, IConnectableLayer::GetInputSlot(), TensorInfo::GetNumElements(), IConnectableLayer::GetOutputSlot(), TensorInfo::GetQuantizationOffset(), TensorInfo::GetQuantizationScale(), armnn::Greater, armnn::info, InstanceNormalizationNchwEndToEndTest1(), InstanceNormalizationNchwEndToEndTest2(), InstanceNormalizationNhwcEndToEndTest1(), InstanceNormalizationNhwcEndToEndTest2(), LogSoftmaxEndToEndTest(), ActivationDescriptor::m_A, ActivationDescriptor::m_B, ActivationDescriptor::m_Function, armnn::NCDHW, armnn::NCHW, armnn::NDHWC, armnn::NHWC, armnn::Optimize(), armnn::QAsymmU8, QLstmEndToEnd(), QuantizeData(), TensorInfo::SetConstant(), TensorInfo::SetQuantizationOffset(), TensorInfo::SetQuantizationScale(), IOutputSlot::SetTensorInfo(), SpaceToDepthNchwEndToEndTest1(), SpaceToDepthNchwEndToEndTest2(), SpaceToDepthNhwcEndToEndTest1(), SpaceToDepthNhwcEndToEndTest2(), and armnn::Success.

37 {
38 std::vector<armnn::BackendId> defaultBackends = {armnn::Compute::CpuRef};
39 
40 // Abs
41 TEST_CASE("RefAbsEndToEndTestFloat32")
42 {
43  std::vector<float> expectedOutput =
44  {
45  1.f, 1.f, 1.f, 1.f, 5.f, 5.f, 5.f, 5.f,
46  3.f, 3.f, 3.f, 3.f, 4.f, 4.f, 4.f, 4.f
47  };
48 
49  ElementwiseUnarySimpleEndToEnd<armnn::DataType::Float32>(defaultBackends,
50  UnaryOperation::Abs,
51  expectedOutput);
52 }
53 
54 TEST_CASE("RefAbsEndToEndTestUint8")
55 {
56  // Note the expected output will be implicitly quantized by the below test function
57  std::vector<float> expectedOutput =
58  {
59  1.f, 1.f, 1.f, 1.f, 5.f, 5.f, 5.f, 5.f,
60  3.f, 3.f, 3.f, 3.f, 4.f, 4.f, 4.f, 4.f
61  };
62 
63  ElementwiseUnarySimpleEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
64  UnaryOperation::Abs,
65  expectedOutput);
66 }
67 
68 TEST_CASE("RefAbsEndToEndTestInt16")
69 {
70  // Note the expected output will be implicitly quantized by the below test function
71  std::vector<float> expectedOutput =
72  {
73  1.f, 1.f, 1.f, 1.f, 5.f, 5.f, 5.f, 5.f,
74  3.f, 3.f, 3.f, 3.f, 4.f, 4.f, 4.f, 4.f
75  };
76 
77  ElementwiseUnarySimpleEndToEnd<armnn::DataType::QSymmS16>(defaultBackends,
78  UnaryOperation::Abs,
79  expectedOutput);
80 }
81 
82 // Constant
83 TEST_CASE("ConstantUsage_Ref_Float32")
84 {
85  CHECK(ConstantUsageFloat32Test(defaultBackends));
86 }
87 
88 TEST_CASE("ConstantUsage_Ref_Uint8")
89 {
90  CHECK(ConstantUsageUint8Test(defaultBackends));
91 }
92 
93 TEST_CASE("Unsigned8")
94 {
95  using namespace armnn;
96 
97  // Create runtime in which test will run
98  armnn::IRuntime::CreationOptions options;
99  armnn::IRuntimePtr runtime(armnn::IRuntime::Create(options));
100 
101  // Builds up the structure of the network.
102  armnn::INetworkPtr net(INetwork::Create());
103 
104  IConnectableLayer* input = net->AddInputLayer(0, "input");
105  IConnectableLayer* softmax = net->AddSoftmaxLayer(SoftmaxDescriptor(), "softmax");
106  IConnectableLayer* output = net->AddOutputLayer(0, "output");
107 
108  input->GetOutputSlot(0).Connect(softmax->GetInputSlot(0));
109  softmax->GetOutputSlot(0).Connect(output->GetInputSlot(0));
110 
111  // Sets the tensors in the network.
112  TensorInfo inputTensorInfo(TensorShape({1, 5}), DataType::QAsymmU8);
113  inputTensorInfo.SetQuantizationOffset(100);
114  inputTensorInfo.SetQuantizationScale(10000.0f);
115  input->GetOutputSlot(0).SetTensorInfo(inputTensorInfo);
116 
117  TensorInfo outputTensorInfo(TensorShape({1, 5}), DataType::QAsymmU8);
118  outputTensorInfo.SetQuantizationOffset(0);
119  outputTensorInfo.SetQuantizationScale(1.0f/255.0f);
120  softmax->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
121 
122  // optimize the network
123  IOptimizedNetworkPtr optNet = Optimize(*net, defaultBackends, runtime->GetDeviceSpec());
124 
125  // Loads it into the runtime.
126  NetworkId netId;
127  auto error = runtime->LoadNetwork(netId, std::move(optNet));
128  CHECK(error == Status::Success);
129 
130  // Creates structures for input & output.
131  std::vector<uint8_t> inputData
132  {
133  1, 10, 3, 200, 5 // Some inputs - one of which is sufficiently larger than the others to saturate softmax.
134  };
135  std::vector<uint8_t> outputData(5);
136 
137  TensorInfo inputTensorInfo2 = runtime->GetInputTensorInfo(netId, 0);
138  inputTensorInfo2.SetConstant(true);
139  armnn::InputTensors inputTensors
140  {
141  {0, armnn::ConstTensor(inputTensorInfo2, inputData.data())}
142  };
143  armnn::OutputTensors outputTensors
144  {
145  {0, armnn::Tensor(runtime->GetOutputTensorInfo(netId, 0), outputData.data())}
146  };
147 
148  // Does the inference.
149  runtime->EnqueueWorkload(netId, inputTensors, outputTensors);
150 
151  // Checks the results.
152  CHECK(outputData[0] == 0);
153  CHECK(outputData[1] == 0);
154  CHECK(outputData[2] == 0);
155  CHECK(outputData[3] == 255); // softmax has been saturated.
156  CHECK(outputData[4] == 0);
157 }
158 
159 TEST_CASE("TrivialAdd")
160 {
161  // This test was designed to match "AddTwo" in android nn/runtime/test/TestTrivialModel.cpp.
162 
163  using namespace armnn;
164 
165  // Create runtime in which test will run
166  armnn::IRuntime::CreationOptions options;
167  armnn::IRuntimePtr runtime(armnn::IRuntime::Create(options));
168 
169  // Builds up the structure of the network.
170  armnn::INetworkPtr net(INetwork::Create());
171 
172  IConnectableLayer* input1 = net->AddInputLayer(0);
173  IConnectableLayer* input2 = net->AddInputLayer(1);
174  IConnectableLayer* add = net->AddAdditionLayer();
175  IConnectableLayer* output = net->AddOutputLayer(0);
176 
177  input1->GetOutputSlot(0).Connect(add->GetInputSlot(0));
178  input2->GetOutputSlot(0).Connect(add->GetInputSlot(1));
179  add->GetOutputSlot(0).Connect(output->GetInputSlot(0));
180 
181  // Sets the tensors in the network.
182  TensorInfo tensorInfo(TensorShape({3, 4}), DataType::Float32);
183  input1->GetOutputSlot(0).SetTensorInfo(tensorInfo);
184  input2->GetOutputSlot(0).SetTensorInfo(tensorInfo);
185  add->GetOutputSlot(0).SetTensorInfo(tensorInfo);
186 
187  // optimize the network
188  IOptimizedNetworkPtr optNet = Optimize(*net, defaultBackends, runtime->GetDeviceSpec());
189 
190  // Loads it into the runtime.
191  NetworkId netId;
192  runtime->LoadNetwork(netId, std::move(optNet));
193 
194  // Creates structures for input & output - matching android nn test.
195  std::vector<float> input1Data
196  {
197  1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f, 9.f, 10.f, 11.f, 12.f
198  };
199  std::vector<float> input2Data
200  {
201  100.f, 200.f, 300.f, 400.f, 500.f, 600.f, 700.f, 800.f, 900.f, 1000.f, 1100.f, 1200.f
202  };
203  std::vector<float> outputData(12);
204 
205  TensorInfo inputTensorInfo = runtime->GetInputTensorInfo(netId, 0);
206  inputTensorInfo.SetConstant(true);
207  InputTensors inputTensors
208  {
209  {0,armnn::ConstTensor(inputTensorInfo, input1Data.data())},
210  {1,armnn::ConstTensor(inputTensorInfo, input2Data.data())}
211  };
212  OutputTensors outputTensors
213  {
214  {0,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 0), outputData.data())}
215  };
216 
217  // Does the inference.
218  runtime->EnqueueWorkload(netId, inputTensors, outputTensors);
219 
220  // Checks the results
221  CHECK(outputData[0] == 101);
222  CHECK(outputData[1] == 202);
223  CHECK(outputData[2] == 303);
224  CHECK(outputData[3] == 404);
225  CHECK(outputData[4] == 505);
226  CHECK(outputData[5] == 606);
227  CHECK(outputData[6] == 707);
228  CHECK(outputData[7] == 808);
229  CHECK(outputData[8] == 909);
230  CHECK(outputData[9] == 1010);
231  CHECK(outputData[10] == 1111);
232  CHECK(outputData[11] == 1212);
233 }
234 
235 TEST_CASE("MultipleOutputs")
236 {
237  using namespace armnn;
238 
239  // Create runtime in which test will run
240  armnn::IRuntime::CreationOptions options;
241  armnn::IRuntimePtr runtime(armnn::IRuntime::Create(options));
242 
243  // Builds up the structure of the network.
244  INetworkPtr net(INetwork::Create());
245 
246  IConnectableLayer* input = net->AddInputLayer(0);
247 
248  // ReLu1
249  ActivationDescriptor activation1Descriptor;
250  activation1Descriptor.m_Function = ActivationFunction::BoundedReLu;
251  activation1Descriptor.m_A = 1.f;
252  activation1Descriptor.m_B = -1.f;
253  IConnectableLayer* activation1 = net->AddActivationLayer(activation1Descriptor);
254 
255  // ReLu6
256  ActivationDescriptor activation2Descriptor;
257  activation2Descriptor.m_Function = ActivationFunction::BoundedReLu;
258  activation2Descriptor.m_A = 6.0f;
259  IConnectableLayer* activation2 = net->AddActivationLayer(activation2Descriptor);
260 
261  // BoundedReLu(min=2, max=5)
262  ActivationDescriptor activation3Descriptor;
263  activation3Descriptor.m_Function = ActivationFunction::BoundedReLu;
264  activation3Descriptor.m_A = 5.0f;
265  activation3Descriptor.m_B = 2.0f;
266  IConnectableLayer* activation3 = net->AddActivationLayer(activation3Descriptor);
267 
268  IConnectableLayer* output1 = net->AddOutputLayer(0);
269  IConnectableLayer* output2 = net->AddOutputLayer(1);
270  IConnectableLayer* output3 = net->AddOutputLayer(2);
271 
272  input->GetOutputSlot(0).Connect(activation1->GetInputSlot(0));
273  input->GetOutputSlot(0).Connect(activation2->GetInputSlot(0));
274  input->GetOutputSlot(0).Connect(activation3->GetInputSlot(0));
275 
276  activation1->GetOutputSlot(0).Connect(output1->GetInputSlot(0));
277  activation2->GetOutputSlot(0).Connect(output2->GetInputSlot(0));
278  activation3->GetOutputSlot(0).Connect(output3->GetInputSlot(0));
279 
280  // Sets the tensors in the network.
281  TensorInfo tensorInfo(TensorShape({ 10 }), DataType::Float32);
282  input->GetOutputSlot(0).SetTensorInfo(tensorInfo);
283  activation1->GetOutputSlot(0).SetTensorInfo(tensorInfo);
284  activation2->GetOutputSlot(0).SetTensorInfo(tensorInfo);
285  activation3->GetOutputSlot(0).SetTensorInfo(tensorInfo);
286 
287  // optimize the network
288  IOptimizedNetworkPtr optNet = Optimize(*net, defaultBackends, runtime->GetDeviceSpec());
289 
290  // Loads it into the runtime.
291  NetworkId netId;
292  runtime->LoadNetwork(netId, std::move(optNet));
293 
294  // Creates structures for input & output.
295  const std::vector<float> inputData{ 3.f, 5.f, 2.f, 3.f, 7.f, 0.f, -2.f, -1.f, 3.f, 3.f };
296 
297  std::vector<float> output1Data(inputData.size());
298  std::vector<float> output2Data(inputData.size());
299  std::vector<float> output3Data(inputData.size());
300 
301  TensorInfo inputTensorInfo = runtime->GetInputTensorInfo(netId, 0);
302  inputTensorInfo.SetConstant(true);
303  InputTensors inputTensors
304  {
305  {0,armnn::ConstTensor(inputTensorInfo, inputData.data())}
306  };
307  OutputTensors outputTensors
308  {
309  {0,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 0), output1Data.data())},
310  {1,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 1), output2Data.data())},
311  {2,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 2), output3Data.data())}
312  };
313 
314  // Does the inference.
315  runtime->EnqueueWorkload(netId, inputTensors, outputTensors);
316 
317  // Checks the results.
318  CHECK(output1Data == std::vector<float>({ 1.f, 1.f, 1.f, 1.f, 1.f, 0.f, -1.f, -1.f, 1.f, 1.f })); // ReLu1
319  CHECK(output2Data == std::vector<float>({ 3.f, 5.f, 2.f, 3.f, 6.f, 0.f, 0.f, 0.f, 3.f, 3.f })); // ReLu6
320  CHECK(output3Data == std::vector<float>({ 3.f, 5.f, 2.f, 3.f, 5.f, 2.f, 2.f, 2.f, 3.f, 3.f })); // [2, 5]
321 }
322 
323 TEST_CASE("TrivialMin")
324 {
325  using namespace armnn;
326 
327  // Create runtime in which test will run
328  armnn::IRuntime::CreationOptions options;
329  armnn::IRuntimePtr runtime(armnn::IRuntime::Create(options));
330 
331  // Builds up the structure of the network.
332  armnn::INetworkPtr net(INetwork::Create());
333 
334  IConnectableLayer* input1 = net->AddInputLayer(0);
335  IConnectableLayer* input2 = net->AddInputLayer(1);
336  IConnectableLayer* min = net->AddMinimumLayer();
337  IConnectableLayer* output = net->AddOutputLayer(0);
338 
339  input1->GetOutputSlot(0).Connect(min->GetInputSlot(0));
340  input2->GetOutputSlot(0).Connect(min->GetInputSlot(1));
341  min->GetOutputSlot(0).Connect(output->GetInputSlot(0));
342 
343  // Sets the tensors in the network.
344  TensorInfo tensorInfo(TensorShape({1, 1, 1, 4}), DataType::Float32);
345  input1->GetOutputSlot(0).SetTensorInfo(tensorInfo);
346  input2->GetOutputSlot(0).SetTensorInfo(tensorInfo);
347  min->GetOutputSlot(0).SetTensorInfo(tensorInfo);
348 
349  // optimize the network
350  IOptimizedNetworkPtr optNet = Optimize(*net, defaultBackends, runtime->GetDeviceSpec());
351 
352  // Loads it into the runtime.
353  NetworkId netId;
354  runtime->LoadNetwork(netId, std::move(optNet));
355 
356  // Creates structures for input & output - matching android nn test.
357  std::vector<float> input1Data
358  {
359  1.0f, 2.0f, 3.0f, 4.0f
360  };
361  std::vector<float> input2Data
362  {
363  2.0f, 1.0f, 5.0f, 2.0f
364  };
365  std::vector<float> outputData(4);
366 
367  TensorInfo inputTensorInfo = runtime->GetInputTensorInfo(netId, 0);
368  inputTensorInfo.SetConstant(true);
369  InputTensors inputTensors
370  {
371  {0,armnn::ConstTensor(inputTensorInfo, input1Data.data())},
372  {1,armnn::ConstTensor(inputTensorInfo, input2Data.data())}
373  };
374  OutputTensors outputTensors
375  {
376  {0,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 0), outputData.data())}
377  };
378 
379  // Does the inference.
380  runtime->EnqueueWorkload(netId, inputTensors, outputTensors);
381 
382  // Checks the results
383  CHECK(outputData[0] == 1);
384  CHECK(outputData[1] == 1);
385  CHECK(outputData[2] == 3);
386  CHECK(outputData[3] == 2);
387 }
388 
389 TEST_CASE("RefEqualSimpleEndToEndTest")
390 {
391  const std::vector<uint8_t> expectedOutput({ 1, 1, 1, 1, 0, 0, 0, 0,
392  0, 0, 0, 0, 1, 1, 1, 1 });
393 
394  ComparisonSimpleEndToEnd<armnn::DataType::Float32>(defaultBackends,
395  ComparisonOperation::Equal,
396  expectedOutput);
397 }
398 
399 TEST_CASE("RefGreaterSimpleEndToEndTest")
400 {
401  const std::vector<uint8_t> expectedOutput({ 0, 0, 0, 0, 1, 1, 1, 1,
402  0, 0, 0, 0, 0, 0, 0, 0 });
403 
404  ComparisonSimpleEndToEnd<armnn::DataType::Float32>(defaultBackends,
405  ComparisonOperation::Greater,
406  expectedOutput);
407 }
408 
409 TEST_CASE("RefEqualSimpleEndToEndUint8Test")
410 {
411  const std::vector<uint8_t> expectedOutput({ 1, 1, 1, 1, 0, 0, 0, 0,
412  0, 0, 0, 0, 1, 1, 1, 1 });
413 
414  ComparisonSimpleEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
415  ComparisonOperation::Equal,
416  expectedOutput);
417 }
418 
419 TEST_CASE("RefGreaterSimpleEndToEndUint8Test")
420 {
421  const std::vector<uint8_t> expectedOutput({ 0, 0, 0, 0, 1, 1, 1, 1,
422  0, 0, 0, 0, 0, 0, 0, 0 });
423 
424  ComparisonSimpleEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
425  ComparisonOperation::Greater,
426  expectedOutput);
427 }
428 
429 TEST_CASE("RefEqualBroadcastEndToEndTest")
430 {
431  const std::vector<uint8_t> expectedOutput({ 1, 0, 1, 1, 0, 0,
432  0, 0, 0, 0, 0, 0 });
433 
434  ComparisonBroadcastEndToEnd<armnn::DataType::Float32>(defaultBackends,
435  ComparisonOperation::Equal,
436  expectedOutput);
437 }
438 
439 TEST_CASE("RefGreaterBroadcastEndToEndTest")
440 {
441  const std::vector<uint8_t> expectedOutput({ 0, 1, 0, 0, 0, 1,
442  1, 1, 1, 1, 1, 1 });
443 
444  ComparisonBroadcastEndToEnd<armnn::DataType::Float32>(defaultBackends,
445  ComparisonOperation::Greater,
446  expectedOutput);
447 }
448 
449 TEST_CASE("RefEqualBroadcastEndToEndUint8Test")
450 {
451  const std::vector<uint8_t > expectedOutput({ 1, 0, 1, 1, 0, 0,
452  0, 0, 0, 0, 0, 0 });
453 
454  ComparisonBroadcastEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
455  ComparisonOperation::Equal,
456  expectedOutput);
457 }
458 
459 TEST_CASE("RefGreaterBroadcastEndToEndUint8Test")
460 {
461  const std::vector<uint8_t> expectedOutput({ 0, 1, 0, 0, 0, 1,
462  1, 1, 1, 1, 1, 1 });
463 
464  ComparisonBroadcastEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
465  ComparisonOperation::Greater,
466  expectedOutput);
467 }
468 
469 TEST_CASE("RefBatchToSpaceNdEndToEndFloat32NHWCTest")
470 {
471  BatchToSpaceNdEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
472 }
473 
474 TEST_CASE("RefBatchToSpaceNdEndToEndUint8NHWCTest")
475 {
476  BatchToSpaceNdEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
477 }
478 
479 TEST_CASE("RefBatchToSpaceNdEndToEndQSymm16NHWCTest")
480 {
481  BatchToSpaceNdEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
482 }
483 
484 TEST_CASE("RefBatchToSpaceNdEndToEndFloat32NCHWTest")
485 {
486  BatchToSpaceNdEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
487 }
488 
489 TEST_CASE("RefBatchToSpaceNdEndToEndUint8NCHWTest")
490 {
491  BatchToSpaceNdEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
492 }
493 
494 TEST_CASE("RefBatchToSpaceNdEndToEndQSymm16NCHWTest")
495 {
496  BatchToSpaceNdEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
497 }
498 
499 TEST_CASE("RefBatchToSpaceNdEndToEndComplexFloat32NHWCTest")
500 {
501  BatchToSpaceNdComplexEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
502 }
503 
504 TEST_CASE("RefBatchToSpaceNdEndToEndComplexUint8NHWCTest")
505 {
506  BatchToSpaceNdComplexEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
507 }
508 
509 TEST_CASE("RefBatchToSpaceNdEndToEndComplexQSymm16NHWCTest")
510 {
511  BatchToSpaceNdComplexEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
512 }
513 
514 TEST_CASE("RefBatchToSpaceNdEndToEndComplexFloat32NCHWTest")
515 {
516  BatchToSpaceNdComplexEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
517 }
518 
519 TEST_CASE("RefBatchToSpaceNdEndToEndComplexUint8NCHWTest")
520 {
521  BatchToSpaceNdComplexEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
522 }
523 
524 TEST_CASE("RefBatchToSpaceNdEndToEndComplexQSymm16NCHWTest")
525 {
526  BatchToSpaceNdComplexEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
527 }
528 
529 TEST_CASE("RefChannelShuffleFloatTest")
530 {
531  ChannelShuffleEndToEnd<armnn::DataType::Float32>(defaultBackends);
532 }
533 
534 TEST_CASE("RefChannelShuffleUint8Test")
535 {
536  ChannelShuffleEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
537 }
538 
539 TEST_CASE("RefConcatEndToEndDim0Test")
540 {
541  ConcatDim0EndToEnd<armnn::DataType::Float32>(defaultBackends);
542 }
543 
544 TEST_CASE("RefConcatEndToEndDim0Uint8Test")
545 {
546  ConcatDim0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
547 }
548 
549 TEST_CASE("RefConcatEndToEndDim1Test")
550 {
551  ConcatDim1EndToEnd<armnn::DataType::Float32>(defaultBackends);
552 }
553 
554 TEST_CASE("RefConcatEndToEndDim1Uint8Test")
555 {
556  ConcatDim1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
557 }
558 
559 TEST_CASE("RefConcatEndToEndDim2Test")
560 {
561  ConcatDim2EndToEnd<armnn::DataType::Float32>(defaultBackends);
562 }
563 
564 TEST_CASE("RefConcatEndToEndDim2Uint8Test")
565 {
566  ConcatDim2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
567 }
568 
569 TEST_CASE("RefConcatEndToEndDim3Test")
570 {
571  ConcatDim3EndToEnd<armnn::DataType::Float32>(defaultBackends);
572 }
573 
574 TEST_CASE("RefConcatEndToEndDim3Uint8Test")
575 {
576  ConcatDim3EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
577 }
578 
579 TEST_CASE("RefConvolution3dFloat32Test")
580 {
581  Convolution3dEndToEnd<armnn::DataType::Float32, armnn::DataType::Float32>(defaultBackends,
582  armnn::DataLayout::NDHWC);
583 }
584 
585 TEST_CASE("RefConvolution3dNcdhwFloat32Test")
586 {
587  Convolution3dEndToEnd<armnn::DataType::Float32, armnn::DataType::Float32>(defaultBackends,
588  armnn::DataLayout::NCDHW);
589 }
590 
591 TEST_CASE("RefConvolution3dFloat16Test")
592 {
593  Convolution3dEndToEnd<armnn::DataType::Float16, armnn::DataType::Float16>(defaultBackends,
594  armnn::DataLayout::NDHWC);
595 }
596 
597 TEST_CASE("RefConvolution3dUint8Test")
598 {
599  Convolution3dEndToEnd<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(defaultBackends,
600  armnn::DataLayout::NDHWC);
601 }
602 
603 TEST_CASE("RefConvolution3dInt8Test")
604 {
605  Convolution3dEndToEnd<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(defaultBackends,
606  armnn::DataLayout::NDHWC);
607 }
608 
609 TEST_CASE("RefEluEndToEndTestFloat32")
610 {
611  EluEndToEndTest<armnn::DataType::Float32>(defaultBackends);
612 }
613 
614 TEST_CASE("RefEluEndToEndTestFloat16")
615 {
616  EluEndToEndTest<armnn::DataType::Float16>(defaultBackends);
617 }
618 
619 TEST_CASE("RefEluEndToEndTestBFloat16")
620 {
621  EluEndToEndTest<armnn::DataType::BFloat16>(defaultBackends);
622 }
623 
624 TEST_CASE("RefEluEndToEndTestQAsymmS8")
625 {
626  EluEndToEndTest<armnn::DataType::QAsymmS8>(defaultBackends);
627 }
628 
629 TEST_CASE("RefEluEndToEndTestQAsymmU8")
630 {
631  EluEndToEndTest<armnn::DataType::QAsymmU8>(defaultBackends);
632 }
633 
634 TEST_CASE("RefEluEndToEndTestQSymmS16")
635 {
636  EluEndToEndTest<armnn::DataType::QSymmS16>(defaultBackends);
637 }
638 
639 TEST_CASE("RefFillEndToEndTest")
640 {
641  FillEndToEnd<armnn::DataType::Float32>(defaultBackends);
642 }
643 
644 TEST_CASE("RefFillEndToEndTestFloat16")
645 {
646  FillEndToEnd<armnn::DataType::Float16>(defaultBackends);
647 }
648 
649 TEST_CASE("RefFillEndToEndTestInt32")
650 {
651  FillEndToEnd<armnn::DataType::Signed32>(defaultBackends);
652 }
653 
654 TEST_CASE("RefFullyConnectedEndToEndTestFloat32")
655 {
656  FullyConnectedWithDynamicWeightsEndToEnd<armnn::DataType::Float32>(defaultBackends);
657 }
658 
659 TEST_CASE("RefFullyConnectedEndToEndTestNonConstantWeightsConstantBiasesFloat32")
660 {
661  FullyConnectedWithDynamicOrConstantInputsEndToEnd<armnn::DataType::Float32>(defaultBackends, true, true);
662 }
663 
664 TEST_CASE("RefFullyConnectedEndToEndTestConstantWeightsNonConstantBiasesFloat32")
665 {
666  FullyConnectedWithDynamicOrConstantInputsEndToEnd<armnn::DataType::Float32>(defaultBackends, true, false);
667 }
668 
669 TEST_CASE("RefFullyConnectedEndToEndTestConstantWeightsTensorInfoNotSet")
670 {
671  FullyConnectedErrorChecking<armnn::DataType::Float32>(defaultBackends, false, true, true, true, false);
672 }
673 
674 TEST_CASE("RefFullyConnectedEndToEndTestWeightsNotConnectedExplicitCheck")
675 {
676  FullyConnectedErrorChecking<armnn::DataType::Float32>(defaultBackends, true, true, false, true, true);
677 }
678 
679 TEST_CASE("RefFullyConnectedEndToEndTestBiasNotConnectedExplicitCheck")
680 {
681  FullyConnectedErrorChecking<armnn::DataType::Float32>(defaultBackends, true, true, true, false, true);
682 }
683 
684 TEST_CASE("RefFullyConnectedEndToEndTestWeightsAndBiasNotConnected")
685 {
686  FullyConnectedErrorChecking<armnn::DataType::Float32>(defaultBackends, false, true, false, false, true);
687 }
688 
689 TEST_CASE("RefFullyConnectedEndToEndTestBiasDisabledConnectBias")
690 {
691  FullyConnectedErrorChecking<armnn::DataType::Float32>(defaultBackends, true, false, false, true, true);
692 }
693 
694 TEST_CASE("RefGatherFloatTest")
695 {
696  GatherEndToEnd<armnn::DataType::Float32>(defaultBackends);
697 }
698 
699 TEST_CASE("RefGatherUint8Test")
700 {
701  GatherEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
702 }
703 
704 TEST_CASE("RefGatherInt16Test")
705 {
706  GatherEndToEnd<armnn::DataType::QSymmS16>(defaultBackends);
707 }
708 
709 TEST_CASE("RefGatherMultiDimFloatTest")
710 {
711  GatherMultiDimEndToEnd<armnn::DataType::Float32>(defaultBackends);
712 }
713 
714 TEST_CASE("RefGatherMultiDimUint8Test")
715 {
716  GatherMultiDimEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
717 }
718 
719 TEST_CASE("RefGatherMultiDimInt16Test")
720 {
721  GatherMultiDimEndToEnd<armnn::DataType::QSymmS16>(defaultBackends);
722 }
723 
724 TEST_CASE("RefGatherNdFloatTest")
725 {
726  GatherNdEndToEnd<armnn::DataType::Float32>(defaultBackends);
727 }
728 
729 TEST_CASE("RefGatherNdUint8Test")
730 {
731  GatherNdEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
732 }
733 
734 TEST_CASE("RefGatherNdInt16Test")
735 {
736  GatherNdEndToEnd<armnn::DataType::QSymmS16>(defaultBackends);
737 }
738 
739 TEST_CASE("RefGatherNdMultiDimFloatTest")
740 {
741  GatherNdMultiDimEndToEnd<armnn::DataType::Float32>(defaultBackends);
742 }
743 
744 TEST_CASE("RefGatherNdMultiDimUint8Test")
745 {
746  GatherNdMultiDimEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
747 }
748 
749 TEST_CASE("RefGatherNdMultiDimInt16Test")
750 {
751  GatherNdMultiDimEndToEnd<armnn::DataType::QSymmS16>(defaultBackends);
752 }
753 
754 // DepthToSpace
755 TEST_CASE("DephtToSpaceEndToEndNchwFloat32")
756 {
757  DepthToSpaceEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
758 }
759 
760 TEST_CASE("DephtToSpaceEndToEndNchwFloat16")
761 {
762  DepthToSpaceEndToEnd<armnn::DataType::Float16>(defaultBackends, armnn::DataLayout::NCHW);
763 }
764 
765 TEST_CASE("DephtToSpaceEndToEndNchwUint8")
766 {
767  DepthToSpaceEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
768 }
769 
770 TEST_CASE("DephtToSpaceEndToEndNchwInt16")
771 {
772  DepthToSpaceEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
773 }
774 
775 TEST_CASE("DephtToSpaceEndToEndNhwcFloat32")
776 {
777  DepthToSpaceEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
778 }
779 
780 TEST_CASE("DephtToSpaceEndToEndNhwcFloat16")
781 {
782  DepthToSpaceEndToEnd<armnn::DataType::Float16>(defaultBackends, armnn::DataLayout::NHWC);
783 }
784 
785 TEST_CASE("DephtToSpaceEndToEndNhwcUint8")
786 {
787  DepthToSpaceEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
788 }
789 
790 TEST_CASE("DephtToSpaceEndToEndNhwcInt16")
791 {
792  DepthToSpaceEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
793 }
794 
795 // Dequantize
796 TEST_CASE("DequantizeEndToEndSimpleTest")
797 {
798  DequantizeEndToEndSimple<armnn::DataType::QAsymmU8>(defaultBackends);
799 }
800 
801 TEST_CASE("DequantizeEndToEndOffsetTest")
802 {
803  DequantizeEndToEndOffset<armnn::DataType::QAsymmU8>(defaultBackends);
804 }
805 
806 TEST_CASE("DequantizeEndToEndSimpleInt16Test")
807 {
808  DequantizeEndToEndSimple<armnn::DataType::QSymmS16>(defaultBackends);
809 }
810 
811 TEST_CASE("DequantizeEndToEndOffsetInt16Test")
812 {
813  DequantizeEndToEndOffset<armnn::DataType::QSymmS16>(defaultBackends);
814 }
815 
816 TEST_CASE("RefDetectionPostProcessRegularNmsTest")
817 {
818  std::vector<float> boxEncodings({
819  0.0f, 0.0f, 0.0f, 0.0f,
820  0.0f, 1.0f, 0.0f, 0.0f,
821  0.0f, -1.0f, 0.0f, 0.0f,
822  0.0f, 0.0f, 0.0f, 0.0f,
823  0.0f, 1.0f, 0.0f, 0.0f,
824  0.0f, 0.0f, 0.0f, 0.0f
825  });
826  std::vector<float> scores({
827  0.0f, 0.9f, 0.8f,
828  0.0f, 0.75f, 0.72f,
829  0.0f, 0.6f, 0.5f,
830  0.0f, 0.93f, 0.95f,
831  0.0f, 0.5f, 0.4f,
832  0.0f, 0.3f, 0.2f
833  });
834  std::vector<float> anchors({
835  0.5f, 0.5f, 1.0f, 1.0f,
836  0.5f, 0.5f, 1.0f, 1.0f,
837  0.5f, 0.5f, 1.0f, 1.0f,
838  0.5f, 10.5f, 1.0f, 1.0f,
839  0.5f, 10.5f, 1.0f, 1.0f,
840  0.5f, 100.5f, 1.0f, 1.0f
841  });
842  DetectionPostProcessRegularNmsEndToEnd<armnn::DataType::Float32>(defaultBackends, boxEncodings, scores, anchors);
843 }
844 
845 inline void QuantizeData(uint8_t* quant, const float* dequant, const TensorInfo& info)
846 {
847  for (size_t i = 0; i < info.GetNumElements(); i++)
848  {
849  quant[i] = armnn::Quantize<uint8_t>(dequant[i], info.GetQuantizationScale(), info.GetQuantizationOffset());
850  }
851 }
852 
853 TEST_CASE("RefDetectionPostProcessRegularNmsUint8Test")
854 {
855  armnn::TensorInfo boxEncodingsInfo({ 1, 6, 4 }, armnn::DataType::Float32);
856  armnn::TensorInfo scoresInfo({ 1, 6, 3 }, armnn::DataType::Float32);
857  armnn::TensorInfo anchorsInfo({ 6, 4 }, armnn::DataType::Float32);
858 
859  boxEncodingsInfo.SetQuantizationScale(1.0f);
860  boxEncodingsInfo.SetQuantizationOffset(1);
861  scoresInfo.SetQuantizationScale(0.01f);
862  scoresInfo.SetQuantizationOffset(0);
863  anchorsInfo.SetQuantizationScale(0.5f);
864  anchorsInfo.SetQuantizationOffset(0);
865 
866  std::vector<float> boxEncodings({
867  0.0f, 0.0f, 0.0f, 0.0f,
868  0.0f, 1.0f, 0.0f, 0.0f,
869  0.0f, -1.0f, 0.0f, 0.0f,
870  0.0f, 0.0f, 0.0f, 0.0f,
871  0.0f, 1.0f, 0.0f, 0.0f,
872  0.0f, 0.0f, 0.0f, 0.0f
873  });
874  std::vector<float> scores({
875  0.0f, 0.9f, 0.8f,
876  0.0f, 0.75f, 0.72f,
877  0.0f, 0.6f, 0.5f,
878  0.0f, 0.93f, 0.95f,
879  0.0f, 0.5f, 0.4f,
880  0.0f, 0.3f, 0.2f
881  });
882  std::vector<float> anchors({
883  0.5f, 0.5f, 1.0f, 1.0f,
884  0.5f, 0.5f, 1.0f, 1.0f,
885  0.5f, 0.5f, 1.0f, 1.0f,
886  0.5f, 10.5f, 1.0f, 1.0f,
887  0.5f, 10.5f, 1.0f, 1.0f,
888  0.5f, 100.5f, 1.0f, 1.0f
889  });
890 
891  std::vector<uint8_t> qBoxEncodings(boxEncodings.size(), 0);
892  std::vector<uint8_t> qScores(scores.size(), 0);
893  std::vector<uint8_t> qAnchors(anchors.size(), 0);
894  QuantizeData(qBoxEncodings.data(), boxEncodings.data(), boxEncodingsInfo);
895  QuantizeData(qScores.data(), scores.data(), scoresInfo);
896  QuantizeData(qAnchors.data(), anchors.data(), anchorsInfo);
897  DetectionPostProcessRegularNmsEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, qBoxEncodings,
898  qScores, qAnchors,
899  1.0f, 1, 0.01f, 0, 0.5f, 0);
900 }
901 
902 TEST_CASE("RefDetectionPostProcessFastNmsTest")
903 {
904  std::vector<float> boxEncodings({
905  0.0f, 0.0f, 0.0f, 0.0f,
906  0.0f, 1.0f, 0.0f, 0.0f,
907  0.0f, -1.0f, 0.0f, 0.0f,
908  0.0f, 0.0f, 0.0f, 0.0f,
909  0.0f, 1.0f, 0.0f, 0.0f,
910  0.0f, 0.0f, 0.0f, 0.0f
911  });
912  std::vector<float> scores({
913  0.0f, 0.9f, 0.8f,
914  0.0f, 0.75f, 0.72f,
915  0.0f, 0.6f, 0.5f,
916  0.0f, 0.93f, 0.95f,
917  0.0f, 0.5f, 0.4f,
918  0.0f, 0.3f, 0.2f
919  });
920  std::vector<float> anchors({
921  0.5f, 0.5f, 1.0f, 1.0f,
922  0.5f, 0.5f, 1.0f, 1.0f,
923  0.5f, 0.5f, 1.0f, 1.0f,
924  0.5f, 10.5f, 1.0f, 1.0f,
925  0.5f, 10.5f, 1.0f, 1.0f,
926  0.5f, 100.5f, 1.0f, 1.0f
927  });
928  DetectionPostProcessFastNmsEndToEnd<armnn::DataType::Float32>(defaultBackends, boxEncodings, scores, anchors);
929 }
930 
931 TEST_CASE("RefDetectionPostProcessFastNmsUint8Test")
932 {
933  armnn::TensorInfo boxEncodingsInfo({ 1, 6, 4 }, armnn::DataType::Float32);
934  armnn::TensorInfo scoresInfo({ 1, 6, 3 }, armnn::DataType::Float32);
935  armnn::TensorInfo anchorsInfo({ 6, 4 }, armnn::DataType::Float32);
936 
937  boxEncodingsInfo.SetQuantizationScale(1.0f);
938  boxEncodingsInfo.SetQuantizationOffset(1);
939  scoresInfo.SetQuantizationScale(0.01f);
940  scoresInfo.SetQuantizationOffset(0);
941  anchorsInfo.SetQuantizationScale(0.5f);
942  anchorsInfo.SetQuantizationOffset(0);
943 
944  std::vector<float> boxEncodings({
945  0.0f, 0.0f, 0.0f, 0.0f,
946  0.0f, 1.0f, 0.0f, 0.0f,
947  0.0f, -1.0f, 0.0f, 0.0f,
948  0.0f, 0.0f, 0.0f, 0.0f,
949  0.0f, 1.0f, 0.0f, 0.0f,
950  0.0f, 0.0f, 0.0f, 0.0f
951  });
952  std::vector<float> scores({
953  0.0f, 0.9f, 0.8f,
954  0.0f, 0.75f, 0.72f,
955  0.0f, 0.6f, 0.5f,
956  0.0f, 0.93f, 0.95f,
957  0.0f, 0.5f, 0.4f,
958  0.0f, 0.3f, 0.2f
959  });
960  std::vector<float> anchors({
961  0.5f, 0.5f, 1.0f, 1.0f,
962  0.5f, 0.5f, 1.0f, 1.0f,
963  0.5f, 0.5f, 1.0f, 1.0f,
964  0.5f, 10.5f, 1.0f, 1.0f,
965  0.5f, 10.5f, 1.0f, 1.0f,
966  0.5f, 100.5f, 1.0f, 1.0f
967  });
968 
969  std::vector<uint8_t> qBoxEncodings(boxEncodings.size(), 0);
970  std::vector<uint8_t> qScores(scores.size(), 0);
971  std::vector<uint8_t> qAnchors(anchors.size(), 0);
972  QuantizeData(qBoxEncodings.data(), boxEncodings.data(), boxEncodingsInfo);
973  QuantizeData(qScores.data(), scores.data(), scoresInfo);
974  QuantizeData(qAnchors.data(), anchors.data(), anchorsInfo);
975  DetectionPostProcessFastNmsEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, qBoxEncodings,
976  qScores, qAnchors,
977  1.0f, 1, 0.01f, 0, 0.5f, 0);
978 }
979 
980 // HardSwish
981 TEST_CASE("RefHardSwishEndToEndTestFloat32")
982 {
983  HardSwishEndToEndTest<armnn::DataType::Float32>(defaultBackends);
984 }
985 
986 TEST_CASE("RefHardSwishEndToEndTestFloat16")
987 {
988  HardSwishEndToEndTest<armnn::DataType::Float16>(defaultBackends);
989 }
990 
991 TEST_CASE("RefHardSwishEndToEndTestBFloat16")
992 {
993  HardSwishEndToEndTest<armnn::DataType::BFloat16>(defaultBackends);
994 }
995 
996 TEST_CASE("RefHardSwishEndToEndTestQAsymmS8")
997 {
998  HardSwishEndToEndTest<armnn::DataType::QAsymmS8>(defaultBackends);
999 }
1000 
1001 TEST_CASE("RefHardSwishEndToEndTestQAsymmU8")
1002 {
1003  HardSwishEndToEndTest<armnn::DataType::QAsymmU8>(defaultBackends);
1004 }
1005 
1006 TEST_CASE("RefHardSwishEndToEndTestQSymmS16")
1007 {
1008  HardSwishEndToEndTest<armnn::DataType::QSymmS16>(defaultBackends);
1009 }
1010 
1011 // LogSoftmax
1012 TEST_CASE("RefLogSoftmaxEndToEndTest")
1013 {
1014  LogSoftmaxEndToEndTest(defaultBackends);
1015 }
1016 
1017 TEST_CASE("RefPreluEndToEndTestFloat32")
1018 {
1019  PreluEndToEndNegativeTest<armnn::DataType::Float32>(defaultBackends);
1020 }
1021 
1022 TEST_CASE("RefPreluEndToEndTestUint8")
1023 {
1024  PreluEndToEndPositiveTest<armnn::DataType::QAsymmU8>(defaultBackends);
1025 }
1026 
1027 TEST_CASE("RefPreluEndToEndTestQSymm16")
1028 {
1029  PreluEndToEndPositiveTest<armnn::DataType::QSymmS16>(defaultBackends);
1030 }
1031 
1032 TEST_CASE("RefSpaceToDepthNhwcEndToEndTest1")
1033 {
1034  SpaceToDepthNhwcEndToEndTest1(defaultBackends);
1035 }
1036 
1037 TEST_CASE("RefSpaceToDepthNchwEndToEndTest1")
1038 {
1039  SpaceToDepthNchwEndToEndTest1(defaultBackends);
1040 }
1041 
1042 TEST_CASE("RefSpaceToDepthNhwcEndToEndTest2")
1043 {
1044  SpaceToDepthNhwcEndToEndTest2(defaultBackends);
1045 }
1046 
1047 TEST_CASE("RefSpaceToDepthNchwEndToEndTest2")
1048 {
1049  SpaceToDepthNchwEndToEndTest2(defaultBackends);
1050 }
1051 
1052 TEST_CASE("RefSplitter1dEndToEndTest")
1053 {
1054  Splitter1dEndToEnd<armnn::DataType::Float32>(defaultBackends);
1055 }
1056 
1057 TEST_CASE("RefSplitter1dEndToEndUint8Test")
1058 {
1059  Splitter1dEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1060 }
1061 
1062 TEST_CASE("RefSplitter2dDim0EndToEndTest")
1063 {
1064  Splitter2dDim0EndToEnd<armnn::DataType::Float32>(defaultBackends);
1065 }
1066 
1067 TEST_CASE("RefSplitter2dDim1EndToEndTest")
1068 {
1069  Splitter2dDim1EndToEnd<armnn::DataType::Float32>(defaultBackends);
1070 }
1071 
1072 TEST_CASE("RefSplitter2dDim0EndToEndUint8Test")
1073 {
1074  Splitter2dDim0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1075 }
1076 
1077 TEST_CASE("RefSplitter2dDim1EndToEndUint8Test")
1078 {
1079  Splitter2dDim1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1080 }
1081 
1082 TEST_CASE("RefSplitter3dDim0EndToEndTest")
1083 {
1084  Splitter3dDim0EndToEnd<armnn::DataType::Float32>(defaultBackends);
1085 }
1086 
1087 TEST_CASE("RefSplitter3dDim1EndToEndTest")
1088 {
1089  Splitter3dDim1EndToEnd<armnn::DataType::Float32>(defaultBackends);
1090 }
1091 
1092 TEST_CASE("RefSplitter3dDim2EndToEndTest")
1093 {
1094  Splitter3dDim2EndToEnd<armnn::DataType::Float32>(defaultBackends);
1095 }
1096 
1097 TEST_CASE("RefSplitter3dDim0EndToEndUint8Test")
1098 {
1099  Splitter3dDim0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1100 }
1101 
1102 TEST_CASE("RefSplitter3dDim1EndToEndUint8Test")
1103 {
1104  Splitter3dDim1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1105 }
1106 
1107 TEST_CASE("RefSplitter3dDim2EndToEndUint8Test")
1108 {
1109  Splitter3dDim2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1110 }
1111 
1112 TEST_CASE("RefSplitter4dDim0EndToEndTest")
1113 {
1114  Splitter4dDim0EndToEnd<armnn::DataType::Float32>(defaultBackends);
1115 }
1116 
1117 TEST_CASE("RefSplitter4dDim1EndToEndTest")
1118 {
1119  Splitter4dDim1EndToEnd<armnn::DataType::Float32>(defaultBackends);
1120 }
1121 
1122 TEST_CASE("RefSplitter4dDim2EndToEndTest")
1123 {
1124  Splitter4dDim2EndToEnd<armnn::DataType::Float32>(defaultBackends);
1125 }
1126 
1127 TEST_CASE("RefSplitter4dDim3EndToEndTest")
1128 {
1129  Splitter4dDim3EndToEnd<armnn::DataType::Float32>(defaultBackends);
1130 }
1131 
1132 TEST_CASE("RefSplitter4dDim0EndToEndUint8Test")
1133 {
1134  Splitter4dDim0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1135 }
1136 
1137 TEST_CASE("RefSplitter4dDim1EndToEndUint8Test")
1138 {
1139  Splitter4dDim1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1140 }
1141 
1142 TEST_CASE("RefSplitter4dDim2EndToEndUint8Test")
1143 {
1144  Splitter4dDim2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1145 }
1146 
1147 TEST_CASE("RefSplitter4dDim3EndToEndUint8Test")
1148 {
1149  Splitter4dDim3EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1150 }
1151 
1152 // TransposeConvolution2d
1153 TEST_CASE("RefTransposeConvolution2dEndToEndFloatNchwTest")
1154 {
1155  TransposeConvolution2dEndToEnd<armnn::DataType::Float32, armnn::DataType::Float32>(
1156  defaultBackends, armnn::DataLayout::NCHW);
1157 }
1158 
1159 TEST_CASE("RefTransposeConvolution2dEndToEndUint8NchwTest")
1160 {
1161  TransposeConvolution2dEndToEnd<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
1162  defaultBackends, armnn::DataLayout::NCHW);
1163 }
1164 
1165 TEST_CASE("RefTransposeConvolution2dEndToEndInt16NchwTest")
1166 {
1167  TransposeConvolution2dEndToEnd<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
1168  defaultBackends, armnn::DataLayout::NCHW);
1169 }
1170 
1171 TEST_CASE("RefTransposeConvolution2dEndToEndFloatNhwcTest")
1172 {
1173  TransposeConvolution2dEndToEnd<armnn::DataType::Float32, armnn::DataType::Float32>(
1174  defaultBackends, armnn::DataLayout::NHWC);
1175 }
1176 
1177 TEST_CASE("RefTransposeConvolution2dEndToEndUint8NhwcTest")
1178 {
1179  TransposeConvolution2dEndToEnd<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
1180  defaultBackends, armnn::DataLayout::NHWC);
1181 }
1182 
1183 TEST_CASE("RefTransposeConvolution2dEndToEndInt16NhwcTest")
1184 {
1185  TransposeConvolution2dEndToEnd<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
1186  defaultBackends, armnn::DataLayout::NHWC);
1187 }
1188 
1189 // Resize Bilinear
1190 TEST_CASE("RefResizeBilinearEndToEndFloatNchwTest")
1191 {
1192  ResizeBilinearEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
1193 }
1194 
1195 TEST_CASE("RefResizeBilinearEndToEndUint8NchwTest")
1196 {
1197  ResizeBilinearEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
1198 }
1199 
1200 TEST_CASE("RefResizeBilinearEndToEndInt16NchwTest")
1201 {
1202  ResizeBilinearEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
1203 }
1204 
1205 TEST_CASE("RefResizeBilinearEndToEndFloatNhwcTest")
1206 {
1207  ResizeBilinearEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
1208 }
1209 
1210 TEST_CASE("RefResizeBilinearEndToEndUint8NhwcTest")
1211 {
1212  ResizeBilinearEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
1213 }
1214 
1215 TEST_CASE("RefResizeBilinearEndToEndInt16NhwcTest")
1216 {
1217  ResizeBilinearEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
1218 }
1219 
1220 // Resize NearestNeighbor
1221 TEST_CASE("RefResizeNearestNeighborEndToEndFloatNchwTest")
1222 {
1223  ResizeNearestNeighborEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
1224 }
1225 
1226 TEST_CASE("RefResizeNearestNeighborEndToEndUint8NchwTest")
1227 {
1228  ResizeNearestNeighborEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
1229 }
1230 
1231 TEST_CASE("RefResizeNearestNeighborEndToEndInt16NchwTest")
1232 {
1233  ResizeNearestNeighborEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
1234 }
1235 
1236 TEST_CASE("RefResizeNearestNeighborEndToEndFloatNhwcTest")
1237 {
1238  ResizeNearestNeighborEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
1239 }
1240 
1241 TEST_CASE("RefResizeNearestNeighborEndToEndUint8NhwcTest")
1242 {
1243  ResizeNearestNeighborEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
1244 }
1245 
1246 TEST_CASE("RefResizeNearestNeighborEndToEndInt16NhwcTest")
1247 {
1248  ResizeNearestNeighborEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
1249 }
1250 
1251 // InstanceNormalization
1252 TEST_CASE("RefInstanceNormalizationNhwcEndToEndTest1")
1253 {
1254  InstanceNormalizationNhwcEndToEndTest1(defaultBackends);
1255 }
1256 
1257 TEST_CASE("RefInstanceNormalizationNchwEndToEndTest1")
1258 {
1259  InstanceNormalizationNchwEndToEndTest1(defaultBackends);
1260 }
1261 
1262 TEST_CASE("RefInstanceNormalizationNhwcEndToEndTest2")
1263 {
1264  InstanceNormalizationNhwcEndToEndTest2(defaultBackends);
1265 }
1266 
1267 TEST_CASE("RefInstanceNormalizationNchwEndToEndTest2")
1268 {
1269  InstanceNormalizationNchwEndToEndTest2(defaultBackends);
1270 }
1271 
1272 // ArgMinMax
1273 TEST_CASE("RefArgMaxSimpleTest")
1274 {
1275  ArgMaxEndToEndSimple<armnn::DataType::Float32>(defaultBackends);
1276 }
1277 
1278 TEST_CASE("RefArgMaxSimpleUint8Test")
1279 {
1280  ArgMaxEndToEndSimple<armnn::DataType::QAsymmU8>(defaultBackends);
1281 }
1282 
1283 TEST_CASE("RefArgMinSimpleTest")
1284 {
1285  ArgMinEndToEndSimple<armnn::DataType::Float32>(defaultBackends);
1286 }
1287 
1288 TEST_CASE("RefArgMinSimpleUint8Test")
1289 {
1290  ArgMinEndToEndSimple<armnn::DataType::QAsymmU8>(defaultBackends);
1291 }
1292 
1293 TEST_CASE("RefArgMaxAxis0Test")
1294 {
1295  ArgMaxAxis0EndToEnd<armnn::DataType::Float32>(defaultBackends);
1296 }
1297 
1298 TEST_CASE("RefArgMaxAxis0Uint8Test")
1299 {
1300  ArgMaxAxis0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1301 }
1302 
1303 TEST_CASE("RefArgMinAxis0Test")
1304 {
1305  ArgMinAxis0EndToEnd<armnn::DataType::Float32>(defaultBackends);
1306 }
1307 
1308 TEST_CASE("RefArgMinAxis0Uint8Test")
1309 {
1310 
1311  ArgMinAxis0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1312 }
1313 
1314 TEST_CASE("RefArgMaxAxis1Test")
1315 {
1316  ArgMaxAxis1EndToEnd<armnn::DataType::Float32>(defaultBackends);
1317 }
1318 
1319 TEST_CASE("RefArgMaxAxis1Uint8Test")
1320 {
1321  ArgMaxAxis1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1322 }
1323 
1324 TEST_CASE("RefArgMinAxis1Test")
1325 {
1326  ArgMinAxis1EndToEnd<armnn::DataType::Float32>(defaultBackends);
1327 }
1328 
1329 TEST_CASE("RefArgMinAxis1Uint8Test")
1330 {
1331 
1332  ArgMinAxis1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1333 }
1334 
1335 TEST_CASE("RefArgMaxAxis2Test")
1336 {
1337  ArgMaxAxis2EndToEnd<armnn::DataType::Float32>(defaultBackends);
1338 }
1339 
1340 TEST_CASE("RefArgMaxAxis2Uint8Test")
1341 {
1342  ArgMaxAxis2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1343 }
1344 
1345 TEST_CASE("RefArgMinAxis2Test")
1346 {
1347  ArgMinAxis2EndToEnd<armnn::DataType::Float32>(defaultBackends);
1348 }
1349 
1350 TEST_CASE("RefArgMinAxis2Uint8Test")
1351 {
1352 
1353  ArgMinAxis2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1354 }
1355 
1356 TEST_CASE("RefArgMaxAxis3Test")
1357 {
1358  ArgMaxAxis3EndToEnd<armnn::DataType::Float32>(defaultBackends);
1359 }
1360 
1361 TEST_CASE("RefArgMaxAxis3Uint8Test")
1362 {
1363  ArgMaxAxis3EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1364 }
1365 
1366 TEST_CASE("RefArgMinAxis3Test")
1367 {
1368  ArgMinAxis3EndToEnd<armnn::DataType::Float32>(defaultBackends);
1369 }
1370 
1371 TEST_CASE("RefArgMinAxis3Uint8Test")
1372 {
1373 
1374  ArgMinAxis3EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1375 }
1376 
1377 TEST_CASE("RefQLstmEndToEndTest")
1378 {
1379  QLstmEndToEnd(defaultBackends);
1380 }
1381 
1382 TEST_CASE("RefRankEndToEndTest")
1383 {
1384  RankEndToEnd<armnn::DataType::Float32>(defaultBackends);
1385 }
1386 
1387 TEST_CASE("RefRankEndToEndTestFloat16")
1388 {
1389  RankEndToEnd<armnn::DataType::Float16>(defaultBackends);
1390 }
1391 
1392 TEST_CASE("RefRankEndToEndTestInt32")
1393 {
1394  RankEndToEnd<armnn::DataType::Signed32>(defaultBackends);
1395 }
1396 
1397 TEST_CASE("RefRankEndToEndTestQAsymmS8")
1398 {
1399  RankEndToEnd<armnn::DataType::QAsymmS8>(defaultBackends);
1400 }
1401 
1402 TEST_CASE("RefRankEndToEndTestQSymmS16")
1403 {
1404  RankEndToEnd<armnn::DataType::QSymmS16>(defaultBackends);
1405 }
1406 
1407 TEST_CASE("RefRankEndToEndTestQSymmS8")
1408 {
1409  RankEndToEnd<armnn::DataType::QSymmS8>(defaultBackends);
1410 }
1411 
1412 TEST_CASE("RefForceImportWithAlignedBuffersEndToEndTest")
1413 {
1414  ForceImportWithAlignedBuffersEndToEndTest(defaultBackends);
1415 }
1416 
1417 TEST_CASE("RefForceImportWithMisalignedInputBuffersEndToEndTest")
1418 {
1419  ForceImportWithMisalignedInputBuffersEndToEndTest(defaultBackends);
1420 }
1421 
1422 TEST_CASE("RefForceImportWithMisalignedOutputBuffersEndToEndTest")
1423 {
1424  ForceImportWithMisalignedOutputBuffersEndToEndTest(defaultBackends);
1425 }
1426 
1427 TEST_CASE("RefForceImportWithMisalignedInputAndOutputBuffersEndToEndTest")
1428 {
1429  ForceImportWithMisalignedInputAndOutputBuffersEndToEndTest(defaultBackends);
1430 }
1431 
1432 TEST_CASE("RefForceImportRepeatedInferencesEndToEndTest")
1433 {
1434  ForceImportRepeatedInferencesEndToEndTest(defaultBackends);
1435 }
1436 
1437 TEST_CASE("RefForceImportRepeatedInferencesInvertedEndToEndTest")
1438 {
1439  ForceImportRepeatedInferencesInvertedEndToEndTest(defaultBackends);
1440 }
1441 
1442 #if !defined(__ANDROID__)
1443 // Only run these tests on non Android platforms
1444 TEST_CASE("RefImportNonAlignedPointerTest")
1445 {
1446  ImportNonAlignedInputPointerTest(defaultBackends);
1447 }
1448 
1449 TEST_CASE("RefExportNonAlignedPointerTest")
1450 {
1451  ExportNonAlignedOutputPointerTest(defaultBackends);
1452 }
1453 
1454 TEST_CASE("RefImportAlignedPointerTest")
1455 {
1456  ImportAlignedPointerTest(defaultBackends);
1457 }
1458 
1459 TEST_CASE("RefImportOnlyWorkload")
1460 {
1461  ImportOnlyWorkload(defaultBackends);
1462 }
1463 
1464 TEST_CASE("RefExportOnlyWorkload")
1465 {
1466  ExportOnlyWorkload(defaultBackends);
1467 }
1468 
1469 TEST_CASE("RefImportAndExportWorkload")
1470 {
1471  ImportAndExportWorkload(defaultBackends);
1472 }
1473 
1474 TEST_CASE("RefExportOutputWithSeveralOutputSlotConnectionsTest")
1475 {
1476  ExportOutputWithSeveralOutputSlotConnectionsTest(defaultBackends);
1477 }
1478 
1479 TEST_CASE("RefStridedSliceInvalidSliceEndToEndTest")
1480 {
1481  StridedSliceInvalidSliceEndToEndTest(defaultBackends);
1482 }
1483 
1484 TEST_CASE("RefThreadSafeFP32StridedSlicedEndToEndTest")
1485 {
1486  armnn::experimental::StridedSlicedEndToEndTest<armnn::DataType::Float32>(defaultBackends, 1);
1487 }
1488 
1489 TEST_CASE("RefAsyncFP32StridedSlicedMultiThreadedEndToEndTest")
1490 {
1491  armnn::experimental::StridedSlicedMultiThreadedEndToEndTest<armnn::DataType::Float32>(defaultBackends);
1492 }
1493 
1494 TEST_CASE("RefAsyncFP32StridedSlicedScheduledMultiThreadedEndToEndTest")
1495 {
1496  armnn::experimental::StridedSlicedEndToEndTest<armnn::DataType::Float32>(defaultBackends, 3);
1497 }
1498 #endif
1499 
1500 }
SpaceToDepthNchwEndToEndTest1
void SpaceToDepthNchwEndToEndTest1(const std::vector< armnn::BackendId > &defaultBackends)
Definition: SpaceToDepthEndToEndTestImpl.cpp:129
armnn::IRuntime::Create
static IRuntimePtr Create(const CreationOptions &options)
Definition: Runtime.cpp:49
armnn::IConnectableLayer
Interface for a layer that is connectable to other layers via InputSlots and OutputSlots.
Definition: INetwork.hpp:68
armnn::Compute::CpuRef
CPU Execution: Reference C++ kernels.
InstanceNormalizationNhwcEndToEndTest1
void InstanceNormalizationNhwcEndToEndTest1(const std::vector< armnn::BackendId > &defaultBackends)
Definition: InstanceNormalizationEndToEndTestImpl.cpp:98
QuantizeData
void QuantizeData(RawType *quant, const float *dequant, const armnn::TensorInfo &info)
Definition: DetectionPostProcessTestImpl.hpp:250
LogSoftmaxEndToEndTest
void LogSoftmaxEndToEndTest(const std::vector< armnn::BackendId > &defaultBackends)
Definition: LogSoftmaxEndToEndTestImpl.cpp:76
armnn::IRuntimePtr
std::unique_ptr< IRuntime, void(*)(IRuntime *runtime)> IRuntimePtr
Definition: IRuntime.hpp:33
armnn::InputTensors
std::vector< std::pair< LayerBindingId, class ConstTensor > > InputTensors
Definition: Tensor.hpp:392
InstanceNormalizationNchwEndToEndTest1
void InstanceNormalizationNchwEndToEndTest1(const std::vector< armnn::BackendId > &defaultBackends)
Definition: InstanceNormalizationEndToEndTestImpl.cpp:168
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
QLstmEndToEnd
void QLstmEndToEnd(const std::vector< armnn::BackendId > &backends)
Definition: QLstmEndToEndTestImpl.cpp:36
SpaceToDepthNhwcEndToEndTest2
void SpaceToDepthNhwcEndToEndTest2(const std::vector< armnn::BackendId > &defaultBackends)
Definition: SpaceToDepthEndToEndTestImpl.cpp:160
armnn::IOutputSlot::SetTensorInfo
virtual void SetTensorInfo(const TensorInfo &tensorInfo)=0
SpaceToDepthNhwcEndToEndTest1
void SpaceToDepthNhwcEndToEndTest1(const std::vector< armnn::BackendId > &defaultBackends)
Definition: SpaceToDepthEndToEndTestImpl.cpp:98
armnn::Tensor
A tensor defined by a TensorInfo (shape and data type) and a mutable backing store.
Definition: Tensor.hpp:319
SpaceToDepthNchwEndToEndTest2
void SpaceToDepthNchwEndToEndTest2(const std::vector< armnn::BackendId > &defaultBackends)
Definition: SpaceToDepthEndToEndTestImpl.cpp:191
armnn::Optimize
IOptimizedNetworkPtr Optimize(const INetwork &network, const std::vector< BackendId > &backendPreferences, const IDeviceSpec &deviceSpec, const OptimizerOptions &options=OptimizerOptions(), Optional< std::vector< std::string > &> messages=EmptyOptional())
Create an optimized version of the network.
Definition: Network.cpp:1864
armnn::TensorInfo::GetQuantizationOffset
int32_t GetQuantizationOffset() const
Definition: Tensor.cpp:478
armnn::TensorInfo::GetQuantizationScale
float GetQuantizationScale() const
Definition: Tensor.cpp:461
armnn::NetworkId
int NetworkId
Definition: IRuntime.hpp:27
armnn::ConstTensor
A tensor defined by a TensorInfo (shape and data type) and an immutable backing store.
Definition: Tensor.hpp:327
armnn::OutputTensors
std::vector< std::pair< LayerBindingId, class Tensor > > OutputTensors
Definition: Tensor.hpp:393
armnn::IOptimizedNetworkPtr
std::unique_ptr< IOptimizedNetwork, void(*)(IOptimizedNetwork *network)> IOptimizedNetworkPtr
Definition: INetwork.hpp:239
armnn::TensorInfo::SetQuantizationScale
void SetQuantizationScale(float scale)
Definition: Tensor.cpp:473
armnn::ActivationDescriptor
An ActivationDescriptor for the ActivationLayer.
Definition: Descriptors.hpp:36
armnn::ActivationFunction::BoundedReLu
min(a, max(b, input)) ReLu1 & ReLu6.
armnn::ActivationDescriptor::m_A
float m_A
Alpha upper bound value used by the activation functions. (BoundedReLu, Linear, TanH, Elu).
Definition: Descriptors.hpp:61
armnn::IConnectableLayer::GetInputSlot
virtual const IInputSlot & GetInputSlot(unsigned int index) const =0
Get a const input slot handle by slot index.
armnn::TensorInfo::SetConstant
void SetConstant(const bool IsConstant=true)
Marks the data corresponding to this tensor info as constant.
Definition: Tensor.cpp:514
armnn::IConnectableLayer::GetOutputSlot
virtual const IOutputSlot & GetOutputSlot(unsigned int index) const =0
Get the const output slot handle by slot index.
InstanceNormalizationNhwcEndToEndTest2
void InstanceNormalizationNhwcEndToEndTest2(const std::vector< armnn::BackendId > &defaultBackends)
Definition: InstanceNormalizationEndToEndTestImpl.cpp:239
armnn::INetworkPtr
std::unique_ptr< INetwork, void(*)(INetwork *network)> INetworkPtr
Definition: INetwork.hpp:238
armnn::IOutputSlot::Connect
virtual int Connect(IInputSlot &destination)=0
armnn::INetwork::Create
static INetworkPtr Create(NetworkOptions networkOptions={})
Definition: Network.cpp:475
armnn::ActivationDescriptor::m_B
float m_B
Beta lower bound value used by the activation functions. (BoundedReLu, Linear, TanH).
Definition: Descriptors.hpp:63
armnn::SoftmaxDescriptor
A SoftmaxDescriptor for the SoftmaxLayer.
Definition: Descriptors.hpp:150
armnn::ActivationDescriptor::m_Function
ActivationFunction m_Function
The activation function to use (Sigmoid, TanH, Linear, ReLu, BoundedReLu, SoftReLu, LeakyReLu, Abs, Sqrt, Square, Elu).
Definition: Descriptors.hpp:59
armnn::TensorInfo::GetNumElements
unsigned int GetNumElements() const
Definition: Tensor.hpp:196
InstanceNormalizationNchwEndToEndTest2
void InstanceNormalizationNchwEndToEndTest2(const std::vector< armnn::BackendId > &defaultBackends)
Definition: InstanceNormalizationEndToEndTestImpl.cpp:310