ArmNN
 22.08
RefElementwiseWorkload.cpp
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1 //
2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
8 #include "Decoders.hpp"
10 #include "Encoders.hpp"
11 #include "Profiling.hpp"
12 #include "RefWorkloadUtils.hpp"
13 #include "StringMapping.hpp"
14 #include <ResolveType.hpp>
15 #include <vector>
16 
17 namespace armnn
18 {
19 
20 template <typename Functor, typename ParentDescriptor, typename armnn::StringMapping::Id DebugString>
22  const ParentDescriptor& desc,
23  const WorkloadInfo& info)
24  : RefBaseWorkload<ParentDescriptor>(desc, info)
25 {
26 }
27 
28 template <typename Functor, typename ParentDescriptor, typename armnn::StringMapping::Id DebugString>
30 {
31  Execute(m_Data.m_Inputs, m_Data.m_Outputs);
32 }
33 
34 template <typename Functor, typename ParentDescriptor, typename armnn::StringMapping::Id DebugString>
36  ExecutionData& executionData)
37 {
38  WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
39  Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
40 }
41 
42 template <typename Functor, typename ParentDescriptor, typename armnn::StringMapping::Id DebugString>
44  std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
45 {
47  const TensorInfo& inputInfo0 = GetTensorInfo(inputs[0]);
48  const TensorInfo& inputInfo1 = GetTensorInfo(inputs[1]);
49  const TensorInfo& outputInfo = GetTensorInfo(outputs[0]);
50 
51  const TensorShape& inShape0 = inputInfo0.GetShape();
52  const TensorShape& inShape1 = inputInfo1.GetShape();
53  const TensorShape& outShape = outputInfo.GetShape();
54 
55  std::unique_ptr<Decoder<InType>> input0 = MakeDecoder<InType>(inputInfo0, inputs[0]->Map());
56  std::unique_ptr<Decoder<InType>> input1 = MakeDecoder<InType>(inputInfo1, inputs[1]->Map());
57  std::unique_ptr<Encoder<OutType>> output= MakeEncoder<OutType>(outputInfo, outputs[0]->Map());
58 
60  inShape1,
61  outShape,
62  *input0,
63  *input1,
64  *output);
65 }
66 
67 } //namespace armnn
68 
72 
76 
80 
82  armnn::SubtractionQueueDescriptor,
83  armnn::StringMapping::RefSubtractionWorkload_Execute>;
84 
88 
90  armnn::MultiplicationQueueDescriptor,
91  armnn::StringMapping::RefMultiplicationWorkload_Execute>;
92 
96 
98  armnn::DivisionQueueDescriptor,
99  armnn::StringMapping::RefDivisionWorkload_Execute>;
100 
104 
106  armnn::MaximumQueueDescriptor,
107  armnn::StringMapping::RefMaximumWorkload_Execute>;
108 
112 
114  armnn::MinimumQueueDescriptor,
115  armnn::StringMapping::RefMinimumWorkload_Execute>;
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
CPU Execution: Reference C++ kernels.
static const StringMapping & Instance()
Copyright (c) 2021 ARM Limited and Contributors.
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
RefElementwiseWorkload(const ParentDescriptor &descriptor, const WorkloadInfo &info)
void ExecuteAsync(ExecutionData &executionData) override
Contains information about TensorInfos of a layer.
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers