ArmNN
 22.02
Functions
Conv2dTestImpl.hpp File Reference
#include <armnnTestUtils/LayerTestResult.hpp>
#include <ResolveType.hpp>
#include <armnn/Types.hpp>
#include <armnn/backends/IBackendInternal.hpp>
#include <armnn/backends/WorkloadFactory.hpp>

Go to the source code of this file.

Functions

template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > Convolution2d3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > Convolution2d2x3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x5Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x3Stride2x2Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x3NhwcTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
 
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x5Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x3Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x5QSymm16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x3QSymm16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution1dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
 
LayerTestResult< uint8_t, 4 > Convolution1dUint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
 
LayerTestResult< float, 4 > CompareConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory)
 
LayerTestResult< uint8_t, 4 > Convolution2dPerAxisQuantTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution2d3x3Stride2x2BFloat16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout &dataLayout)
 
LayerTestResult< float, 4 > Convolution2d3x3Stride2x2BFloat16SmallValueTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout &dataLayout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2d3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2d2x3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2dMult4Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2dMult2Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<typename T >
LayerTestResult< T, 4 > CompareDepthwiseConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthNhwcTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul1Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul64Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dAsymmetricTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory)
 
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dUint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dDepthMul1Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dInt16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dDepthMul1Int16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dPerAxisQuantTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > CompareDepthwiseConvolution2dFloatTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > CompareDepthwiseConvolution2dUint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory, const armnn::DataLayout layout)
 

Function Documentation

◆ CompareConvolution2dTest()

LayerTestResult<float, 4> CompareConvolution2dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::ITensorHandleFactory &  refTensorHandleFactory 
)

Definition at line 3509 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3515 {
3516  return CompareConvolution2dTestImpl<armnn::DataType::Float32>(
3517  workloadFactory, memoryManager, refWorkloadFactory, tensorHandleFactory, refTensorHandleFactory);
3518 }

◆ CompareDepthwiseConvolution2dFloatTest()

LayerTestResult<float, 4> CompareDepthwiseConvolution2dFloatTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::ITensorHandleFactory &  refTensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 3779 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3786 {
3787  return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::Float32>(
3788  workloadFactory, memoryManager, refWorkloadFactory, tensorHandleFactory, refTensorHandleFactory, layout);
3789 }

◆ CompareDepthwiseConvolution2dTest()

LayerTestResult<T, 4> CompareDepthwiseConvolution2dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::ITensorHandleFactory &  refTensorHandleFactory,
const armnn::DataLayout  layout 
)

◆ CompareDepthwiseConvolution2dUint8Test()

LayerTestResult<uint8_t, 4> CompareDepthwiseConvolution2dUint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::ITensorHandleFactory &  refTensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 3791 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3798 {
3799  return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8>(
3800  workloadFactory, memoryManager, refWorkloadFactory, tensorHandleFactory, refTensorHandleFactory, layout);
3801 }

◆ Convolution1dTest()

LayerTestResult<float, 4> Convolution1dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled 
)

Definition at line 3391 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3396 {
3397  return Convolution1dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3398  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled);
3399 }

◆ Convolution1dUint8Test()

LayerTestResult<uint8_t, 4> Convolution1dUint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled 
)

Definition at line 3401 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3406 {
3407  return Convolution1dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3408  workloadFactory, memoryManager, tensorHandleFactory, 0.1f, 128, biasEnabled);
3409 }

◆ Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test()

LayerTestResult<T, 4> Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 1250 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

1256 {
1257  armnn::TensorInfo inputTensorInfo({ 1, 1, 10, 10 }, ArmnnType);
1258  std::vector<float> inputNoQuantizedValues =
1259  {
1260  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1261  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1262  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1263  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1264  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1265  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1266  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1267  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1268  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1269  1, 1, 1, 1, 1, 1, 1, 1, 1, 1
1270  };
1271 
1272  armnn::TensorInfo kernelTensorInfo({ 1, 1, 2, 2 }, ArmnnType);
1273  std::vector<float> kernelNoQuantizedValues =
1274  {
1275  1, 2,
1276  3, 4
1277  };
1278 
1279  // Since the dilation rate is 2 this will dilate the kernel to be like 3x3: d(K-1)+1 --> 2 x (2-1) + 1 = 3,
1280  // therefore the output will be 4x4: (I − K + 2P)/S +1 => trunc ( (10 - 3 + 2x2 ) / 3 + 1 )
1281  // where, dilation size = d = 2; kernel size = K = 2; input size = I = 10; padding size = P = 2; stride = S = 3
1282  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
1283  std::vector<float> outputExpectedNoQuantizedValues =
1284  {
1285  4, 7, 7, 3,
1286  6, 10, 10, 4,
1287  6, 10, 10, 4,
1288  2, 3, 3, 1
1289  };
1290  uint32_t padLeft = 1;
1291  uint32_t padTop = 1;
1292  uint32_t padRight = 1;
1293  uint32_t padBottom = 1;
1294 
1295  return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1296  workloadFactory,
1297  memoryManager,
1298  tensorHandleFactory,
1299  inputNoQuantizedValues,
1300  inputTensorInfo,
1301  kernelNoQuantizedValues,
1302  kernelTensorInfo,
1303  outputExpectedNoQuantizedValues,
1304  outputTensorInfo,
1305  2,
1306  2,
1307  layout,
1308  padLeft,
1309  padTop,
1310  padRight,
1311  padBottom,
1312  3,
1313  3,
1314  biasEnabled
1315  );
1316 }

◆ Convolution2d2x3x3Dilation3x3Test()

LayerTestResult<T, 4> Convolution2d2x3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 1177 of file Conv2dTestImpl.cpp.

1183 {
1184  armnn::TensorInfo inputTensorInfo({ 1, 2, 10, 10 }, ArmnnType);
1185  std::vector<float> inputNoQuantizedValues =
1186  {
1187  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1188  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1189  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1190  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1191  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1192  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1193  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1194  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1195  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1196  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1197 
1198  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1199  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1200  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1201  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1202  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1203  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1204  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1205  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1206  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1207  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1208  };
1209 
1210  armnn::TensorInfo kernelTensorInfo({ 1, 2, 3, 3 }, ArmnnType);
1211  std::vector<float> kernelNoQuantizedValues =
1212  {
1213  1, 2, 3,
1214  4, 5, 6,
1215  7, 8, 9,
1216 
1217  1, 2, 3,
1218  4, 5, 6,
1219  7, 8, 9
1220  };
1221 
1222  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
1223  // therefore the output will be 4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
1224  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4 }, ArmnnType);
1225  std::vector<float> outputExpectedNoQuantizedValues =
1226  {
1227  12., 10., 10., 10.,
1228  12., 10., 10., 10.,
1229  12., 10., 10., 10.,
1230  6., 4., 4., 4.
1231  };
1232 
1233  return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1234  workloadFactory,
1235  memoryManager,
1236  tensorHandleFactory,
1237  inputNoQuantizedValues,
1238  inputTensorInfo,
1239  kernelNoQuantizedValues,
1240  kernelTensorInfo,
1241  outputExpectedNoQuantizedValues,
1242  outputTensorInfo,
1243  3,
1244  3,
1245  layout,
1246  biasEnabled);
1247 }

◆ Convolution2d3x3Dilation3x3Test()

LayerTestResult<T, 4> Convolution2d3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 1119 of file Conv2dTestImpl.cpp.

1125 {
1126  armnn::TensorInfo inputTensorInfo({ 1, 1, 10, 10 }, ArmnnType);
1127  std::vector<float> inputNoQuantizedValues =
1128  {
1129  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1130  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1131  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1132  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1133  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1134  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1135  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1136  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1137  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1138  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1139  };
1140 
1141  armnn::TensorInfo kernelTensorInfo({ 1, 1, 3, 3}, ArmnnType);
1142  std::vector<float> kernelNoQuantizedValues =
1143  {
1144  1, 2, 3,
1145  4, 5, 6,
1146  7, 8, 9
1147  };
1148 
1149  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
1150  // therefore the output will be 4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
1151  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
1152  std::vector<float> outputExpectedNoQuantizedValues =
1153  {
1154  6., 5., 5., 5.,
1155  6., 5., 5., 5.,
1156  6., 5., 5., 5.,
1157  3., 2., 2., 2.
1158  };
1159 
1160  return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1161  workloadFactory,
1162  memoryManager,
1163  tensorHandleFactory,
1164  inputNoQuantizedValues,
1165  inputTensorInfo,
1166  kernelNoQuantizedValues,
1167  kernelTensorInfo,
1168  outputExpectedNoQuantizedValues,
1169  outputTensorInfo,
1170  3,
1171  3,
1172  layout,
1173  biasEnabled);
1174 }

◆ Convolution2d3x3Stride2x2BFloat16SmallValueTest()

LayerTestResult<float, 4> Convolution2d3x3Stride2x2BFloat16SmallValueTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout &  dataLayout 
)

Definition at line 1532 of file Conv2dTestImpl.cpp.

References armnn::BFloat16, armnn::Float32, armnn::IgnoreUnused(), and SimpleConvolution2dNhwcTestImpl().

Referenced by TEST_SUITE().

1538 {
1539  // BFloat16 input and weight, Float32 output
1540  armnn::IgnoreUnused(biasEnabled);
1541 
1542  // Input is a single-batch, 1 channel, 5x5 image.
1543  armnn::TensorInfo inputDesc({1, 5, 5, 1}, armnn::DataType::BFloat16);
1544 
1545  std::vector<armnn::BFloat16> inputValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1546  {
1547  0.0367984f, // 0.0368652
1548  0.0380895f, // 0.0380859
1549  0.0420157f, // 0.0419922
1550  0.0675631f, // 0.0673828
1551  0.0938920f, // 0.09375
1552  0.0476106f, // 0.0476074
1553  0.1035490f, // 0.103516
1554  0.1260370f, // 0.125977
1555  0.0461647f, // 0.0461426
1556  0.0883828f, // 0.0883789
1557  0.1159540f, // 0.115723
1558  0.0498519f, // 0.0498047
1559  0.0104630f, // 0.010437
1560  0.0154114f, // 0.0154419
1561  0.00137681f, // 0.00137329
1562  0.0344238f, // 0.0344616
1563  0.0356445f, // 0.0355693
1564  0.0495605f, // 0.0495018
1565  0.0683594f, // 0.0683308
1566  0.0991211f, // 0.0988837
1567  0.0461426f, // 0.0461838
1568  0.0996094f, // 0.0997546
1569  0.1269530f, // 0.127099
1570  0.0393066f, // 0.0392791
1571  0.103516f // 0.103641
1572  },
1573  1.0f, 0);
1574 
1575  // Use a 3x3 kernel.
1576  armnn::TensorInfo kernelDesc({1, 3, 3, 1}, armnn::DataType::BFloat16);
1577 
1578  std::vector<armnn::BFloat16> kernelValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1579  {
1580  -0.126184f, // -0.125977
1581  -0.150468f, // -0.150391
1582  -0.101412f, // -0.101562
1583  -0.0586369f,// -0.0585938
1584  -0.0865864f,// -0.0864258
1585  -0.0435089f,// -0.043457
1586  0.0347555f, // 0.034668
1587  0.0323111f, // 0.0322266
1588  0.0385381f // 0.0385742
1589  },
1590  1.0f, 0);
1591 
1592  // Expected output is a single-batch, 1 channel, 3x3 image.
1593  armnn::TensorInfo outputDesc({1, 3, 3, 1}, armnn::DataType::Float32);
1594 
1595  // Expected output (with results if calculated as FP32 in the comments)
1596  const std::vector<float> outputData =
1597  {
1598  0.000686645508f, // 0.000685
1599  0.000640869141f, // 0.000639
1600  -0.00759887695f, // -0.007631
1601  -0.02734375f, // -0.027388
1602  -0.0356445312f, // -0.035737
1603  -0.0145874023f, // -0.014568
1604  -0.0170898438f, // -0.017124
1605  -0.0373535156f, // -0.037431
1606  -0.0346679688f // -0.034808
1607  };
1608 
1609  uint32_t padLeft = 1;
1610  uint32_t padTop = 1;
1611  uint32_t padRight = 1;
1612  uint32_t padBottom = 1;
1613  uint32_t strideX = 2;
1614  uint32_t strideY = 2;
1615 
1616  return SimpleConvolution2dNhwcTestImpl
1617  <armnn::DataType::BFloat16, armnn::DataType::Float32, armnn::BFloat16, float, armnn::DataType::Float32, float>(
1618  workloadFactory,
1619  memoryManager,
1620  tensorHandleFactory,
1621  inputValues,
1622  kernelValues,
1623  std::vector<float>(),
1624  outputData,
1625  inputDesc.GetShape(),
1626  kernelDesc.GetShape(),
1627  outputDesc.GetShape(),
1628  dataLayout,
1629  1.0f,
1630  0,
1631  padLeft,
1632  padTop,
1633  padRight,
1634  padBottom,
1635  strideX,
1636  strideY);
1637 }
SimpleConvolution2dNhwcTestImpl
LayerTestResult< O, 4 > SimpleConvolution2dNhwcTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< T > &input, const std::vector< T > &kernel, const std::vector< B > &bias, const std::vector< O > &outputExpected, const armnn::TensorShape &inputShape, const armnn::TensorShape &kernelShape, const armnn::TensorShape &outputExpectedShape, const armnn::DataLayout dataLayout, float qScale, int32_t qOffset, uint32_t padLeft=1, uint32_t padTop=1, uint32_t padRight=1, uint32_t padBottom=1, uint32_t strideX=1, uint32_t strideY=1)
Definition: Conv2dTestImpl.cpp:368
armnn::IgnoreUnused
void IgnoreUnused(Ts &&...)
Definition: IgnoreUnused.hpp:14

◆ Convolution2d3x3Stride2x2BFloat16Test()

LayerTestResult<float, 4> Convolution2d3x3Stride2x2BFloat16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout &  dataLayout 
)

Definition at line 1425 of file Conv2dTestImpl.cpp.

References armnn::BFloat16, armnn::Float32, armnn::IgnoreUnused(), and SimpleConvolution2dNhwcTestImpl().

Referenced by TEST_SUITE().

1431 {
1432  // BFloat16 input and weight, Float32 output
1433  armnn::IgnoreUnused(biasEnabled);
1434 
1435  // Input is a single-batch, 1 channel, 5x5 image.
1436  armnn::TensorInfo inputDesc({ 1, 5, 5, 1 }, armnn::DataType::BFloat16);
1437 
1438  std::vector<armnn::BFloat16> inputValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1439  {
1440  10.0367984f, // 10.0625
1441  2.0380895f, // 2.03125
1442  15.0420157f, // 15.0625
1443  22.0675631f, // 22.125
1444  8.0938920f, // 8.125
1445  5.0476106f, // 5.0625
1446  80.1035490f, // 80
1447  100.1260370f, // 100
1448  55.0461647f, // 55
1449  120.0883828f, // 120
1450  9.1159540f, // 9.125
1451  90.0498519f, // 90
1452  200.0104630f, // 200
1453  30.0154114f, // 30
1454  75.00137681f, // 75
1455  30.0344238f, // 30
1456  25.0356445f, // 25
1457  130.0495605f, // 130
1458  60.0683594f, // 60
1459  35.0991211f, // 35
1460  8.0461426f, // 8.0625
1461  12.0996094f, // 12.125
1462  98.1269530f, // 98
1463  125.0393066f, // 125
1464  5.103516f // 5.0937
1465  },
1466  1.0f, 0);
1467 
1468  // Use a 3x3 kernel.
1469  armnn::TensorInfo kernelDesc({1, 3, 3, 1}, armnn::DataType::BFloat16);
1470 
1471  std::vector<armnn::BFloat16> kernelValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1472  {
1473  -0.126184f, // -0.125977
1474  -0.150468f, // -0.150391
1475  -0.101412f, // -0.101562
1476  -0.0586369f,// -0.0585938
1477  -0.0865864f,// -0.0864258
1478  -0.0435089f,// -0.043457
1479  0.0347555f, // 0.034668
1480  0.0323111f, // 0.0322266
1481  0.0385381f // 0.0385742
1482  },
1483  1.0f, 0);
1484 
1485  // Expected output is a single-batch, 1 channel, 3x3 image.
1486  armnn::TensorInfo outputDesc({ 1, 3, 3, 1 }, armnn::DataType::Float32);
1487 
1488  // Expected output (with results if calculated as FP32 in the comments)
1489  const std::vector<float> outputData =
1490  {
1491  2.296875f, // 2.29240716
1492  5.75f, // 5.75851926
1493  3.78125f, // 3.79855026
1494  -11.625f, // -11.65498118
1495  -47.25f, // -47.27316893
1496  -30.0f, // -30.04771684
1497  -8.25f, // -8.28126168
1498  -43.5f, // -43.46531337
1499  -20.625f // -20.63477281
1500  };
1501 
1502  uint32_t padLeft = 1;
1503  uint32_t padTop = 1;
1504  uint32_t padRight = 1;
1505  uint32_t padBottom = 1;
1506  uint32_t strideX = 2;
1507  uint32_t strideY = 2;
1508 
1509  return SimpleConvolution2dNhwcTestImpl
1510  <armnn::DataType::BFloat16, armnn::DataType::Float32, armnn::BFloat16, float, armnn::DataType::Float32, float>(
1511  workloadFactory,
1512  memoryManager,
1513  tensorHandleFactory,
1514  inputValues,
1515  kernelValues,
1516  std::vector<float>(),
1517  outputData,
1518  inputDesc.GetShape(),
1519  kernelDesc.GetShape(),
1520  outputDesc.GetShape(),
1521  dataLayout,
1522  1.0f,
1523  0,
1524  padLeft,
1525  padTop,
1526  padRight,
1527  padBottom,
1528  strideX,
1529  strideY);
1530 }
SimpleConvolution2dNhwcTestImpl
LayerTestResult< O, 4 > SimpleConvolution2dNhwcTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< T > &input, const std::vector< T > &kernel, const std::vector< B > &bias, const std::vector< O > &outputExpected, const armnn::TensorShape &inputShape, const armnn::TensorShape &kernelShape, const armnn::TensorShape &outputExpectedShape, const armnn::DataLayout dataLayout, float qScale, int32_t qOffset, uint32_t padLeft=1, uint32_t padTop=1, uint32_t padRight=1, uint32_t padBottom=1, uint32_t strideX=1, uint32_t strideY=1)
Definition: Conv2dTestImpl.cpp:368
armnn::IgnoreUnused
void IgnoreUnused(Ts &&...)
Definition: IgnoreUnused.hpp:14

◆ Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest()

LayerTestResult<float, 4> Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
armnn::DataLayout  layout 
)

Definition at line 3380 of file Conv2dTestImpl.cpp.

References Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon(), and armnn::Float32.

Referenced by TEST_SUITE().

3385 {
3386  return Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon
3387  <armnn::DataType::Float32, armnn::DataType::Float32>(
3388  workloadFactory, memoryManager, tensorHandleFactory, layout, 0.0f, 0);
3389 }
Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon
LayerTestResult< T, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout, float qScale, int32_t qOffset)
Definition: Conv2dTestImpl.cpp:894

◆ Convolution2dAsymmetricPaddingTest()

LayerTestResult<float, 4> Convolution2dAsymmetricPaddingTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
armnn::DataLayout  layout 
)

Definition at line 3370 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3375 {
3376  return SimpleConvolution2dAsymmetricPaddingTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3377  workloadFactory, memoryManager, tensorHandleFactory, layout, 0.0f, 0);
3378 }

◆ Convolution2dPerAxisQuantTest()

LayerTestResult<uint8_t, 4> Convolution2dPerAxisQuantTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 3411 of file Conv2dTestImpl.cpp.

References AllocateAndCopyDataToITensorHandle(), armnn::Convolution2d, CopyDataFromITensorHandle(), CopyDataToITensorHandle(), ITensorHandleFactory::CreateTensorHandle(), IWorkloadFactory::CreateWorkload(), QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, Convolution2dDescriptor::m_StrideX, armnn::NCHW, and PermuteTensorNhwcToNchw().

Referenced by TEST_SUITE().

3416 {
3417  using namespace armnn;
3418 
3419  const DataType inputType = DataType::QAsymmU8;
3420  const DataType kernelType = DataType::QSymmS8;
3421  const DataType biasType = DataType::Signed32;
3422 
3423  TensorInfo inputInfo ({ 1, 3, 1, 2 }, inputType, 0.5f, 128);
3424  TensorInfo outputInfo({ 1, 3, 1, 3 }, inputType, 1.0f, 128);
3425 
3426  const std::vector<float> quantScales{ 0.5f, 0.75f, 1.0f };
3427  constexpr unsigned int quantDimension = 0;
3428 
3429  TensorInfo kernelInfo({ 3, 1, 1, 2 }, kernelType, quantScales, quantDimension);
3430 
3431  const std::vector<float> biasQuantScales{ 0.25f, 0.375f, 0.5f };
3432  TensorInfo biasInfo({ 3 }, biasType, biasQuantScales, quantDimension);
3433 
3434  std::vector<uint8_t> inputData =
3435  {
3436  138, 108, 138, 108, 138, 108
3437  };
3438 
3439  std::vector<int8_t> kernelData =
3440  {
3441  1, 2, 1, 2, 1, 2
3442  };
3443 
3444  std::vector<int32_t> biasData =
3445  {
3446  4, 4, 4
3447  };
3448 
3449  std::vector<uint8_t> expectedOutputData =
3450  {
3451  121, 118, 115, 121, 118, 115, 121, 118, 115
3452  };
3453 
3454  if (layout == DataLayout::NCHW)
3455  {
3456  PermuteTensorNhwcToNchw(inputInfo, inputData);
3457  PermuteTensorNhwcToNchw(kernelInfo, kernelData);
3458  PermuteTensorNhwcToNchw(outputInfo, expectedOutputData);
3459  }
3460 
3461  std::vector<uint8_t> actualOutput(outputInfo.GetNumElements());
3462 
3463  Convolution2dDescriptor descriptor;
3464  descriptor.m_StrideX = 1;
3465  descriptor.m_StrideY = 1;
3466  descriptor.m_PadLeft = 0;
3467  descriptor.m_PadRight = 0;
3468  descriptor.m_PadTop = 0;
3469  descriptor.m_PadBottom = 0;
3470  descriptor.m_BiasEnabled = true;
3471  descriptor.m_DataLayout = layout;
3472 
3473  std::unique_ptr<ITensorHandle> inputHandle = tensorHandleFactory.CreateTensorHandle(inputInfo);
3474  std::unique_ptr<ITensorHandle> outputHandle = tensorHandleFactory.CreateTensorHandle(outputInfo);
3475 
3476  WorkloadInfo workloadInfo;
3477  ScopedTensorHandle weightTensor(kernelInfo);
3478  ScopedTensorHandle biasTensor(biasInfo);
3479 
3480  AllocateAndCopyDataToITensorHandle(&weightTensor, kernelData.data());
3481  AllocateAndCopyDataToITensorHandle(&biasTensor, biasData.data());
3482 
3483  Convolution2dQueueDescriptor queueDescriptor;
3484  queueDescriptor.m_Parameters = descriptor;
3485  queueDescriptor.m_Weight = &weightTensor;
3486  queueDescriptor.m_Bias = &biasTensor;
3487 
3488  AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3489  AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3490 
3491  std::unique_ptr<IWorkload> workload= workloadFactory.CreateWorkload(armnn::LayerType::Convolution2d,
3492  queueDescriptor,
3493  workloadInfo);
3494  inputHandle->Allocate();
3495  outputHandle->Allocate();
3496 
3497  CopyDataToITensorHandle(inputHandle.get(), inputData.data());
3498 
3499  ExecuteWorkload(*workload, memoryManager);
3500 
3501  CopyDataFromITensorHandle(actualOutput.data(), outputHandle.get());
3502 
3503  return LayerTestResult<uint8_t, 4>(actualOutput,
3504  expectedOutputData,
3505  outputHandle->GetShape(),
3506  outputInfo.GetShape());
3507 }
PermuteTensorNhwcToNchw
void PermuteTensorNhwcToNchw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
Definition: DataLayoutUtils.hpp:26
armnn::Convolution2dDescriptor
A Convolution2dDescriptor for the Convolution2dLayer.
Definition: Descriptors.hpp:499
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
AllocateAndCopyDataToITensorHandle
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:19
armnn::Convolution2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:537
armnn::DataType
DataType
Definition: Types.hpp:35
CopyDataFromITensorHandle
void CopyDataFromITensorHandle(void *mem, const armnn::ITensorHandle *tensorHandle)
Definition: TensorCopyUtils.cpp:14
CopyDataToITensorHandle
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:9
armnn::WorkloadInfo
Contains information about TensorInfos of a layer.
Definition: WorkloadInfo.hpp:16
armnn::IWorkloadFactory::CreateWorkload
virtual std::unique_ptr< IWorkload > CreateWorkload(LayerType type, const QueueDescriptor &descriptor, const WorkloadInfo &info) const
Definition: WorkloadFactory.cpp:1541
armnn::ITensorHandleFactory::CreateTensorHandle
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo) const =0

◆ DepthwiseConvolution2d2x3x3Dilation3x3Test()

LayerTestResult<T, 4> DepthwiseConvolution2d2x3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2694 of file Conv2dTestImpl.cpp.

2700 {
2701  armnn::TensorInfo inputTensorInfo({1, 2, 10, 10}, ArmnnType);
2702  std::vector<float> inputNoQuantizedValues =
2703  {
2704  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2705  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2706  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2707  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2708  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2709  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2710  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2711  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2712  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2713  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2714 
2715  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2716  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2717  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2718  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2719  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2720  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2721  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2722  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2723  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2724  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2725  };
2726 
2727  armnn::TensorInfo kernelTensorInfo({ 1, 3, 3, 2}, ArmnnType);
2728  std::vector<float> kernelNoQuantizedValues =
2729  {
2730  1, 2, 3,
2731  4, 5, 6,
2732  7, 8, 9,
2733 
2734  1, 2, 3,
2735  4, 5, 6,
2736  7, 8, 9
2737  };
2738 
2739  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
2740  // therefore the output will be 2x4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
2741  armnn::TensorInfo outputTensorInfo({ 1, 2, 4, 4}, ArmnnType);
2742  std::vector<float> outputExpectedNoQuantizedValues =
2743  {
2744  2, 9, 9, 9, 2, 9, 9, 9, 2, 9, 9, 9, 5, 3, 3, 3, 3,
2745 
2746  1, 1, 1, 3, 1, 1, 1, 3, 1, 1, 1, 6, 4, 4, 4
2747  };
2748 
2749  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2750  workloadFactory,
2751  memoryManager,
2752  tensorHandleFactory,
2753  inputNoQuantizedValues,
2754  inputTensorInfo,
2755  kernelNoQuantizedValues,
2756  kernelTensorInfo,
2757  outputExpectedNoQuantizedValues,
2758  outputTensorInfo,
2759  3,
2760  3,
2761  layout,
2762  biasEnabled);
2763 }

◆ DepthwiseConvolution2d3x3Dilation3x3Test()

LayerTestResult<T, 4> DepthwiseConvolution2d3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2636 of file Conv2dTestImpl.cpp.

2642 {
2643  armnn::TensorInfo inputTensorInfo({1, 1, 10, 10}, ArmnnType);
2644  std::vector<float> inputNoQuantizedValues =
2645  {
2646  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2647  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2648  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2649  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2650  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2651  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2652  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2653  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2654  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2655  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2656  };
2657 
2658  armnn::TensorInfo kernelTensorInfo({ 1, 3, 3, 1}, ArmnnType);
2659  std::vector<float> kernelNoQuantizedValues =
2660  {
2661  1, 2, 3,
2662  4, 5, 6,
2663  7, 8, 9
2664  };
2665 
2666  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
2667  // therefore the output will be 4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
2668  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
2669  std::vector<float> outputExpectedNoQuantizedValues =
2670  {
2671  6., 5., 5., 5.,
2672  6., 5., 5., 5.,
2673  6., 5., 5., 5.,
2674  3., 2., 2., 2.
2675  };
2676 
2677  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2678  workloadFactory,
2679  memoryManager,
2680  tensorHandleFactory,
2681  inputNoQuantizedValues,
2682  inputTensorInfo,
2683  kernelNoQuantizedValues,
2684  kernelTensorInfo,
2685  outputExpectedNoQuantizedValues,
2686  outputTensorInfo,
2687  3,
2688  3,
2689  layout,
2690  biasEnabled);
2691 }

◆ DepthwiseConvolution2dAsymmetricTest()

LayerTestResult<float, 4> DepthwiseConvolution2dAsymmetricTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3595 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3601 {
3602  return DepthwiseConvolution2dAsymmetricTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3603  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled, layout);
3604 }

◆ DepthwiseConvolution2dDepthMul1Int16Test()

LayerTestResult<int16_t, 4> DepthwiseConvolution2dDepthMul1Int16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3653 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3659 {
3660  return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3661  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3662 }

◆ DepthwiseConvolution2dDepthMul1Test()

LayerTestResult<float, 4> DepthwiseConvolution2dDepthMul1Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3541 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3547 {
3548  return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3549  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled, layout);
3550 }

◆ DepthwiseConvolution2dDepthMul1Uint8Test()

LayerTestResult<uint8_t, 4> DepthwiseConvolution2dDepthMul1Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3617 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3623 {
3624  return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3625  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3626 }

◆ DepthwiseConvolution2dDepthMul64Test()

LayerTestResult<float, 4> DepthwiseConvolution2dDepthMul64Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory 
)

Definition at line 3552 of file Conv2dTestImpl.cpp.

References armnn::Float32, armnn::GetDataTypeSize(), armnn::NCHW, armnnUtils::Permute(), and armnnUtils::Permuted().

Referenced by TEST_SUITE().

3556 {
3557  armnn::TensorInfo inputTensorInfo({ 1, 1, 2, 2 }, armnn::DataType::Float32);
3558  std::vector<float> input = { 1.f, 2.f, 3.f, 4.f };
3559 
3560  std::vector<float> kernelData;
3561  std::vector<float> singleDepthKernel{ 1.f, -1.f, -1.f, 1.f };
3562  for (unsigned int i = 0; i < 64; ++i)
3563  {
3564  kernelData.insert(kernelData.end(), singleDepthKernel.begin(), singleDepthKernel.end());
3565  }
3566  armnn::TensorInfo kernelTensorInfo({ 64, 1, 2, 2 }, armnn::DataType::Float32);
3567 
3568  // permute from [O,1,H,W] --> [1,H,W,O]
3569  armnn::PermutationVector permutationVector {3,0,1,2};
3570  kernelTensorInfo = armnnUtils::Permuted(kernelTensorInfo, permutationVector);
3571  std::vector<float> kernelPermuted(kernelTensorInfo.GetNumElements());
3572  armnnUtils::Permute(kernelTensorInfo.GetShape(), permutationVector,
3573  kernelData.data(), kernelPermuted.data(),
3574  GetDataTypeSize(kernelTensorInfo.GetDataType()));
3575 
3576  std::vector<float> expectedOutputData(64, 0.f);
3577  armnn::TensorInfo outputTensorInfo({ 1, 64, 1, 1 }, armnn::DataType::Float32);
3578 
3579  return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3580  workloadFactory,
3581  memoryManager,
3582  tensorHandleFactory,
3583  input,
3584  kernelPermuted,
3585  std::vector<float>(),
3586  expectedOutputData,
3587  inputTensorInfo.GetShape(),
3588  kernelTensorInfo.GetShape(),
3589  outputTensorInfo.GetShape(),
3590  0.f,
3591  0,
3592  armnn::DataLayout::NCHW);
3593 }
armnnUtils::Permute
void Permute(const armnn::TensorShape &dstShape, const armnn::PermutationVector &mappings, const void *src, void *dst, size_t dataTypeSize)
Definition: Permute.cpp:131
armnnUtils::Permuted
armnn::TensorShape Permuted(const armnn::TensorShape &srcShape, const armnn::PermutationVector &mappings)
Definition: Permute.cpp:98
armnn::GetDataTypeSize
constexpr unsigned int GetDataTypeSize(DataType dataType)
Definition: TypesUtils.hpp:151

◆ DepthwiseConvolution2dDepthNhwcTest()

LayerTestResult<float, 4> DepthwiseConvolution2dDepthNhwcTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled 
)

Definition at line 3531 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3536 {
3537  return DepthwiseConvolution2dNhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3538  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled);
3539 }

◆ DepthwiseConvolution2dInt16Test()

LayerTestResult<int16_t, 4> DepthwiseConvolution2dInt16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3642 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3648 {
3649  return DepthwiseConvolution2dTestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3650  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3651 }

◆ DepthwiseConvolution2dMult2Test()

LayerTestResult<T, 4> DepthwiseConvolution2dMult2Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2841 of file Conv2dTestImpl.cpp.

2847 {
2848  armnn::TensorInfo inputTensorInfo({1, 2, 3, 3}, ArmnnType);
2849  std::vector<float> inputNoQuantizedValues =
2850  {
2851  10.0, 10.0, 10.0,
2852  10.0, 10.0, 10.0,
2853  10.0, 10.0, 10.0,
2854 
2855  21.0, 22.0, 23.0,
2856  24.0, 25.0, 26.0,
2857  27.0, 28.0, 29.0
2858  };
2859 
2860  armnn::TensorInfo kernelTensorInfo({ 1, 2, 2, 4}, ArmnnType);
2861 
2862  std::vector<float> kernelNoQuantizedValues =
2863  {
2864  0.25f, 0.25f,
2865  0.25f, 0.25f,
2866 
2867  0.2f , 0.0f,
2868  0.0f , 0.0f,
2869 
2870  0.0f , 0.0f,
2871  0.0f , 0.1f,
2872 
2873  0.0f , 0.3f,
2874  0.0f , 0.0f
2875 
2876  };
2877 
2878  armnn::TensorInfo outputTensorInfo({ 1, 4, 2, 2}, ArmnnType);
2879  std::vector<float> outputExpectedNoQuantizedValues =
2880  {
2881  4.5f, 4.5f, 4.5f, 4.5f,
2882  5.5f, 5.5f, 5.5f, 5.5f,
2883  5.25f, 5.5f, 6.0f, 6.25f,
2884  7.65f, 8.0f, 8.7f, 9.05f
2885  };
2886 
2887 
2888  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2889  workloadFactory,
2890  memoryManager,
2891  tensorHandleFactory,
2892  inputNoQuantizedValues,
2893  inputTensorInfo,
2894  kernelNoQuantizedValues,
2895  kernelTensorInfo,
2896  outputExpectedNoQuantizedValues,
2897  outputTensorInfo,
2898  1,
2899  1,
2900  layout,
2901  biasEnabled);
2902 }

◆ DepthwiseConvolution2dMult4Test()

LayerTestResult<T, 4> DepthwiseConvolution2dMult4Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2766 of file Conv2dTestImpl.cpp.

2772 {
2773  armnn::TensorInfo inputTensorInfo({1, 2, 3, 3}, ArmnnType);
2774  std::vector<float> inputNoQuantizedValues =
2775  {
2776  10.0, 10.0, 10.0,
2777  10.0, 10.0, 10.0,
2778  10.0, 10.0, 10.0,
2779 
2780  21.0, 22.0, 23.0,
2781  24.0, 25.0, 26.0,
2782  27.0, 28.0, 29.0
2783  };
2784 
2785  armnn::TensorInfo kernelTensorInfo({ 1, 2, 2, 8}, ArmnnType);
2786 
2787  std::vector<float> kernelNoQuantizedValues =
2788  {
2789  0.25f, 0.25f,
2790  0.25f, 0.25f,
2791 
2792  0.25f, 0.25f,
2793  0.25f, 0.25f,
2794 
2795  0.0f , 0.0f,
2796  0.0f , 0.1f,
2797 
2798  0.0f , 0.0f,
2799  0.0f , 0.1f,
2800 
2801  0.2f , 0.0f,
2802  0.0f , 0.0f,
2803 
2804  0.2f , 0.0f,
2805  0.0f , 0.0f,
2806 
2807  0.0f , 0.3f,
2808  0.0f , 0.0f,
2809 
2810  0.0f , 0.3f,
2811  0.0f , 0.0f
2812  };
2813 
2814  armnn::TensorInfo outputTensorInfo({ 1, 8, 2, 2}, ArmnnType);
2815  std::vector<float> outputExpectedNoQuantizedValues =
2816  {
2817  4.5f, 4.5f, 4.5f, 4.5f, 5.5f, 5.5f, 5.5f, 5.5f,
2818  2.5f, 2.5f, 2.5f, 2.5f, 3.5f, 3.5f, 3.5f, 3.5f,
2819  10.05f, 10.5f, 11.4f, 11.85f, 12.75f, 13.3f, 14.4f, 14.95f,
2820  5.25f, 5.5f, 6.0f, 6.25f, 7.45f, 7.8f, 8.5f, 8.85f
2821  };
2822 
2823 
2824  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2825  workloadFactory,
2826  memoryManager,
2827  tensorHandleFactory,
2828  inputNoQuantizedValues,
2829  inputTensorInfo,
2830  kernelNoQuantizedValues,
2831  kernelTensorInfo,
2832  outputExpectedNoQuantizedValues,
2833  outputTensorInfo,
2834  1,
2835  1,
2836  layout,
2837  biasEnabled);
2838 }

◆ DepthwiseConvolution2dPerAxisQuantTest()

LayerTestResult<uint8_t, 4> DepthwiseConvolution2dPerAxisQuantTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 3664 of file Conv2dTestImpl.cpp.

References AllocateAndCopyDataToITensorHandle(), CopyDataFromITensorHandle(), CopyDataToITensorHandle(), ITensorHandleFactory::CreateTensorHandle(), IWorkloadFactory::CreateWorkload(), armnn::DepthwiseConvolution2d, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, DepthwiseConvolution2dDescriptor::m_StrideX, armnn::NCHW, and PermuteTensorNhwcToNchw().

Referenced by TEST_SUITE().

3669 {
3670  using namespace armnn;
3671 
3672  const DataType inputType = DataType::QAsymmU8;
3673  const DataType kernelType = DataType::QSymmS8;
3674  const DataType biasType = DataType::Signed32;
3675 
3676  TensorInfo inputInfo ({ 1, 3, 3, 2 }, inputType, 0.5f, 128); // N H W C
3677  TensorInfo outputInfo({ 1, 2, 2, 4 }, inputType, 1.0f, 128); // N H W C
3678 
3679  const std::vector<float> quantScales{ 1.0f, 0.5f, 1.0f, 0.5f };
3680  const unsigned int quantDimension = 3;
3681  TensorInfo kernelInfo({ 1, 2, 2, 4 }, kernelType, quantScales, quantDimension); // [1, H, W, I*M]
3682 
3683  const std::vector<float> biasQuantScales{ 0.5f, 0.25f, 0.5f, 0.25f };
3684  constexpr unsigned int biasQuantDimension = 0;
3685  TensorInfo biasInfo({ 4 }, biasType, biasQuantScales, biasQuantDimension);
3686 
3687  std::vector<uint8_t> inputData =
3688  {
3689  129, 130,
3690  129, 130,
3691  129, 130,
3692  129, 130,
3693  129, 130,
3694  129, 130,
3695  129, 130,
3696  129, 130,
3697  129, 130
3698  };
3699 
3700  std::vector<int8_t> kernelData =
3701  {
3702  1, 1, 1, 1,
3703  1, 1, 1, 1,
3704  1, 1, 1, 1,
3705  1, 1, 1, 1
3706  };
3707 
3708  std::vector<int32_t> biasData =
3709  {
3710  4, 4, 4, 4
3711  };
3712 
3713  std::vector<uint8_t> expectedOutputData =
3714  {
3715  132, 130, 134, 131,
3716  132, 130, 134, 131,
3717  132, 130, 134, 131,
3718  132, 130, 134, 131
3719  };
3720 
3721  if (layout == DataLayout::NCHW)
3722  {
3723  PermuteTensorNhwcToNchw(inputInfo, inputData);
3724  PermuteTensorNhwcToNchw(outputInfo, expectedOutputData);
3725  }
3726 
3727  std::vector<uint8_t> actualOutput(outputInfo.GetNumElements());
3728 
3729  DepthwiseConvolution2dDescriptor descriptor;
3730  descriptor.m_StrideX = 1;
3731  descriptor.m_StrideY = 1;
3732  descriptor.m_PadLeft = 0;
3733  descriptor.m_PadRight = 0;
3734  descriptor.m_PadTop = 0;
3735  descriptor.m_PadBottom = 0;
3736  descriptor.m_DilationX = 1;
3737  descriptor.m_DilationY = 1;
3738  descriptor.m_BiasEnabled = true;
3739  descriptor.m_DataLayout = layout;
3740 
3741  std::unique_ptr<ITensorHandle> inputHandle = tensorHandleFactory.CreateTensorHandle(inputInfo);
3742  std::unique_ptr<ITensorHandle> outputHandle = tensorHandleFactory.CreateTensorHandle(outputInfo);
3743 
3744  WorkloadInfo workloadInfo;
3745  ScopedTensorHandle weightTensor(kernelInfo);
3746  ScopedTensorHandle biasTensor(biasInfo);
3747 
3748  AllocateAndCopyDataToITensorHandle(&weightTensor, kernelData.data());
3749  AllocateAndCopyDataToITensorHandle(&biasTensor, biasData.data());
3750 
3751  DepthwiseConvolution2dQueueDescriptor queueDescriptor;
3752  queueDescriptor.m_Parameters = descriptor;
3753  queueDescriptor.m_Weight = &weightTensor;
3754  queueDescriptor.m_Bias = &biasTensor;
3755 
3756  AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3757  AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3758 
3759  std::unique_ptr<IWorkload> workload = workloadFactory.CreateWorkload(armnn::LayerType::DepthwiseConvolution2d,
3760  queueDescriptor,
3761  workloadInfo);
3762  inputHandle->Allocate();
3763  outputHandle->Allocate();
3764 
3765  CopyDataToITensorHandle(inputHandle.get(), inputData.data());
3766 
3767  ExecuteWorkload(*workload, memoryManager);
3768 
3769  LayerTestResult<uint8_t, 4> ret(outputInfo);
3770 
3771  CopyDataFromITensorHandle(actualOutput.data(), outputHandle.get());
3772 
3773  return LayerTestResult<uint8_t, 4>(actualOutput,
3774  expectedOutputData,
3775  outputHandle->GetShape(),
3776  outputInfo.GetShape());
3777 }
PermuteTensorNhwcToNchw
void PermuteTensorNhwcToNchw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
Definition: DataLayoutUtils.hpp:26
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
AllocateAndCopyDataToITensorHandle
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:19
armnn::DepthwiseConvolution2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:660
armnn::DataType
DataType
Definition: Types.hpp:35
CopyDataFromITensorHandle
void CopyDataFromITensorHandle(void *mem, const armnn::ITensorHandle *tensorHandle)
Definition: TensorCopyUtils.cpp:14
CopyDataToITensorHandle
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:9
armnn::WorkloadInfo
Contains information about TensorInfos of a layer.
Definition: WorkloadInfo.hpp:16
armnn::IWorkloadFactory::CreateWorkload
virtual std::unique_ptr< IWorkload > CreateWorkload(LayerType type, const QueueDescriptor &descriptor, const WorkloadInfo &info) const
Definition: WorkloadFactory.cpp:1541
armnn::ITensorHandleFactory::CreateTensorHandle
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo) const =0
armnn::DepthwiseConvolution2dDescriptor
A DepthwiseConvolution2dDescriptor for the DepthwiseConvolution2dLayer.
Definition: Descriptors.hpp:622
armnn::DepthwiseConvolution2dQueueDescriptor
Depthwise Convolution 2D layer workload data.
Definition: WorkloadData.hpp:235

◆ DepthwiseConvolution2dTest()

LayerTestResult<float, 4> DepthwiseConvolution2dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3520 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3526 {
3527  return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3528  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled, layout);
3529 }

◆ DepthwiseConvolution2dUint8Test()

LayerTestResult<uint8_t, 4> DepthwiseConvolution2dUint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3606 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3612 {
3613  return DepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3614  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3615 }

◆ SimpleConvolution2d3x3NhwcTest()

LayerTestResult<float, 4> SimpleConvolution2d3x3NhwcTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled 
)

Definition at line 3304 of file Conv2dTestImpl.cpp.

References armnn::NHWC.

Referenced by TEST_SUITE().

3309 {
3310  return SimpleConvolution2d3x3NhwcTestCommon<armnn::DataType::Float32>(
3311  workloadFactory,
3312  memoryManager,
3313  tensorHandleFactory,
3314  0.f,
3315  0,
3316  biasEnabled,
3317  armnn::DataLayout::NHWC);
3318 }

◆ SimpleConvolution2d3x3QSymm16Test()

LayerTestResult<int16_t, 4> SimpleConvolution2d3x3QSymm16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3359 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3365 {
3366  return SimpleConvolution2d3x3TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3367  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3368 }

◆ SimpleConvolution2d3x3Stride2x2Test()

LayerTestResult<float, 4> SimpleConvolution2d3x3Stride2x2Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3320 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3326 {
3327  return SimpleConvolution2d3x3Stride2x2TestCommon<armnn::DataType::Float32>(
3328  workloadFactory,
3329  memoryManager,
3330  tensorHandleFactory,
3331  0.f,
3332  0,
3333  biasEnabled,
3334  layout);
3335 }

◆ SimpleConvolution2d3x3Test()

LayerTestResult<float, 4> SimpleConvolution2d3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3293 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3299 {
3300  return SimpleConvolution2d3x3TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3301  workloadFactory, memoryManager, tensorHandleFactory, 0.f, 0, biasEnabled, layout);
3302 }

◆ SimpleConvolution2d3x3Uint8Test()

LayerTestResult<uint8_t, 4> SimpleConvolution2d3x3Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3337 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3343 {
3344  return SimpleConvolution2d3x3TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3345  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3346 }

◆ SimpleConvolution2d3x5QSymm16Test()

LayerTestResult<int16_t, 4> SimpleConvolution2d3x5QSymm16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3348 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3354 {
3355  return SimpleConvolution2d3x5TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3356  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3357 }

◆ SimpleConvolution2d3x5Test()

LayerTestResult<float, 4> SimpleConvolution2d3x5Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3271 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3277 {
3278  return SimpleConvolution2d3x5TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3279  workloadFactory, memoryManager, tensorHandleFactory, 0.f, 0, biasEnabled, layout);
3280 }

◆ SimpleConvolution2d3x5Uint8Test()

LayerTestResult<uint8_t, 4> SimpleConvolution2d3x5Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3282 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3288 {
3289  return SimpleConvolution2d3x5TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3290  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3291 }

◆ SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest()

LayerTestResult<float, 4> SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory 
)

Definition at line 3628 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3632 {
3633  return SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3634  workloadFactory,
3635  memoryManager,
3636  tensorHandleFactory,
3637  0.f,
3638  0,
3639  false);
3640 }