ArmNN
 21.11
Functions
Conv3dTestImpl.cpp File Reference
#include "Conv3dTestImpl.hpp"
#include <QuantizeHelper.hpp>
#include <armnnUtils/DataLayoutIndexed.hpp>
#include <backendsCommon/TensorHandle.hpp>
#include <backendsCommon/test/DataLayoutUtils.hpp>
#include <backendsCommon/test/TensorCopyUtils.hpp>
#include <backendsCommon/test/WorkloadTestUtils.hpp>
#include <test/TensorHelpers.hpp>

Go to the source code of this file.

Functions

template<armnn::DataType ArmnnType, typename T = armnn::ResolveType<ArmnnType>>
std::vector< T > GetBiasData (bool biasEnabled, float qScale, armnn::TensorInfo outputInfo, armnn::DataLayout layout)
 
template<typename T , typename B >
void ApplyBiasToData (std::vector< T > &v, const std::vector< B > &bias, float vScale, int32_t vOffset, float bScale, int32_t bOffset)
 
template<armnn::DataType ArmnnType>
void SetScaleOffset (float &qScale, int32_t &qOffset)
 
template<typename T >
std::vector< T > CreateQuantizedData (int32_t size, float qScale, int32_t qOffset)
 
template<typename T >
std::vector< T > CreateSmallQuantizedData (int32_t size, float divisor, float qScale, int32_t qOffset)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>, typename B = armnn::ResolveType<ArmnnBType>>
LayerTestResult< T, 5 > SimpleConvolution3dTestImpl (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< T > &input, const std::vector< T > &kernel, const std::vector< B > &bias, const std::vector< T > &outputExpected, const armnn::TensorShape &inputShape, const armnn::TensorShape &kernelShape, const armnn::TensorShape &outputExpectedShape, const armnn::DataLayout dataLayout, float qScale, int32_t qOffset, uint32_t strideX=1, uint32_t strideY=1, uint32_t strideZ=1, uint32_t dilationX=1, uint32_t dilationY=1, uint32_t dilationZ=1, uint32_t padLeft=0, uint32_t padTop=0, uint32_t padRight=0, uint32_t padBottom=0, uint32_t padFront=0, uint32_t padBack=0)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 5 > SimpleConvolution3d3x3x3TestCommon (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 5 > Convolution3d2x2x2Strides3x5x5TestCommon (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 5 > Convolution3d2x2x2Dilation2x2x2TestCommon (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 5 > Convolution3dPaddingSame3x3x3TestCommon (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< float, 5 > Convolution3dStrideDilationPadding3x3x3TestCommonFloat32 (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< float, 5 > Convolution3d2x2x2Stride3x3x3SmallTestCommonFloat32 (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< armnn::Half, 5 > Convolution3d2x3x3TestCommonFloat16 (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< armnn::Half, 5 > Convolution3d2x2x2SmallTestCommonFloat16 (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< float, 5 > SimpleConvolution3d3x3x3Float32Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< int8_t, 5 > SimpleConvolution3d3x3x3Int8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< uint8_t, 5 > SimpleConvolution3d3x3x3Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< int16_t, 5 > SimpleConvolution3d3x3x3Int16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< float, 5 > Convolution3d2x2x2Strides3x5x5Float32Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< int8_t, 5 > Convolution3d2x2x2Strides3x5x5Int8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< uint8_t, 5 > Convolution3d2x2x2Strides3x5x5Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< int16_t, 5 > Convolution3d2x2x2Strides3x5x5Int16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< float, 5 > Convolution3d2x2x2Dilation2x2x2Float32Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< int8_t, 5 > Convolution3d2x2x2Dilation2x2x2Int8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< uint8_t, 5 > Convolution3d2x2x2Dilation2x2x2Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< int16_t, 5 > Convolution3d2x2x2Dilation2x2x2Int16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< float, 5 > Convolution3dPaddingSame3x3x3Float32Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< int8_t, 5 > Convolution3dPaddingSame3x3x3Int8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< uint8_t, 5 > Convolution3dPaddingSame3x3x3Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< int16_t, 5 > Convolution3dPaddingSame3x3x3Int16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< float, 5 > Convolution3dStrideDilationPadding3x3x3Float32Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< float, 5 > Convolution3d2x2x2Stride3x3x3SmallFloat32Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< armnn::Half, 5 > Convolution3d2x3x3Float16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 
LayerTestResult< armnn::Half, 5 > Convolution3d2x2x2SmallFloat16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
 

Function Documentation

◆ ApplyBiasToData()

void ApplyBiasToData ( std::vector< T > &  v,
const std::vector< B > &  bias,
float  vScale,
int32_t  vOffset,
float  bScale,
int32_t  bOffset 
)

Definition at line 56 of file Conv3dTestImpl.cpp.

References ARMNN_ASSERT_MSG, and armnnUtils::SelectiveDequantize().

Referenced by SimpleConvolution3dTestImpl().

59 {
60  ARMNN_ASSERT_MSG((armnn::IsQuantizedType<T>() && vScale != 0.0f) || (!armnn::IsQuantizedType<T>()),
61  "Invalid type and parameter combination.");
62  ARMNN_ASSERT_MSG((armnn::IsQuantizedType<B>() && bScale != 0.0f) || (!armnn::IsQuantizedType<B>()),
63  "Invalid type and parameter combination.");
64 
65  for (uint32_t i = 0; i < bias.size(); ++i)
66  {
67  for (size_t j = i; j < v.size(); j+=bias.size())
68  {
69  // Note we need to dequantize and re-quantize the image value and the bias.
70  float dBias = SelectiveDequantize(bias[i], bScale, bOffset);
71 
72  T& outRef = v[j];
73  float dOutput = SelectiveDequantize(outRef, vScale, vOffset);
74  outRef = SelectiveQuantize<T>(dOutput + dBias, vScale, vOffset);
75  }
76  }
77 }
ARMNN_ASSERT_MSG
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
armnnUtils::SelectiveDequantize
float SelectiveDequantize(T value, float scale, int32_t offset)
Definition: QuantizeHelper.hpp:91

◆ Convolution3d2x2x2Dilation2x2x2Float32Test()

LayerTestResult<float, 5> Convolution3d2x2x2Dilation2x2x2Float32Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 946 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

952 {
953  return Convolution3d2x2x2Dilation2x2x2TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
954  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
955 }

◆ Convolution3d2x2x2Dilation2x2x2Int16Test()

LayerTestResult<int16_t, 5> Convolution3d2x2x2Dilation2x2x2Int16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 979 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

985 {
986  return Convolution3d2x2x2Dilation2x2x2TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
987  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
988 }

◆ Convolution3d2x2x2Dilation2x2x2Int8Test()

LayerTestResult<int8_t, 5> Convolution3d2x2x2Dilation2x2x2Int8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 957 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

963 {
964  return Convolution3d2x2x2Dilation2x2x2TestCommon<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
965  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
966 }

◆ Convolution3d2x2x2Dilation2x2x2TestCommon()

LayerTestResult<T, 5> Convolution3d2x2x2Dilation2x2x2TestCommon ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 443 of file Conv3dTestImpl.cpp.

449 {
450  float qScale;
451  int32_t qOffset;
452  SetScaleOffset<ArmnnType>(qScale, qOffset);
453 
454  armnn::TensorInfo inputDesc({ 1, 5, 5, 5, 2 }, ArmnnType);
455  std::vector<T> input = CreateQuantizedData<T>(250, qScale, qOffset);
456 
457  armnn::TensorInfo kernelDesc({ 2, 2, 2, 2, 2 }, ArmnnType);
458  std::vector<T> kernel = QuantizedVector<T>(
459  {
460  -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, 1, 1, 1, -1, -1,
461  1, 1, -1, 1, -1, 1, -1, 1, -1, -1, -1, 1, -1, 1, -1, 1,
462  },
463  qScale, qOffset);
464 
465  // Since the dilation rate is 3 this will dilate the kernel to be 4x4,
466  // therefore the output will be 2x2
467  armnn::TensorInfo outputDesc({ 1, 2, 2, 2, 2 }, ArmnnType);
468  std::vector<T> outputData = QuantizedVector<T>(
469  {
470  -1124, 974,
471  -1148, 978,
472 
473  -1244, 994,
474  -1268, 998,
475 
476  -1724, 1074,
477  -1748, 1078,
478 
479  -1844, 1094,
480  -1868, 1098
481  },
482  qScale, qOffset);
483 
484  return SimpleConvolution3dTestImpl<ArmnnType, ArmnnBType>(
485  workloadFactory,
486  memoryManager,
487  tensorHandleFactory,
488  input,
489  kernel,
490  GetBiasData<ArmnnBType>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
491  outputData,
492  inputDesc.GetShape(),
493  kernelDesc.GetShape(),
494  outputDesc.GetShape(),
495  dataLayout,
496  qScale,
497  qOffset,
498  1, // strideX
499  1, // strideY
500  1, // strideZ
501  3, // dilationX
502  3, // dilationY
503  3 // dilationZ
504  );
505 }

◆ Convolution3d2x2x2Dilation2x2x2Uint8Test()

LayerTestResult<uint8_t, 5> Convolution3d2x2x2Dilation2x2x2Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 968 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

974 {
975  return Convolution3d2x2x2Dilation2x2x2TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
976  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
977 }

◆ Convolution3d2x2x2SmallFloat16Test()

LayerTestResult<armnn::Half, 5> Convolution3d2x2x2SmallFloat16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 1067 of file Conv3dTestImpl.cpp.

References Convolution3d2x2x2SmallTestCommonFloat16().

Referenced by TEST_SUITE().

1073 {
1074  return Convolution3d2x2x2SmallTestCommonFloat16(
1075  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1076 }
Convolution3d2x2x2SmallTestCommonFloat16
LayerTestResult< armnn::Half, 5 > Convolution3d2x2x2SmallTestCommonFloat16(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
Definition: Conv3dTestImpl.cpp:794

◆ Convolution3d2x2x2SmallTestCommonFloat16()

LayerTestResult<armnn::Half, 5> Convolution3d2x2x2SmallTestCommonFloat16 ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 794 of file Conv3dTestImpl.cpp.

References armnn::Float16.

Referenced by Convolution3d2x2x2SmallFloat16Test().

800 {
801  using namespace half_float::literal;
802 
803  float qScale = 0.f;
804  int32_t qOffset = 0;
805 
806  armnn::TensorInfo inputDesc({ 1, 2, 4, 4, 1 }, armnn::DataType::Float16);
807  const std::vector<armnn::Half> input =
808  {
809  0.0367984_h, 0.0380895_h, 0.0420157_h, 0.0675631_h,
810  0.0938920_h, 0.0476106_h, 0.1035490_h, 0.1260370_h,
811  0.0461647_h, 0.0883828_h, 0.1159540_h, 0.0498519_h,
812  0.0104630_h, 0.0154114_h, 0.00137681_h, 0.0344238_h,
813 
814  0.0356445_h, 0.0495605_h, 0.0683594_h, 0.0991211_h,
815  0.0461426_h, 0.0996094_h, 0.1269530_h, 0.0393066_h,
816  0.103516_h, 0.032544_h, 0.124334_h, 0.0564566_h,
817  0.0123544_h, 0.0461647_h, 0.0883828_h, 0.1159540_h,
818  };
819 
820  armnn::TensorInfo kernelDesc({ 2, 2, 2, 1, 1 }, armnn::DataType::Float16);
821  std::vector<armnn::Half> kernel =
822  {
823  -0.126184_h, -0.150468_h,
824  -0.101412_h, -0.0586369_h,
825 
826  -0.0435089_h, 0.0347555_h,
827  0.0323111_h, 0.0385381_h
828  };
829 
830  armnn::TensorInfo outputDesc({ 1, 1, 3, 3, 1 }, armnn::DataType::Float16);
831  std::vector<armnn::Half> outputData =
832  {
833  -0.01718917_h, -0.01370182_h, -0.02727737_h,
834 
835  -0.02282543_h, -0.03144084_h, -0.04468598_h,
836 
837  -0.02228982_h, -0.02244923_h, -0.02042268_h
838  };
839 
840  return SimpleConvolution3dTestImpl<armnn::DataType::Float16, armnn::DataType::Float16>(
841  workloadFactory,
842  memoryManager,
843  tensorHandleFactory,
844  input,
845  kernel,
846  GetBiasData<armnn::DataType::Float16>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
847  outputData,
848  inputDesc.GetShape(),
849  kernelDesc.GetShape(),
850  outputDesc.GetShape(),
851  dataLayout,
852  qScale,
853  qOffset
854  );
855 }

◆ Convolution3d2x2x2Stride3x3x3SmallFloat32Test()

LayerTestResult<float, 5> Convolution3d2x2x2Stride3x3x3SmallFloat32Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 1045 of file Conv3dTestImpl.cpp.

References Convolution3d2x2x2Stride3x3x3SmallTestCommonFloat32().

Referenced by TEST_SUITE().

1051 {
1052  return Convolution3d2x2x2Stride3x3x3SmallTestCommonFloat32(
1053  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1054 }
Convolution3d2x2x2Stride3x3x3SmallTestCommonFloat32
LayerTestResult< float, 5 > Convolution3d2x2x2Stride3x3x3SmallTestCommonFloat32(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
Definition: Conv3dTestImpl.cpp:666

◆ Convolution3d2x2x2Stride3x3x3SmallTestCommonFloat32()

LayerTestResult<float, 5> Convolution3d2x2x2Stride3x3x3SmallTestCommonFloat32 ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 666 of file Conv3dTestImpl.cpp.

References armnn::Float32.

Referenced by Convolution3d2x2x2Stride3x3x3SmallFloat32Test().

672 {
673  float qScale = 0.f;
674  int32_t qOffset = 0;
675 
676  armnn::TensorInfo inputDesc({ 1, 3, 10, 10, 1 }, armnn::DataType::Float32);
677  std::vector<float> input = CreateSmallQuantizedData<float>(300, 100.0f, qScale, qOffset);
678 
679  armnn::TensorInfo kernelDesc({ 3, 3, 3, 1, 1 }, armnn::DataType::Float32);
680  std::vector<float> kernel =
681  {
682  0.125977f, 0.150391f, 0.101562f,
683  0.0585938f, 0.0864258f, 0.043457f,
684  0.034668f, 0.0322266f, 0.0385742f,
685 
686  0.125977f, 0.150391f, -0.101562f,
687  -0.0585938f,-0.0864258f,-0.043457f,
688  -0.0104630f, 0.0154114f, 0.0013768f,
689 
690  0.0344238f, 0.035644f, 0.0495605f,
691  0.0683594f, 0.099121f, -0.0461426f,
692  -0.0996094f,-0.126953f, -0.043457f,
693  };
694 
695  armnn::TensorInfo outputDesc({ 1, 1, 4, 4, 1 }, armnn::DataType::Float32);
696  std::vector<float> outputData =
697  {
698  -0.08156067f, -0.06891209f, -0.05589598f, -0.04310101f,
699  0.04584253f, 0.05855697f, 0.07129729f, 0.08325434f,
700  0.17304349f, 0.18521416f, 0.19818866f, 0.21096253f,
701  0.29965734f, 0.312698f, 0.32547557f, 0.33818722f
702  };
703 
704  return SimpleConvolution3dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
705  workloadFactory,
706  memoryManager,
707  tensorHandleFactory,
708  input,
709  kernel,
710  GetBiasData<armnn::DataType::Float32>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
711  outputData,
712  inputDesc.GetShape(),
713  kernelDesc.GetShape(),
714  outputDesc.GetShape(),
715  dataLayout,
716  qScale,
717  qOffset,
718  2, // strideX
719  2, // strideY
720  2 // strideZ
721  );
722 }

◆ Convolution3d2x2x2Strides3x5x5Float32Test()

LayerTestResult<float, 5> Convolution3d2x2x2Strides3x5x5Float32Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 902 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

908 {
909  return Convolution3d2x2x2Strides3x5x5TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
910  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
911 }

◆ Convolution3d2x2x2Strides3x5x5Int16Test()

LayerTestResult<int16_t, 5> Convolution3d2x2x2Strides3x5x5Int16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 935 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

941 {
942  return Convolution3d2x2x2Strides3x5x5TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
943  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
944 }

◆ Convolution3d2x2x2Strides3x5x5Int8Test()

LayerTestResult<int8_t, 5> Convolution3d2x2x2Strides3x5x5Int8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 913 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

919 {
920  return Convolution3d2x2x2Strides3x5x5TestCommon<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
921  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
922 }

◆ Convolution3d2x2x2Strides3x5x5TestCommon()

LayerTestResult<T, 5> Convolution3d2x2x2Strides3x5x5TestCommon ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 372 of file Conv3dTestImpl.cpp.

378 {
379  float qScale;
380  int32_t qOffset;
381  SetScaleOffset<ArmnnType>(qScale, qOffset);
382 
383  armnn::TensorInfo inputDesc({ 1, 3, 10, 10, 1 }, ArmnnType);
384  std::vector<T> input = CreateQuantizedData<T>(300, qScale, qOffset);
385 
386  armnn::TensorInfo kernelDesc({ 3, 5, 5, 1, 1 }, ArmnnType);
387  std::vector<T> kernel = QuantizedVector<T>(
388  {
389  1, 1, 1, 1, 1,
390  1, 1, 1, 1, 1,
391  1, 1, 1, 1, 1,
392  1, 1, 1, 1, 1,
393  1, 1, 1, 1, 1,
394 
395  0, 0, 0, 0, 0,
396  0, 0, 0, 0, 0,
397  0, 0, 0, 0, 0,
398  0, 0, 0, 0, 0,
399  0, 0, 0, 0, 0,
400 
401  2, 2, 2, 2, 2,
402  2, 2, 2, 2, 2,
403  2, 2, 2, 2, 2,
404  2, 2, 2, 2, 2,
405  2, 2, 2, 2, 2,
406  },
407  qScale, qOffset);
408 
409  armnn::TensorInfo outputDesc({ 1, 1, 3, 3, 1 }, ArmnnType);
410  std::vector<T> outputData = QuantizedVector<T>(
411  {
412  11650, 11800, 11950,
413 
414  13150, 13300, 13450,
415 
416  14650, 14800, 14950
417  },
418  qScale, qOffset);
419 
420  return SimpleConvolution3dTestImpl<ArmnnType, ArmnnBType>(
421  workloadFactory,
422  memoryManager,
423  tensorHandleFactory,
424  input,
425  kernel,
426  GetBiasData<ArmnnBType>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
427  outputData,
428  inputDesc.GetShape(),
429  kernelDesc.GetShape(),
430  outputDesc.GetShape(),
431  dataLayout,
432  qScale,
433  qOffset,
434  2, // strideX
435  2, // strideY
436  2 // strideZ
437  );
438 }

◆ Convolution3d2x2x2Strides3x5x5Uint8Test()

LayerTestResult<uint8_t, 5> Convolution3d2x2x2Strides3x5x5Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 924 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

930 {
931  return Convolution3d2x2x2Strides3x5x5TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
932  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
933 }

◆ Convolution3d2x3x3Float16Test()

LayerTestResult<armnn::Half, 5> Convolution3d2x3x3Float16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 1056 of file Conv3dTestImpl.cpp.

References Convolution3d2x3x3TestCommonFloat16().

Referenced by TEST_SUITE().

1062 {
1063  return Convolution3d2x3x3TestCommonFloat16(
1064  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1065 }
Convolution3d2x3x3TestCommonFloat16
LayerTestResult< armnn::Half, 5 > Convolution3d2x3x3TestCommonFloat16(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
Definition: Conv3dTestImpl.cpp:724

◆ Convolution3d2x3x3TestCommonFloat16()

LayerTestResult<armnn::Half, 5> Convolution3d2x3x3TestCommonFloat16 ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 724 of file Conv3dTestImpl.cpp.

References armnn::Float16.

Referenced by Convolution3d2x3x3Float16Test().

730 {
731  using namespace half_float::literal;
732 
733  float qScale = 0.f;
734  int32_t qOffset = 0;
735 
736  armnn::TensorInfo inputDesc({ 1, 2, 3, 3, 2 }, armnn::DataType::Float16);
737  const std::vector<armnn::Half> input =
738  {
739  1._h, 2._h, 3._h,
740  4._h, 5._h, 6._h,
741 
742  7._h, 8._h, 9._h,
743  10._h, 11._h, 12._h,
744 
745  13._h, 14._h, 15._h,
746  16._h, 17._h, 18._h,
747 
748  19._h, 20._h, 21._h,
749  22._h, 23._h, 24._h,
750 
751  25._h, 26._h, 27._h,
752  28._h, 29._h, 30._h,
753 
754  31._h, 32._h, 33._h,
755  34._h, 35._h, 36._h
756  };
757 
758  armnn::TensorInfo kernelDesc({ 2, 2, 2, 2, 2 }, armnn::DataType::Float16);
759  std::vector<armnn::Half> kernel =
760  {
761  -1._h, -1._h, -1._h, -1._h, -1._h, -1._h, -1._h, -1._h,
762  -1._h, -1._h, -1._h, 1._h, 1._h, 1._h, -1._h, -1._h,
763  1._h, 1._h, -1._h, 1._h, -1._h, 1._h, -1._h, 1._h,
764  -1._h, -1._h, -1._h, 1._h, -1._h, 1._h, -1._h, 1._h,
765  };
766 
767  armnn::TensorInfo outputDesc({ 1, 1, 2, 2, 2 }, armnn::DataType::Float16);
768  std::vector<armnn::Half> outputData =
769  {
770  -176._h, 128._h,
771  -200._h, 132._h,
772 
773  -248._h, 140._h,
774  -272._h, 144._h
775  };
776 
777  return SimpleConvolution3dTestImpl<armnn::DataType::Float16, armnn::DataType::Float16>(
778  workloadFactory,
779  memoryManager,
780  tensorHandleFactory,
781  input,
782  kernel,
783  GetBiasData<armnn::DataType::Float16>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
784  outputData,
785  inputDesc.GetShape(),
786  kernelDesc.GetShape(),
787  outputDesc.GetShape(),
788  dataLayout,
789  qScale,
790  qOffset
791  );
792 }

◆ Convolution3dPaddingSame3x3x3Float32Test()

LayerTestResult<float, 5> Convolution3dPaddingSame3x3x3Float32Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 990 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

996 {
997  return Convolution3dPaddingSame3x3x3TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
998  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
999 }

◆ Convolution3dPaddingSame3x3x3Int16Test()

LayerTestResult<int16_t, 5> Convolution3dPaddingSame3x3x3Int16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 1023 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

1029 {
1030  return Convolution3dPaddingSame3x3x3TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
1031  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1032 }

◆ Convolution3dPaddingSame3x3x3Int8Test()

LayerTestResult<int8_t, 5> Convolution3dPaddingSame3x3x3Int8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 1001 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

1007 {
1008  return Convolution3dPaddingSame3x3x3TestCommon<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
1009  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1010 }

◆ Convolution3dPaddingSame3x3x3TestCommon()

LayerTestResult<T, 5> Convolution3dPaddingSame3x3x3TestCommon ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 510 of file Conv3dTestImpl.cpp.

516 {
517  float qScale;
518  int32_t qOffset;
519  SetScaleOffset<ArmnnType>(qScale, qOffset);
520 
521  armnn::TensorInfo inputDesc({ 1, 5, 5, 5, 1 }, ArmnnType);
522  std::vector<T> input = CreateQuantizedData<T>(125, qScale, qOffset);
523 
524  armnn::TensorInfo kernelDesc({ 3, 3, 3, 1, 1 }, ArmnnType);
525  std::vector<T> kernel = QuantizedVector<T>(
526  {
527  1, 1, 1,
528  1, 1, 1,
529  1, 1, 1,
530 
531  0, 0, 0,
532  0, 0, 0,
533  0, 0, 0,
534 
535  1, 1, 1,
536  1, 1, 1,
537  1, 1, 1,
538  },
539  qScale, qOffset);
540 
541  armnn::TensorInfo outputDesc({ 1, 5, 5, 5, 1 }, ArmnnType);
542  std::vector<T> outputData = QuantizedVector<T>(
543  {
544  112, 171, 177, 183, 124,
545  183, 279, 288, 297, 201,
546  213, 324, 333, 342, 231,
547  243, 369, 378, 387, 261,
548  172, 261, 267, 273, 184,
549 
550  224, 342, 354, 366, 248,
551  366, 558, 576, 594, 402,
552  426, 648, 666, 684, 462,
553  486, 738, 756, 774, 522,
554  344, 522, 534, 546, 368,
555 
556  424, 642, 654, 666, 448,
557  666, 1008, 1026, 1044, 702,
558  726, 1098, 1116, 1134, 762,
559  786, 1188, 1206, 1224, 822,
560  544, 822, 834, 846, 568,
561  624, 942, 954, 966, 648,
562 
563  966, 1458, 1476, 1494, 1002,
564  1026, 1548, 1566, 1584, 1062,
565  1086, 1638, 1656, 1674, 1122,
566  744, 1122, 1134, 1146, 768,
567  312, 471, 477, 483, 324,
568  483, 729, 738, 747, 501,
569  513, 774, 783, 792, 531,
570  543, 819, 828, 837, 561,
571  372, 561, 567, 573, 384
572  },
573  qScale, qOffset);
574 
575  return SimpleConvolution3dTestImpl<ArmnnType, ArmnnBType>(
576  workloadFactory,
577  memoryManager,
578  tensorHandleFactory,
579  input,
580  kernel,
581  GetBiasData<ArmnnBType>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
582  outputData,
583  inputDesc.GetShape(),
584  kernelDesc.GetShape(),
585  outputDesc.GetShape(),
586  dataLayout,
587  qScale,
588  qOffset,
589  1, // strideX
590  1, // strideY
591  1, // strideZ
592  1, // dilationX
593  1, // dilationY
594  1, // dilationZ
595  1, // padLeft
596  1, // padTop
597  1, // padRight
598  1, // padBottom
599  1, // padFront
600  1 // padBack
601  );
602 }

◆ Convolution3dPaddingSame3x3x3Uint8Test()

LayerTestResult<uint8_t, 5> Convolution3dPaddingSame3x3x3Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 1012 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

1018 {
1019  return Convolution3dPaddingSame3x3x3TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
1020  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1021 }

◆ Convolution3dStrideDilationPadding3x3x3Float32Test()

LayerTestResult<float, 5> Convolution3dStrideDilationPadding3x3x3Float32Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 1034 of file Conv3dTestImpl.cpp.

References Convolution3dStrideDilationPadding3x3x3TestCommonFloat32().

Referenced by TEST_SUITE().

1040 {
1041  return Convolution3dStrideDilationPadding3x3x3TestCommonFloat32(
1042  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
1043 }
Convolution3dStrideDilationPadding3x3x3TestCommonFloat32
LayerTestResult< float, 5 > Convolution3dStrideDilationPadding3x3x3TestCommonFloat32(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, armnn::DataLayout dataLayout)
Definition: Conv3dTestImpl.cpp:604

◆ Convolution3dStrideDilationPadding3x3x3TestCommonFloat32()

LayerTestResult<float, 5> Convolution3dStrideDilationPadding3x3x3TestCommonFloat32 ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 604 of file Conv3dTestImpl.cpp.

References armnn::Float32.

Referenced by Convolution3dStrideDilationPadding3x3x3Float32Test().

610 {
611  float qScale = 0.f;
612  int32_t qOffset = 0;
613 
614  armnn::TensorInfo inputDesc({ 1, 3, 10, 10, 2 }, armnn::DataType::Float32);
615  std::vector<float> input = CreateSmallQuantizedData<float>(600, 100.0f, qScale, qOffset);
616 
617  armnn::TensorInfo kernelDesc({ 3, 3, 3, 2, 2 }, armnn::DataType::Float32);
618  std::vector<float> kernel = CreateSmallQuantizedData<float>(108, 100.0f, qScale, qOffset);
619 
620  // Since the dilation rate is 2 this will dilate the kernel to be 5x5: d(K-1)+1 --> 2 x (3-1) + 1 = 5,
621  // therefore the output will be 1x4x4: (I − K + 2P)/S +1 => trunc((10 - 3 + 2x2 )/3 + 1))
622  // where, dilation size = d = 2; kernel size = K = 3; input size = I = 10; padding size = P = 2; stride = S = 3
623  armnn::TensorInfo outputDesc({ 1, 1, 4, 4, 2 }, armnn::DataType::Float32);
624  std::vector<float> outputData =
625  {
626  12.0312f, 12.2268f, 17.7512f, 18.0494f,
627  18.176f, 18.4814f, 5.6912f, 5.7938f,
628  19.1664f, 19.5078f, 28.119f, 28.6383f,
629  28.6914f, 29.2215f, 8.9094f, 9.0873f,
630 
631  23.1264f, 23.5398f, 33.843f, 34.4703f,
632  34.4154f, 35.0535f, 10.6734f, 10.8873f,
633  6.2712f, 6.417f, 9.0718f, 9.2929f,
634  9.2194f, 9.4441f, 2.7862f, 2.8615f
635  };
636 
637  return SimpleConvolution3dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
638  workloadFactory,
639  memoryManager,
640  tensorHandleFactory,
641  input,
642  kernel,
643  GetBiasData<armnn::DataType::Float32>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
644  outputData,
645  inputDesc.GetShape(),
646  kernelDesc.GetShape(),
647  outputDesc.GetShape(),
648  dataLayout,
649  qScale,
650  qOffset,
651  3, // strideX
652  3, // strideY
653  3, // strideZ
654  2, // dilationX
655  2, // dilationY
656  2, // dilationZ
657  1, // padLeft
658  1, // padTop
659  1, // padRight
660  1, // padBottom
661  1, // padFront
662  1 // padBack
663  );
664 }

◆ CreateQuantizedData()

std::vector<T> CreateQuantizedData ( int32_t  size,
float  qScale,
int32_t  qOffset 
)

Definition at line 117 of file Conv3dTestImpl.cpp.

118 {
119  std::vector<float> data;
120  for (int32_t i = 0; i < size; ++i)
121  {
122  data.push_back(static_cast<float>(i));
123  }
124 
125  return QuantizedVector<T>(data, qScale, qOffset);
126 }

◆ CreateSmallQuantizedData()

std::vector<T> CreateSmallQuantizedData ( int32_t  size,
float  divisor,
float  qScale,
int32_t  qOffset 
)

Definition at line 130 of file Conv3dTestImpl.cpp.

References B.

131 {
132  std::vector<float> data;
133  for (int32_t i = 0; i < size; ++i)
134  {
135  float value = static_cast<float>(i);
136  data.push_back(value/divisor);
137  }
138 
139  return QuantizedVector<T>(data, qScale, qOffset);;
140 }

◆ GetBiasData()

std::vector<T> GetBiasData ( bool  biasEnabled,
float  qScale,
armnn::TensorInfo  outputInfo,
armnn::DataLayout  layout 
)

Definition at line 28 of file Conv3dTestImpl.cpp.

References DataLayoutIndexed::GetChannelsIndex(), and TensorInfo::GetShape().

29 {
30  if(!biasEnabled)
31  {
32  return std::vector<T>();
33  }
34  else
35  {
36  const armnnUtils::DataLayoutIndexed dataLayoutIndexed(layout);
37  const unsigned int outputChannels = outputInfo.GetShape()[dataLayoutIndexed.GetChannelsIndex()];
38 
39  switch (outputChannels)
40  {
41  case 1:
42  {
43  return QuantizedVector<T>({2}, qScale, 0);
44  }
45  case 2:
46  default:
47  {
48  return QuantizedVector<T>({0, 2}, qScale, 0);
49  }
50  }
51  }
52 }
armnn::TensorInfo::GetShape
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
armnnUtils::DataLayoutIndexed
Provides access to the appropriate indexes for Channels, Height and Width based on DataLayout...
Definition: DataLayoutIndexed.hpp:17

◆ SetScaleOffset()

void SetScaleOffset ( float &  qScale,
int32_t &  qOffset 
)

Definition at line 81 of file Conv3dTestImpl.cpp.

References armnn::BFloat16, armnn::Float16, armnn::Float32, armnn::QAsymmS8, armnn::QAsymmU8, and armnn::QSymmS16.

82 {
83  switch (ArmnnType)
84  {
85  case armnn::DataType::QAsymmU8:
86  {
87  qScale = 0.1f;
88  qOffset = 128;
89  break;
90  }
91  case armnn::DataType::QAsymmS8:
92  {
93  qScale = 0.1f;
94  qOffset = 64;
95  break;
96  }
97  case armnn::DataType::QSymmS16:
98  {
99  qScale = 0.1f;
100  qOffset = 0;
101  break;
102  }
103  case armnn::DataType::BFloat16:
104  case armnn::DataType::Float16:
105  case armnn::DataType::Float32:
106  default:
107  {
108  qScale = 1.f;
109  qOffset = 0;
110  break;
111  }
112  }
113 }

◆ SimpleConvolution3d3x3x3Float32Test()

LayerTestResult<float, 5> SimpleConvolution3d3x3x3Float32Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 857 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

863 {
864  return SimpleConvolution3d3x3x3TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
865  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
866 }

◆ SimpleConvolution3d3x3x3Int16Test()

LayerTestResult<int16_t, 5> SimpleConvolution3d3x3x3Int16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 890 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

896 {
897  return SimpleConvolution3d3x3x3TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
898  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
899 }

◆ SimpleConvolution3d3x3x3Int8Test()

LayerTestResult<int8_t, 5> SimpleConvolution3d3x3x3Int8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 868 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

874 {
875  return SimpleConvolution3d3x3x3TestCommon<armnn::DataType::QAsymmS8, armnn::DataType::Signed32>(
876  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
877 }

◆ SimpleConvolution3d3x3x3TestCommon()

LayerTestResult<T, 5> SimpleConvolution3d3x3x3TestCommon ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 304 of file Conv3dTestImpl.cpp.

310 {
311  float qScale;
312  int32_t qOffset;
313  SetScaleOffset<ArmnnType>(qScale, qOffset);
314 
315  armnn::TensorInfo inputDesc({ 1, 5, 5, 5, 1 }, ArmnnType);
316  std::vector<T> input = CreateQuantizedData<T>(125, qScale, qOffset);
317 
318  armnn::TensorInfo kernelDesc({ 3, 3, 3, 1, 1 }, ArmnnType);
319  std::vector<T> kernel = QuantizedVector<T>(
320  {
321  1, 1, 1,
322  1, 1, 1,
323  1, 1, 1,
324 
325  0, 0, 0,
326  0, 1, 0,
327  0, 0, 0,
328 
329  1, 1, 1,
330  1, 1, 1,
331  1, 1, 1,
332  },
333  qScale, qOffset);
334 
335  armnn::TensorInfo outputDesc({ 1, 3, 3, 3, 1 }, ArmnnType);
336  std::vector<T> outputData = QuantizedVector<T>(
337  {
338  589, 608, 627,
339  684, 703, 722,
340  779, 798, 817,
341 
342  1064, 1083, 1102,
343  1159, 1178, 1197,
344  1254, 1273, 1292,
345 
346  1539, 1558, 1577,
347  1634, 1653, 1672,
348  1729, 1748, 1767
349  },
350  qScale, qOffset);
351 
352  return SimpleConvolution3dTestImpl<ArmnnType, ArmnnBType>(
353  workloadFactory,
354  memoryManager,
355  tensorHandleFactory,
356  input,
357  kernel,
358  GetBiasData<ArmnnBType>(biasEnabled, qScale * qScale, outputDesc, dataLayout),
359  outputData,
360  inputDesc.GetShape(),
361  kernelDesc.GetShape(),
362  outputDesc.GetShape(),
363  dataLayout,
364  qScale,
365  qOffset
366  );
367 }

◆ SimpleConvolution3d3x3x3Uint8Test()

LayerTestResult<uint8_t, 5> SimpleConvolution3d3x3x3Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
armnn::DataLayout  dataLayout 
)

Definition at line 879 of file Conv3dTestImpl.cpp.

Referenced by TEST_SUITE().

885 {
886  return SimpleConvolution3d3x3x3TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
887  workloadFactory, memoryManager, tensorHandleFactory, biasEnabled, dataLayout);
888 }

◆ SimpleConvolution3dTestImpl()

LayerTestResult<T, 5> SimpleConvolution3dTestImpl ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const std::vector< T > &  input,
const std::vector< T > &  kernel,
const std::vector< B > &  bias,
const std::vector< T > &  outputExpected,
const armnn::TensorShape &  inputShape,
const armnn::TensorShape &  kernelShape,
const armnn::TensorShape &  outputExpectedShape,
const armnn::DataLayout  dataLayout,
float  qScale,
int32_t  qOffset,
uint32_t  strideX = 1,
uint32_t  strideY = 1,
uint32_t  strideZ = 1,
uint32_t  dilationX = 1,
uint32_t  dilationY = 1,
uint32_t  dilationZ = 1,
uint32_t  padLeft = 0,
uint32_t  padTop = 0,
uint32_t  padRight = 0,
uint32_t  padBottom = 0,
uint32_t  padFront = 0,
uint32_t  padBack = 0 
)

Definition at line 150 of file Conv3dTestImpl.cpp.

References ApplyBiasToData(), ARMNN_ASSERT, CopyDataFromITensorHandle(), CopyDataToITensorHandle(), IWorkloadFactory::CreateConvolution3d(), ITensorHandleFactory::CreateTensorHandle(), armnn::info, Convolution3dDescriptor::m_BiasEnabled, Convolution3dDescriptor::m_DataLayout, Convolution3dDescriptor::m_DilationX, Convolution3dDescriptor::m_DilationY, Convolution3dDescriptor::m_DilationZ, Convolution3dDescriptor::m_PadBack, Convolution3dDescriptor::m_PadBottom, Convolution3dDescriptor::m_PadFront, Convolution3dDescriptor::m_PadLeft, Convolution3dDescriptor::m_PadRight, Convolution3dDescriptor::m_PadTop, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, Convolution3dDescriptor::m_StrideX, Convolution3dDescriptor::m_StrideY, Convolution3dDescriptor::m_StrideZ, armnn::NCDHW, armnn::numeric_cast(), and PermuteTensorNdhwcToNcdhw().

176 {
177  unsigned int inputNum = armnn::numeric_cast<unsigned int>(inputShape[0]);
178  unsigned int inputDepth = armnn::numeric_cast<unsigned int>(inputShape[1]);
179  unsigned int inputHeight = armnn::numeric_cast<unsigned int>(inputShape[2]);
180  unsigned int inputWidth = armnn::numeric_cast<unsigned int>(inputShape[3]);
181  unsigned int inputChannels = armnn::numeric_cast<unsigned int>(inputShape[4]);
182 
183  // Conv3d weights/kernel layout: [D,H,W,I,O]
184  unsigned int kernelDepth = armnn::numeric_cast<unsigned int>(kernelShape[0]);
185  unsigned int kernelHeight = armnn::numeric_cast<unsigned int>(kernelShape[1]);
186  unsigned int kernelWidth = armnn::numeric_cast<unsigned int>(kernelShape[2]);
187  unsigned int kernelInChannels = armnn::numeric_cast<unsigned int>(kernelShape[3]);
188  unsigned int kernelOutChannels = armnn::numeric_cast<unsigned int>(kernelShape[4]);
189 
190  unsigned int outputNum = armnn::numeric_cast<unsigned int>(outputExpectedShape[0]);
191  unsigned int outputDepth = armnn::numeric_cast<unsigned int>(outputExpectedShape[1]);
192  unsigned int outputHeight = armnn::numeric_cast<unsigned int>(outputExpectedShape[2]);
193  unsigned int outputWidth = armnn::numeric_cast<unsigned int>(outputExpectedShape[3]);
194  unsigned int outputChannels = armnn::numeric_cast<unsigned int>(outputExpectedShape[4]);
195 
196  bool biasEnabled = bias.size() > 0;
197 
198  // If a bias is used, its size must equal the number of output channels.
199  ARMNN_ASSERT(!biasEnabled || bias.size() == outputChannels);
200 
201  // Creates the tensors.
202  armnn::TensorInfo inputTensorInfo({inputNum, inputDepth, inputHeight, inputWidth, inputChannels}, ArmnnType);
203  armnn::TensorInfo outputTensorInfo({outputNum, outputDepth, outputHeight, outputWidth, outputChannels}, ArmnnType);
204  armnn::TensorInfo kernelDesc({kernelDepth, kernelHeight, kernelWidth, kernelInChannels, kernelOutChannels},
205  ArmnnType);
206  armnn::TensorInfo biasDesc({static_cast<unsigned int>(bias.size())}, ArmnnBType);
207 
208  // Set quantization parameters if the requested type is a quantized type.
209  if(armnn::IsQuantizedType<T>())
210  {
211  inputTensorInfo.SetQuantizationScale(qScale);
212  inputTensorInfo.SetQuantizationOffset(qOffset);
213  outputTensorInfo.SetQuantizationScale(qScale);
214  outputTensorInfo.SetQuantizationOffset(qOffset);
215  kernelDesc.SetQuantizationScale(qScale);
216  kernelDesc.SetQuantizationOffset(qOffset);
217  biasDesc.SetQuantizationScale(qScale*qScale);
218  biasDesc.SetQuantizationOffset(0);
219  }
220 
221  // Construct the input data.
222  std::vector<T> inputData;
223  inputData.assign(input.data(), input.data() + inputNum*inputDepth*inputHeight*inputWidth*inputChannels);
224 
225  // Construct the output data and apply bias if needed.
226  std::vector<T> outputData;
227  outputData.assign(outputExpected.data(), outputExpected.data() +
228  outputNum*outputDepth*outputHeight*outputWidth*outputChannels);
229 
230  if (biasEnabled)
231  {
232  ApplyBiasToData(outputData, bias,
233  outputTensorInfo.GetQuantizationScale(), outputTensorInfo.GetQuantizationOffset(),
234  biasDesc.GetQuantizationScale(), biasDesc.GetQuantizationOffset());
235  }
236 
237  // Permute input and output if data layout is NCDHW.
238  if (dataLayout == armnn::DataLayout::NCDHW)
239  {
240  PermuteTensorNdhwcToNcdhw(inputTensorInfo, inputData);
241  PermuteTensorNdhwcToNcdhw(outputTensorInfo, outputData);
242  }
243 
244  std::vector<T> actualOutput(outputTensorInfo.GetNumElements());
245 
246  std::unique_ptr<armnn::ITensorHandle> input0Handle = tensorHandleFactory.CreateTensorHandle(inputTensorInfo);
247  std::unique_ptr<armnn::ITensorHandle> input1Handle = tensorHandleFactory.CreateTensorHandle(kernelDesc);
248  std::unique_ptr<armnn::ITensorHandle> outputHandle = tensorHandleFactory.CreateTensorHandle(outputTensorInfo);
249 
250  armnn::Convolution3dQueueDescriptor data;
251  data.m_Parameters.m_StrideX = strideX;
252  data.m_Parameters.m_StrideY = strideY;
253  data.m_Parameters.m_StrideZ = strideZ;
254  data.m_Parameters.m_PadLeft = padLeft;
255  data.m_Parameters.m_PadRight = padRight;
256  data.m_Parameters.m_PadTop = padTop;
257  data.m_Parameters.m_PadBottom = padBottom;
258  data.m_Parameters.m_PadFront = padFront;
259  data.m_Parameters.m_PadBack = padBack;
260  data.m_Parameters.m_DilationX = dilationX;
261  data.m_Parameters.m_DilationY = dilationY;
262  data.m_Parameters.m_DilationZ = dilationZ;
263  data.m_Parameters.m_DataLayout = dataLayout;
264  data.m_Parameters.m_BiasEnabled = biasEnabled;
265 
266  armnn::WorkloadInfo info;
267  AddInputToWorkload(data, info, inputTensorInfo, input0Handle.get());
268  AddInputToWorkload(data, info, kernelDesc, input1Handle.get());
269  AddOutputToWorkload(data, info, outputTensorInfo, outputHandle.get());
270 
271  std::unique_ptr<armnn::ITensorHandle> input2Handle = nullptr;
272  if (biasEnabled)
273  {
274  input2Handle = tensorHandleFactory.CreateTensorHandle(biasDesc);
275  AddInputToWorkload(data, info, biasDesc, input2Handle.get());
276  }
277 
278  std::unique_ptr<armnn::IWorkload> workload = workloadFactory.CreateConvolution3d(data, info);
279  input0Handle->Allocate();
280  input1Handle->Allocate();
281  outputHandle->Allocate();
282 
283  CopyDataToITensorHandle(input0Handle.get(), inputData.data());
284  CopyDataToITensorHandle(input1Handle.get(), kernel.data());
285  if (biasEnabled)
286  {
287  input2Handle->Allocate();
288  CopyDataToITensorHandle(input2Handle.get(), bias.data());
289  }
290 
291  ExecuteWorkload(*workload, memoryManager);
292 
293  CopyDataFromITensorHandle(actualOutput.data(), outputHandle.get());
294 
295  return LayerTestResult<T, 5>(actualOutput,
296  outputData,
297  outputHandle->GetShape(),
298  outputTensorInfo.GetShape());
299 }
PermuteTensorNdhwcToNcdhw
void PermuteTensorNdhwcToNcdhw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
Definition: DataLayoutUtils.hpp:39
armnn::Convolution3dDescriptor::m_PadBack
uint32_t m_PadBack
Padding back value in the depth dimension.
Definition: Descriptors.hpp:515
armnn::Convolution3dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:517
armnn::Convolution3dDescriptor::m_PadBottom
uint32_t m_PadBottom
Padding bottom value in the height dimension.
Definition: Descriptors.hpp:511
armnn::Convolution3dDescriptor::m_BiasEnabled
bool m_BiasEnabled
Enable/disable bias.
Definition: Descriptors.hpp:529
armnn::Convolution3dDescriptor::m_DilationX
uint32_t m_DilationX
Dilation along x axis.
Definition: Descriptors.hpp:523
armnn::Convolution3dDescriptor::m_StrideY
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
Definition: Descriptors.hpp:519
ApplyBiasToData
void ApplyBiasToData(std::vector< T > &v, const std::vector< B > &bias, float vScale, int32_t vOffset, float bScale, int32_t bOffset)
Definition: Conv3dTestImpl.cpp:56
ARMNN_ASSERT
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
armnn::Convolution3dDescriptor::m_PadFront
uint32_t m_PadFront
Padding front value in the depth dimension.
Definition: Descriptors.hpp:513
CopyDataFromITensorHandle
void CopyDataFromITensorHandle(void *memory, const armnn::ITensorHandle *tensorHandle)
Definition: TensorCopyUtils.cpp:14
armnn::Convolution3dDescriptor::m_PadLeft
uint32_t m_PadLeft
Padding left value in the width dimension.
Definition: Descriptors.hpp:505
armnn::Convolution3dDescriptor::m_PadRight
uint32_t m_PadRight
Padding right value in the width dimension.
Definition: Descriptors.hpp:507
armnn::IWorkloadFactory::CreateConvolution3d
virtual std::unique_ptr< IWorkload > CreateConvolution3d(const Convolution3dQueueDescriptor &descriptor, const WorkloadInfo &info) const
Definition: WorkloadFactory.cpp:1597
armnn::Convolution3dDescriptor::m_DataLayout
DataLayout m_DataLayout
The data layout to be used (NDHWC, NCDHW).
Definition: Descriptors.hpp:531
armnn::Convolution3dDescriptor::m_PadTop
uint32_t m_PadTop
Padding top value in the height dimension.
Definition: Descriptors.hpp:509
armnn::numeric_cast
std::enable_if_t< std::is_unsigned< Source >::value &&std::is_unsigned< Dest >::value, Dest > numeric_cast(Source source)
Definition: NumericCast.hpp:35
armnn::WorkloadInfo
Contains information about TensorInfos of a layer.
Definition: WorkloadInfo.hpp:16
armnn::Convolution3dDescriptor::m_DilationZ
uint32_t m_DilationZ
Dilation along z axis.
Definition: Descriptors.hpp:527
armnn::ITensorHandleFactory::CreateTensorHandle
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo) const =0
armnn::Convolution3dDescriptor::m_StrideZ
uint32_t m_StrideZ
Stride value when proceeding through input for the depth dimension.
Definition: Descriptors.hpp:521
armnn::Convolution3dDescriptor::m_DilationY
uint32_t m_DilationY
Dilation along y axis.
Definition: Descriptors.hpp:525
CopyDataToITensorHandle
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:9