ArmNN
 21.11
Functions
Conv2dTestImpl.hpp File Reference
#include "LayerTestResult.hpp"
#include <ResolveType.hpp>
#include <armnn/Types.hpp>
#include <armnn/backends/IBackendInternal.hpp>
#include <backendsCommon/WorkloadFactory.hpp>

Go to the source code of this file.

Functions

template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > Convolution2d3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > Convolution2d2x3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x5Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x3Stride2x2Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleConvolution2d3x3NhwcTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
 
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x5Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > SimpleConvolution2d3x3Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x5QSymm16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > SimpleConvolution2d3x3QSymm16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution2dAsymmetricPaddingTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution1dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
 
LayerTestResult< uint8_t, 4 > Convolution1dUint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
 
LayerTestResult< float, 4 > CompareConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory)
 
LayerTestResult< uint8_t, 4 > Convolution2dPerAxisQuantTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > Convolution2d3x3Stride2x2BFloat16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout &dataLayout)
 
LayerTestResult< float, 4 > Convolution2d3x3Stride2x2BFloat16SmallValueTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout &dataLayout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2d3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2d2x3x3Dilation3x3Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2dMult4Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T = armnn::ResolveType<ArmnnType>>
LayerTestResult< T, 4 > DepthwiseConvolution2dMult2Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<typename T >
LayerTestResult< T, 4 > CompareDepthwiseConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthNhwcTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul1Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dDepthMul64Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory)
 
LayerTestResult< float, 4 > DepthwiseConvolution2dAsymmetricTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory)
 
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dUint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dDepthMul1Uint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dInt16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< int16_t, 4 > DepthwiseConvolution2dDepthMul1Int16Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > DepthwiseConvolution2dPerAxisQuantTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< float, 4 > CompareDepthwiseConvolution2dFloatTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > CompareDepthwiseConvolution2dUint8Test (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, armnn::IWorkloadFactory &refWorkloadFactory, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::ITensorHandleFactory &refTensorHandleFactory, const armnn::DataLayout layout)
 

Function Documentation

◆ CompareConvolution2dTest()

LayerTestResult<float, 4> CompareConvolution2dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::ITensorHandleFactory &  refTensorHandleFactory 
)

Definition at line 3493 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3499 {
3500  return CompareConvolution2dTestImpl<armnn::DataType::Float32>(
3501  workloadFactory, memoryManager, refWorkloadFactory, tensorHandleFactory, refTensorHandleFactory);
3502 }

◆ CompareDepthwiseConvolution2dFloatTest()

LayerTestResult<float, 4> CompareDepthwiseConvolution2dFloatTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::ITensorHandleFactory &  refTensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 3761 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3768 {
3769  return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::Float32>(
3770  workloadFactory, memoryManager, refWorkloadFactory, tensorHandleFactory, refTensorHandleFactory, layout);
3771 }

◆ CompareDepthwiseConvolution2dTest()

LayerTestResult<T, 4> CompareDepthwiseConvolution2dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::ITensorHandleFactory &  refTensorHandleFactory,
const armnn::DataLayout  layout 
)

◆ CompareDepthwiseConvolution2dUint8Test()

LayerTestResult<uint8_t, 4> CompareDepthwiseConvolution2dUint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
armnn::IWorkloadFactory &  refWorkloadFactory,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::ITensorHandleFactory &  refTensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 3773 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3780 {
3781  return CompareDepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8>(
3782  workloadFactory, memoryManager, refWorkloadFactory, tensorHandleFactory, refTensorHandleFactory, layout);
3783 }

◆ Convolution1dTest()

LayerTestResult<float, 4> Convolution1dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled 
)

Definition at line 3377 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3382 {
3383  return Convolution1dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3384  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled);
3385 }

◆ Convolution1dUint8Test()

LayerTestResult<uint8_t, 4> Convolution1dUint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled 
)

Definition at line 3387 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3392 {
3393  return Convolution1dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3394  workloadFactory, memoryManager, tensorHandleFactory, 0.1f, 128, biasEnabled);
3395 }

◆ Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test()

LayerTestResult<T, 4> Convolution2d2x2Dilation2x2Padding2x2Stride3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 1244 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

1250 {
1251  armnn::TensorInfo inputTensorInfo({ 1, 1, 10, 10 }, ArmnnType);
1252  std::vector<float> inputNoQuantizedValues =
1253  {
1254  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1255  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1256  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1257  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1258  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1259  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1260  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1261  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1262  1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1263  1, 1, 1, 1, 1, 1, 1, 1, 1, 1
1264  };
1265 
1266  armnn::TensorInfo kernelTensorInfo({ 1, 1, 2, 2 }, ArmnnType);
1267  std::vector<float> kernelNoQuantizedValues =
1268  {
1269  1, 2,
1270  3, 4
1271  };
1272 
1273  // Since the dilation rate is 2 this will dilate the kernel to be like 3x3: d(K-1)+1 --> 2 x (2-1) + 1 = 3,
1274  // therefore the output will be 4x4: (I − K + 2P)/S +1 => trunc ( (10 - 3 + 2x2 ) / 3 + 1 )
1275  // where, dilation size = d = 2; kernel size = K = 2; input size = I = 10; padding size = P = 2; stride = S = 3
1276  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
1277  std::vector<float> outputExpectedNoQuantizedValues =
1278  {
1279  4, 7, 7, 3,
1280  6, 10, 10, 4,
1281  6, 10, 10, 4,
1282  2, 3, 3, 1
1283  };
1284  uint32_t padLeft = 1;
1285  uint32_t padTop = 1;
1286  uint32_t padRight = 1;
1287  uint32_t padBottom = 1;
1288 
1289  return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1290  workloadFactory,
1291  memoryManager,
1292  tensorHandleFactory,
1293  inputNoQuantizedValues,
1294  inputTensorInfo,
1295  kernelNoQuantizedValues,
1296  kernelTensorInfo,
1297  outputExpectedNoQuantizedValues,
1298  outputTensorInfo,
1299  2,
1300  2,
1301  layout,
1302  padLeft,
1303  padTop,
1304  padRight,
1305  padBottom,
1306  3,
1307  3,
1308  biasEnabled
1309  );
1310 }

◆ Convolution2d2x3x3Dilation3x3Test()

LayerTestResult<T, 4> Convolution2d2x3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 1171 of file Conv2dTestImpl.cpp.

1177 {
1178  armnn::TensorInfo inputTensorInfo({ 1, 2, 10, 10 }, ArmnnType);
1179  std::vector<float> inputNoQuantizedValues =
1180  {
1181  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1182  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1183  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1184  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1185  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1186  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1187  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1188  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1189  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1190  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1191 
1192  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1193  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1194  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1195  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1196  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1197  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1198  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1199  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1200  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1201  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1202  };
1203 
1204  armnn::TensorInfo kernelTensorInfo({ 1, 2, 3, 3 }, ArmnnType);
1205  std::vector<float> kernelNoQuantizedValues =
1206  {
1207  1, 2, 3,
1208  4, 5, 6,
1209  7, 8, 9,
1210 
1211  1, 2, 3,
1212  4, 5, 6,
1213  7, 8, 9
1214  };
1215 
1216  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
1217  // therefore the output will be 4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
1218  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4 }, ArmnnType);
1219  std::vector<float> outputExpectedNoQuantizedValues =
1220  {
1221  12., 10., 10., 10.,
1222  12., 10., 10., 10.,
1223  12., 10., 10., 10.,
1224  6., 4., 4., 4.
1225  };
1226 
1227  return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1228  workloadFactory,
1229  memoryManager,
1230  tensorHandleFactory,
1231  inputNoQuantizedValues,
1232  inputTensorInfo,
1233  kernelNoQuantizedValues,
1234  kernelTensorInfo,
1235  outputExpectedNoQuantizedValues,
1236  outputTensorInfo,
1237  3,
1238  3,
1239  layout,
1240  biasEnabled);
1241 }

◆ Convolution2d3x3Dilation3x3Test()

LayerTestResult<T, 4> Convolution2d3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 1113 of file Conv2dTestImpl.cpp.

1119 {
1120  armnn::TensorInfo inputTensorInfo({ 1, 1, 10, 10 }, ArmnnType);
1121  std::vector<float> inputNoQuantizedValues =
1122  {
1123  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1124  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1125  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1126  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1127  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1128  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
1129  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1130  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1131  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
1132  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
1133  };
1134 
1135  armnn::TensorInfo kernelTensorInfo({ 1, 1, 3, 3}, ArmnnType);
1136  std::vector<float> kernelNoQuantizedValues =
1137  {
1138  1, 2, 3,
1139  4, 5, 6,
1140  7, 8, 9
1141  };
1142 
1143  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
1144  // therefore the output will be 4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
1145  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
1146  std::vector<float> outputExpectedNoQuantizedValues =
1147  {
1148  6., 5., 5., 5.,
1149  6., 5., 5., 5.,
1150  6., 5., 5., 5.,
1151  3., 2., 2., 2.
1152  };
1153 
1154  return Convolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
1155  workloadFactory,
1156  memoryManager,
1157  tensorHandleFactory,
1158  inputNoQuantizedValues,
1159  inputTensorInfo,
1160  kernelNoQuantizedValues,
1161  kernelTensorInfo,
1162  outputExpectedNoQuantizedValues,
1163  outputTensorInfo,
1164  3,
1165  3,
1166  layout,
1167  biasEnabled);
1168 }

◆ Convolution2d3x3Stride2x2BFloat16SmallValueTest()

LayerTestResult<float, 4> Convolution2d3x3Stride2x2BFloat16SmallValueTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout &  dataLayout 
)

Definition at line 1524 of file Conv2dTestImpl.cpp.

References armnn::BFloat16, armnn::Float32, armnn::IgnoreUnused(), and SimpleConvolution2dNhwcTestImpl().

Referenced by TEST_SUITE().

1530 {
1531  // BFloat16 input and weight, Float32 output
1532  armnn::IgnoreUnused(biasEnabled);
1533 
1534  // Input is a single-batch, 1 channel, 5x5 image.
1535  armnn::TensorInfo inputDesc({1, 5, 5, 1}, armnn::DataType::BFloat16);
1536 
1537  std::vector<armnn::BFloat16> inputValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1538  {
1539  0.0367984f, // 0.0368652
1540  0.0380895f, // 0.0380859
1541  0.0420157f, // 0.0419922
1542  0.0675631f, // 0.0673828
1543  0.0938920f, // 0.09375
1544  0.0476106f, // 0.0476074
1545  0.1035490f, // 0.103516
1546  0.1260370f, // 0.125977
1547  0.0461647f, // 0.0461426
1548  0.0883828f, // 0.0883789
1549  0.1159540f, // 0.115723
1550  0.0498519f, // 0.0498047
1551  0.0104630f, // 0.010437
1552  0.0154114f, // 0.0154419
1553  0.00137681f, // 0.00137329
1554  0.0344238f, // 0.0344616
1555  0.0356445f, // 0.0355693
1556  0.0495605f, // 0.0495018
1557  0.0683594f, // 0.0683308
1558  0.0991211f, // 0.0988837
1559  0.0461426f, // 0.0461838
1560  0.0996094f, // 0.0997546
1561  0.1269530f, // 0.127099
1562  0.0393066f, // 0.0392791
1563  0.103516f // 0.103641
1564  },
1565  1.0f, 0);
1566 
1567  // Use a 3x3 kernel.
1568  armnn::TensorInfo kernelDesc({1, 3, 3, 1}, armnn::DataType::BFloat16);
1569 
1570  std::vector<armnn::BFloat16> kernelValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1571  {
1572  -0.126184f, // -0.125977
1573  -0.150468f, // -0.150391
1574  -0.101412f, // -0.101562
1575  -0.0586369f,// -0.0585938
1576  -0.0865864f,// -0.0864258
1577  -0.0435089f,// -0.043457
1578  0.0347555f, // 0.034668
1579  0.0323111f, // 0.0322266
1580  0.0385381f // 0.0385742
1581  },
1582  1.0f, 0);
1583 
1584  // Expected output is a single-batch, 1 channel, 3x3 image.
1585  armnn::TensorInfo outputDesc({1, 3, 3, 1}, armnn::DataType::Float32);
1586 
1587  // Expected output (with results if calculated as FP32 in the comments)
1588  const std::vector<float> outputData =
1589  {
1590  0.000686645508f, // 0.000685
1591  0.000640869141f, // 0.000639
1592  -0.00759887695f, // -0.007631
1593  -0.02734375f, // -0.027388
1594  -0.0356445312f, // -0.035737
1595  -0.0145874023f, // -0.014568
1596  -0.0170898438f, // -0.017124
1597  -0.0373535156f, // -0.037431
1598  -0.0346679688f // -0.034808
1599  };
1600 
1601  uint32_t padLeft = 1;
1602  uint32_t padTop = 1;
1603  uint32_t padRight = 1;
1604  uint32_t padBottom = 1;
1605  uint32_t strideX = 2;
1606  uint32_t strideY = 2;
1607 
1608  return SimpleConvolution2dNhwcTestImpl
1609  <armnn::DataType::BFloat16, armnn::DataType::Float32, armnn::BFloat16, float, armnn::DataType::Float32, float>(
1610  workloadFactory,
1611  memoryManager,
1612  tensorHandleFactory,
1613  inputValues,
1614  kernelValues,
1615  std::vector<float>(),
1616  outputData,
1617  inputDesc.GetShape(),
1618  kernelDesc.GetShape(),
1619  outputDesc.GetShape(),
1620  dataLayout,
1621  1.0f,
1622  0,
1623  padLeft,
1624  padTop,
1625  padRight,
1626  padBottom,
1627  strideX,
1628  strideY);
1629 }
SimpleConvolution2dNhwcTestImpl
LayerTestResult< O, 4 > SimpleConvolution2dNhwcTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< T > &input, const std::vector< T > &kernel, const std::vector< B > &bias, const std::vector< O > &outputExpected, const armnn::TensorShape &inputShape, const armnn::TensorShape &kernelShape, const armnn::TensorShape &outputExpectedShape, const armnn::DataLayout dataLayout, float qScale, int32_t qOffset, uint32_t padLeft=1, uint32_t padTop=1, uint32_t padRight=1, uint32_t padBottom=1, uint32_t strideX=1, uint32_t strideY=1)
Definition: Conv2dTestImpl.cpp:366
armnn::IgnoreUnused
void IgnoreUnused(Ts &&...)
Definition: IgnoreUnused.hpp:14

◆ Convolution2d3x3Stride2x2BFloat16Test()

LayerTestResult<float, 4> Convolution2d3x3Stride2x2BFloat16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout &  dataLayout 
)

Definition at line 1417 of file Conv2dTestImpl.cpp.

References armnn::BFloat16, armnn::Float32, armnn::IgnoreUnused(), and SimpleConvolution2dNhwcTestImpl().

Referenced by TEST_SUITE().

1423 {
1424  // BFloat16 input and weight, Float32 output
1425  armnn::IgnoreUnused(biasEnabled);
1426 
1427  // Input is a single-batch, 1 channel, 5x5 image.
1428  armnn::TensorInfo inputDesc({ 1, 5, 5, 1 }, armnn::DataType::BFloat16);
1429 
1430  std::vector<armnn::BFloat16> inputValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1431  {
1432  10.0367984f, // 10.0625
1433  2.0380895f, // 2.03125
1434  15.0420157f, // 15.0625
1435  22.0675631f, // 22.125
1436  8.0938920f, // 8.125
1437  5.0476106f, // 5.0625
1438  80.1035490f, // 80
1439  100.1260370f, // 100
1440  55.0461647f, // 55
1441  120.0883828f, // 120
1442  9.1159540f, // 9.125
1443  90.0498519f, // 90
1444  200.0104630f, // 200
1445  30.0154114f, // 30
1446  75.00137681f, // 75
1447  30.0344238f, // 30
1448  25.0356445f, // 25
1449  130.0495605f, // 130
1450  60.0683594f, // 60
1451  35.0991211f, // 35
1452  8.0461426f, // 8.0625
1453  12.0996094f, // 12.125
1454  98.1269530f, // 98
1455  125.0393066f, // 125
1456  5.103516f // 5.0937
1457  },
1458  1.0f, 0);
1459 
1460  // Use a 3x3 kernel.
1461  armnn::TensorInfo kernelDesc({1, 3, 3, 1}, armnn::DataType::BFloat16);
1462 
1463  std::vector<armnn::BFloat16> kernelValues = armnnUtils::QuantizedVector<armnn::BFloat16>(
1464  {
1465  -0.126184f, // -0.125977
1466  -0.150468f, // -0.150391
1467  -0.101412f, // -0.101562
1468  -0.0586369f,// -0.0585938
1469  -0.0865864f,// -0.0864258
1470  -0.0435089f,// -0.043457
1471  0.0347555f, // 0.034668
1472  0.0323111f, // 0.0322266
1473  0.0385381f // 0.0385742
1474  },
1475  1.0f, 0);
1476 
1477  // Expected output is a single-batch, 1 channel, 3x3 image.
1478  armnn::TensorInfo outputDesc({ 1, 3, 3, 1 }, armnn::DataType::Float32);
1479 
1480  // Expected output (with results if calculated as FP32 in the comments)
1481  const std::vector<float> outputData =
1482  {
1483  2.296875f, // 2.29240716
1484  5.75f, // 5.75851926
1485  3.78125f, // 3.79855026
1486  -11.625f, // -11.65498118
1487  -47.25f, // -47.27316893
1488  -30.0f, // -30.04771684
1489  -8.25f, // -8.28126168
1490  -43.5f, // -43.46531337
1491  -20.625f // -20.63477281
1492  };
1493 
1494  uint32_t padLeft = 1;
1495  uint32_t padTop = 1;
1496  uint32_t padRight = 1;
1497  uint32_t padBottom = 1;
1498  uint32_t strideX = 2;
1499  uint32_t strideY = 2;
1500 
1501  return SimpleConvolution2dNhwcTestImpl
1502  <armnn::DataType::BFloat16, armnn::DataType::Float32, armnn::BFloat16, float, armnn::DataType::Float32, float>(
1503  workloadFactory,
1504  memoryManager,
1505  tensorHandleFactory,
1506  inputValues,
1507  kernelValues,
1508  std::vector<float>(),
1509  outputData,
1510  inputDesc.GetShape(),
1511  kernelDesc.GetShape(),
1512  outputDesc.GetShape(),
1513  dataLayout,
1514  1.0f,
1515  0,
1516  padLeft,
1517  padTop,
1518  padRight,
1519  padBottom,
1520  strideX,
1521  strideY);
1522 }
SimpleConvolution2dNhwcTestImpl
LayerTestResult< O, 4 > SimpleConvolution2dNhwcTestImpl(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const std::vector< T > &input, const std::vector< T > &kernel, const std::vector< B > &bias, const std::vector< O > &outputExpected, const armnn::TensorShape &inputShape, const armnn::TensorShape &kernelShape, const armnn::TensorShape &outputExpectedShape, const armnn::DataLayout dataLayout, float qScale, int32_t qOffset, uint32_t padLeft=1, uint32_t padTop=1, uint32_t padRight=1, uint32_t padBottom=1, uint32_t strideX=1, uint32_t strideY=1)
Definition: Conv2dTestImpl.cpp:366
armnn::IgnoreUnused
void IgnoreUnused(Ts &&...)
Definition: IgnoreUnused.hpp:14

◆ Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest()

LayerTestResult<float, 4> Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
armnn::DataLayout  layout 
)

Definition at line 3366 of file Conv2dTestImpl.cpp.

References Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon(), and armnn::Float32.

Referenced by TEST_SUITE().

3371 {
3372  return Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon
3373  <armnn::DataType::Float32, armnn::DataType::Float32>(
3374  workloadFactory, memoryManager, tensorHandleFactory, layout, 0.0f, 0);
3375 }
Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon
LayerTestResult< T, 4 > Convolution2dAsymmetricPaddingLargerThanHalfKernelSizeTestCommon(armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout, float qScale, int32_t qOffset)
Definition: Conv2dTestImpl.cpp:888

◆ Convolution2dAsymmetricPaddingTest()

LayerTestResult<float, 4> Convolution2dAsymmetricPaddingTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
armnn::DataLayout  layout 
)

Definition at line 3356 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3361 {
3362  return SimpleConvolution2dAsymmetricPaddingTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3363  workloadFactory, memoryManager, tensorHandleFactory, layout, 0.0f, 0);
3364 }

◆ Convolution2dPerAxisQuantTest()

LayerTestResult<uint8_t, 4> Convolution2dPerAxisQuantTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 3397 of file Conv2dTestImpl.cpp.

References AllocateAndCopyDataToITensorHandle(), CopyDataFromITensorHandle(), CopyDataToITensorHandle(), IWorkloadFactory::CreateConvolution2d(), ITensorHandleFactory::CreateTensorHandle(), QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, Convolution2dDescriptor::m_StrideX, armnn::NCHW, and PermuteTensorNhwcToNchw().

Referenced by TEST_SUITE().

3402 {
3403  using namespace armnn;
3404 
3405  const DataType inputType = DataType::QAsymmU8;
3406  const DataType kernelType = DataType::QSymmS8;
3407  const DataType biasType = DataType::Signed32;
3408 
3409  TensorInfo inputInfo ({ 1, 3, 1, 2 }, inputType, 0.5f, 128);
3410  TensorInfo outputInfo({ 1, 3, 1, 3 }, inputType, 1.0f, 128);
3411 
3412  const std::vector<float> quantScales{ 0.5f, 0.75f, 1.0f };
3413  constexpr unsigned int quantDimension = 0;
3414 
3415  TensorInfo kernelInfo({ 3, 1, 1, 2 }, kernelType, quantScales, quantDimension);
3416 
3417  const std::vector<float> biasQuantScales{ 0.25f, 0.375f, 0.5f };
3418  TensorInfo biasInfo({ 3 }, biasType, biasQuantScales, quantDimension);
3419 
3420  std::vector<uint8_t> inputData =
3421  {
3422  138, 108, 138, 108, 138, 108
3423  };
3424 
3425  std::vector<int8_t> kernelData =
3426  {
3427  1, 2, 1, 2, 1, 2
3428  };
3429 
3430  std::vector<int32_t> biasData =
3431  {
3432  4, 4, 4
3433  };
3434 
3435  std::vector<uint8_t> expectedOutputData =
3436  {
3437  121, 118, 115, 121, 118, 115, 121, 118, 115
3438  };
3439 
3440  if (layout == DataLayout::NCHW)
3441  {
3442  PermuteTensorNhwcToNchw(inputInfo, inputData);
3443  PermuteTensorNhwcToNchw(kernelInfo, kernelData);
3444  PermuteTensorNhwcToNchw(outputInfo, expectedOutputData);
3445  }
3446 
3447  std::vector<uint8_t> actualOutput(outputInfo.GetNumElements());
3448 
3449  Convolution2dDescriptor descriptor;
3450  descriptor.m_StrideX = 1;
3451  descriptor.m_StrideY = 1;
3452  descriptor.m_PadLeft = 0;
3453  descriptor.m_PadRight = 0;
3454  descriptor.m_PadTop = 0;
3455  descriptor.m_PadBottom = 0;
3456  descriptor.m_BiasEnabled = true;
3457  descriptor.m_DataLayout = layout;
3458 
3459  std::unique_ptr<ITensorHandle> inputHandle = tensorHandleFactory.CreateTensorHandle(inputInfo);
3460  std::unique_ptr<ITensorHandle> outputHandle = tensorHandleFactory.CreateTensorHandle(outputInfo);
3461 
3462  WorkloadInfo workloadInfo;
3463  ScopedTensorHandle weightTensor(kernelInfo);
3464  ScopedTensorHandle biasTensor(biasInfo);
3465 
3466  AllocateAndCopyDataToITensorHandle(&weightTensor, kernelData.data());
3467  AllocateAndCopyDataToITensorHandle(&biasTensor, biasData.data());
3468 
3469  Convolution2dQueueDescriptor queueDescriptor;
3470  queueDescriptor.m_Parameters = descriptor;
3471  queueDescriptor.m_Weight = &weightTensor;
3472  queueDescriptor.m_Bias = &biasTensor;
3473 
3474  AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3475  AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3476 
3477  std::unique_ptr<IWorkload> workload = workloadFactory.CreateConvolution2d(queueDescriptor, workloadInfo);
3478  inputHandle->Allocate();
3479  outputHandle->Allocate();
3480 
3481  CopyDataToITensorHandle(inputHandle.get(), inputData.data());
3482 
3483  ExecuteWorkload(*workload, memoryManager);
3484 
3485  CopyDataFromITensorHandle(actualOutput.data(), outputHandle.get());
3486 
3487  return LayerTestResult<uint8_t, 4>(actualOutput,
3488  expectedOutputData,
3489  outputHandle->GetShape(),
3490  outputInfo.GetShape());
3491 }
armnn::Convolution2dDescriptor
A Convolution2dDescriptor for the Convolution2dLayer.
Definition: Descriptors.hpp:412
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
armnn::Convolution2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:450
armnn::DataType
DataType
Definition: Types.hpp:35
AllocateAndCopyDataToITensorHandle
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:19
CopyDataFromITensorHandle
void CopyDataFromITensorHandle(void *memory, const armnn::ITensorHandle *tensorHandle)
Definition: TensorCopyUtils.cpp:14
armnn::WorkloadInfo
Contains information about TensorInfos of a layer.
Definition: WorkloadInfo.hpp:16
armnn::ITensorHandleFactory::CreateTensorHandle
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo) const =0
armnn::IWorkloadFactory::CreateConvolution2d
virtual std::unique_ptr< IWorkload > CreateConvolution2d(const Convolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
Definition: WorkloadFactory.cpp:1591
CopyDataToITensorHandle
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:9
PermuteTensorNhwcToNchw
void PermuteTensorNhwcToNchw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
Definition: DataLayoutUtils.hpp:26

◆ DepthwiseConvolution2d2x3x3Dilation3x3Test()

LayerTestResult<T, 4> DepthwiseConvolution2d2x3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2682 of file Conv2dTestImpl.cpp.

2688 {
2689  armnn::TensorInfo inputTensorInfo({1, 2, 10, 10}, ArmnnType);
2690  std::vector<float> inputNoQuantizedValues =
2691  {
2692  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2693  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2694  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2695  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2696  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2697  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2698  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2699  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2700  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2701  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2702 
2703  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2704  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2705  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2706  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2707  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2708  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2709  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2710  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2711  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2712  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2713  };
2714 
2715  armnn::TensorInfo kernelTensorInfo({ 1, 3, 3, 2}, ArmnnType);
2716  std::vector<float> kernelNoQuantizedValues =
2717  {
2718  1, 2, 3,
2719  4, 5, 6,
2720  7, 8, 9,
2721 
2722  1, 2, 3,
2723  4, 5, 6,
2724  7, 8, 9
2725  };
2726 
2727  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
2728  // therefore the output will be 2x4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
2729  armnn::TensorInfo outputTensorInfo({ 1, 2, 4, 4}, ArmnnType);
2730  std::vector<float> outputExpectedNoQuantizedValues =
2731  {
2732  2, 9, 9, 9, 2, 9, 9, 9, 2, 9, 9, 9, 5, 3, 3, 3, 3,
2733 
2734  1, 1, 1, 3, 1, 1, 1, 3, 1, 1, 1, 6, 4, 4, 4
2735  };
2736 
2737  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2738  workloadFactory,
2739  memoryManager,
2740  tensorHandleFactory,
2741  inputNoQuantizedValues,
2742  inputTensorInfo,
2743  kernelNoQuantizedValues,
2744  kernelTensorInfo,
2745  outputExpectedNoQuantizedValues,
2746  outputTensorInfo,
2747  3,
2748  3,
2749  layout,
2750  biasEnabled);
2751 }

◆ DepthwiseConvolution2d3x3Dilation3x3Test()

LayerTestResult<T, 4> DepthwiseConvolution2d3x3Dilation3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2624 of file Conv2dTestImpl.cpp.

2630 {
2631  armnn::TensorInfo inputTensorInfo({1, 1, 10, 10}, ArmnnType);
2632  std::vector<float> inputNoQuantizedValues =
2633  {
2634  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2635  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2636  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2637  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2638  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2639  0, 0, 0, 0, 1, 1, 1, 0, 0, 0,
2640  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2641  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2642  0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
2643  0, 0, 0, 0, 0, 0, 0, 0, 0, 0
2644  };
2645 
2646  armnn::TensorInfo kernelTensorInfo({ 1, 3, 3, 1}, ArmnnType);
2647  std::vector<float> kernelNoQuantizedValues =
2648  {
2649  1, 2, 3,
2650  4, 5, 6,
2651  7, 8, 9
2652  };
2653 
2654  // Since the dilation rate is 3 this will dilate the kernel to be like 7x7,
2655  // therefore the output will be 4x4: (I−K+2P)/S +1 => (10-7 +0)/1 +1
2656  armnn::TensorInfo outputTensorInfo({ 1, 1, 4, 4}, ArmnnType);
2657  std::vector<float> outputExpectedNoQuantizedValues =
2658  {
2659  6., 5., 5., 5.,
2660  6., 5., 5., 5.,
2661  6., 5., 5., 5.,
2662  3., 2., 2., 2.
2663  };
2664 
2665  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2666  workloadFactory,
2667  memoryManager,
2668  tensorHandleFactory,
2669  inputNoQuantizedValues,
2670  inputTensorInfo,
2671  kernelNoQuantizedValues,
2672  kernelTensorInfo,
2673  outputExpectedNoQuantizedValues,
2674  outputTensorInfo,
2675  3,
2676  3,
2677  layout,
2678  biasEnabled);
2679 }

◆ DepthwiseConvolution2dAsymmetricTest()

LayerTestResult<float, 4> DepthwiseConvolution2dAsymmetricTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3579 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3585 {
3586  return DepthwiseConvolution2dAsymmetricTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3587  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled, layout);
3588 }

◆ DepthwiseConvolution2dDepthMul1Int16Test()

LayerTestResult<int16_t, 4> DepthwiseConvolution2dDepthMul1Int16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3637 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3643 {
3644  return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3645  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3646 }

◆ DepthwiseConvolution2dDepthMul1Test()

LayerTestResult<float, 4> DepthwiseConvolution2dDepthMul1Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3525 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3531 {
3532  return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3533  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled, layout);
3534 }

◆ DepthwiseConvolution2dDepthMul1Uint8Test()

LayerTestResult<uint8_t, 4> DepthwiseConvolution2dDepthMul1Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3601 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3607 {
3608  return DepthwiseConvolution2dDepthMul1TestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3609  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3610 }

◆ DepthwiseConvolution2dDepthMul64Test()

LayerTestResult<float, 4> DepthwiseConvolution2dDepthMul64Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory 
)

Definition at line 3536 of file Conv2dTestImpl.cpp.

References armnn::Float32, armnn::GetDataTypeSize(), armnn::NCHW, armnnUtils::Permute(), and armnnUtils::Permuted().

Referenced by TEST_SUITE().

3540 {
3541  armnn::TensorInfo inputTensorInfo({ 1, 1, 2, 2 }, armnn::DataType::Float32);
3542  std::vector<float> input = { 1.f, 2.f, 3.f, 4.f };
3543 
3544  std::vector<float> kernelData;
3545  std::vector<float> singleDepthKernel{ 1.f, -1.f, -1.f, 1.f };
3546  for (unsigned int i = 0; i < 64; ++i)
3547  {
3548  kernelData.insert(kernelData.end(), singleDepthKernel.begin(), singleDepthKernel.end());
3549  }
3550  armnn::TensorInfo kernelTensorInfo({ 64, 1, 2, 2 }, armnn::DataType::Float32);
3551 
3552  // permute from [O,1,H,W] --> [1,H,W,O]
3553  armnn::PermutationVector permutationVector {3,0,1,2};
3554  kernelTensorInfo = armnnUtils::Permuted(kernelTensorInfo, permutationVector);
3555  std::vector<float> kernelPermuted(kernelTensorInfo.GetNumElements());
3556  armnnUtils::Permute(kernelTensorInfo.GetShape(), permutationVector,
3557  kernelData.data(), kernelPermuted.data(),
3558  GetDataTypeSize(kernelTensorInfo.GetDataType()));
3559 
3560  std::vector<float> expectedOutputData(64, 0.f);
3561  armnn::TensorInfo outputTensorInfo({ 1, 64, 1, 1 }, armnn::DataType::Float32);
3562 
3563  return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3564  workloadFactory,
3565  memoryManager,
3566  tensorHandleFactory,
3567  input,
3568  kernelPermuted,
3569  std::vector<float>(),
3570  expectedOutputData,
3571  inputTensorInfo.GetShape(),
3572  kernelTensorInfo.GetShape(),
3573  outputTensorInfo.GetShape(),
3574  0.f,
3575  0,
3576  armnn::DataLayout::NCHW);
3577 }
armnnUtils::Permute
void Permute(const armnn::TensorShape &dstShape, const armnn::PermutationVector &mappings, const void *src, void *dst, size_t dataTypeSize)
Definition: Permute.cpp:131
armnnUtils::Permuted
armnn::TensorShape Permuted(const armnn::TensorShape &srcShape, const armnn::PermutationVector &mappings)
Definition: Permute.cpp:98
armnn::GetDataTypeSize
constexpr unsigned int GetDataTypeSize(DataType dataType)
Definition: TypesUtils.hpp:151

◆ DepthwiseConvolution2dDepthNhwcTest()

LayerTestResult<float, 4> DepthwiseConvolution2dDepthNhwcTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled 
)

Definition at line 3515 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3520 {
3521  return DepthwiseConvolution2dNhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3522  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled);
3523 }

◆ DepthwiseConvolution2dInt16Test()

LayerTestResult<int16_t, 4> DepthwiseConvolution2dInt16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3626 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3632 {
3633  return DepthwiseConvolution2dTestImpl<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3634  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3635 }

◆ DepthwiseConvolution2dMult2Test()

LayerTestResult<T, 4> DepthwiseConvolution2dMult2Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2829 of file Conv2dTestImpl.cpp.

2835 {
2836  armnn::TensorInfo inputTensorInfo({1, 2, 3, 3}, ArmnnType);
2837  std::vector<float> inputNoQuantizedValues =
2838  {
2839  10.0, 10.0, 10.0,
2840  10.0, 10.0, 10.0,
2841  10.0, 10.0, 10.0,
2842 
2843  21.0, 22.0, 23.0,
2844  24.0, 25.0, 26.0,
2845  27.0, 28.0, 29.0
2846  };
2847 
2848  armnn::TensorInfo kernelTensorInfo({ 1, 2, 2, 4}, ArmnnType);
2849 
2850  std::vector<float> kernelNoQuantizedValues =
2851  {
2852  0.25f, 0.25f,
2853  0.25f, 0.25f,
2854 
2855  0.2f , 0.0f,
2856  0.0f , 0.0f,
2857 
2858  0.0f , 0.0f,
2859  0.0f , 0.1f,
2860 
2861  0.0f , 0.3f,
2862  0.0f , 0.0f
2863 
2864  };
2865 
2866  armnn::TensorInfo outputTensorInfo({ 1, 4, 2, 2}, ArmnnType);
2867  std::vector<float> outputExpectedNoQuantizedValues =
2868  {
2869  4.5f, 4.5f, 4.5f, 4.5f,
2870  5.5f, 5.5f, 5.5f, 5.5f,
2871  5.25f, 5.5f, 6.0f, 6.25f,
2872  7.65f, 8.0f, 8.7f, 9.05f
2873  };
2874 
2875 
2876  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2877  workloadFactory,
2878  memoryManager,
2879  tensorHandleFactory,
2880  inputNoQuantizedValues,
2881  inputTensorInfo,
2882  kernelNoQuantizedValues,
2883  kernelTensorInfo,
2884  outputExpectedNoQuantizedValues,
2885  outputTensorInfo,
2886  1,
2887  1,
2888  layout,
2889  biasEnabled);
2890 }

◆ DepthwiseConvolution2dMult4Test()

LayerTestResult<T, 4> DepthwiseConvolution2dMult4Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 2754 of file Conv2dTestImpl.cpp.

2760 {
2761  armnn::TensorInfo inputTensorInfo({1, 2, 3, 3}, ArmnnType);
2762  std::vector<float> inputNoQuantizedValues =
2763  {
2764  10.0, 10.0, 10.0,
2765  10.0, 10.0, 10.0,
2766  10.0, 10.0, 10.0,
2767 
2768  21.0, 22.0, 23.0,
2769  24.0, 25.0, 26.0,
2770  27.0, 28.0, 29.0
2771  };
2772 
2773  armnn::TensorInfo kernelTensorInfo({ 1, 2, 2, 8}, ArmnnType);
2774 
2775  std::vector<float> kernelNoQuantizedValues =
2776  {
2777  0.25f, 0.25f,
2778  0.25f, 0.25f,
2779 
2780  0.25f, 0.25f,
2781  0.25f, 0.25f,
2782 
2783  0.0f , 0.0f,
2784  0.0f , 0.1f,
2785 
2786  0.0f , 0.0f,
2787  0.0f , 0.1f,
2788 
2789  0.2f , 0.0f,
2790  0.0f , 0.0f,
2791 
2792  0.2f , 0.0f,
2793  0.0f , 0.0f,
2794 
2795  0.0f , 0.3f,
2796  0.0f , 0.0f,
2797 
2798  0.0f , 0.3f,
2799  0.0f , 0.0f
2800  };
2801 
2802  armnn::TensorInfo outputTensorInfo({ 1, 8, 2, 2}, ArmnnType);
2803  std::vector<float> outputExpectedNoQuantizedValues =
2804  {
2805  4.5f, 4.5f, 4.5f, 4.5f, 5.5f, 5.5f, 5.5f, 5.5f,
2806  2.5f, 2.5f, 2.5f, 2.5f, 3.5f, 3.5f, 3.5f, 3.5f,
2807  10.05f, 10.5f, 11.4f, 11.85f, 12.75f, 13.3f, 14.4f, 14.95f,
2808  5.25f, 5.5f, 6.0f, 6.25f, 7.45f, 7.8f, 8.5f, 8.85f
2809  };
2810 
2811 
2812  return DepthwiseConvolution2d3x3DilationTestCommon<ArmnnType, ArmnnBType>(
2813  workloadFactory,
2814  memoryManager,
2815  tensorHandleFactory,
2816  inputNoQuantizedValues,
2817  inputTensorInfo,
2818  kernelNoQuantizedValues,
2819  kernelTensorInfo,
2820  outputExpectedNoQuantizedValues,
2821  outputTensorInfo,
2822  1,
2823  1,
2824  layout,
2825  biasEnabled);
2826 }

◆ DepthwiseConvolution2dPerAxisQuantTest()

LayerTestResult<uint8_t, 4> DepthwiseConvolution2dPerAxisQuantTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 3648 of file Conv2dTestImpl.cpp.

References AllocateAndCopyDataToITensorHandle(), CopyDataFromITensorHandle(), CopyDataToITensorHandle(), IWorkloadFactory::CreateDepthwiseConvolution2d(), ITensorHandleFactory::CreateTensorHandle(), QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, DepthwiseConvolution2dDescriptor::m_StrideX, armnn::NCHW, and PermuteTensorNhwcToNchw().

Referenced by TEST_SUITE().

3653 {
3654  using namespace armnn;
3655 
3656  const DataType inputType = DataType::QAsymmU8;
3657  const DataType kernelType = DataType::QSymmS8;
3658  const DataType biasType = DataType::Signed32;
3659 
3660  TensorInfo inputInfo ({ 1, 3, 3, 2 }, inputType, 0.5f, 128); // N H W C
3661  TensorInfo outputInfo({ 1, 2, 2, 4 }, inputType, 1.0f, 128); // N H W C
3662 
3663  const std::vector<float> quantScales{ 1.0f, 0.5f, 1.0f, 0.5f };
3664  const unsigned int quantDimension = 3;
3665  TensorInfo kernelInfo({ 1, 2, 2, 4 }, kernelType, quantScales, quantDimension); // [1, H, W, I*M]
3666 
3667  const std::vector<float> biasQuantScales{ 0.5f, 0.25f, 0.5f, 0.25f };
3668  constexpr unsigned int biasQuantDimension = 0;
3669  TensorInfo biasInfo({ 4 }, biasType, biasQuantScales, biasQuantDimension);
3670 
3671  std::vector<uint8_t> inputData =
3672  {
3673  129, 130,
3674  129, 130,
3675  129, 130,
3676  129, 130,
3677  129, 130,
3678  129, 130,
3679  129, 130,
3680  129, 130,
3681  129, 130
3682  };
3683 
3684  std::vector<int8_t> kernelData =
3685  {
3686  1, 1, 1, 1,
3687  1, 1, 1, 1,
3688  1, 1, 1, 1,
3689  1, 1, 1, 1
3690  };
3691 
3692  std::vector<int32_t> biasData =
3693  {
3694  4, 4, 4, 4
3695  };
3696 
3697  std::vector<uint8_t> expectedOutputData =
3698  {
3699  132, 130, 134, 131,
3700  132, 130, 134, 131,
3701  132, 130, 134, 131,
3702  132, 130, 134, 131
3703  };
3704 
3705  if (layout == DataLayout::NCHW)
3706  {
3707  PermuteTensorNhwcToNchw(inputInfo, inputData);
3708  PermuteTensorNhwcToNchw(outputInfo, expectedOutputData);
3709  }
3710 
3711  std::vector<uint8_t> actualOutput(outputInfo.GetNumElements());
3712 
3713  DepthwiseConvolution2dDescriptor descriptor;
3714  descriptor.m_StrideX = 1;
3715  descriptor.m_StrideY = 1;
3716  descriptor.m_PadLeft = 0;
3717  descriptor.m_PadRight = 0;
3718  descriptor.m_PadTop = 0;
3719  descriptor.m_PadBottom = 0;
3720  descriptor.m_DilationX = 1;
3721  descriptor.m_DilationY = 1;
3722  descriptor.m_BiasEnabled = true;
3723  descriptor.m_DataLayout = layout;
3724 
3725  std::unique_ptr<ITensorHandle> inputHandle = tensorHandleFactory.CreateTensorHandle(inputInfo);
3726  std::unique_ptr<ITensorHandle> outputHandle = tensorHandleFactory.CreateTensorHandle(outputInfo);
3727 
3728  WorkloadInfo workloadInfo;
3729  ScopedTensorHandle weightTensor(kernelInfo);
3730  ScopedTensorHandle biasTensor(biasInfo);
3731 
3732  AllocateAndCopyDataToITensorHandle(&weightTensor, kernelData.data());
3733  AllocateAndCopyDataToITensorHandle(&biasTensor, biasData.data());
3734 
3735  DepthwiseConvolution2dQueueDescriptor queueDescriptor;
3736  queueDescriptor.m_Parameters = descriptor;
3737  queueDescriptor.m_Weight = &weightTensor;
3738  queueDescriptor.m_Bias = &biasTensor;
3739 
3740  AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
3741  AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
3742 
3743  std::unique_ptr<IWorkload> workload = workloadFactory.CreateDepthwiseConvolution2d(queueDescriptor, workloadInfo);
3744  inputHandle->Allocate();
3745  outputHandle->Allocate();
3746 
3747  CopyDataToITensorHandle(inputHandle.get(), inputData.data());
3748 
3749  ExecuteWorkload(*workload, memoryManager);
3750 
3751  LayerTestResult<uint8_t, 4> ret(outputInfo);
3752 
3753  CopyDataFromITensorHandle(actualOutput.data(), outputHandle.get());
3754 
3755  return LayerTestResult<uint8_t, 4>(actualOutput,
3756  expectedOutputData,
3757  outputHandle->GetShape(),
3758  outputInfo.GetShape());
3759 }
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
armnn::DepthwiseConvolution2dDescriptor::m_StrideX
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
Definition: Descriptors.hpp:573
armnn::DataType
DataType
Definition: Types.hpp:35
AllocateAndCopyDataToITensorHandle
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:19
CopyDataFromITensorHandle
void CopyDataFromITensorHandle(void *memory, const armnn::ITensorHandle *tensorHandle)
Definition: TensorCopyUtils.cpp:14
armnn::WorkloadInfo
Contains information about TensorInfos of a layer.
Definition: WorkloadInfo.hpp:16
armnn::IWorkloadFactory::CreateDepthwiseConvolution2d
virtual std::unique_ptr< IWorkload > CreateDepthwiseConvolution2d(const DepthwiseConvolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
Definition: WorkloadFactory.cpp:1615
armnn::ITensorHandleFactory::CreateTensorHandle
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo) const =0
armnn::DepthwiseConvolution2dDescriptor
A DepthwiseConvolution2dDescriptor for the DepthwiseConvolution2dLayer.
Definition: Descriptors.hpp:535
armnn::DepthwiseConvolution2dQueueDescriptor
Depthwise Convolution 2D layer workload data.
Definition: WorkloadData.hpp:230
CopyDataToITensorHandle
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
Definition: TensorCopyUtils.cpp:9
PermuteTensorNhwcToNchw
void PermuteTensorNhwcToNchw(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
Definition: DataLayoutUtils.hpp:26

◆ DepthwiseConvolution2dTest()

LayerTestResult<float, 4> DepthwiseConvolution2dTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3504 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3510 {
3511  return DepthwiseConvolution2dTestImpl<armnn::DataType::Float32, armnn::DataType::Float32>(
3512  workloadFactory, memoryManager, tensorHandleFactory, 0.0f, 0, biasEnabled, layout);
3513 }

◆ DepthwiseConvolution2dUint8Test()

LayerTestResult<uint8_t, 4> DepthwiseConvolution2dUint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3590 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3596 {
3597  return DepthwiseConvolution2dTestImpl<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3598  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3599 }

◆ SimpleConvolution2d3x3NhwcTest()

LayerTestResult<float, 4> SimpleConvolution2d3x3NhwcTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled 
)

Definition at line 3290 of file Conv2dTestImpl.cpp.

References armnn::NHWC.

Referenced by TEST_SUITE().

3295 {
3296  return SimpleConvolution2d3x3NhwcTestCommon<armnn::DataType::Float32>(
3297  workloadFactory,
3298  memoryManager,
3299  tensorHandleFactory,
3300  0.f,
3301  0,
3302  biasEnabled,
3303  armnn::DataLayout::NHWC);
3304 }

◆ SimpleConvolution2d3x3QSymm16Test()

LayerTestResult<int16_t, 4> SimpleConvolution2d3x3QSymm16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3345 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3351 {
3352  return SimpleConvolution2d3x3TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3353  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3354 }

◆ SimpleConvolution2d3x3Stride2x2Test()

LayerTestResult<float, 4> SimpleConvolution2d3x3Stride2x2Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3306 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3312 {
3313  return SimpleConvolution2d3x3Stride2x2TestCommon<armnn::DataType::Float32>(
3314  workloadFactory,
3315  memoryManager,
3316  tensorHandleFactory,
3317  0.f,
3318  0,
3319  biasEnabled,
3320  layout);
3321 }

◆ SimpleConvolution2d3x3Test()

LayerTestResult<float, 4> SimpleConvolution2d3x3Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3279 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3285 {
3286  return SimpleConvolution2d3x3TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3287  workloadFactory, memoryManager, tensorHandleFactory, 0.f, 0, biasEnabled, layout);
3288 }

◆ SimpleConvolution2d3x3Uint8Test()

LayerTestResult<uint8_t, 4> SimpleConvolution2d3x3Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3323 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3329 {
3330  return SimpleConvolution2d3x3TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3331  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3332 }

◆ SimpleConvolution2d3x5QSymm16Test()

LayerTestResult<int16_t, 4> SimpleConvolution2d3x5QSymm16Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3334 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3340 {
3341  return SimpleConvolution2d3x5TestCommon<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
3342  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3343 }

◆ SimpleConvolution2d3x5Test()

LayerTestResult<float, 4> SimpleConvolution2d3x5Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3257 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3263 {
3264  return SimpleConvolution2d3x5TestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3265  workloadFactory, memoryManager, tensorHandleFactory, 0.f, 0, biasEnabled, layout);
3266 }

◆ SimpleConvolution2d3x5Uint8Test()

LayerTestResult<uint8_t, 4> SimpleConvolution2d3x5Uint8Test ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 3268 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3274 {
3275  return SimpleConvolution2d3x5TestCommon<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
3276  workloadFactory, memoryManager, tensorHandleFactory, 0.5f, 50, biasEnabled, layout);
3277 }

◆ SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest()

LayerTestResult<float, 4> SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTest ( armnn::IWorkloadFactory &  workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr &  memoryManager,
const armnn::ITensorHandleFactory &  tensorHandleFactory 
)

Definition at line 3612 of file Conv2dTestImpl.cpp.

Referenced by TEST_SUITE().

3616 {
3617  return SimpleDepthwiseConvolution2d3x3Dilation3x3NhwcTestCommon<armnn::DataType::Float32, armnn::DataType::Float32>(
3618  workloadFactory,
3619  memoryManager,
3620  tensorHandleFactory,
3621  0.f,
3622  0,
3623  false);
3624 }