ArmNN
 21.08
RefTransposeConvolution2dWorkload.cpp
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1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
8 #include "RefWorkloadUtils.hpp"
10 
11 #include <Profiling.hpp>
12 
13 namespace armnn
14 {
15 
17  const TransposeConvolution2dQueueDescriptor& descriptor, const WorkloadInfo& info) :
19 {
20  // set up weights decoder
21  m_Weights = std::make_unique<ScopedTensorHandle>(*(descriptor.m_Weight));
22  const TensorInfo& weightsInfo = m_Weights->GetTensorInfo();
23 
24  m_WeightsDecoder = MakeDecoder<float>(weightsInfo, m_Weights->Map(true));
25  m_WeightsShape = weightsInfo.GetShape();
26 
27  // set up biases decoder
28  if (descriptor.m_Parameters.m_BiasEnabled)
29  {
30  m_Biases = std::make_unique<ScopedTensorHandle>(*(descriptor.m_Bias));
31  const TensorInfo& biasesInfo = m_Biases->GetTensorInfo();
32  m_BiasesDecoder = MakeDecoder<float>(biasesInfo, m_Biases->Map(true));
33  }
34 }
35 
37 {
39 }
40 
42 {
43  Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs);
44 }
45 
46 void RefTransposeConvolution2dWorkload::Execute(std::vector<ITensorHandle*> inputs,
47  std::vector<ITensorHandle*> outputs) const
48 {
49  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefTransposeConvolution2dWorkload_Execute");
50 
51  const TensorInfo& inputInfo = GetTensorInfo(inputs[0]);
52  const TensorInfo& outputInfo = GetTensorInfo(outputs[0]);
53 
54  std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(inputInfo, inputs[0]->Map());
55  std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(outputInfo, outputs[0]->Map());
56 
58  inputInfo.GetShape(),
59  *inputDecoder,
60  outputInfo.GetShape(),
61  *outputEncoder,
62  m_WeightsShape,
63  *m_WeightsDecoder,
64  m_BiasesDecoder.get());
65 }
66 
67 } // namespace armnn
CPU Execution: Reference C++ kernels.
bool m_BiasEnabled
Enable/disable bias.
void ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) override
void TransposeConvolution2dImpl(const TransposeConvolution2dDescriptor &descriptor, const TensorShape &inputShape, Decoder< float > &inputDecoder, const TensorShape &outputShape, Encoder< float > &outputEncoder, const TensorShape &weightsShape, Decoder< float > &weightsDecoder, Decoder< float > *biasesDecoder)
Copyright (c) 2021 ARM Limited and Contributors.
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:219
TransposeConvolution2dQueueDescriptor m_Data
Definition: Workload.hpp:58
RefTransposeConvolution2dWorkload(const TransposeConvolution2dQueueDescriptor &descriptor, const WorkloadInfo &info)
std::vector< ITensorHandle * > m_Outputs
Contains information about TensorInfos of a layer.
std::vector< ITensorHandle * > m_Inputs
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers