ArmNN
 21.08
RefEndToEndTests.cpp
Go to the documentation of this file.
1 //
2 // Copyright © 2017 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
30 
31 #include <doctest/doctest.h>
32 
33 TEST_SUITE("RefEndToEnd")
34 {
35 std::vector<armnn::BackendId> defaultBackends = {armnn::Compute::CpuRef};
36 
37 // Abs
38 TEST_CASE("RefAbsEndToEndTestFloat32")
39 {
40  std::vector<float> expectedOutput =
41  {
42  1.f, 1.f, 1.f, 1.f, 5.f, 5.f, 5.f, 5.f,
43  3.f, 3.f, 3.f, 3.f, 4.f, 4.f, 4.f, 4.f
44  };
45 
46  ElementwiseUnarySimpleEndToEnd<armnn::DataType::Float32>(defaultBackends,
47  UnaryOperation::Abs,
48  expectedOutput);
49 }
50 
51 TEST_CASE("RefAbsEndToEndTestUint8")
52 {
53  // Note the expected output will be implicitly quantized by the below test function
54  std::vector<float> expectedOutput =
55  {
56  1.f, 1.f, 1.f, 1.f, 5.f, 5.f, 5.f, 5.f,
57  3.f, 3.f, 3.f, 3.f, 4.f, 4.f, 4.f, 4.f
58  };
59 
60  ElementwiseUnarySimpleEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
61  UnaryOperation::Abs,
62  expectedOutput);
63 }
64 
65 TEST_CASE("RefAbsEndToEndTestInt16")
66 {
67  // Note the expected output will be implicitly quantized by the below test function
68  std::vector<float> expectedOutput =
69  {
70  1.f, 1.f, 1.f, 1.f, 5.f, 5.f, 5.f, 5.f,
71  3.f, 3.f, 3.f, 3.f, 4.f, 4.f, 4.f, 4.f
72  };
73 
74  ElementwiseUnarySimpleEndToEnd<armnn::DataType::QSymmS16>(defaultBackends,
75  UnaryOperation::Abs,
76  expectedOutput);
77 }
78 
79 // Constant
80 TEST_CASE("ConstantUsage_Ref_Float32")
81 {
82  CHECK(ConstantUsageFloat32Test(defaultBackends));
83 }
84 
85 TEST_CASE("ConstantUsage_Ref_Uint8")
86 {
87  CHECK(ConstantUsageUint8Test(defaultBackends));
88 }
89 
90 TEST_CASE("Unsigned8")
91 {
92  using namespace armnn;
93 
94  // Create runtime in which test will run
97 
98  // Builds up the structure of the network.
100 
101  IConnectableLayer* input = net->AddInputLayer(0, "input");
102  IConnectableLayer* softmax = net->AddSoftmaxLayer(SoftmaxDescriptor(), "softmax");
103  IConnectableLayer* output = net->AddOutputLayer(0, "output");
104 
105  input->GetOutputSlot(0).Connect(softmax->GetInputSlot(0));
106  softmax->GetOutputSlot(0).Connect(output->GetInputSlot(0));
107 
108  // Sets the tensors in the network.
109  TensorInfo inputTensorInfo(TensorShape({1, 5}), DataType::QAsymmU8);
110  inputTensorInfo.SetQuantizationOffset(100);
111  inputTensorInfo.SetQuantizationScale(10000.0f);
112  input->GetOutputSlot(0).SetTensorInfo(inputTensorInfo);
113 
114  TensorInfo outputTensorInfo(TensorShape({1, 5}), DataType::QAsymmU8);
115  outputTensorInfo.SetQuantizationOffset(0);
116  outputTensorInfo.SetQuantizationScale(1.0f/255.0f);
117  softmax->GetOutputSlot(0).SetTensorInfo(outputTensorInfo);
118 
119  // optimize the network
120  IOptimizedNetworkPtr optNet = Optimize(*net, defaultBackends, runtime->GetDeviceSpec());
121 
122  // Loads it into the runtime.
123  NetworkId netId;
124  auto error = runtime->LoadNetwork(netId, std::move(optNet));
125  CHECK(error == Status::Success);
126 
127  // Creates structures for input & output.
128  std::vector<uint8_t> inputData
129  {
130  1, 10, 3, 200, 5 // Some inputs - one of which is sufficiently larger than the others to saturate softmax.
131  };
132  std::vector<uint8_t> outputData(5);
133 
134  armnn::InputTensors inputTensors
135  {
136  {0, armnn::ConstTensor(runtime->GetInputTensorInfo(netId, 0), inputData.data())}
137  };
138  armnn::OutputTensors outputTensors
139  {
140  {0, armnn::Tensor(runtime->GetOutputTensorInfo(netId, 0), outputData.data())}
141  };
142 
143  // Does the inference.
144  runtime->EnqueueWorkload(netId, inputTensors, outputTensors);
145 
146  // Checks the results.
147  CHECK(outputData[0] == 0);
148  CHECK(outputData[1] == 0);
149  CHECK(outputData[2] == 0);
150  CHECK(outputData[3] == 255); // softmax has been saturated.
151  CHECK(outputData[4] == 0);
152 }
153 
154 TEST_CASE("TrivialAdd")
155 {
156  // This test was designed to match "AddTwo" in android nn/runtime/test/TestTrivialModel.cpp.
157 
158  using namespace armnn;
159 
160  // Create runtime in which test will run
163 
164  // Builds up the structure of the network.
166 
167  IConnectableLayer* input1 = net->AddInputLayer(0);
168  IConnectableLayer* input2 = net->AddInputLayer(1);
169  IConnectableLayer* add = net->AddAdditionLayer();
170  IConnectableLayer* output = net->AddOutputLayer(0);
171 
172  input1->GetOutputSlot(0).Connect(add->GetInputSlot(0));
173  input2->GetOutputSlot(0).Connect(add->GetInputSlot(1));
174  add->GetOutputSlot(0).Connect(output->GetInputSlot(0));
175 
176  // Sets the tensors in the network.
177  TensorInfo tensorInfo(TensorShape({3, 4}), DataType::Float32);
178  input1->GetOutputSlot(0).SetTensorInfo(tensorInfo);
179  input2->GetOutputSlot(0).SetTensorInfo(tensorInfo);
180  add->GetOutputSlot(0).SetTensorInfo(tensorInfo);
181 
182  // optimize the network
183  IOptimizedNetworkPtr optNet = Optimize(*net, defaultBackends, runtime->GetDeviceSpec());
184 
185  // Loads it into the runtime.
186  NetworkId netId;
187  runtime->LoadNetwork(netId, std::move(optNet));
188 
189  // Creates structures for input & output - matching android nn test.
190  std::vector<float> input1Data
191  {
192  1.f, 2.f, 3.f, 4.f, 5.f, 6.f, 7.f, 8.f, 9.f, 10.f, 11.f, 12.f
193  };
194  std::vector<float> input2Data
195  {
196  100.f, 200.f, 300.f, 400.f, 500.f, 600.f, 700.f, 800.f, 900.f, 1000.f, 1100.f, 1200.f
197  };
198  std::vector<float> outputData(12);
199 
200  InputTensors inputTensors
201  {
202  {0,armnn::ConstTensor(runtime->GetInputTensorInfo(netId, 0), input1Data.data())},
203  {1,armnn::ConstTensor(runtime->GetInputTensorInfo(netId, 0), input2Data.data())}
204  };
205  OutputTensors outputTensors
206  {
207  {0,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 0), outputData.data())}
208  };
209 
210  // Does the inference.
211  runtime->EnqueueWorkload(netId, inputTensors, outputTensors);
212 
213  // Checks the results
214  CHECK(outputData[0] == 101);
215  CHECK(outputData[1] == 202);
216  CHECK(outputData[2] == 303);
217  CHECK(outputData[3] == 404);
218  CHECK(outputData[4] == 505);
219  CHECK(outputData[5] == 606);
220  CHECK(outputData[6] == 707);
221  CHECK(outputData[7] == 808);
222  CHECK(outputData[8] == 909);
223  CHECK(outputData[9] == 1010);
224  CHECK(outputData[10] == 1111);
225  CHECK(outputData[11] == 1212);
226 }
227 
228 TEST_CASE("MultipleOutputs")
229 {
230  using namespace armnn;
231 
232  // Create runtime in which test will run
235 
236  // Builds up the structure of the network.
238 
239  IConnectableLayer* input = net->AddInputLayer(0);
240 
241  // ReLu1
242  ActivationDescriptor activation1Descriptor;
243  activation1Descriptor.m_Function = ActivationFunction::BoundedReLu;
244  activation1Descriptor.m_A = 1.f;
245  activation1Descriptor.m_B = -1.f;
246  IConnectableLayer* activation1 = net->AddActivationLayer(activation1Descriptor);
247 
248  // ReLu6
249  ActivationDescriptor activation2Descriptor;
250  activation2Descriptor.m_Function = ActivationFunction::BoundedReLu;
251  activation2Descriptor.m_A = 6.0f;
252  IConnectableLayer* activation2 = net->AddActivationLayer(activation2Descriptor);
253 
254  // BoundedReLu(min=2, max=5)
255  ActivationDescriptor activation3Descriptor;
256  activation3Descriptor.m_Function = ActivationFunction::BoundedReLu;
257  activation3Descriptor.m_A = 5.0f;
258  activation3Descriptor.m_B = 2.0f;
259  IConnectableLayer* activation3 = net->AddActivationLayer(activation3Descriptor);
260 
261  IConnectableLayer* output1 = net->AddOutputLayer(0);
262  IConnectableLayer* output2 = net->AddOutputLayer(1);
263  IConnectableLayer* output3 = net->AddOutputLayer(2);
264 
265  input->GetOutputSlot(0).Connect(activation1->GetInputSlot(0));
266  input->GetOutputSlot(0).Connect(activation2->GetInputSlot(0));
267  input->GetOutputSlot(0).Connect(activation3->GetInputSlot(0));
268 
269  activation1->GetOutputSlot(0).Connect(output1->GetInputSlot(0));
270  activation2->GetOutputSlot(0).Connect(output2->GetInputSlot(0));
271  activation3->GetOutputSlot(0).Connect(output3->GetInputSlot(0));
272 
273  // Sets the tensors in the network.
274  TensorInfo tensorInfo(TensorShape({ 10 }), DataType::Float32);
275  input->GetOutputSlot(0).SetTensorInfo(tensorInfo);
276  activation1->GetOutputSlot(0).SetTensorInfo(tensorInfo);
277  activation2->GetOutputSlot(0).SetTensorInfo(tensorInfo);
278  activation3->GetOutputSlot(0).SetTensorInfo(tensorInfo);
279 
280  // optimize the network
281  IOptimizedNetworkPtr optNet = Optimize(*net, defaultBackends, runtime->GetDeviceSpec());
282 
283  // Loads it into the runtime.
284  NetworkId netId;
285  runtime->LoadNetwork(netId, std::move(optNet));
286 
287  // Creates structures for input & output.
288  const std::vector<float> inputData{ 3.f, 5.f, 2.f, 3.f, 7.f, 0.f, -2.f, -1.f, 3.f, 3.f };
289 
290  std::vector<float> output1Data(inputData.size());
291  std::vector<float> output2Data(inputData.size());
292  std::vector<float> output3Data(inputData.size());
293 
294  InputTensors inputTensors
295  {
296  {0,armnn::ConstTensor(runtime->GetInputTensorInfo(netId, 0), inputData.data())}
297  };
298  OutputTensors outputTensors
299  {
300  {0,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 0), output1Data.data())},
301  {1,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 1), output2Data.data())},
302  {2,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 2), output3Data.data())}
303  };
304 
305  // Does the inference.
306  runtime->EnqueueWorkload(netId, inputTensors, outputTensors);
307 
308  // Checks the results.
309  CHECK(output1Data == std::vector<float>({ 1.f, 1.f, 1.f, 1.f, 1.f, 0.f, -1.f, -1.f, 1.f, 1.f })); // ReLu1
310  CHECK(output2Data == std::vector<float>({ 3.f, 5.f, 2.f, 3.f, 6.f, 0.f, 0.f, 0.f, 3.f, 3.f })); // ReLu6
311  CHECK(output3Data == std::vector<float>({ 3.f, 5.f, 2.f, 3.f, 5.f, 2.f, 2.f, 2.f, 3.f, 3.f })); // [2, 5]
312 }
313 
314 TEST_CASE("TrivialMin")
315 {
316  using namespace armnn;
317 
318  // Create runtime in which test will run
321 
322  // Builds up the structure of the network.
324 
325  IConnectableLayer* input1 = net->AddInputLayer(0);
326  IConnectableLayer* input2 = net->AddInputLayer(1);
327  IConnectableLayer* min = net->AddMinimumLayer();
328  IConnectableLayer* output = net->AddOutputLayer(0);
329 
330  input1->GetOutputSlot(0).Connect(min->GetInputSlot(0));
331  input2->GetOutputSlot(0).Connect(min->GetInputSlot(1));
332  min->GetOutputSlot(0).Connect(output->GetInputSlot(0));
333 
334  // Sets the tensors in the network.
335  TensorInfo tensorInfo(TensorShape({1, 1, 1, 4}), DataType::Float32);
336  input1->GetOutputSlot(0).SetTensorInfo(tensorInfo);
337  input2->GetOutputSlot(0).SetTensorInfo(tensorInfo);
338  min->GetOutputSlot(0).SetTensorInfo(tensorInfo);
339 
340  // optimize the network
341  IOptimizedNetworkPtr optNet = Optimize(*net, defaultBackends, runtime->GetDeviceSpec());
342 
343  // Loads it into the runtime.
344  NetworkId netId;
345  runtime->LoadNetwork(netId, std::move(optNet));
346 
347  // Creates structures for input & output - matching android nn test.
348  std::vector<float> input1Data
349  {
350  1.0f, 2.0f, 3.0f, 4.0f
351  };
352  std::vector<float> input2Data
353  {
354  2.0f, 1.0f, 5.0f, 2.0f
355  };
356  std::vector<float> outputData(4);
357 
358  InputTensors inputTensors
359  {
360  {0,armnn::ConstTensor(runtime->GetInputTensorInfo(netId, 0), input1Data.data())},
361  {1,armnn::ConstTensor(runtime->GetInputTensorInfo(netId, 0), input2Data.data())}
362  };
363  OutputTensors outputTensors
364  {
365  {0,armnn::Tensor(runtime->GetOutputTensorInfo(netId, 0), outputData.data())}
366  };
367 
368  // Does the inference.
369  runtime->EnqueueWorkload(netId, inputTensors, outputTensors);
370 
371  // Checks the results
372  CHECK(outputData[0] == 1);
373  CHECK(outputData[1] == 1);
374  CHECK(outputData[2] == 3);
375  CHECK(outputData[3] == 2);
376 }
377 
378 TEST_CASE("RefEqualSimpleEndToEndTest")
379 {
380  const std::vector<uint8_t> expectedOutput({ 1, 1, 1, 1, 0, 0, 0, 0,
381  0, 0, 0, 0, 1, 1, 1, 1 });
382 
383  ComparisonSimpleEndToEnd<armnn::DataType::Float32>(defaultBackends,
385  expectedOutput);
386 }
387 
388 TEST_CASE("RefGreaterSimpleEndToEndTest")
389 {
390  const std::vector<uint8_t> expectedOutput({ 0, 0, 0, 0, 1, 1, 1, 1,
391  0, 0, 0, 0, 0, 0, 0, 0 });
392 
393  ComparisonSimpleEndToEnd<armnn::DataType::Float32>(defaultBackends,
395  expectedOutput);
396 }
397 
398 TEST_CASE("RefEqualSimpleEndToEndUint8Test")
399 {
400  const std::vector<uint8_t> expectedOutput({ 1, 1, 1, 1, 0, 0, 0, 0,
401  0, 0, 0, 0, 1, 1, 1, 1 });
402 
403  ComparisonSimpleEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
405  expectedOutput);
406 }
407 
408 TEST_CASE("RefGreaterSimpleEndToEndUint8Test")
409 {
410  const std::vector<uint8_t> expectedOutput({ 0, 0, 0, 0, 1, 1, 1, 1,
411  0, 0, 0, 0, 0, 0, 0, 0 });
412 
413  ComparisonSimpleEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
415  expectedOutput);
416 }
417 
418 TEST_CASE("RefEqualBroadcastEndToEndTest")
419 {
420  const std::vector<uint8_t> expectedOutput({ 1, 0, 1, 1, 0, 0,
421  0, 0, 0, 0, 0, 0 });
422 
423  ComparisonBroadcastEndToEnd<armnn::DataType::Float32>(defaultBackends,
425  expectedOutput);
426 }
427 
428 TEST_CASE("RefGreaterBroadcastEndToEndTest")
429 {
430  const std::vector<uint8_t> expectedOutput({ 0, 1, 0, 0, 0, 1,
431  1, 1, 1, 1, 1, 1 });
432 
433  ComparisonBroadcastEndToEnd<armnn::DataType::Float32>(defaultBackends,
435  expectedOutput);
436 }
437 
438 TEST_CASE("RefEqualBroadcastEndToEndUint8Test")
439 {
440  const std::vector<uint8_t > expectedOutput({ 1, 0, 1, 1, 0, 0,
441  0, 0, 0, 0, 0, 0 });
442 
443  ComparisonBroadcastEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
445  expectedOutput);
446 }
447 
448 TEST_CASE("RefGreaterBroadcastEndToEndUint8Test")
449 {
450  const std::vector<uint8_t> expectedOutput({ 0, 1, 0, 0, 0, 1,
451  1, 1, 1, 1, 1, 1 });
452 
453  ComparisonBroadcastEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends,
455  expectedOutput);
456 }
457 
458 TEST_CASE("RefBatchToSpaceNdEndToEndFloat32NHWCTest")
459 {
460  BatchToSpaceNdEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
461 }
462 
463 TEST_CASE("RefBatchToSpaceNdEndToEndUint8NHWCTest")
464 {
465  BatchToSpaceNdEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
466 }
467 
468 TEST_CASE("RefBatchToSpaceNdEndToEndQSymm16NHWCTest")
469 {
470  BatchToSpaceNdEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
471 }
472 
473 TEST_CASE("RefBatchToSpaceNdEndToEndFloat32NCHWTest")
474 {
475  BatchToSpaceNdEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
476 }
477 
478 TEST_CASE("RefBatchToSpaceNdEndToEndUint8NCHWTest")
479 {
480  BatchToSpaceNdEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
481 }
482 
483 TEST_CASE("RefBatchToSpaceNdEndToEndQSymm16NCHWTest")
484 {
485  BatchToSpaceNdEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
486 }
487 
488 TEST_CASE("RefBatchToSpaceNdEndToEndComplexFloat32NHWCTest")
489 {
490  BatchToSpaceNdComplexEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
491 }
492 
493 TEST_CASE("RefBatchToSpaceNdEndToEndComplexUint8NHWCTest")
494 {
495  BatchToSpaceNdComplexEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
496 }
497 
498 TEST_CASE("RefBatchToSpaceNdEndToEndComplexQSymm16NHWCTest")
499 {
500  BatchToSpaceNdComplexEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
501 }
502 
503 TEST_CASE("RefBatchToSpaceNdEndToEndComplexFloat32NCHWTest")
504 {
505  BatchToSpaceNdComplexEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
506 }
507 
508 TEST_CASE("RefBatchToSpaceNdEndToEndComplexUint8NCHWTest")
509 {
510  BatchToSpaceNdComplexEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
511 }
512 
513 TEST_CASE("RefBatchToSpaceNdEndToEndComplexQSymm16NCHWTest")
514 {
515  BatchToSpaceNdComplexEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
516 }
517 
518 TEST_CASE("RefConcatEndToEndDim0Test")
519 {
520  ConcatDim0EndToEnd<armnn::DataType::Float32>(defaultBackends);
521 }
522 
523 TEST_CASE("RefConcatEndToEndDim0Uint8Test")
524 {
525  ConcatDim0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
526 }
527 
528 TEST_CASE("RefConcatEndToEndDim1Test")
529 {
530  ConcatDim1EndToEnd<armnn::DataType::Float32>(defaultBackends);
531 }
532 
533 TEST_CASE("RefConcatEndToEndDim1Uint8Test")
534 {
535  ConcatDim1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
536 }
537 
538 TEST_CASE("RefConcatEndToEndDim2Test")
539 {
540  ConcatDim2EndToEnd<armnn::DataType::Float32>(defaultBackends);
541 }
542 
543 TEST_CASE("RefConcatEndToEndDim2Uint8Test")
544 {
545  ConcatDim2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
546 }
547 
548 TEST_CASE("RefConcatEndToEndDim3Test")
549 {
550  ConcatDim3EndToEnd<armnn::DataType::Float32>(defaultBackends);
551 }
552 
553 TEST_CASE("RefConcatEndToEndDim3Uint8Test")
554 {
555  ConcatDim3EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
556 }
557 
558 TEST_CASE("RefEluEndToEndTestFloat32")
559 {
560  EluEndToEndTest<armnn::DataType::Float32>(defaultBackends);
561 }
562 
563 TEST_CASE("RefEluEndToEndTestFloat16")
564 {
565  EluEndToEndTest<armnn::DataType::Float16>(defaultBackends);
566 }
567 
568 TEST_CASE("RefEluEndToEndTestBFloat16")
569 {
570  EluEndToEndTest<armnn::DataType::BFloat16>(defaultBackends);
571 }
572 
573 TEST_CASE("RefEluEndToEndTestQAsymmS8")
574 {
575  EluEndToEndTest<armnn::DataType::QAsymmS8>(defaultBackends);
576 }
577 
578 TEST_CASE("RefEluEndToEndTestQAsymmU8")
579 {
580  EluEndToEndTest<armnn::DataType::QAsymmU8>(defaultBackends);
581 }
582 
583 TEST_CASE("RefEluEndToEndTestQSymmS16")
584 {
585  EluEndToEndTest<armnn::DataType::QSymmS16>(defaultBackends);
586 }
587 
588 TEST_CASE("RefFillEndToEndTest")
589 {
590  FillEndToEnd<armnn::DataType::Float32>(defaultBackends);
591 }
592 
593 TEST_CASE("RefFillEndToEndTestFloat16")
594 {
595  FillEndToEnd<armnn::DataType::Float16>(defaultBackends);
596 }
597 
598 TEST_CASE("RefFillEndToEndTestInt32")
599 {
600  FillEndToEnd<armnn::DataType::Signed32>(defaultBackends);
601 }
602 
603 TEST_CASE("RefFullyConnectedEndToEndTestFloat32")
604 {
605  FullyConnectedWithDynamicWeightsEndToEnd<armnn::DataType::Float32>(defaultBackends);
606 }
607 
608 TEST_CASE("RefFullyConnectedEndToEndTestNonConstantWeightsConstantBiasesFloat32")
609 {
610  FullyConnectedWithDynamicOrConstantInputsEndToEnd<armnn::DataType::Float32>(defaultBackends, true, true);
611 }
612 
613 TEST_CASE("RefFullyConnectedEndToEndTestConstantWeightsNonConstantBiasesFloat32")
614 {
615  FullyConnectedWithDynamicOrConstantInputsEndToEnd<armnn::DataType::Float32>(defaultBackends, true, false);
616 }
617 
618 TEST_CASE("RefGatherFloatTest")
619 {
620  GatherEndToEnd<armnn::DataType::Float32>(defaultBackends);
621 }
622 
623 TEST_CASE("RefGatherUint8Test")
624 {
625  GatherEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
626 }
627 
628 TEST_CASE("RefGatherInt16Test")
629 {
630  GatherEndToEnd<armnn::DataType::QSymmS16>(defaultBackends);
631 }
632 
633 TEST_CASE("RefGatherMultiDimFloatTest")
634 {
635  GatherMultiDimEndToEnd<armnn::DataType::Float32>(defaultBackends);
636 }
637 
638 TEST_CASE("RefGatherMultiDimUint8Test")
639 {
640  GatherMultiDimEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
641 }
642 
643 TEST_CASE("RefGatherMultiDimInt16Test")
644 {
645  GatherMultiDimEndToEnd<armnn::DataType::QSymmS16>(defaultBackends);
646 }
647 
648 // DepthToSpace
649 TEST_CASE("DephtToSpaceEndToEndNchwFloat32")
650 {
651  DepthToSpaceEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
652 }
653 
654 TEST_CASE("DephtToSpaceEndToEndNchwFloat16")
655 {
656  DepthToSpaceEndToEnd<armnn::DataType::Float16>(defaultBackends, armnn::DataLayout::NCHW);
657 }
658 
659 TEST_CASE("DephtToSpaceEndToEndNchwUint8")
660 {
661  DepthToSpaceEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
662 }
663 
664 TEST_CASE("DephtToSpaceEndToEndNchwInt16")
665 {
666  DepthToSpaceEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
667 }
668 
669 TEST_CASE("DephtToSpaceEndToEndNhwcFloat32")
670 {
671  DepthToSpaceEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
672 }
673 
674 TEST_CASE("DephtToSpaceEndToEndNhwcFloat16")
675 {
676  DepthToSpaceEndToEnd<armnn::DataType::Float16>(defaultBackends, armnn::DataLayout::NHWC);
677 }
678 
679 TEST_CASE("DephtToSpaceEndToEndNhwcUint8")
680 {
681  DepthToSpaceEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
682 }
683 
684 TEST_CASE("DephtToSpaceEndToEndNhwcInt16")
685 {
686  DepthToSpaceEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
687 }
688 
689 // Dequantize
690 TEST_CASE("DequantizeEndToEndSimpleTest")
691 {
692  DequantizeEndToEndSimple<armnn::DataType::QAsymmU8>(defaultBackends);
693 }
694 
695 TEST_CASE("DequantizeEndToEndOffsetTest")
696 {
697  DequantizeEndToEndOffset<armnn::DataType::QAsymmU8>(defaultBackends);
698 }
699 
700 TEST_CASE("DequantizeEndToEndSimpleInt16Test")
701 {
702  DequantizeEndToEndSimple<armnn::DataType::QSymmS16>(defaultBackends);
703 }
704 
705 TEST_CASE("DequantizeEndToEndOffsetInt16Test")
706 {
707  DequantizeEndToEndOffset<armnn::DataType::QSymmS16>(defaultBackends);
708 }
709 
710 TEST_CASE("RefDetectionPostProcessRegularNmsTest")
711 {
712  std::vector<float> boxEncodings({
713  0.0f, 0.0f, 0.0f, 0.0f,
714  0.0f, 1.0f, 0.0f, 0.0f,
715  0.0f, -1.0f, 0.0f, 0.0f,
716  0.0f, 0.0f, 0.0f, 0.0f,
717  0.0f, 1.0f, 0.0f, 0.0f,
718  0.0f, 0.0f, 0.0f, 0.0f
719  });
720  std::vector<float> scores({
721  0.0f, 0.9f, 0.8f,
722  0.0f, 0.75f, 0.72f,
723  0.0f, 0.6f, 0.5f,
724  0.0f, 0.93f, 0.95f,
725  0.0f, 0.5f, 0.4f,
726  0.0f, 0.3f, 0.2f
727  });
728  std::vector<float> anchors({
729  0.5f, 0.5f, 1.0f, 1.0f,
730  0.5f, 0.5f, 1.0f, 1.0f,
731  0.5f, 0.5f, 1.0f, 1.0f,
732  0.5f, 10.5f, 1.0f, 1.0f,
733  0.5f, 10.5f, 1.0f, 1.0f,
734  0.5f, 100.5f, 1.0f, 1.0f
735  });
736  DetectionPostProcessRegularNmsEndToEnd<armnn::DataType::Float32>(defaultBackends, boxEncodings, scores, anchors);
737 }
738 
739 inline void QuantizeData(uint8_t* quant, const float* dequant, const TensorInfo& info)
740 {
741  for (size_t i = 0; i < info.GetNumElements(); i++)
742  {
743  quant[i] = armnn::Quantize<uint8_t>(dequant[i], info.GetQuantizationScale(), info.GetQuantizationOffset());
744  }
745 }
746 
747 TEST_CASE("RefDetectionPostProcessRegularNmsUint8Test")
748 {
749  armnn::TensorInfo boxEncodingsInfo({ 1, 6, 4 }, armnn::DataType::Float32);
750  armnn::TensorInfo scoresInfo({ 1, 6, 3 }, armnn::DataType::Float32);
751  armnn::TensorInfo anchorsInfo({ 6, 4 }, armnn::DataType::Float32);
752 
753  boxEncodingsInfo.SetQuantizationScale(1.0f);
754  boxEncodingsInfo.SetQuantizationOffset(1);
755  scoresInfo.SetQuantizationScale(0.01f);
756  scoresInfo.SetQuantizationOffset(0);
757  anchorsInfo.SetQuantizationScale(0.5f);
758  anchorsInfo.SetQuantizationOffset(0);
759 
760  std::vector<float> boxEncodings({
761  0.0f, 0.0f, 0.0f, 0.0f,
762  0.0f, 1.0f, 0.0f, 0.0f,
763  0.0f, -1.0f, 0.0f, 0.0f,
764  0.0f, 0.0f, 0.0f, 0.0f,
765  0.0f, 1.0f, 0.0f, 0.0f,
766  0.0f, 0.0f, 0.0f, 0.0f
767  });
768  std::vector<float> scores({
769  0.0f, 0.9f, 0.8f,
770  0.0f, 0.75f, 0.72f,
771  0.0f, 0.6f, 0.5f,
772  0.0f, 0.93f, 0.95f,
773  0.0f, 0.5f, 0.4f,
774  0.0f, 0.3f, 0.2f
775  });
776  std::vector<float> anchors({
777  0.5f, 0.5f, 1.0f, 1.0f,
778  0.5f, 0.5f, 1.0f, 1.0f,
779  0.5f, 0.5f, 1.0f, 1.0f,
780  0.5f, 10.5f, 1.0f, 1.0f,
781  0.5f, 10.5f, 1.0f, 1.0f,
782  0.5f, 100.5f, 1.0f, 1.0f
783  });
784 
785  std::vector<uint8_t> qBoxEncodings(boxEncodings.size(), 0);
786  std::vector<uint8_t> qScores(scores.size(), 0);
787  std::vector<uint8_t> qAnchors(anchors.size(), 0);
788  QuantizeData(qBoxEncodings.data(), boxEncodings.data(), boxEncodingsInfo);
789  QuantizeData(qScores.data(), scores.data(), scoresInfo);
790  QuantizeData(qAnchors.data(), anchors.data(), anchorsInfo);
791  DetectionPostProcessRegularNmsEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, qBoxEncodings,
792  qScores, qAnchors,
793  1.0f, 1, 0.01f, 0, 0.5f, 0);
794 }
795 
796 TEST_CASE("RefDetectionPostProcessFastNmsTest")
797 {
798  std::vector<float> boxEncodings({
799  0.0f, 0.0f, 0.0f, 0.0f,
800  0.0f, 1.0f, 0.0f, 0.0f,
801  0.0f, -1.0f, 0.0f, 0.0f,
802  0.0f, 0.0f, 0.0f, 0.0f,
803  0.0f, 1.0f, 0.0f, 0.0f,
804  0.0f, 0.0f, 0.0f, 0.0f
805  });
806  std::vector<float> scores({
807  0.0f, 0.9f, 0.8f,
808  0.0f, 0.75f, 0.72f,
809  0.0f, 0.6f, 0.5f,
810  0.0f, 0.93f, 0.95f,
811  0.0f, 0.5f, 0.4f,
812  0.0f, 0.3f, 0.2f
813  });
814  std::vector<float> anchors({
815  0.5f, 0.5f, 1.0f, 1.0f,
816  0.5f, 0.5f, 1.0f, 1.0f,
817  0.5f, 0.5f, 1.0f, 1.0f,
818  0.5f, 10.5f, 1.0f, 1.0f,
819  0.5f, 10.5f, 1.0f, 1.0f,
820  0.5f, 100.5f, 1.0f, 1.0f
821  });
822  DetectionPostProcessFastNmsEndToEnd<armnn::DataType::Float32>(defaultBackends, boxEncodings, scores, anchors);
823 }
824 
825 TEST_CASE("RefDetectionPostProcessFastNmsUint8Test")
826 {
827  armnn::TensorInfo boxEncodingsInfo({ 1, 6, 4 }, armnn::DataType::Float32);
828  armnn::TensorInfo scoresInfo({ 1, 6, 3 }, armnn::DataType::Float32);
829  armnn::TensorInfo anchorsInfo({ 6, 4 }, armnn::DataType::Float32);
830 
831  boxEncodingsInfo.SetQuantizationScale(1.0f);
832  boxEncodingsInfo.SetQuantizationOffset(1);
833  scoresInfo.SetQuantizationScale(0.01f);
834  scoresInfo.SetQuantizationOffset(0);
835  anchorsInfo.SetQuantizationScale(0.5f);
836  anchorsInfo.SetQuantizationOffset(0);
837 
838  std::vector<float> boxEncodings({
839  0.0f, 0.0f, 0.0f, 0.0f,
840  0.0f, 1.0f, 0.0f, 0.0f,
841  0.0f, -1.0f, 0.0f, 0.0f,
842  0.0f, 0.0f, 0.0f, 0.0f,
843  0.0f, 1.0f, 0.0f, 0.0f,
844  0.0f, 0.0f, 0.0f, 0.0f
845  });
846  std::vector<float> scores({
847  0.0f, 0.9f, 0.8f,
848  0.0f, 0.75f, 0.72f,
849  0.0f, 0.6f, 0.5f,
850  0.0f, 0.93f, 0.95f,
851  0.0f, 0.5f, 0.4f,
852  0.0f, 0.3f, 0.2f
853  });
854  std::vector<float> anchors({
855  0.5f, 0.5f, 1.0f, 1.0f,
856  0.5f, 0.5f, 1.0f, 1.0f,
857  0.5f, 0.5f, 1.0f, 1.0f,
858  0.5f, 10.5f, 1.0f, 1.0f,
859  0.5f, 10.5f, 1.0f, 1.0f,
860  0.5f, 100.5f, 1.0f, 1.0f
861  });
862 
863  std::vector<uint8_t> qBoxEncodings(boxEncodings.size(), 0);
864  std::vector<uint8_t> qScores(scores.size(), 0);
865  std::vector<uint8_t> qAnchors(anchors.size(), 0);
866  QuantizeData(qBoxEncodings.data(), boxEncodings.data(), boxEncodingsInfo);
867  QuantizeData(qScores.data(), scores.data(), scoresInfo);
868  QuantizeData(qAnchors.data(), anchors.data(), anchorsInfo);
869  DetectionPostProcessFastNmsEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, qBoxEncodings,
870  qScores, qAnchors,
871  1.0f, 1, 0.01f, 0, 0.5f, 0);
872 }
873 
874 // HardSwish
875 TEST_CASE("RefHardSwishEndToEndTestFloat32")
876 {
877  HardSwishEndToEndTest<armnn::DataType::Float32>(defaultBackends);
878 }
879 
880 TEST_CASE("RefHardSwishEndToEndTestFloat16")
881 {
882  HardSwishEndToEndTest<armnn::DataType::Float16>(defaultBackends);
883 }
884 
885 TEST_CASE("RefHardSwishEndToEndTestBFloat16")
886 {
887  HardSwishEndToEndTest<armnn::DataType::BFloat16>(defaultBackends);
888 }
889 
890 TEST_CASE("RefHardSwishEndToEndTestQAsymmS8")
891 {
892  HardSwishEndToEndTest<armnn::DataType::QAsymmS8>(defaultBackends);
893 }
894 
895 TEST_CASE("RefHardSwishEndToEndTestQAsymmU8")
896 {
897  HardSwishEndToEndTest<armnn::DataType::QAsymmU8>(defaultBackends);
898 }
899 
900 TEST_CASE("RefHardSwishEndToEndTestQSymmS16")
901 {
902  HardSwishEndToEndTest<armnn::DataType::QSymmS16>(defaultBackends);
903 }
904 
905 // LogSoftmax
906 TEST_CASE("RefLogSoftmaxEndToEndTest")
907 {
908  LogSoftmaxEndToEndTest(defaultBackends);
909 }
910 
911 TEST_CASE("RefPreluEndToEndTestFloat32")
912 {
913  PreluEndToEndNegativeTest<armnn::DataType::Float32>(defaultBackends);
914 }
915 
916 TEST_CASE("RefPreluEndToEndTestUint8")
917 {
918  PreluEndToEndPositiveTest<armnn::DataType::QAsymmU8>(defaultBackends);
919 }
920 
921 TEST_CASE("RefPreluEndToEndTestQSymm16")
922 {
923  PreluEndToEndPositiveTest<armnn::DataType::QSymmS16>(defaultBackends);
924 }
925 
926 TEST_CASE("RefSpaceToDepthNhwcEndToEndTest1")
927 {
928  SpaceToDepthNhwcEndToEndTest1(defaultBackends);
929 }
930 
931 TEST_CASE("RefSpaceToDepthNchwEndToEndTest1")
932 {
933  SpaceToDepthNchwEndToEndTest1(defaultBackends);
934 }
935 
936 TEST_CASE("RefSpaceToDepthNhwcEndToEndTest2")
937 {
938  SpaceToDepthNhwcEndToEndTest2(defaultBackends);
939 }
940 
941 TEST_CASE("RefSpaceToDepthNchwEndToEndTest2")
942 {
943  SpaceToDepthNchwEndToEndTest2(defaultBackends);
944 }
945 
946 TEST_CASE("RefSplitter1dEndToEndTest")
947 {
948  Splitter1dEndToEnd<armnn::DataType::Float32>(defaultBackends);
949 }
950 
951 TEST_CASE("RefSplitter1dEndToEndUint8Test")
952 {
953  Splitter1dEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
954 }
955 
956 TEST_CASE("RefSplitter2dDim0EndToEndTest")
957 {
958  Splitter2dDim0EndToEnd<armnn::DataType::Float32>(defaultBackends);
959 }
960 
961 TEST_CASE("RefSplitter2dDim1EndToEndTest")
962 {
963  Splitter2dDim1EndToEnd<armnn::DataType::Float32>(defaultBackends);
964 }
965 
966 TEST_CASE("RefSplitter2dDim0EndToEndUint8Test")
967 {
968  Splitter2dDim0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
969 }
970 
971 TEST_CASE("RefSplitter2dDim1EndToEndUint8Test")
972 {
973  Splitter2dDim1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
974 }
975 
976 TEST_CASE("RefSplitter3dDim0EndToEndTest")
977 {
978  Splitter3dDim0EndToEnd<armnn::DataType::Float32>(defaultBackends);
979 }
980 
981 TEST_CASE("RefSplitter3dDim1EndToEndTest")
982 {
983  Splitter3dDim1EndToEnd<armnn::DataType::Float32>(defaultBackends);
984 }
985 
986 TEST_CASE("RefSplitter3dDim2EndToEndTest")
987 {
988  Splitter3dDim2EndToEnd<armnn::DataType::Float32>(defaultBackends);
989 }
990 
991 TEST_CASE("RefSplitter3dDim0EndToEndUint8Test")
992 {
993  Splitter3dDim0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
994 }
995 
996 TEST_CASE("RefSplitter3dDim1EndToEndUint8Test")
997 {
998  Splitter3dDim1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
999 }
1000 
1001 TEST_CASE("RefSplitter3dDim2EndToEndUint8Test")
1002 {
1003  Splitter3dDim2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1004 }
1005 
1006 TEST_CASE("RefSplitter4dDim0EndToEndTest")
1007 {
1008  Splitter4dDim0EndToEnd<armnn::DataType::Float32>(defaultBackends);
1009 }
1010 
1011 TEST_CASE("RefSplitter4dDim1EndToEndTest")
1012 {
1013  Splitter4dDim1EndToEnd<armnn::DataType::Float32>(defaultBackends);
1014 }
1015 
1016 TEST_CASE("RefSplitter4dDim2EndToEndTest")
1017 {
1018  Splitter4dDim2EndToEnd<armnn::DataType::Float32>(defaultBackends);
1019 }
1020 
1021 TEST_CASE("RefSplitter4dDim3EndToEndTest")
1022 {
1023  Splitter4dDim3EndToEnd<armnn::DataType::Float32>(defaultBackends);
1024 }
1025 
1026 TEST_CASE("RefSplitter4dDim0EndToEndUint8Test")
1027 {
1028  Splitter4dDim0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1029 }
1030 
1031 TEST_CASE("RefSplitter4dDim1EndToEndUint8Test")
1032 {
1033  Splitter4dDim1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1034 }
1035 
1036 TEST_CASE("RefSplitter4dDim2EndToEndUint8Test")
1037 {
1038  Splitter4dDim2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1039 }
1040 
1041 TEST_CASE("RefSplitter4dDim3EndToEndUint8Test")
1042 {
1043  Splitter4dDim3EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1044 }
1045 
1046 // TransposeConvolution2d
1047 TEST_CASE("RefTransposeConvolution2dEndToEndFloatNchwTest")
1048 {
1049  TransposeConvolution2dEndToEnd<armnn::DataType::Float32, armnn::DataType::Float32>(
1050  defaultBackends, armnn::DataLayout::NCHW);
1051 }
1052 
1053 TEST_CASE("RefTransposeConvolution2dEndToEndUint8NchwTest")
1054 {
1055  TransposeConvolution2dEndToEnd<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
1056  defaultBackends, armnn::DataLayout::NCHW);
1057 }
1058 
1059 TEST_CASE("RefTransposeConvolution2dEndToEndInt16NchwTest")
1060 {
1061  TransposeConvolution2dEndToEnd<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
1062  defaultBackends, armnn::DataLayout::NCHW);
1063 }
1064 
1065 TEST_CASE("RefTransposeConvolution2dEndToEndFloatNhwcTest")
1066 {
1067  TransposeConvolution2dEndToEnd<armnn::DataType::Float32, armnn::DataType::Float32>(
1068  defaultBackends, armnn::DataLayout::NHWC);
1069 }
1070 
1071 TEST_CASE("RefTransposeConvolution2dEndToEndUint8NhwcTest")
1072 {
1073  TransposeConvolution2dEndToEnd<armnn::DataType::QAsymmU8, armnn::DataType::Signed32>(
1074  defaultBackends, armnn::DataLayout::NHWC);
1075 }
1076 
1077 TEST_CASE("RefTransposeConvolution2dEndToEndInt16NhwcTest")
1078 {
1079  TransposeConvolution2dEndToEnd<armnn::DataType::QSymmS16, armnn::DataType::Signed32>(
1080  defaultBackends, armnn::DataLayout::NHWC);
1081 }
1082 
1083 // Resize Bilinear
1084 TEST_CASE("RefResizeBilinearEndToEndFloatNchwTest")
1085 {
1086  ResizeBilinearEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
1087 }
1088 
1089 TEST_CASE("RefResizeBilinearEndToEndUint8NchwTest")
1090 {
1091  ResizeBilinearEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
1092 }
1093 
1094 TEST_CASE("RefResizeBilinearEndToEndInt16NchwTest")
1095 {
1096  ResizeBilinearEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
1097 }
1098 
1099 TEST_CASE("RefResizeBilinearEndToEndFloatNhwcTest")
1100 {
1101  ResizeBilinearEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
1102 }
1103 
1104 TEST_CASE("RefResizeBilinearEndToEndUint8NhwcTest")
1105 {
1106  ResizeBilinearEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
1107 }
1108 
1109 TEST_CASE("RefResizeBilinearEndToEndInt16NhwcTest")
1110 {
1111  ResizeBilinearEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
1112 }
1113 
1114 // Resize NearestNeighbor
1115 TEST_CASE("RefResizeNearestNeighborEndToEndFloatNchwTest")
1116 {
1117  ResizeNearestNeighborEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NCHW);
1118 }
1119 
1120 TEST_CASE("RefResizeNearestNeighborEndToEndUint8NchwTest")
1121 {
1122  ResizeNearestNeighborEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NCHW);
1123 }
1124 
1125 TEST_CASE("RefResizeNearestNeighborEndToEndInt16NchwTest")
1126 {
1127  ResizeNearestNeighborEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NCHW);
1128 }
1129 
1130 TEST_CASE("RefResizeNearestNeighborEndToEndFloatNhwcTest")
1131 {
1132  ResizeNearestNeighborEndToEnd<armnn::DataType::Float32>(defaultBackends, armnn::DataLayout::NHWC);
1133 }
1134 
1135 TEST_CASE("RefResizeNearestNeighborEndToEndUint8NhwcTest")
1136 {
1137  ResizeNearestNeighborEndToEnd<armnn::DataType::QAsymmU8>(defaultBackends, armnn::DataLayout::NHWC);
1138 }
1139 
1140 TEST_CASE("RefResizeNearestNeighborEndToEndInt16NhwcTest")
1141 {
1142  ResizeNearestNeighborEndToEnd<armnn::DataType::QSymmS16>(defaultBackends, armnn::DataLayout::NHWC);
1143 }
1144 
1145 // InstanceNormalization
1146 TEST_CASE("RefInstanceNormalizationNhwcEndToEndTest1")
1147 {
1148  InstanceNormalizationNhwcEndToEndTest1(defaultBackends);
1149 }
1150 
1151 TEST_CASE("RefInstanceNormalizationNchwEndToEndTest1")
1152 {
1153  InstanceNormalizationNchwEndToEndTest1(defaultBackends);
1154 }
1155 
1156 TEST_CASE("RefInstanceNormalizationNhwcEndToEndTest2")
1157 {
1158  InstanceNormalizationNhwcEndToEndTest2(defaultBackends);
1159 }
1160 
1161 TEST_CASE("RefInstanceNormalizationNchwEndToEndTest2")
1162 {
1163  InstanceNormalizationNchwEndToEndTest2(defaultBackends);
1164 }
1165 
1166 // ArgMinMax
1167 TEST_CASE("RefArgMaxSimpleTest")
1168 {
1169  ArgMaxEndToEndSimple<armnn::DataType::Float32>(defaultBackends);
1170 }
1171 
1172 TEST_CASE("RefArgMaxSimpleUint8Test")
1173 {
1174  ArgMaxEndToEndSimple<armnn::DataType::QAsymmU8>(defaultBackends);
1175 }
1176 
1177 TEST_CASE("RefArgMinSimpleTest")
1178 {
1179  ArgMinEndToEndSimple<armnn::DataType::Float32>(defaultBackends);
1180 }
1181 
1182 TEST_CASE("RefArgMinSimpleUint8Test")
1183 {
1184  ArgMinEndToEndSimple<armnn::DataType::QAsymmU8>(defaultBackends);
1185 }
1186 
1187 TEST_CASE("RefArgMaxAxis0Test")
1188 {
1189  ArgMaxAxis0EndToEnd<armnn::DataType::Float32>(defaultBackends);
1190 }
1191 
1192 TEST_CASE("RefArgMaxAxis0Uint8Test")
1193 {
1194  ArgMaxAxis0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1195 }
1196 
1197 TEST_CASE("RefArgMinAxis0Test")
1198 {
1199  ArgMinAxis0EndToEnd<armnn::DataType::Float32>(defaultBackends);
1200 }
1201 
1202 TEST_CASE("RefArgMinAxis0Uint8Test")
1203 {
1204 
1205  ArgMinAxis0EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1206 }
1207 
1208 TEST_CASE("RefArgMaxAxis1Test")
1209 {
1210  ArgMaxAxis1EndToEnd<armnn::DataType::Float32>(defaultBackends);
1211 }
1212 
1213 TEST_CASE("RefArgMaxAxis1Uint8Test")
1214 {
1215  ArgMaxAxis1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1216 }
1217 
1218 TEST_CASE("RefArgMinAxis1Test")
1219 {
1220  ArgMinAxis1EndToEnd<armnn::DataType::Float32>(defaultBackends);
1221 }
1222 
1223 TEST_CASE("RefArgMinAxis1Uint8Test")
1224 {
1225 
1226  ArgMinAxis1EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1227 }
1228 
1229 TEST_CASE("RefArgMaxAxis2Test")
1230 {
1231  ArgMaxAxis2EndToEnd<armnn::DataType::Float32>(defaultBackends);
1232 }
1233 
1234 TEST_CASE("RefArgMaxAxis2Uint8Test")
1235 {
1236  ArgMaxAxis2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1237 }
1238 
1239 TEST_CASE("RefArgMinAxis2Test")
1240 {
1241  ArgMinAxis2EndToEnd<armnn::DataType::Float32>(defaultBackends);
1242 }
1243 
1244 TEST_CASE("RefArgMinAxis2Uint8Test")
1245 {
1246 
1247  ArgMinAxis2EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1248 }
1249 
1250 TEST_CASE("RefArgMaxAxis3Test")
1251 {
1252  ArgMaxAxis3EndToEnd<armnn::DataType::Float32>(defaultBackends);
1253 }
1254 
1255 TEST_CASE("RefArgMaxAxis3Uint8Test")
1256 {
1257  ArgMaxAxis3EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1258 }
1259 
1260 TEST_CASE("RefArgMinAxis3Test")
1261 {
1262  ArgMinAxis3EndToEnd<armnn::DataType::Float32>(defaultBackends);
1263 }
1264 
1265 TEST_CASE("RefArgMinAxis3Uint8Test")
1266 {
1267 
1268  ArgMinAxis3EndToEnd<armnn::DataType::QAsymmU8>(defaultBackends);
1269 }
1270 
1271 TEST_CASE("RefQLstmEndToEndTest")
1272 {
1273  QLstmEndToEnd(defaultBackends);
1274 }
1275 
1276 TEST_CASE("RefRankEndToEndTest")
1277 {
1278  RankEndToEnd<armnn::DataType::Float32>(defaultBackends);
1279 }
1280 
1281 TEST_CASE("RefRankEndToEndTestFloat16")
1282 {
1283  RankEndToEnd<armnn::DataType::Float16>(defaultBackends);
1284 }
1285 
1286 TEST_CASE("RefRankEndToEndTestInt32")
1287 {
1288  RankEndToEnd<armnn::DataType::Signed32>(defaultBackends);
1289 }
1290 
1291 TEST_CASE("RefRankEndToEndTestQAsymmS8")
1292 {
1293  RankEndToEnd<armnn::DataType::QAsymmS8>(defaultBackends);
1294 }
1295 
1296 TEST_CASE("RefRankEndToEndTestQSymmS16")
1297 {
1298  RankEndToEnd<armnn::DataType::QSymmS16>(defaultBackends);
1299 }
1300 
1301 TEST_CASE("RefRankEndToEndTestQSymmS8")
1302 {
1303  RankEndToEnd<armnn::DataType::QSymmS8>(defaultBackends);
1304 }
1305 
1306 #if !defined(__ANDROID__)
1307 // Only run these tests on non Android platforms
1308 TEST_CASE("RefImportNonAlignedPointerTest")
1309 {
1310  ImportNonAlignedInputPointerTest(defaultBackends);
1311 }
1312 
1313 TEST_CASE("RefExportNonAlignedPointerTest")
1314 {
1315  ExportNonAlignedOutputPointerTest(defaultBackends);
1316 }
1317 
1318 TEST_CASE("RefImportAlignedPointerTest")
1319 {
1320  ImportAlignedPointerTest(defaultBackends);
1321 }
1322 
1323 TEST_CASE("RefImportOnlyWorkload")
1324 {
1325  ImportOnlyWorkload(defaultBackends);
1326 }
1327 
1328 TEST_CASE("RefExportOnlyWorkload")
1329 {
1330  ExportOnlyWorkload(defaultBackends);
1331 }
1332 
1333 TEST_CASE("RefImportAndExportWorkload")
1334 {
1335  ImportAndExportWorkload(defaultBackends);
1336 }
1337 
1338 TEST_CASE("RefExportOutputWithSeveralOutputSlotConnectionsTest")
1339 {
1340  ExportOutputWithSeveralOutputSlotConnectionsTest(defaultBackends);
1341 }
1342 
1343 TEST_CASE("RefStridedSliceInvalidSliceEndToEndTest")
1344 {
1345  StridedSliceInvalidSliceEndToEndTest(defaultBackends);
1346 }
1347 
1348 TEST_CASE("RefThreadSafeFP32StridedSlicedEndToEndTest")
1349 {
1350  armnn::experimental::StridedSlicedEndToEndTest<armnn::DataType::Float32>(defaultBackends, 1);
1351 }
1352 
1353 TEST_CASE("RefAsyncFP32StridedSlicedMultiThreadedEndToEndTest")
1354 {
1355  armnn::experimental::StridedSlicedMultiThreadedEndToEndTest<armnn::DataType::Float32>(defaultBackends);
1356 }
1357 
1358 TEST_CASE("RefAsyncFP32StridedSlicedScheduledMultiThreadedEndToEndTest")
1359 {
1360  armnn::experimental::StridedSlicedEndToEndTest<armnn::DataType::Float32>(defaultBackends, 3);
1361 }
1362 #endif
1363 
1364 }
void SpaceToDepthNchwEndToEndTest1(const std::vector< armnn::BackendId > &defaultBackends)
static IRuntimePtr Create(const CreationOptions &options)
Definition: Runtime.cpp:39
Interface for a layer that is connectable to other layers via InputSlots and OutputSlots.
Definition: INetwork.hpp:61
CPU Execution: Reference C++ kernels.
void InstanceNormalizationNhwcEndToEndTest1(const std::vector< armnn::BackendId > &defaultBackends)
void QuantizeData(RawType *quant, const float *dequant, const armnn::TensorInfo &info)
void LogSoftmaxEndToEndTest(const std::vector< armnn::BackendId > &defaultBackends)
std::unique_ptr< IRuntime, void(*)(IRuntime *runtime)> IRuntimePtr
Definition: IRuntime.hpp:30
std::vector< std::pair< LayerBindingId, class ConstTensor > > InputTensors
Definition: Tensor.hpp:360
void InstanceNormalizationNchwEndToEndTest1(const std::vector< armnn::BackendId > &defaultBackends)
Copyright (c) 2021 ARM Limited and Contributors.
void QLstmEndToEnd(const std::vector< armnn::BackendId > &backends)
void SpaceToDepthNhwcEndToEndTest2(const std::vector< armnn::BackendId > &defaultBackends)
virtual void SetTensorInfo(const TensorInfo &tensorInfo)=0
void SpaceToDepthNhwcEndToEndTest1(const std::vector< armnn::BackendId > &defaultBackends)
A tensor defined by a TensorInfo (shape and data type) and a mutable backing store.
Definition: Tensor.hpp:319
void SpaceToDepthNchwEndToEndTest2(const std::vector< armnn::BackendId > &defaultBackends)
IOptimizedNetworkPtr Optimize(const INetwork &network, const std::vector< BackendId > &backendPreferences, const IDeviceSpec &deviceSpec, const OptimizerOptions &options=OptimizerOptions(), Optional< std::vector< std::string > &> messages=EmptyOptional())
Create an optimized version of the network.
Definition: Network.cpp:1613
int32_t GetQuantizationOffset() const
Definition: Tensor.cpp:480
float GetQuantizationScale() const
Definition: Tensor.cpp:463
int NetworkId
Definition: IRuntime.hpp:24
A tensor defined by a TensorInfo (shape and data type) and an immutable backing store.
Definition: Tensor.hpp:327
std::vector< std::pair< LayerBindingId, class Tensor > > OutputTensors
Definition: Tensor.hpp:361
std::unique_ptr< IOptimizedNetwork, void(*)(IOptimizedNetwork *network)> IOptimizedNetworkPtr
Definition: INetwork.hpp:173
void SetQuantizationScale(float scale)
Definition: Tensor.cpp:475
An ActivationDescriptor for the ActivationLayer.
Definition: Descriptors.hpp:25
min(a, max(b, input)) ReLu1 & ReLu6.
float m_A
Alpha upper bound value used by the activation functions. (BoundedReLu, Linear, TanH, Elu).
Definition: Descriptors.hpp:50
virtual const IInputSlot & GetInputSlot(unsigned int index) const =0
Get a const input slot handle by slot index.
virtual const IOutputSlot & GetOutputSlot(unsigned int index) const =0
Get the const output slot handle by slot index.
void InstanceNormalizationNhwcEndToEndTest2(const std::vector< armnn::BackendId > &defaultBackends)
TEST_SUITE("RefEndToEnd")
void SetQuantizationOffset(int32_t offset)
Definition: Tensor.cpp:491
std::unique_ptr< INetwork, void(*)(INetwork *network)> INetworkPtr
Definition: INetwork.hpp:172
virtual int Connect(IInputSlot &destination)=0
static INetworkPtr Create(NetworkOptions networkOptions={})
Definition: Network.cpp:530
float m_B
Beta lower bound value used by the activation functions. (BoundedReLu, Linear, TanH).
Definition: Descriptors.hpp:52
A SoftmaxDescriptor for the SoftmaxLayer.
ActivationFunction m_Function
The activation function to use (Sigmoid, TanH, Linear, ReLu, BoundedReLu, SoftReLu, LeakyReLu, Abs, Sqrt, Square, Elu).
Definition: Descriptors.hpp:48
unsigned int GetNumElements() const
Definition: Tensor.hpp:196
void InstanceNormalizationNchwEndToEndTest2(const std::vector< armnn::BackendId > &defaultBackends)