ArmNN
 21.08
RefConvolution2dWorkload.cpp
Go to the documentation of this file.
1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
8 #include "ConvImpl.hpp"
9 #include "RefWorkloadUtils.hpp"
10 
11 #include "Profiling.hpp"
12 
13 namespace armnn
14 {
16  const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info)
17  : BaseWorkload<Convolution2dQueueDescriptor>(descriptor, info)
18 {
19  WorkloadInfo detailsInfo;
20  detailsInfo.m_InputTensorInfos = info.m_InputTensorInfos;
21  detailsInfo.m_OutputTensorInfos = info.m_OutputTensorInfos;
23  if (descriptor.m_Parameters.m_BiasEnabled)
24  {
26  }
27 
28  // Report Profiling Details
29  ARMNN_REPORT_PROFILING_WORKLOAD_DESC("RefConvolution2dWorkload_Construct",
30  descriptor.m_Parameters,
31  detailsInfo,
32  this->GetGuid());
33 
34  m_Weight = std::make_unique<ScopedTensorHandle>(*( descriptor.m_Weight ));
35  const TensorInfo& rFilterInfo = m_Weight->GetTensorInfo();
36 
37  m_FilterShape = rFilterInfo.GetShape();
38  m_FilterDecoder = MakeDecoder<float>(rFilterInfo, m_Weight.get()->Map(true));
39 
40  if ( descriptor.m_Parameters.m_BiasEnabled )
41  {
42  m_Bias = std::make_unique<ScopedTensorHandle>(*( descriptor.m_Bias ));
43  const TensorInfo& biasInfo = m_Bias->GetTensorInfo();
44  m_BiasDecoder = MakeDecoder<float>(biasInfo, m_Bias->Map(true));
45  }
46 }
47 
49 {
51 }
52 
54 {
55  Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs);
56 }
57 
58 void RefConvolution2dWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
59 {
60  ARMNN_SCOPED_PROFILING_EVENT_GUID(Compute::CpuRef, "RefConvolution2dWorkload_Execute", this->GetGuid());
61 
62  std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(GetTensorInfo(inputs[0]), inputs[0]->Map());
63  std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(GetTensorInfo(outputs[0]), outputs[0]->Map());
64 
65  const TensorShape& inputShape = GetTensorInfo(inputs[0]).GetShape();
66  const TensorShape& outputShape = GetTensorInfo(outputs[0]).GetShape();
67 
68  Convolve(inputShape, *inputDecoder, outputShape, *outputEncoder, m_FilterShape,
69  *m_FilterDecoder, m_Data.m_Parameters.m_BiasEnabled, m_BiasDecoder.get(),
73 }
74 
75 } //namespace armnn
bool m_BiasEnabled
Enable/disable bias.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
CPU Execution: Reference C++ kernels.
const ConstTensorHandle * m_Weight
const ConstTensorHandle * m_Bias
Copyright (c) 2021 ARM Limited and Contributors.
uint32_t m_DilationY
Dilation along y axis.
uint32_t m_PadTop
Padding top value in the height dimension.
const TensorInfo & GetTensorInfo() const
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
std::vector< TensorInfo > m_InputTensorInfos
RefConvolution2dWorkload(const Convolution2dQueueDescriptor &descriptor, const WorkloadInfo &info)
void Convolve(const TensorShape &rInputShape, Decoder< float > &rInputDecoder, const TensorShape &rOutputShape, Encoder< float > &rOutputEncoder, const TensorShape &rFilterShape, Decoder< float > &rFilterDecoder, bool biasEnabled, Decoder< float > *pBiasDecoder, DataLayout dataLayout, unsigned int paddingTop, unsigned int paddingLeft, unsigned int xStride, unsigned int yStride, unsigned int xDilation, unsigned int yDilation, bool depthwise)
Definition: ConvImpl.cpp:71
std::vector< TensorInfo > m_OutputTensorInfos
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
#define ARMNN_SCOPED_PROFILING_EVENT_GUID(backendId, name, guid)
Definition: Profiling.hpp:222
profiling::ProfilingGuid GetGuid() const final
Definition: Workload.hpp:55
Optional< TensorInfo > m_BiasTensorInfo
uint32_t m_DilationX
Dilation along x axis.
std::vector< ITensorHandle * > m_Outputs
#define ARMNN_REPORT_PROFILING_WORKLOAD_DESC(name, desc, infos, guid)
Definition: Profiling.hpp:226
Contains information about TensorInfos of a layer.
std::vector< ITensorHandle * > m_Inputs
void ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) override
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
Optional< TensorInfo > m_WeightsTensorInfo
uint32_t m_PadLeft
Padding left value in the width dimension.