ArmNN
 21.02
TransposeConvolution2dTestImpl.cpp File Reference
#include "TransposeConvolution2dTestImpl.hpp"
#include <QuantizeHelper.hpp>
#include <armnnUtils/Permute.hpp>
#include <backendsCommon/CpuTensorHandle.hpp>
#include <backendsCommon/test/DataLayoutUtils.hpp>
#include <backendsCommon/test/TensorCopyUtils.hpp>
#include <backendsCommon/test/WorkloadTestUtils.hpp>
#include <reference/RefWorkloadFactory.hpp>
#include <test/TensorHelpers.hpp>
#include <boost/test/unit_test.hpp>
#include <string>
#include <utility>
#include <vector>

Go to the source code of this file.

Functions

template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T >
LayerTestResult< T, 4 > SimpleTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T >
LayerTestResult< T, 4 > PaddedTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T >
LayerTestResult< T, 4 > StridedTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T >
LayerTestResult< T, 4 > MultiChannelTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > TransposeConvolution2dPerAxisQuantTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::Float32 >, 4 > SimpleTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmS8 >, 4 > SimpleTransposeConvolution2dTest< armnn::DataType::QAsymmS8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmU8 >, 4 > SimpleTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QSymmS16 >, 4 > SimpleTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::Float32 >, 4 > PaddedTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmS8 >, 4 > PaddedTransposeConvolution2dTest< armnn::DataType::QAsymmS8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmU8 >, 4 > PaddedTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QSymmS16 >, 4 > PaddedTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::Float32 >, 4 > StridedTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmS8 >, 4 > StridedTransposeConvolution2dTest< armnn::DataType::QAsymmS8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmU8 >, 4 > StridedTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QSymmS16 >, 4 > StridedTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::Float32 >, 4 > MultiChannelTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmS8 >, 4 > MultiChannelTransposeConvolution2dTest< armnn::DataType::QAsymmS8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmU8 >, 4 > MultiChannelTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QSymmS16 >, 4 > MultiChannelTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::ITensorHandleFactory &tensorHandleFactory, const armnn::DataLayout layout)
 

Function Documentation

◆ MultiChannelTransposeConvolution2dTest()

LayerTestResult<T, 4> MultiChannelTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 492 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_BiasEnabled, TransposeConvolution2dDescriptor::m_DataLayout, TransposeConvolution2dDescriptor::m_StrideX, TransposeConvolution2dDescriptor::m_StrideY, and armnn::NHWC.

497 {
498  using namespace armnn;
499 
500  TensorShape inputShape = { 1, 1, 2, 2 };
501  TensorShape outputShape = { 1, 2, 5, 5 };
502 
503  // OIHW for NCHW; OHWI for NHWC
504  TensorShape weightsShape = { 2, 1, 3, 3 };
505  TensorShape biasesShape = { 2 };
506 
507  TensorInfo inputInfo(inputShape, ArmnnType);
508  TensorInfo outputInfo(outputShape, ArmnnType);
509  TensorInfo weightsInfo(weightsShape, ArmnnType);
510  TensorInfo biasesInfo(biasesShape, ArmnnBType);
511 
512  std::vector<float> inputData =
513  {
514  1.f, 2.f,
515  3.f, 4.f,
516  };
517 
518  std::vector<float> weightsData =
519  {
520  1.f, 3.f, 5.f,
521  7.f, 9.f, 11.f,
522  13.f, 15.f, 17.f,
523 
524  2.f, 4.f, 6.f,
525  8.f, 10.f, 12.f,
526  14.f, 16.f, 18.f
527  };
528 
529  std::vector<float> biasesData = { -1.5f, -2.0f };
530 
531  std::vector<float> expectedOutputData =
532  {
533  -0.5f, 1.5f, 5.5f, 4.5f, 8.5f,
534  5.5f, 7.5f, 23.5f, 16.5f, 20.5f,
535  14.5f, 22.5f, 60.5f, 40.5f, 52.5f,
536  19.5f, 25.5f, 59.5f, 34.5f, 42.5f,
537  37.5f, 43.5f, 101.5f, 58.5f, 66.5f,
538 
539  0.0f, 2.0f, 8.0f, 6.0f, 10.0f,
540  6.0f, 8.0f, 26.0f, 18.0f, 22.0f,
541  18.0f, 26.0f, 70.0f, 46.0f, 58.0f,
542  22.0f, 28.0f, 66.0f, 38.0f, 46.0f,
543  40.0f, 46.0f, 108.0f, 62.0f, 70.0f
544  };
545 
547  descriptor.m_StrideX = 2;
548  descriptor.m_StrideY = 2;
549  descriptor.m_BiasEnabled = true;
550  descriptor.m_DataLayout = layout;
551 
552  // swizzle data if needed
553  if (layout == armnn::DataLayout::NHWC)
554  {
555  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
556  }
557 
558  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
559  memoryManager,
560  tensorHandleFactory,
561  descriptor,
562  inputInfo,
563  inputData,
564  outputInfo,
565  expectedOutputData,
566  weightsInfo,
567  weightsData,
568  biasesInfo,
569  biasesData);
570 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
bool m_BiasEnabled
Enable/disable bias.
Copyright (c) 2021 ARM Limited and Contributors.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.

◆ MultiChannelTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 >()

◆ MultiChannelTransposeConvolution2dTest< armnn::DataType::QAsymmS8, armnn::DataType::Signed32 >()

◆ MultiChannelTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 >()

◆ MultiChannelTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 >()

◆ PaddedTransposeConvolution2dTest()

LayerTestResult<T, 4> PaddedTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 310 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_PadLeft, and armnn::NHWC.

316 {
317  using namespace armnn;
318 
319  constexpr unsigned int batches = 1u;
320  constexpr unsigned int channels = 1u;
321 
322  constexpr unsigned int wInput = 4u;
323  constexpr unsigned int hInput = wInput;
324 
325  constexpr unsigned int wOutput = 2u;
326  constexpr unsigned int hOutput = wOutput;
327 
328  constexpr unsigned int wWeights = 3u;
329  constexpr unsigned int hWeights = wWeights;
330 
331  TensorShape inputShape = { batches, channels, hInput, wInput };
332  TensorShape outputShape = { batches, channels, hOutput, wOutput };
333  TensorShape weightsShape = { batches, channels, hWeights, wWeights };
334 
335  TensorInfo inputInfo(inputShape, ArmnnType);
336  TensorInfo outputInfo(outputShape, ArmnnType);
337  TensorInfo weightsInfo(weightsShape, ArmnnType);
338  TensorInfo biasesInfo({ channels }, ArmnnBType);
339 
340  std::vector<float> inputData =
341  {
342  1.f, 3.f, 2.f, 1.f,
343  1.f, 3.f, 3.f, 1.f,
344  2.f, 1.f, 1.f, 3.f,
345  3.f, 2.f, 3.f, 3.f
346  };
347 
348  std::vector<float> weightsData =
349  {
350  1.f, 2.f, 3.f,
351  0.f, 1.f, 0.f,
352  2.f, 1.f, 2.f
353  };
354 
355  std::vector<float> biasesData = { 1.f };
356 
357  std::vector<float> expectedOutputData =
358  {
359  21.f, 21.f,
360  28.f, 27.f
361  };
362 
363  if (biasEnabled)
364  {
365  // apply bias to expected output data
366  std::transform(expectedOutputData.begin(), expectedOutputData.end(), expectedOutputData.begin(),
367  [&](float f) -> float { return f + biasesData[0]; });
368  }
369 
371  descriptor.m_PadLeft = 2;
372  descriptor.m_PadRight = 2;
373  descriptor.m_PadTop = 2;
374  descriptor.m_PadBottom = 2;
375  descriptor.m_StrideX = 1;
376  descriptor.m_StrideY = 1;
377  descriptor.m_BiasEnabled = biasEnabled;
378  descriptor.m_DataLayout = layout;
379 
380  // swizzle data if needed
381  if (layout == armnn::DataLayout::NHWC)
382  {
383  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
384  }
385 
386  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
387  memoryManager,
388  tensorHandleFactory,
389  descriptor,
390  inputInfo,
391  inputData,
392  outputInfo,
393  expectedOutputData,
394  weightsInfo,
395  weightsData,
396  biasesInfo,
397  biasesData);
398 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Copyright (c) 2021 ARM Limited and Contributors.
uint32_t m_PadLeft
Padding left value in the width dimension.

◆ PaddedTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 >()

◆ PaddedTransposeConvolution2dTest< armnn::DataType::QAsymmS8, armnn::DataType::Signed32 >()

◆ PaddedTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 >()

◆ PaddedTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 >()

◆ SimpleTransposeConvolution2dTest()

LayerTestResult<T, 4> SimpleTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 221 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_StrideX, and armnn::NHWC.

227 {
228  using namespace armnn;
229 
230  constexpr unsigned int batches = 1u;
231  constexpr unsigned int channels = 1u;
232 
233  constexpr unsigned int wInput = 3u;
234  constexpr unsigned int hInput = wInput;
235 
236  constexpr unsigned int wOutput = 5u;
237  constexpr unsigned int hOutput = wOutput;
238 
239  constexpr unsigned int wWeights = 3u;
240  constexpr unsigned int hWeights = wWeights;
241 
242  TensorShape inputShape = { batches, channels, hInput, wInput };
243  TensorShape outputShape = { batches, channels, hOutput, wOutput };
244  TensorShape weightsShape = { batches, channels, hWeights, wWeights };
245 
246  TensorInfo inputInfo(inputShape, ArmnnType);
247  TensorInfo outputInfo(outputShape, ArmnnType);
248  TensorInfo weightsInfo(weightsShape, ArmnnType);
249  TensorInfo biasesInfo({ channels }, ArmnnBType);
250 
251  std::vector<float> inputData =
252  {
253  1.f, 1.f, 1.f,
254  1.f, 1.f, 1.f,
255  1.f, 1.f, 1.f
256  };
257 
258  std::vector<float> weightsData =
259  {
260  1.f, 2.f, 3.f,
261  4.f, 5.f, 6.f,
262  7.f, 8.f, 9.f
263  };
264 
265  std::vector<float> biasesData = { 1.f };
266 
267  std::vector<float> expectedOutputData =
268  {
269  1.f, 3.f, 6.f, 5.f, 3.f,
270  5.f, 12.f, 21.f, 16.f, 9.f,
271  12.f, 27.f, 45.f, 33.f, 18.f,
272  11.f, 24.f, 39.f, 28.f, 15.f,
273  7.f, 15.f, 24.f, 17.f, 9.f
274  };
275 
276  if (biasEnabled)
277  {
278  // apply bias to expected output data
279  std::transform(expectedOutputData.begin(), expectedOutputData.end(), expectedOutputData.begin(),
280  [&](float f) -> float { return f + biasesData[0]; });
281  }
282 
284  descriptor.m_StrideX = 1;
285  descriptor.m_StrideY = 1;
286  descriptor.m_BiasEnabled = biasEnabled;
287  descriptor.m_DataLayout = layout;
288 
289  // swizzle data if needed
290  if (layout == armnn::DataLayout::NHWC)
291  {
292  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
293  }
294 
295  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
296  memoryManager,
297  tensorHandleFactory,
298  descriptor,
299  inputInfo,
300  inputData,
301  outputInfo,
302  expectedOutputData,
303  weightsInfo,
304  weightsData,
305  biasesInfo,
306  biasesData);
307 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Copyright (c) 2021 ARM Limited and Contributors.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.

◆ SimpleTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 >()

◆ SimpleTransposeConvolution2dTest< armnn::DataType::QAsymmS8, armnn::DataType::Signed32 >()

◆ SimpleTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 >()

◆ SimpleTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 >()

◆ StridedTransposeConvolution2dTest()

LayerTestResult<T, 4> StridedTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 401 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_StrideX, and armnn::NHWC.

407 {
408  using namespace armnn;
409 
410  constexpr unsigned int batches = 1u;
411  constexpr unsigned int channels = 1u;
412 
413  constexpr unsigned int wInput = 3u;
414  constexpr unsigned int hInput = wInput;
415 
416  constexpr unsigned int wOutput = 7u;
417  constexpr unsigned int hOutput = wOutput;
418 
419  constexpr unsigned int wWeights = 3u;
420  constexpr unsigned int hWeights = wWeights;
421 
422  TensorShape inputShape = { batches, channels, hInput, wInput };
423  TensorShape outputShape = { batches, channels, hOutput, wOutput };
424  TensorShape weightsShape = { batches, channels, hWeights, wWeights };
425 
426  TensorInfo inputInfo(inputShape, ArmnnType);
427  TensorInfo outputInfo(outputShape, ArmnnType);
428  TensorInfo weightsInfo(weightsShape, ArmnnType);
429  TensorInfo biasesInfo({ channels }, ArmnnBType);
430 
431  std::vector<float> inputData =
432  {
433  1.f, 1.f, 1.f,
434  1.f, 1.f, 1.f,
435  1.f, 1.f, 1.f
436  };
437 
438  std::vector<float> weightsData =
439  {
440  1.f, 2.f, 3.f,
441  4.f, 5.f, 6.f,
442  7.f, 8.f, 9.f
443  };
444 
445  std::vector<float> biasesData = { 1.f };
446 
447  std::vector<float> expectedOutputData =
448  {
449  1.f, 2.f, 4.f, 2.f, 4.f, 2.f, 3.f,
450  4.f, 5.f, 10.f, 5.f, 10.f, 5.f, 6.f,
451  8.f, 10.f, 20.f, 10.f, 20.f, 10.f, 12.f,
452  4.f, 5.f, 10.f, 5.f, 10.f, 5.f, 6.f,
453  8.f, 10.f, 20.f, 10.f, 20.f, 10.f, 12.f,
454  4.f, 5.f, 10.f, 5.f, 10.f, 5.f, 6.f,
455  7.f, 8.f, 16.f, 8.f, 16.f, 8.f, 9.f
456  };
457 
458  if (biasEnabled)
459  {
460  // apply bias to expected output data
461  std::transform(expectedOutputData.begin(), expectedOutputData.end(), expectedOutputData.begin(),
462  [&](float f) -> float { return f + biasesData[0]; });
463  }
464 
466  descriptor.m_StrideX = 2;
467  descriptor.m_StrideY = 2;
468  descriptor.m_BiasEnabled = biasEnabled;
469  descriptor.m_DataLayout = layout;
470 
471  // swizzle data if needed
472  if (layout == armnn::DataLayout::NHWC)
473  {
474  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
475  }
476 
477  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
478  memoryManager,
479  tensorHandleFactory,
480  descriptor,
481  inputInfo,
482  inputData,
483  outputInfo,
484  expectedOutputData,
485  weightsInfo,
486  weightsData,
487  biasesInfo,
488  biasesData);
489 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Copyright (c) 2021 ARM Limited and Contributors.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.

◆ StridedTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 >()

◆ StridedTransposeConvolution2dTest< armnn::DataType::QAsymmS8, armnn::DataType::Signed32 >()

◆ StridedTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 >()

◆ StridedTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 >()

◆ TransposeConvolution2dPerAxisQuantTest()

LayerTestResult<uint8_t, 4> TransposeConvolution2dPerAxisQuantTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::ITensorHandleFactory tensorHandleFactory,
const armnn::DataLayout  layout 
)

Definition at line 572 of file TransposeConvolution2dTestImpl.cpp.

References AllocateAndCopyDataToITensorHandle(), CopyDataFromITensorHandle(), CopyDataToITensorHandle(), ITensorHandleFactory::CreateTensorHandle(), IWorkloadFactory::CreateTransposeConvolution2d(), TransposeConvolution2dDescriptor::m_BiasEnabled, TransposeConvolution2dDescriptor::m_DataLayout, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, TransposeConvolution2dDescriptor::m_StrideX, TransposeConvolution2dDescriptor::m_StrideY, armnn::NHWC, LayerTestResult< T, n >::output, LayerTestResult< T, n >::outputExpected, PermuteTensorNchwToNhwc(), armnn::QAsymmU8, armnn::QSymmS8, and armnn::Signed32.

Referenced by BOOST_AUTO_TEST_CASE().

577 {
578  using namespace armnn;
579 
580  const DataType inputType = DataType::QAsymmU8;
581  const DataType kernelType = DataType::QSymmS8;
582  const DataType biasType = DataType::Signed32;
583 
584  TensorInfo inputInfo ({ 1, 1, 2, 2 }, inputType, 0.50f, 10);
585  TensorInfo outputInfo({ 1, 2, 5, 5 }, inputType, 0.50f, 10);
586 
587  const std::vector<float> quantScales{ 0.25f, 0.5f };
588  constexpr unsigned int quantDimension = 0;
589 
590  TensorInfo kernelInfo({ 2, 1, 3, 3 }, kernelType, quantScales, quantDimension);
591 
592  const std::vector<float> biasQuantScales{ 0.125f, 0.25f };
593  TensorInfo biasInfo({ 2 }, biasType, biasQuantScales, quantDimension);
594 
595  std::vector<uint8_t> inputData =
596  {
597  12, 14,
598  16, 18
599  };
600 
601  std::vector<int8_t> kernelData =
602  {
603  4, 12, 20,
604  28, 36, 44,
605  52, 60, 68,
606 
607  4, 8, 12,
608  16, 20, 24,
609  28, 32, 36
610  };
611 
612  std::vector<int32_t> biasData = { -12, -8 };
613 
614  std::vector<uint8_t> expectedOutputData =
615  {
616  9, 13, 21, 19, 27,
617  21, 25, 57, 43, 51,
618  39, 55, 131, 91, 115,
619  49, 61, 129, 79, 95,
620  85, 97, 213, 127, 143,
621 
622  10, 14, 26, 22, 30,
623  22, 26, 62, 46, 54,
624  46, 62, 150, 102, 126,
625  54, 66, 142, 86, 102,
626  90, 102, 226, 134, 150
627  };
628 
629  if (layout == DataLayout::NHWC)
630  {
631  PermuteTensorNchwToNhwc(inputInfo, inputData);
632  PermuteTensorNchwToNhwc(kernelInfo, kernelData);
633  PermuteTensorNchwToNhwc(outputInfo, expectedOutputData);
634  }
635 
637  descriptor.m_StrideX = 2;
638  descriptor.m_StrideY = 2;
639  descriptor.m_BiasEnabled = true;
640  descriptor.m_DataLayout = layout;
641 
642  std::unique_ptr<ITensorHandle> inputHandle = tensorHandleFactory.CreateTensorHandle(inputInfo);
643  std::unique_ptr<ITensorHandle> outputHandle = tensorHandleFactory.CreateTensorHandle(outputInfo);
644 
645  WorkloadInfo workloadInfo;
646  ScopedCpuTensorHandle weightTensor(kernelInfo);
647  ScopedCpuTensorHandle biasTensor(biasInfo);
648 
649  AllocateAndCopyDataToITensorHandle(&weightTensor, kernelData.data());
650  AllocateAndCopyDataToITensorHandle(&biasTensor, biasData.data());
651 
653  queueDescriptor.m_Parameters = descriptor;
654  queueDescriptor.m_Weight = &weightTensor;
655  queueDescriptor.m_Bias = &biasTensor;
656 
657  AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
658  AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
659 
660  std::unique_ptr<IWorkload> workload = workloadFactory.CreateTransposeConvolution2d(queueDescriptor, workloadInfo);
661  inputHandle->Allocate();
662  outputHandle->Allocate();
663 
664  CopyDataToITensorHandle(inputHandle.get(), inputData.data());
665 
666  ExecuteWorkload(*workload, memoryManager);
667 
668  LayerTestResult<uint8_t, 4> ret(outputInfo);
669  CopyDataFromITensorHandle(ret.output.origin(), outputHandle.get());
670  ret.outputExpected = MakeTensor<uint8_t, 4>(outputInfo, expectedOutputData);
671 
672  return ret;
673 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
bool m_BiasEnabled
Enable/disable bias.
Copyright (c) 2021 ARM Limited and Contributors.
void PermuteTensorNchwToNhwc(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
DataType
Definition: Types.hpp:32
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
void CopyDataFromITensorHandle(void *memory, const armnn::ITensorHandle *tensorHandle)
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
virtual std::unique_ptr< IWorkload > CreateTransposeConvolution2d(const TransposeConvolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
Contains information about inputs and outputs to a layer.
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo) const =0
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)