ArmNN
 20.08
RefArgMinMaxWorkload.cpp
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1 //
2 // Copyright © 2019 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
8 #include "ArgMinMax.hpp"
9 #include "RefWorkloadUtils.hpp"
10 #include "Decoders.hpp"
11 #include "Encoders.hpp"
12 #include "Profiling.hpp"
13 
14 namespace armnn
15 {
17  const ArgMinMaxQueueDescriptor& descriptor,
18  const WorkloadInfo& info)
19  : BaseWorkload<ArgMinMaxQueueDescriptor>(descriptor, info) {}
20 
22 {
23  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefArgMinMaxWorkload_Execute");
24 
25  const TensorInfo &inputTensorInfo = GetTensorInfo(m_Data.m_Inputs[0]);
26 
27  std::unique_ptr<Decoder<float>> decoderPtr = MakeDecoder<float>(inputTensorInfo, m_Data.m_Inputs[0]->Map());
28  Decoder<float> &decoder = *decoderPtr;
29 
30  const TensorInfo &outputTensorInfo = GetTensorInfo(m_Data.m_Outputs[0]);
31 
32  int32_t* output = GetOutputTensorData<int32_t>(0, m_Data);
33 
34  ArgMinMax(decoder, output, inputTensorInfo, outputTensorInfo, m_Data.m_Parameters.m_Function,
36 }
37 
38 } //namespace armnn
CPU Execution: Reference C++ kernels.
const ArgMinMaxQueueDescriptor m_Data
Definition: Workload.hpp:46
ArgMinMaxFunction m_Function
Specify if the function is to find Min or Max.
Definition: Descriptors.hpp:64
Copyright (c) 2020 ARM Limited.
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:169
virtual void Execute() const override
std::vector< ITensorHandle * > m_Outputs
RefArgMinMaxWorkload(const ArgMinMaxQueueDescriptor &descriptor, const WorkloadInfo &info)
Contains information about inputs and outputs to a layer.
int m_Axis
Axis to reduce across the input tensor.
Definition: Descriptors.hpp:66
std::vector< ITensorHandle * > m_Inputs
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers