ArmNN
 20.05
ElementwiseBaseLayer.cpp
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1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
8 #include "InternalTypes.hpp"
9 #include "armnn/Exceptions.hpp"
10 #include <armnn/TypesUtils.hpp>
11 #include <armnn/utility/Assert.hpp>
12 
13 namespace armnn
14 {
15 
16 ElementwiseBaseLayer::ElementwiseBaseLayer(unsigned int numInputSlots, unsigned int numOutputSlots,
17  LayerType type, const char* name)
18  : Layer(numInputSlots, numOutputSlots, type, name)
19 {
20 }
21 
22 std::vector<TensorShape> ElementwiseBaseLayer::InferOutputShapes(const std::vector<TensorShape>& inputShapes) const
23 {
24  ARMNN_ASSERT(inputShapes.size() == 2);
25  auto& input0 = inputShapes[0];
26  auto& input1 = inputShapes[1];
27 
28  // Get the max of the inputs.
29  ARMNN_ASSERT(input0.GetNumDimensions() == input1.GetNumDimensions());
30  unsigned int numDims = input0.GetNumDimensions();
31  std::vector<unsigned int> dims(numDims);
32 
33  for (unsigned int i = 0; i < numDims; i++)
34  {
35  unsigned int dim0 = input0[i];
36  unsigned int dim1 = input1[i];
37 
38 #if !NDEBUG
39  // Validate inputs are broadcast compatible.
40  ARMNN_ASSERT_MSG(dim0 == dim1 || dim0 == 1 || dim1 == 1,
41  "Dimensions should either match or one should be of size 1.");
42 #endif
43 
44  dims[i] = std::max(dim0, dim1);
45  }
46 
47  return std::vector<TensorShape>({ TensorShape(numDims, dims.data()) });
48 }
49 
51 {
53 
54  auto inferredShapes = InferOutputShapes({
57  });
58 
59  ARMNN_ASSERT(inferredShapes.size() == 1);
60 
61  std::string msg = GetLayerTypeAsCString(GetType());
62  msg += "Layer: TensorShape set on OutputSlot[0] does not match the inferred shape.";
63  ConditionalThrowIfNotEqual<LayerValidationException>(msg,
65  inferredShapes[0]);
66 }
67 
68 } // namespace armnn
const TensorShape & GetShape() const
Definition: Tensor.hpp:88
std::vector< TensorShape > InferOutputShapes(const std::vector< TensorShape > &inputShapes) const override
By default returns inputShapes if the number of inputs are equal to number of outputs, otherwise infers the output shapes from given input shapes and layer properties.
Copyright (c) 2020 ARM Limited.
const IOutputSlot * GetConnection() const override
Definition: Layer.hpp:199
void VerifyLayerConnections(unsigned int expectedConnections, const CheckLocation &location) const
Definition: Layer.cpp:339
const InputSlot & GetInputSlot(unsigned int index) const override
Get a const input slot handle by slot index.
Definition: Layer.hpp:310
#define ARMNN_ASSERT_MSG(COND, MSG)
Definition: Assert.hpp:15
char const * GetLayerTypeAsCString(LayerType type)
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
#define CHECK_LOCATION()
Definition: Exceptions.hpp:192
ElementwiseBaseLayer(unsigned int numInputSlots, unsigned int numOutputSlots, LayerType type, const char *name)
LayerType GetType() const
Definition: Layer.hpp:259
const OutputSlot & GetOutputSlot(unsigned int index=0) const override
Get the const output slot handle by slot index.
Definition: Layer.hpp:312
virtual const TensorInfo & GetTensorInfo() const =0
const TensorInfo & GetTensorInfo() const override
Definition: Layer.cpp:63
void ValidateTensorShapesFromInputs() override
Check if the input tensor shape(s) will lead to a valid configuration of the element wise operation...