ArmNN
 20.02
TransposeConvolution2dTestImpl.cpp File Reference
#include "TransposeConvolution2dTestImpl.hpp"
#include <QuantizeHelper.hpp>
#include <armnnUtils/Permute.hpp>
#include <backendsCommon/CpuTensorHandle.hpp>
#include <backendsCommon/test/DataLayoutUtils.hpp>
#include <backendsCommon/test/TensorCopyUtils.hpp>
#include <backendsCommon/test/WorkloadTestUtils.hpp>
#include <reference/RefWorkloadFactory.hpp>
#include <test/TensorHelpers.hpp>
#include <boost/test/unit_test.hpp>
#include <string>
#include <utility>
#include <vector>

Go to the source code of this file.

Functions

template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T >
LayerTestResult< T, 4 > SimpleTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T >
LayerTestResult< T, 4 > PaddedTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T >
LayerTestResult< T, 4 > StridedTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template<armnn::DataType ArmnnType, armnn::DataType ArmnnBType, typename T >
LayerTestResult< T, 4 > MultiChannelTransposeConvolution2dTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout)
 
LayerTestResult< uint8_t, 4 > TransposeConvolution2dPerAxisQuantTest (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::Float32 >, 4 > SimpleTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmU8 >, 4 > SimpleTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QSymmS16 >, 4 > SimpleTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::Float32 >, 4 > PaddedTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmU8 >, 4 > PaddedTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QSymmS16 >, 4 > PaddedTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::Float32 >, 4 > StridedTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmU8 >, 4 > StridedTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QSymmS16 >, 4 > StridedTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, bool biasEnabled, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::Float32 >, 4 > MultiChannelTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QAsymmU8 >, 4 > MultiChannelTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout)
 
template LayerTestResult< armnn::ResolveType< armnn::DataType::QSymmS16 >, 4 > MultiChannelTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 > (armnn::IWorkloadFactory &workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr &memoryManager, const armnn::DataLayout layout)
 

Function Documentation

◆ MultiChannelTransposeConvolution2dTest()

LayerTestResult<T, 4> MultiChannelTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::DataLayout  layout 
)

Definition at line 483 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_BiasEnabled, TransposeConvolution2dDescriptor::m_DataLayout, TransposeConvolution2dDescriptor::m_StrideX, TransposeConvolution2dDescriptor::m_StrideY, and armnn::NHWC.

487 {
488  using namespace armnn;
489 
490  TensorShape inputShape = { 1, 1, 2, 2 };
491  TensorShape outputShape = { 1, 2, 5, 5 };
492 
493  // OIHW for NCHW; OHWI for NHWC
494  TensorShape weightsShape = { 2, 1, 3, 3 };
495  TensorShape biasesShape = { 2 };
496 
497  TensorInfo inputInfo(inputShape, ArmnnType);
498  TensorInfo outputInfo(outputShape, ArmnnType);
499  TensorInfo weightsInfo(weightsShape, ArmnnType);
500  TensorInfo biasesInfo(biasesShape, ArmnnBType);
501 
502  std::vector<float> inputData =
503  {
504  1.f, 2.f,
505  3.f, 4.f,
506  };
507 
508  std::vector<float> weightsData =
509  {
510  1.f, 3.f, 5.f,
511  7.f, 9.f, 11.f,
512  13.f, 15.f, 17.f,
513 
514  2.f, 4.f, 6.f,
515  8.f, 10.f, 12.f,
516  14.f, 16.f, 18.f
517  };
518 
519  std::vector<float> biasesData = { -1.5f, -2.0f };
520 
521  std::vector<float> expectedOutputData =
522  {
523  -0.5f, 1.5f, 5.5f, 4.5f, 8.5f,
524  5.5f, 7.5f, 23.5f, 16.5f, 20.5f,
525  14.5f, 22.5f, 60.5f, 40.5f, 52.5f,
526  19.5f, 25.5f, 59.5f, 34.5f, 42.5f,
527  37.5f, 43.5f, 101.5f, 58.5f, 66.5f,
528 
529  0.0f, 2.0f, 8.0f, 6.0f, 10.0f,
530  6.0f, 8.0f, 26.0f, 18.0f, 22.0f,
531  18.0f, 26.0f, 70.0f, 46.0f, 58.0f,
532  22.0f, 28.0f, 66.0f, 38.0f, 46.0f,
533  40.0f, 46.0f, 108.0f, 62.0f, 70.0f
534  };
535 
537  descriptor.m_StrideX = 2;
538  descriptor.m_StrideY = 2;
539  descriptor.m_BiasEnabled = true;
540  descriptor.m_DataLayout = layout;
541 
542  // swizzle data if needed
543  if (layout == armnn::DataLayout::NHWC)
544  {
545  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
546  }
547 
548  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
549  memoryManager,
550  descriptor,
551  inputInfo,
552  inputData,
553  outputInfo,
554  expectedOutputData,
555  weightsInfo,
556  weightsData,
557  biasesInfo,
558  biasesData);
559 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
bool m_BiasEnabled
Enable/disable bias.
Copyright (c) 2020 ARM Limited.
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.

◆ MultiChannelTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 >()

◆ MultiChannelTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 >()

◆ MultiChannelTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 >()

◆ PaddedTransposeConvolution2dTest()

LayerTestResult<T, 4> PaddedTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 305 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_PadLeft, and armnn::NHWC.

310 {
311  using namespace armnn;
312 
313  constexpr unsigned int batches = 1u;
314  constexpr unsigned int channels = 1u;
315 
316  constexpr unsigned int wInput = 4u;
317  constexpr unsigned int hInput = wInput;
318 
319  constexpr unsigned int wOutput = 2u;
320  constexpr unsigned int hOutput = wOutput;
321 
322  constexpr unsigned int wWeights = 3u;
323  constexpr unsigned int hWeights = wWeights;
324 
325  TensorShape inputShape = { batches, channels, hInput, wInput };
326  TensorShape outputShape = { batches, channels, hOutput, wOutput };
327  TensorShape weightsShape = { batches, channels, hWeights, wWeights };
328 
329  TensorInfo inputInfo(inputShape, ArmnnType);
330  TensorInfo outputInfo(outputShape, ArmnnType);
331  TensorInfo weightsInfo(weightsShape, ArmnnType);
332  TensorInfo biasesInfo({ channels }, ArmnnBType);
333 
334  std::vector<float> inputData =
335  {
336  1.f, 3.f, 2.f, 1.f,
337  1.f, 3.f, 3.f, 1.f,
338  2.f, 1.f, 1.f, 3.f,
339  3.f, 2.f, 3.f, 3.f
340  };
341 
342  std::vector<float> weightsData =
343  {
344  1.f, 2.f, 3.f,
345  0.f, 1.f, 0.f,
346  2.f, 1.f, 2.f
347  };
348 
349  std::vector<float> biasesData = { 1.f };
350 
351  std::vector<float> expectedOutputData =
352  {
353  21.f, 21.f,
354  28.f, 27.f
355  };
356 
357  if (biasEnabled)
358  {
359  // apply bias to expected output data
360  std::transform(expectedOutputData.begin(), expectedOutputData.end(), expectedOutputData.begin(),
361  [&](float f) -> float { return f + biasesData[0]; });
362  }
363 
365  descriptor.m_PadLeft = 2;
366  descriptor.m_PadRight = 2;
367  descriptor.m_PadTop = 2;
368  descriptor.m_PadBottom = 2;
369  descriptor.m_StrideX = 1;
370  descriptor.m_StrideY = 1;
371  descriptor.m_BiasEnabled = biasEnabled;
372  descriptor.m_DataLayout = layout;
373 
374  // swizzle data if needed
375  if (layout == armnn::DataLayout::NHWC)
376  {
377  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
378  }
379 
380  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
381  memoryManager,
382  descriptor,
383  inputInfo,
384  inputData,
385  outputInfo,
386  expectedOutputData,
387  weightsInfo,
388  weightsData,
389  biasesInfo,
390  biasesData);
391 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Copyright (c) 2020 ARM Limited.
uint32_t m_PadLeft
Padding left value in the width dimension.

◆ PaddedTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 >()

◆ PaddedTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 >()

◆ PaddedTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 >()

◆ SimpleTransposeConvolution2dTest()

LayerTestResult<T, 4> SimpleTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 218 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_StrideX, and armnn::NHWC.

223 {
224  using namespace armnn;
225 
226  constexpr unsigned int batches = 1u;
227  constexpr unsigned int channels = 1u;
228 
229  constexpr unsigned int wInput = 3u;
230  constexpr unsigned int hInput = wInput;
231 
232  constexpr unsigned int wOutput = 5u;
233  constexpr unsigned int hOutput = wOutput;
234 
235  constexpr unsigned int wWeights = 3u;
236  constexpr unsigned int hWeights = wWeights;
237 
238  TensorShape inputShape = { batches, channels, hInput, wInput };
239  TensorShape outputShape = { batches, channels, hOutput, wOutput };
240  TensorShape weightsShape = { batches, channels, hWeights, wWeights };
241 
242  TensorInfo inputInfo(inputShape, ArmnnType);
243  TensorInfo outputInfo(outputShape, ArmnnType);
244  TensorInfo weightsInfo(weightsShape, ArmnnType);
245  TensorInfo biasesInfo({ channels }, ArmnnBType);
246 
247  std::vector<float> inputData =
248  {
249  1.f, 1.f, 1.f,
250  1.f, 1.f, 1.f,
251  1.f, 1.f, 1.f
252  };
253 
254  std::vector<float> weightsData =
255  {
256  1.f, 2.f, 3.f,
257  4.f, 5.f, 6.f,
258  7.f, 8.f, 9.f
259  };
260 
261  std::vector<float> biasesData = { 1.f };
262 
263  std::vector<float> expectedOutputData =
264  {
265  1.f, 3.f, 6.f, 5.f, 3.f,
266  5.f, 12.f, 21.f, 16.f, 9.f,
267  12.f, 27.f, 45.f, 33.f, 18.f,
268  11.f, 24.f, 39.f, 28.f, 15.f,
269  7.f, 15.f, 24.f, 17.f, 9.f
270  };
271 
272  if (biasEnabled)
273  {
274  // apply bias to expected output data
275  std::transform(expectedOutputData.begin(), expectedOutputData.end(), expectedOutputData.begin(),
276  [&](float f) -> float { return f + biasesData[0]; });
277  }
278 
280  descriptor.m_StrideX = 1;
281  descriptor.m_StrideY = 1;
282  descriptor.m_BiasEnabled = biasEnabled;
283  descriptor.m_DataLayout = layout;
284 
285  // swizzle data if needed
286  if (layout == armnn::DataLayout::NHWC)
287  {
288  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
289  }
290 
291  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
292  memoryManager,
293  descriptor,
294  inputInfo,
295  inputData,
296  outputInfo,
297  expectedOutputData,
298  weightsInfo,
299  weightsData,
300  biasesInfo,
301  biasesData);
302 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Copyright (c) 2020 ARM Limited.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.

◆ SimpleTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 >()

◆ SimpleTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 >()

◆ SimpleTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 >()

◆ StridedTransposeConvolution2dTest()

LayerTestResult<T, 4> StridedTransposeConvolution2dTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
bool  biasEnabled,
const armnn::DataLayout  layout 
)

Definition at line 394 of file TransposeConvolution2dTestImpl.cpp.

References TransposeConvolution2dDescriptor::m_StrideX, and armnn::NHWC.

399 {
400  using namespace armnn;
401 
402  constexpr unsigned int batches = 1u;
403  constexpr unsigned int channels = 1u;
404 
405  constexpr unsigned int wInput = 3u;
406  constexpr unsigned int hInput = wInput;
407 
408  constexpr unsigned int wOutput = 7u;
409  constexpr unsigned int hOutput = wOutput;
410 
411  constexpr unsigned int wWeights = 3u;
412  constexpr unsigned int hWeights = wWeights;
413 
414  TensorShape inputShape = { batches, channels, hInput, wInput };
415  TensorShape outputShape = { batches, channels, hOutput, wOutput };
416  TensorShape weightsShape = { batches, channels, hWeights, wWeights };
417 
418  TensorInfo inputInfo(inputShape, ArmnnType);
419  TensorInfo outputInfo(outputShape, ArmnnType);
420  TensorInfo weightsInfo(weightsShape, ArmnnType);
421  TensorInfo biasesInfo({ channels }, ArmnnBType);
422 
423  std::vector<float> inputData =
424  {
425  1.f, 1.f, 1.f,
426  1.f, 1.f, 1.f,
427  1.f, 1.f, 1.f
428  };
429 
430  std::vector<float> weightsData =
431  {
432  1.f, 2.f, 3.f,
433  4.f, 5.f, 6.f,
434  7.f, 8.f, 9.f
435  };
436 
437  std::vector<float> biasesData = { 1.f };
438 
439  std::vector<float> expectedOutputData =
440  {
441  1.f, 2.f, 4.f, 2.f, 4.f, 2.f, 3.f,
442  4.f, 5.f, 10.f, 5.f, 10.f, 5.f, 6.f,
443  8.f, 10.f, 20.f, 10.f, 20.f, 10.f, 12.f,
444  4.f, 5.f, 10.f, 5.f, 10.f, 5.f, 6.f,
445  8.f, 10.f, 20.f, 10.f, 20.f, 10.f, 12.f,
446  4.f, 5.f, 10.f, 5.f, 10.f, 5.f, 6.f,
447  7.f, 8.f, 16.f, 8.f, 16.f, 8.f, 9.f
448  };
449 
450  if (biasEnabled)
451  {
452  // apply bias to expected output data
453  std::transform(expectedOutputData.begin(), expectedOutputData.end(), expectedOutputData.begin(),
454  [&](float f) -> float { return f + biasesData[0]; });
455  }
456 
458  descriptor.m_StrideX = 2;
459  descriptor.m_StrideY = 2;
460  descriptor.m_BiasEnabled = biasEnabled;
461  descriptor.m_DataLayout = layout;
462 
463  // swizzle data if needed
464  if (layout == armnn::DataLayout::NHWC)
465  {
466  SwizzleData(inputInfo, inputData, outputInfo, expectedOutputData, weightsInfo, weightsData);
467  }
468 
469  return TransposeConvolution2dTest<ArmnnType, ArmnnBType>(workloadFactory,
470  memoryManager,
471  descriptor,
472  inputInfo,
473  inputData,
474  outputInfo,
475  expectedOutputData,
476  weightsInfo,
477  weightsData,
478  biasesInfo,
479  biasesData);
480 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
Copyright (c) 2020 ARM Limited.
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.

◆ StridedTransposeConvolution2dTest< armnn::DataType::Float32, armnn::DataType::Float32 >()

◆ StridedTransposeConvolution2dTest< armnn::DataType::QAsymmU8, armnn::DataType::Signed32 >()

◆ StridedTransposeConvolution2dTest< armnn::DataType::QSymmS16, armnn::DataType::Signed32 >()

◆ TransposeConvolution2dPerAxisQuantTest()

LayerTestResult<uint8_t, 4> TransposeConvolution2dPerAxisQuantTest ( armnn::IWorkloadFactory workloadFactory,
const armnn::IBackendInternal::IMemoryManagerSharedPtr memoryManager,
const armnn::DataLayout  layout 
)

Definition at line 561 of file TransposeConvolution2dTestImpl.cpp.

References AllocateAndCopyDataToITensorHandle(), CopyDataFromITensorHandle(), CopyDataToITensorHandle(), IWorkloadFactory::CreateTensorHandle(), IWorkloadFactory::CreateTransposeConvolution2d(), TransposeConvolution2dDescriptor::m_BiasEnabled, TransposeConvolution2dDescriptor::m_DataLayout, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, TransposeConvolution2dDescriptor::m_StrideX, TransposeConvolution2dDescriptor::m_StrideY, armnn::NHWC, LayerTestResult< T, n >::output, LayerTestResult< T, n >::outputExpected, PermuteTensorNchwToNhwc(), armnn::QAsymmU8, armnn::QSymmS8, and armnn::Signed32.

Referenced by BOOST_AUTO_TEST_CASE().

565 {
566  using namespace armnn;
567 
568  const DataType inputType = DataType::QAsymmU8;
569  const DataType kernelType = DataType::QSymmS8;
570  const DataType biasType = DataType::Signed32;
571 
572  TensorInfo inputInfo ({ 1, 1, 2, 2 }, inputType, 0.50f, 10);
573  TensorInfo outputInfo({ 1, 2, 5, 5 }, inputType, 0.50f, 10);
574 
575  const std::vector<float> quantScales{ 0.25f, 0.5f };
576  constexpr unsigned int quantDimension = 0;
577 
578  TensorInfo kernelInfo({ 2, 1, 3, 3 }, kernelType, quantScales, quantDimension);
579 
580  const std::vector<float> biasQuantScales{ 0.125f, 0.25f };
581  TensorInfo biasInfo({ 2 }, biasType, biasQuantScales, quantDimension);
582 
583  std::vector<uint8_t> inputData =
584  {
585  12, 14,
586  16, 18
587  };
588 
589  std::vector<int8_t> kernelData =
590  {
591  4, 12, 20,
592  28, 36, 44,
593  52, 60, 68,
594 
595  4, 8, 12,
596  16, 20, 24,
597  28, 32, 36
598  };
599 
600  std::vector<int32_t> biasData = { -12, -8 };
601 
602  std::vector<uint8_t> expectedOutputData =
603  {
604  9, 13, 21, 19, 27,
605  21, 25, 57, 43, 51,
606  39, 55, 131, 91, 115,
607  49, 61, 129, 79, 95,
608  85, 97, 213, 127, 143,
609 
610  10, 14, 26, 22, 30,
611  22, 26, 62, 46, 54,
612  46, 62, 150, 102, 126,
613  54, 66, 142, 86, 102,
614  90, 102, 226, 134, 150
615  };
616 
617  if (layout == DataLayout::NHWC)
618  {
619  PermuteTensorNchwToNhwc(inputInfo, inputData);
620  PermuteTensorNchwToNhwc(kernelInfo, kernelData);
621  PermuteTensorNchwToNhwc(outputInfo, expectedOutputData);
622  }
623 
625  descriptor.m_StrideX = 2;
626  descriptor.m_StrideY = 2;
627  descriptor.m_BiasEnabled = true;
628  descriptor.m_DataLayout = layout;
629 
630  std::unique_ptr<ITensorHandle> inputHandle = workloadFactory.CreateTensorHandle(inputInfo);
631  std::unique_ptr<ITensorHandle> outputHandle = workloadFactory.CreateTensorHandle(outputInfo);
632 
633  WorkloadInfo workloadInfo;
634  ScopedCpuTensorHandle weightTensor(kernelInfo);
635  ScopedCpuTensorHandle biasTensor(biasInfo);
636 
637  AllocateAndCopyDataToITensorHandle(&weightTensor, kernelData.data());
638  AllocateAndCopyDataToITensorHandle(&biasTensor, biasData.data());
639 
641  queueDescriptor.m_Parameters = descriptor;
642  queueDescriptor.m_Weight = &weightTensor;
643  queueDescriptor.m_Bias = &biasTensor;
644 
645  AddInputToWorkload(queueDescriptor, workloadInfo, inputInfo, inputHandle.get());
646  AddOutputToWorkload(queueDescriptor, workloadInfo, outputInfo, outputHandle.get());
647 
648  std::unique_ptr<IWorkload> workload = workloadFactory.CreateTransposeConvolution2d(queueDescriptor, workloadInfo);
649  inputHandle->Allocate();
650  outputHandle->Allocate();
651 
652  CopyDataToITensorHandle(inputHandle.get(), inputData.data());
653 
654  ExecuteWorkload(*workload, memoryManager);
655 
656  LayerTestResult<uint8_t, 4> ret(outputInfo);
657  CopyDataFromITensorHandle(ret.output.origin(), outputHandle.get());
658  ret.outputExpected = MakeTensor<uint8_t, 4>(outputInfo, expectedOutputData);
659 
660  return ret;
661 }
A TransposeConvolution2dDescriptor for the TransposeConvolution2dLayer.
bool m_BiasEnabled
Enable/disable bias.
Copyright (c) 2020 ARM Limited.
void PermuteTensorNchwToNhwc(armnn::TensorInfo &tensorInfo, std::vector< T > &tensorData)
DataType
Definition: Types.hpp:32
void AllocateAndCopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)
DataLayout m_DataLayout
The data layout to be used (NCHW, NHWC).
void CopyDataFromITensorHandle(void *memory, const armnn::ITensorHandle *tensorHandle)
virtual std::unique_ptr< ITensorHandle > CreateTensorHandle(const TensorInfo &tensorInfo, const bool IsMemoryManaged=true) const =0
uint32_t m_StrideX
Stride value when proceeding through input for the width dimension.
uint32_t m_StrideY
Stride value when proceeding through input for the height dimension.
virtual std::unique_ptr< IWorkload > CreateTransposeConvolution2d(const TransposeConvolution2dQueueDescriptor &descriptor, const WorkloadInfo &info) const
Contains information about inputs and outputs to a layer.
void CopyDataToITensorHandle(armnn::ITensorHandle *tensorHandle, const void *memory)