ArmNN
 20.02
RefTransposeConvolution2dWorkload.cpp
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1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
8 #include "RefWorkloadUtils.hpp"
10 
11 #include <Profiling.hpp>
12 
13 namespace armnn
14 {
15 
17  const TransposeConvolution2dQueueDescriptor& descriptor, const WorkloadInfo& info) :
19 {
20  // set up weights decoder
21  m_Weights = std::make_unique<ScopedCpuTensorHandle>(*(descriptor.m_Weight));
22  const TensorInfo& weightsInfo = m_Weights->GetTensorInfo();
23 
24  m_WeightsDecoder = MakeDecoder<float>(weightsInfo, m_Weights->Map(true));
25  m_WeightsShape = weightsInfo.GetShape();
26 
27  // set up biases decoder
28  if (descriptor.m_Parameters.m_BiasEnabled)
29  {
30  m_Biases = std::make_unique<ScopedCpuTensorHandle>(*(descriptor.m_Bias));
31  const TensorInfo& biasesInfo = m_Biases->GetTensorInfo();
32  m_BiasesDecoder = MakeDecoder<float>(biasesInfo, m_Biases->Map(true));
33  }
34 }
35 
37 {
38  // set up input decoder
39  const ITensorHandle* input = m_Data.m_Inputs[0];
40  const TensorInfo& inputInfo = GetTensorInfo(input);
41 
42  m_InputShape = inputInfo.GetShape();
43  m_InputDecoder = MakeDecoder<float>(inputInfo);
44 
45  // set up output encoder
46  ITensorHandle* output = m_Data.m_Outputs[0];
47  const TensorInfo& outputInfo = GetTensorInfo(output);
48 
49  m_OutputShape = outputInfo.GetShape();
50  m_OutputEncoder = MakeEncoder<float>(outputInfo);
51 }
52 
54 {
55  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefTransposeConvolution2dWorkload_Execute");
56 
57  m_InputDecoder->Reset(m_Data.m_Inputs[0]->Map());
58  m_OutputEncoder->Reset(m_Data.m_Outputs[0]->Map());
59 
61  m_InputShape,
62  *m_InputDecoder,
63  m_OutputShape,
64  *m_OutputEncoder,
65  m_WeightsShape,
66  *m_WeightsDecoder,
67  m_BiasesDecoder.get());
68 }
69 
70 } // namespace armnn
const TensorShape & GetShape() const
Definition: Tensor.hpp:88
CPU Execution: Reference C++ kernels.
bool m_BiasEnabled
Enable/disable bias.
const TransposeConvolution2dQueueDescriptor m_Data
Definition: Workload.hpp:46
void TransposeConvolution2dImpl(const TransposeConvolution2dDescriptor &descriptor, const TensorShape &inputShape, Decoder< float > &inputDecoder, const TensorShape &outputShape, Encoder< float > &outputEncoder, const TensorShape &weightsShape, Decoder< float > &weightsDecoder, Decoder< float > *biasesDecoder)
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
Copyright (c) 2020 ARM Limited.
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:169
RefTransposeConvolution2dWorkload(const TransposeConvolution2dQueueDescriptor &descriptor, const WorkloadInfo &info)
std::vector< ITensorHandle * > m_Outputs
Contains information about inputs and outputs to a layer.
std::vector< ITensorHandle * > m_Inputs