From 616e775763280992de92287b129dc335be91a24c Mon Sep 17 00:00:00 2001
From: arovir01 <Aron.Virginas-Tar@arm.com>
Date: Mon, 1 Oct 2018 17:08:59 +0100
Subject: IVGCVSW-1913: Fix for ValidationTest.concat_float_3_relaxed

* Added RefPermuteFloat16Workload to serve as a fallback when CL
  does not support the required permute configuration for FP16
* Move Half.hpp to armnnUtils as the utils library should not be
  including private header files from the armnn library

Change-Id: Ibf0f698451e8406f7ed7cce470dab60b6d16361d
---
 src/backends/test/ConvertFp16ToFp32TestImpl.hpp |  2 +-
 src/backends/test/ConvertFp32ToFp16TestImpl.hpp |  4 ++--
 src/backends/test/LayerTests.hpp                |  2 +-
 src/backends/test/TensorCopyUtils.cpp           | 12 +++++++-----
 4 files changed, 11 insertions(+), 9 deletions(-)

(limited to 'src/backends/test')

diff --git a/src/backends/test/ConvertFp16ToFp32TestImpl.hpp b/src/backends/test/ConvertFp16ToFp32TestImpl.hpp
index b75879dea6..483689df4c 100644
--- a/src/backends/test/ConvertFp16ToFp32TestImpl.hpp
+++ b/src/backends/test/ConvertFp16ToFp32TestImpl.hpp
@@ -8,13 +8,13 @@
 #include <armnn/ArmNN.hpp>
 #include <armnn/Tensor.hpp>
 #include <armnn/TypesUtils.hpp>
+#include <armnnUtils/Half.hpp>
 
 #include <backends/WorkloadInfo.hpp>
 #include <backends/CpuTensorHandle.hpp>
 
 #include <test/TensorHelpers.hpp>
 
-#include <Half.hpp>
 
 LayerTestResult<float, 4> SimpleConvertFp16ToFp32Test(armnn::IWorkloadFactory& workloadFactory)
 {
diff --git a/src/backends/test/ConvertFp32ToFp16TestImpl.hpp b/src/backends/test/ConvertFp32ToFp16TestImpl.hpp
index 1325b4b054..e4698a93e5 100644
--- a/src/backends/test/ConvertFp32ToFp16TestImpl.hpp
+++ b/src/backends/test/ConvertFp32ToFp16TestImpl.hpp
@@ -8,13 +8,13 @@
 #include <armnn/ArmNN.hpp>
 #include <armnn/Tensor.hpp>
 #include <armnn/TypesUtils.hpp>
+#include <armnnUtils/Half.hpp>
 
 #include <backends/WorkloadInfo.hpp>
 #include <backends/CpuTensorHandle.hpp>
 
 #include <test/TensorHelpers.hpp>
 
-#include <Half.hpp>
 
 LayerTestResult<armnn::Half, 4> SimpleConvertFp32ToFp16Test(armnn::IWorkloadFactory& workloadFactory)
 {
@@ -52,4 +52,4 @@ LayerTestResult<armnn::Half, 4> SimpleConvertFp32ToFp16Test(armnn::IWorkloadFact
     CopyDataFromITensorHandle(&ret.output[0][0][0][0], outputHandle.get());
 
     return ret;
-}
\ No newline at end of file
+}
diff --git a/src/backends/test/LayerTests.hpp b/src/backends/test/LayerTests.hpp
index 9dc3afa150..8939903432 100644
--- a/src/backends/test/LayerTests.hpp
+++ b/src/backends/test/LayerTests.hpp
@@ -6,7 +6,7 @@
 
 #include "armnn/ArmNN.hpp"
 #include "armnn/Tensor.hpp"
-#include "Half.hpp"
+#include "armnnUtils/Half.hpp"
 
 #include <boost/multi_array.hpp>
 #include <boost/assert.hpp>
diff --git a/src/backends/test/TensorCopyUtils.cpp b/src/backends/test/TensorCopyUtils.cpp
index e92469aaa3..7e17e8b9fd 100644
--- a/src/backends/test/TensorCopyUtils.cpp
+++ b/src/backends/test/TensorCopyUtils.cpp
@@ -3,13 +3,11 @@
 // SPDX-License-Identifier: MIT
 //
 
-#include <algorithm>
-#include <cstring>
-#include <boost/cast.hpp>
-#include <Half.hpp>
-
 #include "TensorCopyUtils.hpp"
 
+#include <armnnUtils/Half.hpp>
+
+
 #ifdef ARMCOMPUTECL_ENABLED
 #include <backends/cl/ClTensorHandle.hpp>
 #endif
@@ -24,6 +22,10 @@
 
 #include <backends/CpuTensorHandle.hpp>
 
+#include <boost/cast.hpp>
+#include <algorithm>
+#include <cstring>
+
 void CopyDataToITensorHandle(armnn::ITensorHandle* tensorHandle, const void* mem)
 {
     switch (tensorHandle->GetType())
-- 
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