From 3ae3f978cf9ce3174609b7152af87acb410b0fe0 Mon Sep 17 00:00:00 2001 From: Keith Davis Date: Fri, 21 May 2021 16:33:48 +0100 Subject: MLCE-510 Add CpuRef Shape Operator to ArmNN * Add front end * Add reference workload * Serialization/Deserialization * Add unit tests * Update ArmNN Versioning Signed-off-by: Keith Davis Change-Id: I6fcb1fa341d6f08dea4003b13544e6e9f53fefd3 --- .../reference/workloads/RefShapeWorkload.hpp | 48 ++++++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 src/backends/reference/workloads/RefShapeWorkload.hpp (limited to 'src/backends/reference/workloads/RefShapeWorkload.hpp') diff --git a/src/backends/reference/workloads/RefShapeWorkload.hpp b/src/backends/reference/workloads/RefShapeWorkload.hpp new file mode 100644 index 0000000000..8e2a410b0c --- /dev/null +++ b/src/backends/reference/workloads/RefShapeWorkload.hpp @@ -0,0 +1,48 @@ +// +// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#pragma once + +#include +#include + +#include "RefWorkloadUtils.hpp" + +namespace armnn +{ + +struct RefShapeWorkload : public BaseWorkload +{ +public: + using BaseWorkload::BaseWorkload; + virtual void Execute() const override + { + Execute(m_Data.m_Inputs, m_Data.m_Outputs); + } + void ExecuteAsync(WorkingMemDescriptor& workingMemDescriptor) override + { + Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs); + } + +private: + void Execute(std::vector inputs, std::vector outputs) const + { + const TensorShape Shape = GetTensorInfo(inputs[0]).GetShape(); + + const TensorInfo& outputInfo = GetTensorInfo(outputs[0]); + + unsigned int numBytes = + GetTensorInfo(inputs[0]).GetNumDimensions() * GetDataTypeSize(outputInfo.GetDataType()); + + std::memcpy(outputs[0]->Map(), &Shape, numBytes); + outputs[0]->Unmap(); + } +}; + +} //namespace armnn + + + + -- cgit v1.2.1