From 34c1c38944b47b881febdfb9f98103dbdc949ed0 Mon Sep 17 00:00:00 2001 From: John Mcloughlin Date: Wed, 17 May 2023 15:08:36 +0100 Subject: IVGCVSW-7400 POW IVGCVSW-7278 SQUARED_DIFFERENCE to CpuAcc and GpuAcc * Add POW SQUARED_DIFFERENCE and Unit tests for CpuAcc and GpuAcc Signed-off-by: John Mcloughlin Signed-off-by: Teresa Charlin Change-Id: Ifa78af2a2fda2074586d8e4d9a506b1b13fa5755 --- .../cl/workloads/ClElementwiseBinaryWorkload.cpp | 94 ++++++++++++++++++++++ 1 file changed, 94 insertions(+) create mode 100644 src/backends/cl/workloads/ClElementwiseBinaryWorkload.cpp (limited to 'src/backends/cl/workloads/ClElementwiseBinaryWorkload.cpp') diff --git a/src/backends/cl/workloads/ClElementwiseBinaryWorkload.cpp b/src/backends/cl/workloads/ClElementwiseBinaryWorkload.cpp new file mode 100644 index 0000000000..df30feb52a --- /dev/null +++ b/src/backends/cl/workloads/ClElementwiseBinaryWorkload.cpp @@ -0,0 +1,94 @@ +// +// Copyright © 2023 Arm Ltd and Contributors. All rights reserved. +// SPDX-License-Identifier: MIT +// + +#include "ClElementwiseBinaryWorkload.hpp" + +#include +#include +#include +#include + +#include "ClWorkloadUtils.hpp" + +namespace armnn +{ +using namespace armcomputetensorutils; + +ClElementwiseBinaryWorkload::ClElementwiseBinaryWorkload(const ElementwiseBinaryQueueDescriptor& descriptor, + const WorkloadInfo& info, + const arm_compute::CLCompileContext& clCompileContext) + : ClBaseWorkload(descriptor, info) +{ + this->m_Data.ValidateInputsOutputs("ClElementwiseBinaryWorkload", 2, 1); + + arm_compute::ICLTensor &input0 = static_cast(this->m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor &input1 = static_cast(this->m_Data.m_Inputs[1])->GetTensor(); + arm_compute::ICLTensor &output = static_cast(this->m_Data.m_Outputs[0])->GetTensor(); + + const arm_compute::ActivationLayerInfo activationInfo = ConvertAdditionalInfoToAclActivationLayerInfo(descriptor); + { + ARMNN_SCOPED_PROFILING_EVENT(Compute::Undefined, "ClElementwiseBinaryWorkload_configure"); + + switch (descriptor.m_Parameters.m_Operation) + { + case armnn::BinaryOperation::Power: + { + auto powerLayer = std::make_unique(); + powerLayer->configure(clCompileContext, &input0, &input1, &output, activationInfo); + m_ElementwiseBinaryLayer.reset(powerLayer.release()); + break; + } + case armnn::BinaryOperation::SqDiff: + { + auto SqDiffLayer = std::make_unique(); + SqDiffLayer->configure(clCompileContext, &input0, &input1, &output, activationInfo); + m_ElementwiseBinaryLayer.reset(SqDiffLayer.release()); + break; + } + default: + throw InvalidArgumentException("Unknown binary operator", CHECK_LOCATION()); + } + } +} +void ClElementwiseBinaryWorkload::Execute() const +{ + if (m_ElementwiseBinaryLayer) + { + ARMNN_SCOPED_PROFILING_EVENT_CL_GUID("ClElementwiseBinaryWorkload_Execute", this->GetGuid()); + m_ElementwiseBinaryLayer->run(); + } +} + +arm_compute::Status ClElementwiseBinaryValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output, + const ElementwiseBinaryDescriptor& descriptor, + const ActivationDescriptor* activationDescriptor) +{ + const arm_compute::TensorInfo aclInput0Info = BuildArmComputeTensorInfo(input0); + const arm_compute::TensorInfo aclInput1Info = BuildArmComputeTensorInfo(input1); + const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output); + + const arm_compute::ActivationLayerInfo activationInfo = ConvertActivationDescriptorToAclActivationLayerInfo( + activationDescriptor); + + switch (descriptor.m_Operation) + { + case armnn::BinaryOperation::Power: + return arm_compute::CLElementwisePower::validate(&aclInput0Info, + &aclInput1Info, + &aclOutputInfo, + activationInfo); + case armnn::BinaryOperation::SqDiff: + return arm_compute::CLElementwiseSquaredDiff::validate(&aclInput0Info, + &aclInput1Info, + &aclOutputInfo, + activationInfo); + default: + throw InvalidArgumentException("Unknown binary operator", CHECK_LOCATION()); + } +} + +} //namespace armnn \ No newline at end of file -- cgit v1.2.1