From acb3ec51e51542d3011ed87842f87c2261abaaff Mon Sep 17 00:00:00 2001 From: Teresa Charlin Date: Mon, 3 Apr 2023 19:57:00 +0100 Subject: GitHub #719 Set quantization parameter scale to 1.0, instead of 0.0. * Arm NN does not account for int8 or uint8 not quantized types, Tensorflow does. Not quantized int8 and uint8 is the same as quantized int8 and uint8 with scale = 1.0 and offset= 0 Default offset/zero_point was already 0, this review sets the default scale to 1.0. Signed-off-by: Teresa Charlin Change-Id: Ibc3eecc281de516c2cc706e17bde01c64ff9556e --- .../backendsCommon/test/WorkloadDataValidation.cpp | 4 ++-- .../test/layerTests/ActivationTestImpl.cpp | 6 +++--- .../test/layerTests/FullyConnectedTestImpl.cpp | 4 ++-- .../test/layerTests/InstanceNormalizationTestImpl.cpp | 4 ++-- .../backendsCommon/test/layerTests/LstmTestImpl.cpp | 18 +++++++++--------- .../test/layerTests/SplitterTestImpl.cpp | 4 ++-- .../layerTests/UnidirectionalSequenceLstmTestImpl.cpp | 8 ++++---- 7 files changed, 24 insertions(+), 24 deletions(-) (limited to 'src/backends/backendsCommon') diff --git a/src/backends/backendsCommon/test/WorkloadDataValidation.cpp b/src/backends/backendsCommon/test/WorkloadDataValidation.cpp index 2a09f6508f..6125e62cb2 100644 --- a/src/backends/backendsCommon/test/WorkloadDataValidation.cpp +++ b/src/backends/backendsCommon/test/WorkloadDataValidation.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017,2022 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017,2022-2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -494,7 +494,7 @@ TEST_CASE("LstmQueueDescriptor_Validate") { armnn::DataType dataType = armnn::DataType::Float32; - float qScale = 0.0f; + float qScale = 1.0f; int32_t qOffset = 0; unsigned int batchSize = 2; diff --git a/src/backends/backendsCommon/test/layerTests/ActivationTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/ActivationTestImpl.cpp index 1ef47ddf7b..1dcbdfac9e 100644 --- a/src/backends/backendsCommon/test/layerTests/ActivationTestImpl.cpp +++ b/src/backends/backendsCommon/test/layerTests/ActivationTestImpl.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -316,7 +316,7 @@ LayerTestResult ConstantLinearActivationTestCommon( armnn::IWorkloadFactory& workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager, const armnn::ITensorHandleFactory& tensorHandleFactory, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0) { IgnoreUnused(memoryManager); @@ -1226,7 +1226,7 @@ LayerTestResult CompareActivationTestImpl( const armnn::ITensorHandleFactory& refTensorHandleFactory, armnn::ActivationFunction f, unsigned int batchSize = 5, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0) { IgnoreUnused(memoryManager); diff --git a/src/backends/backendsCommon/test/layerTests/FullyConnectedTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/FullyConnectedTestImpl.cpp index f7519a73bc..35496ce3b2 100644 --- a/src/backends/backendsCommon/test/layerTests/FullyConnectedTestImpl.cpp +++ b/src/backends/backendsCommon/test/layerTests/FullyConnectedTestImpl.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017,2022 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017,2022-2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -172,7 +172,7 @@ LayerTestResult FullyConnectedLargeTestCommon( const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager, const armnn::ITensorHandleFactory& tensorHandleFactory, bool transposeWeights, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0) { unsigned int inputWidth = 1; diff --git a/src/backends/backendsCommon/test/layerTests/InstanceNormalizationTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/InstanceNormalizationTestImpl.cpp index 8d03ff6ea9..ff58506444 100644 --- a/src/backends/backendsCommon/test/layerTests/InstanceNormalizationTestImpl.cpp +++ b/src/backends/backendsCommon/test/layerTests/InstanceNormalizationTestImpl.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2019 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2019, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -32,7 +32,7 @@ LayerTestResult InstanceNormTestImpl( const std::vector& inputValues, const std::vector& expectedOutputValues, armnn::InstanceNormalizationQueueDescriptor descriptor, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0) { IgnoreUnused(memoryManager); diff --git a/src/backends/backendsCommon/test/layerTests/LstmTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/LstmTestImpl.cpp index 2eaaeb5c9b..d666dcbeb1 100644 --- a/src/backends/backendsCommon/test/layerTests/LstmTestImpl.cpp +++ b/src/backends/backendsCommon/test/layerTests/LstmTestImpl.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -33,7 +33,7 @@ void LstmUtilsVectorBatchVectorAddTestImpl( std::vector& expectedOutput, armnn::TensorShape& expectedShape) { - float qScale = 0.0f; + float qScale = 1.0f; int32_t qOffset = 0; armnn::TensorInfo tensorInfo({nBatch, vSize}, ArmnnType, qScale, qOffset ); @@ -60,7 +60,7 @@ void LstmUtilsZeroVectorTestImpl( std::vector& expectedOutput, armnn::TensorShape& expectedShape) { - float qScale = 0.0f; + float qScale = 1.0f; int32_t qOffset = 0; armnn::TensorInfo tensorInfo({vSize}, ArmnnType, qScale, qOffset ); @@ -89,7 +89,7 @@ void LstmUtilsMeanStddevNormalizationTestImpl( std::vector& expectedOutput, armnn::TensorShape& expectedShape) { - float qScale = 0.0f; + float qScale = 1.0f; int32_t qOffset = 0; armnn::TensorInfo tensorInfo({nBatch, vSize}, ArmnnType, qScale, qOffset ); @@ -117,7 +117,7 @@ void LstmUtilsVectorBatchVectorCwiseProductTestImpl( std::vector& expectedOutput, armnn::TensorShape& expectedShape) { - float qScale = 0.0f; + float qScale = 1.0f; int32_t qOffset = 0; armnn::TensorInfo tensorInfo({nBatch, vSize}, ArmnnType, qScale, qOffset ); @@ -149,7 +149,7 @@ LstmNoCifgNoPeepholeNoProjectionTestImpl( const std::vector& outputExpected, const armnn::TensorShape& inputShape, const armnn::TensorShape& outputExpectedShape, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0, armnn::DataType constantDataType = armnn::DataType::Float32) { @@ -345,7 +345,7 @@ LstmLayerNoCifgWithPeepholeWithProjectionTestImpl(armnn::IWorkloadFactory& workl const armnn::ITensorHandleFactory& tensorHandleFactory, const std::vector& input, const std::vector& outputExpected, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0, armnn::DataType constantDataType = armnn::DataType::Float32) { @@ -1020,7 +1020,7 @@ LayerTestResult LstmLayerWithCifgWithPeepholeNoProjectionTestImpl( const std::vector& outputExpected, const armnn::TensorShape& inputShape, const armnn::TensorShape& outputExpectedShape, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0, armnn::DataType constantDataType = armnn::DataType::Float32) { @@ -1252,7 +1252,7 @@ LstmLayerNoCifgWithPeepholeWithProjectionWithLayerNormTestImpl(armnn::IWorkloadF const armnn::ITensorHandleFactory& tensorHandleFactory, const std::vector& input, const std::vector& outputExpected, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0, armnn::DataType constantDataType = armnn::DataType::Float32) { diff --git a/src/backends/backendsCommon/test/layerTests/SplitterTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/SplitterTestImpl.cpp index 9e9c29b088..9e3d83c0f4 100644 --- a/src/backends/backendsCommon/test/layerTests/SplitterTestImpl.cpp +++ b/src/backends/backendsCommon/test/layerTests/SplitterTestImpl.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2017 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2017, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -22,7 +22,7 @@ std::vector> SplitterTestCommon( armnn::IWorkloadFactory& workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager, const armnn::ITensorHandleFactory& tensorHandleFactory, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0) { IgnoreUnused(memoryManager); diff --git a/src/backends/backendsCommon/test/layerTests/UnidirectionalSequenceLstmTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/UnidirectionalSequenceLstmTestImpl.cpp index 6effa9c85d..4a63d39800 100644 --- a/src/backends/backendsCommon/test/layerTests/UnidirectionalSequenceLstmTestImpl.cpp +++ b/src/backends/backendsCommon/test/layerTests/UnidirectionalSequenceLstmTestImpl.cpp @@ -1,5 +1,5 @@ // -// Copyright © 2021 Arm Ltd and Contributors. All rights reserved. +// Copyright © 2021, 2023 Arm Ltd and Contributors. All rights reserved. // SPDX-License-Identifier: MIT // @@ -26,7 +26,7 @@ UnidirectionalSequenceLstmTimeMajorSingleBatchTestImpl( const std::vector& outputExpected, const armnn::TensorShape& inputShape, const armnn::TensorShape& outputExpectedShape, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0, armnn::DataType constantDataType = armnn::DataType::Float32) { @@ -222,7 +222,7 @@ LayerTestResult UnidirectionalSequenceLstmLayerFloat32TestImpl( const std::vector& outputExpected, const armnn::TensorShape& inputShape, const armnn::TensorShape& outputExpectedShape, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0, armnn::DataType constantDataType = armnn::DataType::Float32) { IgnoreUnused(memoryManager); @@ -411,7 +411,7 @@ UnidirectionalSequenceLstmLayerFloat32TimeMajorTestImpl( const std::vector& outputExpected, const armnn::TensorShape& inputShape, const armnn::TensorShape& outputExpectedShape, - float qScale = 0.0f, + float qScale = 1.0f, int32_t qOffset = 0, armnn::DataType constantDataType = armnn::DataType::Float32) { IgnoreUnused(memoryManager); -- cgit v1.2.1