From d4fa5456ba596c9fc5e2ab7de836c5157aa7a8f8 Mon Sep 17 00:00:00 2001 From: Finn Williams Date: Mon, 1 Mar 2021 12:31:41 +0000 Subject: IVGCVSW-5741 Update FullyConnected in TfLiteParser to support NonConstWeights !armnn:5180 * Remove unnecessary memcopy for non permeuted const tensors Signed-off-by: Finn Williams Change-Id: Idc3ce2ac001e7d6be61819279de486f093730383 --- src/armnnTfLiteParser/TfLiteParser.hpp | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'src/armnnTfLiteParser/TfLiteParser.hpp') diff --git a/src/armnnTfLiteParser/TfLiteParser.hpp b/src/armnnTfLiteParser/TfLiteParser.hpp index b59571e7c3..07ff4816ea 100644 --- a/src/armnnTfLiteParser/TfLiteParser.hpp +++ b/src/armnnTfLiteParser/TfLiteParser.hpp @@ -83,6 +83,7 @@ public: static const std::string GetVersion(); private: + // No copying allowed until it is wanted and properly implemented TfLiteParserImpl(const TfLiteParserImpl &) = delete; TfLiteParserImpl & operator=(const TfLiteParserImpl &) = delete; @@ -154,7 +155,8 @@ private: void RegisterInputSlots(size_t subgraphIndex, size_t operatorIndex, armnn::IConnectableLayer* layer, - const std::vector& tensorIndexes); + const std::vector& tensorIndexes, + unsigned int startingSlotIndex = 0); void RegisterOutputSlots(size_t subgraphIndex, size_t operatorIndex, armnn::IConnectableLayer* layer, @@ -194,6 +196,13 @@ private: std::unique_ptr m_Int32Data; }; + bool IsConstTensor(TensorRawPtr tensorPtr); + armnn::ConstTensor CreateConstTensorNonPermuted(TensorRawPtr tensorPtr, + armnn::TensorInfo& tensorInfo); + std::pair + CreateConstTensorPermuted(TensorRawPtr tensorPtr, + armnn::TensorInfo& tensorInfo, + armnn::Optional permutationVector); template std::pair @@ -202,11 +211,6 @@ private: armnn::TensorInfo& tensorInfo, armnn::Optional permutationVector); - std::pair - CreateConstTensor(TensorRawPtr tensorPtr, - armnn::TensorInfo& tensorInfo, - armnn::Optional permutationVector); - // Settings for configuring the TfLiteParser armnn::Optional m_Options; -- cgit v1.2.1