From 9e53a35b66b1ec7ceee7c712380a13596175b83b Mon Sep 17 00:00:00 2001 From: arovir01 Date: Fri, 31 Aug 2018 15:26:35 +0100 Subject: IVGCVSW-1784: Rename float32 workloads for ACL Change-Id: I98bdfe9cb12c663d1d5cfa456e2cc967d70ab22b --- .../NeonConvolution2dFloatWorkload.cpp | 40 ++++++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 src/armnn/backends/NeonWorkloads/NeonConvolution2dFloatWorkload.cpp (limited to 'src/armnn/backends/NeonWorkloads/NeonConvolution2dFloatWorkload.cpp') diff --git a/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloatWorkload.cpp b/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloatWorkload.cpp new file mode 100644 index 0000000000..8037cb638f --- /dev/null +++ b/src/armnn/backends/NeonWorkloads/NeonConvolution2dFloatWorkload.cpp @@ -0,0 +1,40 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// See LICENSE file in the project root for full license information. +// + +#include "NeonConvolution2dFloatWorkload.hpp" +#include "backends/CpuTensorHandle.hpp" +#include "backends/ArmComputeTensorUtils.hpp" +#include "backends/NeonLayerSupport.hpp" + +namespace armnn +{ +using namespace armcomputetensorutils; + +NeonConvolution2dFloatWorkload::NeonConvolution2dFloatWorkload(const Convolution2dQueueDescriptor& descriptor, + const WorkloadInfo& info, std::shared_ptr& memoryManager) + : NeonConvolution2dBaseWorkload(descriptor, info, memoryManager) +{ + if (m_Data.m_Parameters.m_BiasEnabled) + { + InitializeArmComputeTensorDataForFloatTypes(*m_BiasTensor, m_Data.m_Bias); + } + + m_ConvolutionLayer->prepare(); + FreeUnusedTensors(); +} + +void NeonConvolution2dFloatWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_NEON("NeonConvolution2dFloatWorkload_Execute"); + m_ConvolutionLayer->run(); +} + +void NeonConvolution2dFloatWorkload::ValidateData() const +{ + m_Data.ValidateInputsOutputs("NeonConvolution2dFloatWorkload", 1, 1); +} + +} //namespace armnn + -- cgit v1.2.1