From 3537c2ca7ebf31c1673b9ec2bb0c17b0406bbae0 Mon Sep 17 00:00:00 2001 From: surmeh01 Date: Fri, 18 May 2018 16:31:43 +0100 Subject: Release 18.05 --- .../ClWorkloads/ClConvolution2dBaseWorkload.cpp | 43 ++++++++++++++++++++++ .../ClWorkloads/ClConvolution2dBaseWorkload.hpp | 19 ++++++++++ .../ClWorkloads/ClConvolution2dFloat32Workload.cpp | 21 +++++------ .../ClWorkloads/ClConvolution2dFloat32Workload.hpp | 10 ++++- .../ClWorkloads/ClConvolution2dUint8Workload.cpp | 22 +++++------ .../ClWorkloads/ClConvolution2dUint8Workload.hpp | 8 +++- .../ClFullyConnectedFloat32Workload.cpp | 5 ++- .../ClFullyConnectedFloat32Workload.hpp | 6 ++- .../ClWorkloads/ClSoftmaxFloat32Workload.cpp | 6 ++- .../ClWorkloads/ClSoftmaxFloat32Workload.hpp | 9 +++-- .../ClWorkloads/ClSoftmaxUint8Workload.cpp | 4 +- .../ClWorkloads/ClSoftmaxUint8Workload.hpp | 10 +++-- 12 files changed, 121 insertions(+), 42 deletions(-) create mode 100644 src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.cpp create mode 100644 src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.hpp (limited to 'src/armnn/backends/ClWorkloads') diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.cpp b/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.cpp new file mode 100644 index 0000000000..9851a22dc6 --- /dev/null +++ b/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.cpp @@ -0,0 +1,43 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// See LICENSE file in the project root for full license information. +// + +#include "ClConvolution2dBaseWorkload.hpp" +#include "backends/ClLayerSupport.hpp" +#include "backends/ClTensorHandle.hpp" +#include "backends/ArmComputeUtils.hpp" +#include "backends/ArmComputeTensorUtils.hpp" + +namespace armnn +{ +using namespace armcomputetensorutils; + +arm_compute::Status ClConvolution2dWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const Convolution2dDescriptor& descriptor, + const TensorInfo& weights, + const TensorInfo& biases) +{ + const arm_compute::TensorInfo aclInputInfo = BuildArmComputeTensorInfo(input); + const arm_compute::TensorInfo aclOutputInfo = BuildArmComputeTensorInfo(output); + const arm_compute::TensorInfo aclWeightsInfo = BuildArmComputeTensorInfo(weights); + arm_compute::TensorInfo aclBiasesInfo; + arm_compute::TensorInfo *optionalAclBiasesInfo = nullptr; + + if (descriptor.m_BiasEnabled) + { + aclBiasesInfo = BuildArmComputeTensorInfo(biases); + optionalAclBiasesInfo = &aclBiasesInfo; + } + + arm_compute::PadStrideInfo layerInfo = BuildArmComputePadStrideInfo(descriptor); + + return arm_compute::CLConvolutionLayer::validate(&aclInputInfo, + &aclWeightsInfo, + optionalAclBiasesInfo, + &aclOutputInfo, + layerInfo); +} + +} diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.hpp b/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.hpp new file mode 100644 index 0000000000..c4ef152361 --- /dev/null +++ b/src/armnn/backends/ClWorkloads/ClConvolution2dBaseWorkload.hpp @@ -0,0 +1,19 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// See LICENSE file in the project root for full license information. +// + +#pragma once + +#include "backends/ClWorkloadUtils.hpp" + +namespace armnn +{ + +arm_compute::Status ClConvolution2dWorkloadValidate(const TensorInfo& input, + const TensorInfo& output, + const Convolution2dDescriptor& descriptor, + const TensorInfo& weights, + const TensorInfo& biases); + +} //namespace armnn diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.cpp b/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.cpp index 6f4069bcc0..d7aef3d223 100644 --- a/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.cpp +++ b/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.cpp @@ -14,8 +14,9 @@ namespace armnn using namespace armcomputetensorutils; ClConvolution2dFloat32Workload::ClConvolution2dFloat32Workload(const Convolution2dQueueDescriptor& descriptor, - const WorkloadInfo& info) + const WorkloadInfo& info, std::shared_ptr& memoryManager) : Float32Workload(descriptor, info) + , m_ConvolutionLayer(memoryManager) { // todo: check tensor shapes match @@ -42,14 +43,11 @@ ClConvolution2dFloat32Workload::ClConvolution2dFloat32Workload(const Convolution arm_compute::ICLTensor& input = static_cast(m_Data.m_Inputs[0])->GetTensor(); arm_compute::ICLTensor& output = static_cast(m_Data.m_Outputs[0])->GetTensor(); - m_pConvolutionLayer = std::make_unique(); - static_cast(m_pConvolutionLayer.get())->configure(&input, - &m_KernelTensor, - optionalBias, - &output, - padStrideInfo); - - BOOST_ASSERT(m_pConvolutionLayer); + m_ConvolutionLayer.configure(&input, + &m_KernelTensor, + optionalBias, + &output, + padStrideInfo); InitialiseArmComputeClTensorData(m_KernelTensor, m_Data.m_Weight->GetConstTensor()); @@ -62,9 +60,8 @@ ClConvolution2dFloat32Workload::ClConvolution2dFloat32Workload(const Convolution void ClConvolution2dFloat32Workload::Execute() const { ARMNN_SCOPED_PROFILING_EVENT(Compute::GpuAcc, "ClConvolution2dFloat32Workload_Execute"); - BOOST_ASSERT(m_pConvolutionLayer); - m_pConvolutionLayer->run(); + m_ConvolutionLayer.run(); } -} //namespace armnn \ No newline at end of file +} //namespace armnn diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.hpp b/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.hpp index 29931056a8..4cf73c89cc 100644 --- a/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.hpp +++ b/src/armnn/backends/ClWorkloads/ClConvolution2dFloat32Workload.hpp @@ -7,16 +7,22 @@ #include "backends/ClWorkloadUtils.hpp" +#include "arm_compute/runtime/MemoryManagerOnDemand.h" + +#include + namespace armnn { + class ClConvolution2dFloat32Workload : public Float32Workload { public: - ClConvolution2dFloat32Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info); + ClConvolution2dFloat32Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, + std::shared_ptr& memoryManager); void Execute() const override; private: - mutable std::unique_ptr m_pConvolutionLayer; + mutable arm_compute::CLConvolutionLayer m_ConvolutionLayer; arm_compute::CLTensor m_KernelTensor; arm_compute::CLTensor m_BiasTensor; diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.cpp b/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.cpp index a3c6ac9dca..cf419e752e 100644 --- a/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.cpp +++ b/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.cpp @@ -14,8 +14,9 @@ namespace armnn using namespace armcomputetensorutils; ClConvolution2dUint8Workload::ClConvolution2dUint8Workload(const Convolution2dQueueDescriptor& descriptor, - const WorkloadInfo& info) + const WorkloadInfo& info, std::shared_ptr& memoryManager) : Uint8Workload(descriptor, info) + , m_ConvolutionLayer(memoryManager) { // todo: check tensor shapes match @@ -42,16 +43,11 @@ ClConvolution2dUint8Workload::ClConvolution2dUint8Workload(const Convolution2dQu arm_compute::ICLTensor& input = static_cast(m_Data.m_Inputs[0])->GetTensor(); arm_compute::ICLTensor& output = static_cast(m_Data.m_Outputs[0])->GetTensor(); - BOOST_ASSERT_MSG(IsClDirectConvolution2dSupported(weightInfo, m_Data.m_Parameters), - "Unsupported parameters for u8 convolution"); - - m_pConvolutionLayer = std::make_unique(); - static_cast(m_pConvolutionLayer.get())->configure(&input, - &m_KernelTensor, - optionalBias, - &output, - padStrideInfo); - BOOST_ASSERT(m_pConvolutionLayer); + m_ConvolutionLayer.configure(&input, + &m_KernelTensor, + optionalBias, + &output, + padStrideInfo); InitialiseArmComputeClTensorData(m_KernelTensor, m_Data.m_Weight->GetConstTensor()); @@ -64,9 +60,9 @@ ClConvolution2dUint8Workload::ClConvolution2dUint8Workload(const Convolution2dQu void ClConvolution2dUint8Workload::Execute() const { ARMNN_SCOPED_PROFILING_EVENT(Compute::GpuAcc, "ClConvolution2dUint8Workload_Execute"); - BOOST_ASSERT(m_pConvolutionLayer); - m_pConvolutionLayer->run(); + m_ConvolutionLayer.run(); } } //namespace armnn + diff --git a/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.hpp b/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.hpp index b2849d773b..d4d3908c80 100644 --- a/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.hpp +++ b/src/armnn/backends/ClWorkloads/ClConvolution2dUint8Workload.hpp @@ -7,6 +7,9 @@ #include "backends/ClWorkloadUtils.hpp" +#include "arm_compute/runtime/MemoryManagerOnDemand.h" + +#include namespace armnn { @@ -14,11 +17,12 @@ namespace armnn class ClConvolution2dUint8Workload : public Uint8Workload { public: - ClConvolution2dUint8Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info); + ClConvolution2dUint8Workload(const Convolution2dQueueDescriptor& descriptor, const WorkloadInfo& info, + std::shared_ptr& memoryManager); void Execute() const override; private: - mutable std::unique_ptr m_pConvolutionLayer; + mutable arm_compute::CLConvolutionLayer m_ConvolutionLayer; arm_compute::CLTensor m_KernelTensor; arm_compute::CLTensor m_BiasTensor; diff --git a/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.cpp b/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.cpp index 96596b9d9c..5dfab9cbbd 100644 --- a/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.cpp +++ b/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.cpp @@ -13,8 +13,9 @@ namespace armnn using namespace armcomputetensorutils; ClFullyConnectedFloat32Workload::ClFullyConnectedFloat32Workload(const FullyConnectedQueueDescriptor& descriptor, - const WorkloadInfo& info) + const WorkloadInfo& info, std::shared_ptr& memoryManager) : Float32Workload(descriptor, info) + , m_FullyConnected(memoryManager) { BuildArmComputeTensor(m_WeightsTensor, m_Data.m_Weight->GetTensorInfo()); @@ -49,4 +50,4 @@ void ClFullyConnectedFloat32Workload::Execute() const m_FullyConnected.run(); } -} //namespace armnn \ No newline at end of file +} //namespace armnn diff --git a/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.hpp b/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.hpp index def20e0831..c8d1227bda 100644 --- a/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.hpp +++ b/src/armnn/backends/ClWorkloads/ClFullyConnectedFloat32Workload.hpp @@ -7,6 +7,9 @@ #include "backends/ClWorkloadUtils.hpp" +#include "arm_compute/runtime/MemoryManagerOnDemand.h" + +#include namespace armnn { @@ -15,7 +18,8 @@ class ClFullyConnectedFloat32Workload : public armnn::Float32Workload& memoryManager); using armnn::Float32Workload::m_Data; void Execute() const override; diff --git a/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.cpp b/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.cpp index 257e76a4df..1d05172b42 100644 --- a/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.cpp +++ b/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.cpp @@ -10,8 +10,10 @@ namespace armnn { -ClSoftmaxFloat32Workload::ClSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info) +ClSoftmaxFloat32Workload::ClSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, + std::shared_ptr& memoryManager) : Float32Workload(descriptor, info) + , m_SoftmaxLayer(memoryManager) { m_Data.ValidateInputsOutputs("ClSoftmaxFloat32Workload", 1, 1); @@ -26,4 +28,4 @@ void ClSoftmaxFloat32Workload::Execute() const m_SoftmaxLayer.run(); } -} //namespace armnn \ No newline at end of file +} //namespace armnn diff --git a/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.hpp b/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.hpp index a26bbe851d..cf5c45ac6f 100644 --- a/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.hpp +++ b/src/armnn/backends/ClWorkloads/ClSoftmaxFloat32Workload.hpp @@ -7,13 +7,18 @@ #include "backends/ClWorkloadUtils.hpp" +#include "arm_compute/runtime/MemoryManagerOnDemand.h" + +#include + namespace armnn { class ClSoftmaxFloat32Workload : public Float32Workload { public: - ClSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info); + ClSoftmaxFloat32Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, + std::shared_ptr& memoryManager); void Execute() const override; private: @@ -22,5 +27,3 @@ private: } //namespace armnn - - diff --git a/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.cpp b/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.cpp index 9e856fea94..ee9ab4754b 100644 --- a/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.cpp +++ b/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.cpp @@ -10,8 +10,10 @@ namespace armnn { -ClSoftmaxUint8Workload::ClSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info) +ClSoftmaxUint8Workload::ClSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, + std::shared_ptr& memoryManager) : Uint8Workload(descriptor, info) + , m_SoftmaxLayer(memoryManager) { m_Data.ValidateInputsOutputs("ClSoftmaxUint8Workload", 1, 1); diff --git a/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.hpp b/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.hpp index 07ee6256d8..36c2c781aa 100644 --- a/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.hpp +++ b/src/armnn/backends/ClWorkloads/ClSoftmaxUint8Workload.hpp @@ -7,13 +7,18 @@ #include "backends/ClWorkloadUtils.hpp" +#include "arm_compute/runtime/MemoryManagerOnDemand.h" + +#include + namespace armnn { // Softmax class ClSoftmaxUint8Workload : public Uint8Workload { public: - ClSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info); + ClSoftmaxUint8Workload(const SoftmaxQueueDescriptor& descriptor, const WorkloadInfo& info, + std::shared_ptr& memoryManager); void Execute() const override; private: @@ -23,6 +28,3 @@ private: } //namespace armnn - - - -- cgit v1.2.1