From 279f8721824b104def48b426447fb1766d794e8e Mon Sep 17 00:00:00 2001 From: David Beck Date: Wed, 12 Sep 2018 13:50:03 +0100 Subject: IVGCVSW-1843 : remove duplicate code for Ref Arithmetic workloads Change-Id: If94d7b7b06a8c4e2c155b2ab470604a8d20d1027 --- src/armnn/backends/ClWorkloads/ClDivisionFloatWorkload.cpp | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/armnn/backends/ClWorkloads') diff --git a/src/armnn/backends/ClWorkloads/ClDivisionFloatWorkload.cpp b/src/armnn/backends/ClWorkloads/ClDivisionFloatWorkload.cpp index 5858ebd6eb..ad9a1aee68 100644 --- a/src/armnn/backends/ClWorkloads/ClDivisionFloatWorkload.cpp +++ b/src/armnn/backends/ClWorkloads/ClDivisionFloatWorkload.cpp @@ -18,9 +18,6 @@ arm_compute::Status ClDivisionWorkloadValidate(const TensorInfo& input0, const arm_compute::TensorInfo aclInput2 = armcomputetensorutils::BuildArmComputeTensorInfo(input1); const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output); - // At the time of writing, configure() will fail if a rounding policy other than TO_ZERO is supplied to it, - // when providing a scale of 1.0 for F32 tensors, even though the provided rounding policy appears to be - // ignored for F32 tensors. return arm_compute::CLArithmeticDivision::validate(&aclInput1, &aclInput2, &aclOutput); } -- cgit v1.2.1