From 9e53a35b66b1ec7ceee7c712380a13596175b83b Mon Sep 17 00:00:00 2001 From: arovir01 Date: Fri, 31 Aug 2018 15:26:35 +0100 Subject: IVGCVSW-1784: Rename float32 workloads for ACL Change-Id: I98bdfe9cb12c663d1d5cfa456e2cc967d70ab22b --- .../ClWorkloads/ClMultiplicationFloatWorkload.cpp | 59 ++++++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 src/armnn/backends/ClWorkloads/ClMultiplicationFloatWorkload.cpp (limited to 'src/armnn/backends/ClWorkloads/ClMultiplicationFloatWorkload.cpp') diff --git a/src/armnn/backends/ClWorkloads/ClMultiplicationFloatWorkload.cpp b/src/armnn/backends/ClWorkloads/ClMultiplicationFloatWorkload.cpp new file mode 100644 index 0000000000..e161a0a8fe --- /dev/null +++ b/src/armnn/backends/ClWorkloads/ClMultiplicationFloatWorkload.cpp @@ -0,0 +1,59 @@ +// +// Copyright © 2017 Arm Ltd. All rights reserved. +// See LICENSE file in the project root for full license information. +// + +#include "ClMultiplicationFloatWorkload.hpp" +#include "backends/ClTensorHandle.hpp" +#include "backends/CpuTensorHandle.hpp" + +namespace armnn +{ + +arm_compute::Status ClMultiplicationWorkloadValidate(const TensorInfo& input0, + const TensorInfo& input1, + const TensorInfo& output) +{ + const arm_compute::TensorInfo aclInput1 = armcomputetensorutils::BuildArmComputeTensorInfo(input0); + const arm_compute::TensorInfo aclInput2 = armcomputetensorutils::BuildArmComputeTensorInfo(input1); + const arm_compute::TensorInfo aclOutput = armcomputetensorutils::BuildArmComputeTensorInfo(output); + + // At the time of writing, configure() will fail if a rounding policy other than TO_ZERO is supplied to it, + // when providing a scale of 1.0 for F32 tensors, even though the provided rounding policy appears to be + // ignored for F32 tensors. + return arm_compute::CLPixelWiseMultiplication::validate(&aclInput1, + &aclInput2, + &aclOutput, + 1.0f, + arm_compute::ConvertPolicy::SATURATE, + arm_compute::RoundingPolicy::TO_ZERO); +} + + +ClMultiplicationFloatWorkload::ClMultiplicationFloatWorkload(const MultiplicationQueueDescriptor& descriptor, + const WorkloadInfo& info) + : FloatWorkload(descriptor, info) +{ + m_Data.ValidateInputsOutputs("ClMultiplicationFloatWorkload", 2, 1); + + arm_compute::ICLTensor& input0 = static_cast(m_Data.m_Inputs[0])->GetTensor(); + arm_compute::ICLTensor& input1 = static_cast(m_Data.m_Inputs[1])->GetTensor(); + arm_compute::ICLTensor& output = static_cast(m_Data.m_Outputs[0])->GetTensor(); + // Construct + m_PixelWiseMultiplication.configure(&input0, + &input1, + &output, + 1.0f, + arm_compute::ConvertPolicy::SATURATE, + arm_compute::RoundingPolicy::TO_NEAREST_EVEN); +} + +void ClMultiplicationFloatWorkload::Execute() const +{ + ARMNN_SCOPED_PROFILING_EVENT_CL("ClMultiplicationFloatWorkload_Execute"); + + // Executes the layer. + m_PixelWiseMultiplication.run(); +} + +} //namespace armnn -- cgit v1.2.1