From 03c7ff3f6188240baaeaeb405a357a0c58195fec Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Tue, 22 Aug 2023 12:00:04 +0100 Subject: IVGCVSW-7702 Update Doxygen Docu for 23.08 Signed-off-by: Nikhil Raj Change-Id: I357a9f7e47614589327c1ac5d95b6224ff77103d --- latest/_transpose_convolution2d_8hpp.html | 144 ++++++++++++++++++++++++++++++ 1 file changed, 144 insertions(+) create mode 100644 latest/_transpose_convolution2d_8hpp.html (limited to 'latest/_transpose_convolution2d_8hpp.html') diff --git a/latest/_transpose_convolution2d_8hpp.html b/latest/_transpose_convolution2d_8hpp.html new file mode 100644 index 0000000000..5d922187f1 --- /dev/null +++ b/latest/_transpose_convolution2d_8hpp.html @@ -0,0 +1,144 @@ + + + + + + + + +Arm NN: src/backends/reference/workloads/TransposeConvolution2d.hpp File Reference + + + + + + + + + + + + + + + + +
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+  23.08 +
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+Namespaces | +Functions
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TransposeConvolution2d.hpp File Reference
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#include "Decoders.hpp"
+#include "Encoders.hpp"
+#include <armnn/Descriptors.hpp>
+#include <armnn/Tensor.hpp>
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+Include dependency graph for TransposeConvolution2d.hpp:
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+This graph shows which files directly or indirectly include this file:
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Go to the source code of this file.

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 armnn
 Copyright (c) 2021 ARM Limited and Contributors.
 
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+Functions

void TransposeConvolution2dImpl (const TransposeConvolution2dDescriptor &descriptor, const TensorShape &inputShape, Decoder< float > &inputDecoder, const TensorShape &outputShape, Encoder< float > &outputEncoder, const TensorShape &weightsShape, Decoder< float > &weightsDecoder, Decoder< float > *biasesDecoder)
 
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