From 03c7ff3f6188240baaeaeb405a357a0c58195fec Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Tue, 22 Aug 2023 12:00:04 +0100 Subject: IVGCVSW-7702 Update Doxygen Docu for 23.08 Signed-off-by: Nikhil Raj Change-Id: I357a9f7e47614589327c1ac5d95b6224ff77103d --- latest/_cl_reduce_workload_8cpp_source.html | 220 ++++++++++++++++++++++++++++ 1 file changed, 220 insertions(+) create mode 100644 latest/_cl_reduce_workload_8cpp_source.html (limited to 'latest/_cl_reduce_workload_8cpp_source.html') diff --git a/latest/_cl_reduce_workload_8cpp_source.html b/latest/_cl_reduce_workload_8cpp_source.html new file mode 100644 index 0000000000..3b713ff704 --- /dev/null +++ b/latest/_cl_reduce_workload_8cpp_source.html @@ -0,0 +1,220 @@ + + + + + + + + +Arm NN: src/backends/cl/workloads/ClReduceWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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+  23.08 +
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ClReduceWorkload.cpp
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+Go to the documentation of this file.
1 //
+
2 // Copyright © 2021-2023 Arm Ltd and Contributors. All rights reserved.
+
3 // SPDX-License-Identifier: MIT
+
4 //
+
5 
+
6 #include "ClReduceWorkload.hpp"
+
7 
+
8 #include <cl/ClTensorHandle.hpp>
+
9 #include <aclCommon/ArmComputeUtils.hpp>
+
10 #include <aclCommon/ArmComputeTensorUtils.hpp>
+
11 
+
12 #include "ClWorkloadUtils.hpp"
+
13 
+
14 namespace armnn
+
15 {
+
16 using namespace armcomputetensorutils;
+
17 
+
18 arm_compute::Status ClReduceWorkloadValidate(const TensorInfo& input,
+
19  const TensorInfo& output,
+
20  const ReduceDescriptor& descriptor)
+
21 {
+
22  if (descriptor.m_vAxis.size() == 1 || descriptor.m_vAxis.empty())
+
23  {
+
24  const arm_compute::TensorInfo aclInputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(input);
+
25  const arm_compute::TensorInfo aclOutputInfo = armcomputetensorutils::BuildArmComputeTensorInfo(output);
+
26 
+
27  arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(aclInputInfo.num_dimensions(),
+
28  input.GetNumDimensions(),
+
29  descriptor.m_vAxis);
+
30 
+
31  return arm_compute::CLReductionOperation::validate(&aclInputInfo,
+
32  &aclOutputInfo,
+
33  static_cast<unsigned int>(coords[0]),
+
34  ConvertReductionOperationToAcl(descriptor),
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35  descriptor.m_KeepDims);
+
36  }
+
37  else
+
38  {
+
39  // Validate layer if there are multiple axes.
+
40  arm_compute::Status status;
+
41  IS_MULTI_AXES_REDUCE_SUPPORTED(ClReduceWorkloadValidate, input, descriptor, status);
+
42  return status;
+
43  }
+
44 }
+
45 
+
46 ClReduceWorkload::ClReduceWorkload(const ReduceQueueDescriptor& descriptor, const WorkloadInfo& info)
+
47  : ClBaseWorkload<ReduceQueueDescriptor>(descriptor, info)
+
48 {
+
49  // Report Profiling Details
+
50  ARMNN_REPORT_PROFILING_WORKLOAD_DESC("ClReduceWorkload_Construct",
+
51  descriptor.m_Parameters,
+
52  info,
+
53  this->GetGuid());
+
54 
+
55  m_Data.ValidateInputsOutputs("ClReduceWorkload", 1, 1);
+
56 
+
57  arm_compute::ICLTensor& input = static_cast<IClTensorHandle*>(m_Data.m_Inputs[0])->GetTensor();
+
58  arm_compute::ICLTensor& output = static_cast<IClTensorHandle*>(m_Data.m_Outputs[0])->GetTensor();
+
59 
+
60  arm_compute::Coordinates coords = BuildArmComputeReductionCoordinates(input.info()->num_dimensions(),
+
61  info.m_InputTensorInfos[0].GetNumDimensions(),
+
62  m_Data.m_Parameters.m_vAxis);
+
63  {
+
64  ARMNN_SCOPED_PROFILING_EVENT_CL_NAME_GUID("ClReduceWorkload_configure");
+
65  m_Layer.configure(&input,
+
66  &output,
+
67  static_cast<unsigned int>(coords[0]),
+
68  ConvertReductionOperationToAcl(m_Data.m_Parameters),
+
69  m_Data.m_Parameters.m_KeepDims);
+
70  }
+
71 }
+
72 
+
73 void ClReduceWorkload::Execute() const
+
74 {
+
75  ARMNN_SCOPED_PROFILING_EVENT_CL_NAME_GUID("ClReduceWorkload_Execute");
+
76  m_Layer.run();
+
77 }
+
78 
+
79 } //namespace armnn
+
+
+
IS_MULTI_AXES_REDUCE_SUPPORTED
#define IS_MULTI_AXES_REDUCE_SUPPORTED(func, input, desc, status)
Macro function check if layer with multiple axes is supported on each backend.
Definition: ArmComputeUtils.hpp:405
+
armnn::QueueDescriptor::ValidateInputsOutputs
void ValidateInputsOutputs(const std::string &descName, unsigned int numExpectedIn, unsigned int numExpectedOut) const
Definition: WorkloadData.cpp:446
+ +
armnn::TensorInfo::GetNumDimensions
unsigned int GetNumDimensions() const
Definition: Tensor.hpp:195
+ + +
armnn::Coordinates
std::array< unsigned int, MaxNumOfTensorDimensions > Coordinates
Definition: InternalTypes.hpp:15
+
armnn::ClReduceWorkloadValidate
arm_compute::Status ClReduceWorkloadValidate(const TensorInfo &input, const TensorInfo &output, const ReduceDescriptor &descriptor)
Definition: ClReduceWorkload.cpp:18
+
armnn::ConvertReductionOperationToAcl
arm_compute::ReductionOperation ConvertReductionOperationToAcl(const ReduceDescriptor &descriptor)
Definition: ArmComputeUtils.hpp:338
+ + +
ARMNN_SCOPED_PROFILING_EVENT_CL_NAME_GUID
#define ARMNN_SCOPED_PROFILING_EVENT_CL_NAME_GUID(label)
Creates a profiling event that uses GetGuid() and GetName() from the calling class.
Definition: ClWorkloadUtils.hpp:36
+
armnn::ClReduceWorkload::ClReduceWorkload
ClReduceWorkload(const ReduceQueueDescriptor &descriptor, const WorkloadInfo &info)
Definition: ClReduceWorkload.cpp:46
+
armnn::WorkloadInfo
Contains information about TensorInfos of a layer.
Definition: WorkloadInfo.hpp:16
+ + + +
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:27
+
armnn::ReduceDescriptor::m_KeepDims
bool m_KeepDims
if true then output shape has no change.
Definition: Descriptors.hpp:1533
+
armnn::ClReduceWorkload::Execute
void Execute() const override
Definition: ClReduceWorkload.cpp:73
+
ARMNN_REPORT_PROFILING_WORKLOAD_DESC
#define ARMNN_REPORT_PROFILING_WORKLOAD_DESC(name, desc, infos, guid)
Definition: Profiling.hpp:227
+ +
armnn::Status
Status
Definition: Types.hpp:42
+ + +
armnn::ReduceDescriptor::m_vAxis
std::vector< uint32_t > m_vAxis
The indices of the dimensions to reduce.
Definition: Descriptors.hpp:1535
+
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
+ +
armnn::ReduceDescriptor
A ReduceDescriptor for the REDUCE operators.
Definition: Descriptors.hpp:1517
+
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:26
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