From ec33a91ec1557b78b2d01975ec4c5eaf24aa058c Mon Sep 17 00:00:00 2001 From: Francis Murtagh Date: Tue, 5 Nov 2019 14:26:23 +0000 Subject: IVGCVSW-4038 Convert Strided_Slice Shrink_Axis_Mask Parameter to ACL format * Add conversion method to reverse bits in Shrink_Axis_Mask * Add Unit tests for Neon, CL and Reference backends * Fix supportedness of constant layer which is causing error in DeepSpeech Uint8 * Also convert the Begin_Mask and End_Mask Change-Id: I448b083c3463558e8fb5204923ab554cd43264ba Signed-off-by: Francis Murtagh --- src/backends/backendsCommon/WorkloadUtils.cpp | 14 + src/backends/backendsCommon/WorkloadUtils.hpp | 2 + .../test/layerTests/StridedSliceTestImpl.cpp | 536 +++++++++++++++++++++ .../test/layerTests/StridedSliceTestImpl.hpp | 76 +++ src/backends/cl/ClLayerSupport.cpp | 2 +- src/backends/cl/test/ClLayerTests.cpp | 29 ++ .../cl/workloads/ClStridedSliceWorkload.cpp | 16 +- src/backends/neon/test/NeonLayerTests.cpp | 29 ++ .../neon/workloads/NeonStridedSliceWorkload.cpp | 16 +- src/backends/reference/test/RefLayerTests.cpp | 29 ++ 10 files changed, 735 insertions(+), 14 deletions(-) diff --git a/src/backends/backendsCommon/WorkloadUtils.cpp b/src/backends/backendsCommon/WorkloadUtils.cpp index 9e008ca441..385d970dac 100644 --- a/src/backends/backendsCommon/WorkloadUtils.cpp +++ b/src/backends/backendsCommon/WorkloadUtils.cpp @@ -184,4 +184,18 @@ armnn::ConstTensor ConvertWeightTensorFromArmnnToAcl(const ConstCpuTensorHandle* return weightPermuted; } +int32_t ConvertMaskToACLFormat(int32_t mask, int32_t numDim) +{ + int32_t reversedMask = 0; + for (unsigned int i = 0; i < boost::numeric_cast(numDim); ++i) + { + // Check if bit set in mask for each dimension + int32_t bit = (mask & 1 << i) != 0; + // Increment the new mask with the bits reversed + reversedMask += (bit << std::max(numDim-(boost::numeric_cast(i)+1), 0)); + } + + return reversedMask; +} + } // namespace armnn diff --git a/src/backends/backendsCommon/WorkloadUtils.hpp b/src/backends/backendsCommon/WorkloadUtils.hpp index cb614ea5b9..d581b5ab9e 100644 --- a/src/backends/backendsCommon/WorkloadUtils.hpp +++ b/src/backends/backendsCommon/WorkloadUtils.hpp @@ -196,6 +196,8 @@ void GatherTensorHandlePairs(const DescriptorType& descriptor, } } +int32_t ConvertMaskToACLFormat(int32_t mask, int32_t numDim); + armnn::ConstTensor PermuteTensor(const ConstCpuTensorHandle* tensor, const PermutationVector& permutationVector, void* permuteBuffer); diff --git a/src/backends/backendsCommon/test/layerTests/StridedSliceTestImpl.cpp b/src/backends/backendsCommon/test/layerTests/StridedSliceTestImpl.cpp index 515b5a026c..8082be4d98 100644 --- a/src/backends/backendsCommon/test/layerTests/StridedSliceTestImpl.cpp +++ b/src/backends/backendsCommon/test/layerTests/StridedSliceTestImpl.cpp @@ -265,6 +265,400 @@ LayerTestResult StridedSliceShrinkAxisMaskTest( workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); } +template> +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {3, 2, 3, 1}; + unsigned int outputShape[] = {2, 3, 1}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 0, 0}; + desc.m_Parameters.m_End = {1, 1, 1, 1}; + desc.m_Parameters.m_Stride = {1, 1, 1, 1}; + desc.m_Parameters.m_EndMask = (1 << 4) - 1; + desc.m_Parameters.m_ShrinkAxisMask = (1 << 0); + + inputTensorInfo = armnn::TensorInfo(4, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(3, outputShape, ArmnnType); + + std::vector input = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, + + 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, + + 13.0f, 14.0f, 15.0f, 16.0f, 17.0f, 18.0f + }); + + std::vector outputExpected = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f + }); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + +template> +LayerTestResult StridedSliceShrinkAxisMaskBitPosition1Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {3, 2, 3, 1}; + unsigned int outputShape[] = {3, 3, 1}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 0, 0}; + desc.m_Parameters.m_End = {1, 1, 1, 1}; + desc.m_Parameters.m_Stride = {1, 1, 1, 1}; + desc.m_Parameters.m_EndMask = (1 << 4) - 1; + desc.m_Parameters.m_ShrinkAxisMask = (1 << 1); + + inputTensorInfo = armnn::TensorInfo(4, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(3, outputShape, ArmnnType); + + std::vector input = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, + + 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, + + 13.0f, 14.0f, 15.0f, 16.0f, 17.0f, 18.0f + }); + + std::vector outputExpected = std::vector( + { + 1.0f, 2.0f, 3.0f, 7.0f, 8.0f, 9.0f, 13.0f, 14.0f, 15.0f + }); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + +template> +LayerTestResult StridedSliceShrinkAxisMaskBitPosition2Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {3, 2, 3, 1}; + unsigned int outputShape[] = {3, 2, 1}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 0, 0}; + desc.m_Parameters.m_End = {1, 1, 1, 1}; + desc.m_Parameters.m_Stride = {1, 1, 1, 1}; + desc.m_Parameters.m_EndMask = (1 << 4) - 1; + desc.m_Parameters.m_ShrinkAxisMask = (1 << 2); + + inputTensorInfo = armnn::TensorInfo(4, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(3, outputShape, ArmnnType); + + std::vector input = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, + + 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, + + 13.0f, 14.0f, 15.0f, 16.0f, 17.0f, 18.0f + }); + + std::vector outputExpected = std::vector( + { + 1.0f, 4.0f, 7.0f, 10.0f, 13.0f, 16.0f + }); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + +template> +LayerTestResult StridedSliceShrinkAxisMaskBitPosition3Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {3, 2, 3, 1}; + unsigned int outputShape[] = {3, 2, 3}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 0, 0}; + desc.m_Parameters.m_End = {1, 1, 1, 1}; + desc.m_Parameters.m_Stride = {1, 1, 1, 1}; + desc.m_Parameters.m_EndMask = (1 << 4) - 1; + desc.m_Parameters.m_ShrinkAxisMask = (1 << 3); + + inputTensorInfo = armnn::TensorInfo(4, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(3, outputShape, ArmnnType); + + std::vector input = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, + + 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, + + 13.0f, 14.0f, 15.0f, 16.0f, 17.0f, 18.0f + }); + + std::vector outputExpected = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, + + 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, + + 13.0f, 14.0f, 15.0f, 16.0f, 17.0f, 18.0f + }); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + +template> +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {3, 2, 3, 1}; + unsigned int outputShape[] = {3, 1}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 0, 0}; + desc.m_Parameters.m_End = {1, 1, 1, 1}; + desc.m_Parameters.m_Stride = {1, 1, 1, 1}; + desc.m_Parameters.m_EndMask = (1 << 4) - 1; + desc.m_Parameters.m_ShrinkAxisMask = (1 << 0) | (1 << 1); + + inputTensorInfo = armnn::TensorInfo(4, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(2, outputShape, ArmnnType); + + std::vector input = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, + + 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, + + 13.0f, 14.0f, 15.0f, 16.0f, 17.0f, 18.0f + }); + + std::vector outputExpected = std::vector( + { + 1.0f, 2.0f, 3.0f + }); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + +template> +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Dim3Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {2, 3, 1}; + unsigned int outputShape[] = {3, 1}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 0}; + desc.m_Parameters.m_End = {0, 0, 0}; + desc.m_Parameters.m_Stride = {1, 1, 1}; + desc.m_Parameters.m_EndMask = (1 << 4) - 1; + desc.m_Parameters.m_ShrinkAxisMask = (1 << 0); + + inputTensorInfo = armnn::TensorInfo(3, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(2, outputShape, ArmnnType); + + std::vector input = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f + }); + + std::vector outputExpected = std::vector( + { + 1.0f, 2.0f, 3.0f + }); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + +void FillVector(std::vector& inputArray, float start, float step) +{ + for (uint32_t i = 0; i < inputArray.size(); ++i) + { + inputArray[i] = start; + start += step; + } +} + +template> +LayerTestResult StridedSliceShrinkAxisMaskCTSTest( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {1, 1, 8, 942}; + unsigned int outputShape[] = {1, 1, 1, 279}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 1, 229}; + desc.m_Parameters.m_End = {1, 1, 2, 787}; + desc.m_Parameters.m_Stride = {2, 3, 3, 2}; + desc.m_Parameters.m_BeginMask = 2; + desc.m_Parameters.m_EndMask = 0; + desc.m_Parameters.m_ShrinkAxisMask = 0; + + inputTensorInfo = armnn::TensorInfo(4, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(4, outputShape, ArmnnType); + + // Array from 1 to 7535 + std::vector input(7536); + FillVector(input, 1.0f, 1.0f); + + // Array from 1171 to 1727 in steps of 2 + std::vector outputExpected(279); + FillVector(outputExpected, 1171.0, 2.0f); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + +template> +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And2Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {3, 2, 3, 1}; + unsigned int outputShape[] = {2, 1}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 0, 0}; + desc.m_Parameters.m_End = {1, 1, 1, 1}; + desc.m_Parameters.m_Stride = {1, 1, 1, 1}; + desc.m_Parameters.m_EndMask = (1 << 4) - 1; + desc.m_Parameters.m_ShrinkAxisMask = (1 << 0) | (1 << 2); + + inputTensorInfo = armnn::TensorInfo(4, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(2, outputShape, ArmnnType); + + std::vector input = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, + + 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, + + 13.0f, 14.0f, 15.0f, 16.0f, 17.0f, 18.0f + }); + + std::vector outputExpected = std::vector( + { + 1.0f, 4.0f + }); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + +template> +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And3Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {3, 2, 3, 1}; + unsigned int outputShape[] = {2, 3}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 0, 0}; + desc.m_Parameters.m_End = {1, 1, 1, 1}; + desc.m_Parameters.m_Stride = {1, 1, 1, 1}; + desc.m_Parameters.m_EndMask = (1 << 4) - 1; + desc.m_Parameters.m_ShrinkAxisMask = (1 << 0) | (1 << 3); + + inputTensorInfo = armnn::TensorInfo(4, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(2, outputShape, ArmnnType); + + std::vector input = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, + + 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, + + 13.0f, 14.0f, 15.0f, 16.0f, 17.0f, 18.0f + }); + + std::vector outputExpected = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f + }); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + +template> +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1And3Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + armnn::TensorInfo inputTensorInfo; + armnn::TensorInfo outputTensorInfo; + + unsigned int inputShape[] = {3, 2, 3, 1}; + unsigned int outputShape[] = {3}; + + armnn::StridedSliceQueueDescriptor desc; + desc.m_Parameters.m_Begin = {0, 0, 0, 0}; + desc.m_Parameters.m_End = {1, 1, 1, 1}; + desc.m_Parameters.m_Stride = {1, 1, 1, 1}; + desc.m_Parameters.m_EndMask = (1 << 4) - 1; + desc.m_Parameters.m_ShrinkAxisMask = (1 << 0) | (1 << 1) | (1 << 3); + + inputTensorInfo = armnn::TensorInfo(4, inputShape, ArmnnType); + outputTensorInfo = armnn::TensorInfo(1, outputShape, ArmnnType); + + std::vector input = std::vector( + { + 1.0f, 2.0f, 3.0f, 4.0f, 5.0f, 6.0f, + + 7.0f, 8.0f, 9.0f, 10.0f, 11.0f, 12.0f, + + 13.0f, 14.0f, 15.0f, 16.0f, 17.0f, 18.0f + }); + + std::vector outputExpected = std::vector( + { + 1.0f, 2.0f, 3.0f + }); + + return StridedSliceTestImpl( + workloadFactory, memoryManager, inputTensorInfo, outputTensorInfo, input, outputExpected, desc); +} + template> LayerTestResult StridedSlice3dTest( armnn::IWorkloadFactory& workloadFactory, @@ -462,6 +856,76 @@ LayerTestResult StridedSliceShrinkAxisMaskFloat32Test( return StridedSliceShrinkAxisMaskTest(workloadFactory, memoryManager); } +LayerTestResult StridedSliceShrinkAxisMaskCTSFloat32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskCTSTest(workloadFactory, memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Dim3Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0Dim3Test(workloadFactory, memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0Test(workloadFactory, memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition1Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition1Test(workloadFactory, memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition2Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition2Test(workloadFactory, memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition3Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition3Test(workloadFactory, memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0And1Test(workloadFactory, memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And2Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0And2Test(workloadFactory, memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And3Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0And3Test(workloadFactory, memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1And3Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0And1And3Test(workloadFactory, memoryManager); +} + LayerTestResult StridedSlice3dFloat32Test( armnn::IWorkloadFactory& workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) @@ -525,6 +989,78 @@ LayerTestResult StridedSliceShrinkAxisMaskUint8Test( return StridedSliceShrinkAxisMaskTest(workloadFactory, memoryManager); } +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Dim3Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0Dim3Test(workloadFactory, + memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0Test(workloadFactory, + memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition1Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition1Test(workloadFactory, + memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition2Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition2Test(workloadFactory, + memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition3Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition3Test(workloadFactory, + memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0And1Test(workloadFactory, + memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And2Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0And2Test(workloadFactory, + memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And3Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0And3Test(workloadFactory, + memoryManager); +} + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1And3Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) +{ + return StridedSliceShrinkAxisMaskBitPosition0And1And3Test(workloadFactory, + memoryManager); +} + LayerTestResult StridedSlice3dUint8Test( armnn::IWorkloadFactory& workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager) diff --git a/src/backends/backendsCommon/test/layerTests/StridedSliceTestImpl.hpp b/src/backends/backendsCommon/test/layerTests/StridedSliceTestImpl.hpp index 1c83e3ef0e..f71ce2b711 100644 --- a/src/backends/backendsCommon/test/layerTests/StridedSliceTestImpl.hpp +++ b/src/backends/backendsCommon/test/layerTests/StridedSliceTestImpl.hpp @@ -30,6 +30,46 @@ LayerTestResult StridedSliceShrinkAxisMaskFloat32Test( armnn::IWorkloadFactory& workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Dim3Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskCTSFloat32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition1Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition2Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition3Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And2Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And3Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1And3Float32Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + LayerTestResult StridedSlice3dFloat32Test( armnn::IWorkloadFactory& workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); @@ -66,6 +106,42 @@ LayerTestResult StridedSliceShrinkAxisMaskUint8Test( armnn::IWorkloadFactory& workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Dim3Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition1Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition2Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition3Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And2Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And3Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + +LayerTestResult StridedSliceShrinkAxisMaskBitPosition0And1And3Uint8Test( + armnn::IWorkloadFactory& workloadFactory, + const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); + LayerTestResult StridedSlice3dUint8Test( armnn::IWorkloadFactory& workloadFactory, const armnn::IBackendInternal::IMemoryManagerSharedPtr& memoryManager); diff --git a/src/backends/cl/ClLayerSupport.cpp b/src/backends/cl/ClLayerSupport.cpp index be565a523a..de9d1c5bcb 100644 --- a/src/backends/cl/ClLayerSupport.cpp +++ b/src/backends/cl/ClLayerSupport.cpp @@ -275,7 +275,7 @@ bool ClLayerSupport::IsConstantSupported(const TensorInfo& output, return IsSupportedForDataTypeCl(reasonIfUnsupported, output.GetDataType(), &TrueFunc<>, - &FalseFuncU8<>); + &TrueFunc<>); } bool ClLayerSupport::IsConvertFp16ToFp32Supported(const TensorInfo& input, diff --git a/src/backends/cl/test/ClLayerTests.cpp b/src/backends/cl/test/ClLayerTests.cpp index 909ebc73c2..0fc8ece498 100644 --- a/src/backends/cl/test/ClLayerTests.cpp +++ b/src/backends/cl/test/ClLayerTests.cpp @@ -568,6 +568,21 @@ ARMNN_AUTO_TEST_CASE(StridedSlice4dReverseFloat32, StridedSlice4dReverseFloat32T ARMNN_AUTO_TEST_CASE(StridedSliceSimpleStrideFloat32, StridedSliceSimpleStrideFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSliceSimpleRangeMaskFloat32, StridedSliceSimpleRangeMaskFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskFloat32, StridedSliceShrinkAxisMaskFloat32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskCTSFloat32, StridedSliceShrinkAxisMaskCTSFloat32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Dim3Float32, + StridedSliceShrinkAxisMaskBitPosition0Dim3Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Float32, StridedSliceShrinkAxisMaskBitPosition0Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition1Float32, StridedSliceShrinkAxisMaskBitPosition1Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition2Float32, StridedSliceShrinkAxisMaskBitPosition2Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition3Float32, StridedSliceShrinkAxisMaskBitPosition3Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1Float32, + StridedSliceShrinkAxisMaskBitPosition0And1Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And2Float32, + StridedSliceShrinkAxisMaskBitPosition0And2Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And3Float32, + StridedSliceShrinkAxisMaskBitPosition0And3Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1And3Float32, + StridedSliceShrinkAxisMaskBitPosition0And1And3Float32Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dFloat32, StridedSlice3dFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dReverseFloat32, StridedSlice3dReverseFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSlice2dFloat32, StridedSlice2dFloat32Test) @@ -578,6 +593,20 @@ ARMNN_AUTO_TEST_CASE(StridedSlice4dReverseUint8, StridedSlice4dReverseUint8Test) ARMNN_AUTO_TEST_CASE(StridedSliceSimpleStrideUint8, StridedSliceSimpleStrideUint8Test) ARMNN_AUTO_TEST_CASE(StridedSliceSimpleRangeMaskUint8, StridedSliceSimpleRangeMaskUint8Test) ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskUint8, StridedSliceShrinkAxisMaskUint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Dim3Uint8, + StridedSliceShrinkAxisMaskBitPosition0Dim3Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Uint8, StridedSliceShrinkAxisMaskBitPosition0Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition1Uint8, StridedSliceShrinkAxisMaskBitPosition1Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition2Uint8, StridedSliceShrinkAxisMaskBitPosition2Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition3Uint8, StridedSliceShrinkAxisMaskBitPosition3Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1Uint8, + StridedSliceShrinkAxisMaskBitPosition0And1Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And2Uint8, + StridedSliceShrinkAxisMaskBitPosition0And2Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And3Uint8, + StridedSliceShrinkAxisMaskBitPosition0And3Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1And3Uint8, + StridedSliceShrinkAxisMaskBitPosition0And1And3Uint8Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dUint8, StridedSlice3dUint8Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dReverseUint8, StridedSlice3dReverseUint8Test) ARMNN_AUTO_TEST_CASE(StridedSlice2dUint8, StridedSlice2dUint8Test) diff --git a/src/backends/cl/workloads/ClStridedSliceWorkload.cpp b/src/backends/cl/workloads/ClStridedSliceWorkload.cpp index e51fa34233..6b0a34d90e 100644 --- a/src/backends/cl/workloads/ClStridedSliceWorkload.cpp +++ b/src/backends/cl/workloads/ClStridedSliceWorkload.cpp @@ -11,7 +11,9 @@ #include #include +#include +#include #include #include #include @@ -34,9 +36,10 @@ arm_compute::Status ClStridedSliceWorkloadValidate(const TensorInfo& input, std::tie(starts, ends, strides) = SetClStridedSliceData(descriptor.m_Begin, descriptor.m_End, descriptor.m_Stride); - int32_t begin_mask = descriptor.m_BeginMask; - int32_t end_mask = descriptor.m_EndMask; - int32_t shrink_axis_mask = descriptor.m_ShrinkAxisMask; + auto numDimensions = boost::numeric_cast(input.GetNumDimensions()); + int32_t begin_mask = ConvertMaskToACLFormat(descriptor.m_BeginMask, numDimensions); + int32_t end_mask = ConvertMaskToACLFormat(descriptor.m_EndMask, numDimensions); + int32_t shrink_axis_mask = ConvertMaskToACLFormat(descriptor.m_ShrinkAxisMask, numDimensions); return arm_compute::CLStridedSlice::validate(&aclInputInfo, &aclOutputInfo, @@ -65,9 +68,10 @@ ClStridedSliceWorkload::ClStridedSliceWorkload(const StridedSliceQueueDescriptor m_Data.m_Parameters.m_End, m_Data.m_Parameters.m_Stride); - int32_t begin_mask = m_Data.m_Parameters.m_BeginMask; - int32_t end_mask = m_Data.m_Parameters.m_EndMask; - int32_t shrink_axis_mask = m_Data.m_Parameters.m_ShrinkAxisMask; + auto numDimensions = boost::numeric_cast(info.m_InputTensorInfos[0].GetNumDimensions()); + int32_t begin_mask = ConvertMaskToACLFormat(m_Data.m_Parameters.m_BeginMask, numDimensions); + int32_t end_mask = ConvertMaskToACLFormat(m_Data.m_Parameters.m_EndMask, numDimensions); + int32_t shrink_axis_mask = ConvertMaskToACLFormat(m_Data.m_Parameters.m_ShrinkAxisMask, numDimensions); arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); input.info()->set_data_layout(aclDataLayout); diff --git a/src/backends/neon/test/NeonLayerTests.cpp b/src/backends/neon/test/NeonLayerTests.cpp index 046ca2ac66..ef3c8379eb 100644 --- a/src/backends/neon/test/NeonLayerTests.cpp +++ b/src/backends/neon/test/NeonLayerTests.cpp @@ -762,6 +762,21 @@ ARMNN_AUTO_TEST_CASE(StridedSlice4dReverseFloat32, StridedSlice4dReverseFloat32T ARMNN_AUTO_TEST_CASE(StridedSliceSimpleStrideFloat32, StridedSliceSimpleStrideFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSliceSimpleRangeMaskFloat32, StridedSliceSimpleRangeMaskFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskFloat32, StridedSliceShrinkAxisMaskFloat32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskCTSFloat32, StridedSliceShrinkAxisMaskCTSFloat32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Dim3Float32, + StridedSliceShrinkAxisMaskBitPosition0Dim3Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Float32, StridedSliceShrinkAxisMaskBitPosition0Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition1Float32, StridedSliceShrinkAxisMaskBitPosition1Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition2Float32, StridedSliceShrinkAxisMaskBitPosition2Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition3Float32, StridedSliceShrinkAxisMaskBitPosition3Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1Float32, + StridedSliceShrinkAxisMaskBitPosition0And1Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And2Float32, + StridedSliceShrinkAxisMaskBitPosition0And2Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And3Float32, + StridedSliceShrinkAxisMaskBitPosition0And3Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1And3Float32, + StridedSliceShrinkAxisMaskBitPosition0And1And3Float32Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dFloat32, StridedSlice3dFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dReverseFloat32, StridedSlice3dReverseFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSlice2dFloat32, StridedSlice2dFloat32Test) @@ -772,6 +787,20 @@ ARMNN_AUTO_TEST_CASE(StridedSlice4dReverseUint8, StridedSlice4dReverseUint8Test) ARMNN_AUTO_TEST_CASE(StridedSliceSimpleStrideUint8, StridedSliceSimpleStrideUint8Test) ARMNN_AUTO_TEST_CASE(StridedSliceSimpleRangeMaskUint8, StridedSliceSimpleRangeMaskUint8Test) ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskUint8, StridedSliceShrinkAxisMaskUint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Dim3Uint8, + StridedSliceShrinkAxisMaskBitPosition0Dim3Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Uint8, StridedSliceShrinkAxisMaskBitPosition0Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition1Uint8, StridedSliceShrinkAxisMaskBitPosition1Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition2Uint8, StridedSliceShrinkAxisMaskBitPosition2Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition3Uint8, StridedSliceShrinkAxisMaskBitPosition3Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1Uint8, + StridedSliceShrinkAxisMaskBitPosition0And1Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And2Uint8, + StridedSliceShrinkAxisMaskBitPosition0And2Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And3Uint8, + StridedSliceShrinkAxisMaskBitPosition0And3Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1And3Uint8, + StridedSliceShrinkAxisMaskBitPosition0And1And3Uint8Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dUint8, StridedSlice3dUint8Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dReverseUint8, StridedSlice3dReverseUint8Test) ARMNN_AUTO_TEST_CASE(StridedSlice2dUint8, StridedSlice2dUint8Test) diff --git a/src/backends/neon/workloads/NeonStridedSliceWorkload.cpp b/src/backends/neon/workloads/NeonStridedSliceWorkload.cpp index 9c24728004..356c0aea83 100644 --- a/src/backends/neon/workloads/NeonStridedSliceWorkload.cpp +++ b/src/backends/neon/workloads/NeonStridedSliceWorkload.cpp @@ -9,7 +9,7 @@ #include #include #include - +#include namespace armnn { @@ -29,9 +29,10 @@ arm_compute::Status NeonStridedSliceWorkloadValidate(const TensorInfo& input, descriptor.m_End, descriptor.m_Stride); - int32_t begin_mask = descriptor.m_BeginMask; - int32_t end_mask = descriptor.m_EndMask; - int32_t shrink_axis_mask = descriptor.m_ShrinkAxisMask; + auto numDimensions = boost::numeric_cast(input.GetNumDimensions()); + int32_t begin_mask = ConvertMaskToACLFormat(descriptor.m_BeginMask, numDimensions); + int32_t end_mask = ConvertMaskToACLFormat(descriptor.m_EndMask, numDimensions); + int32_t shrink_axis_mask = ConvertMaskToACLFormat(descriptor.m_ShrinkAxisMask, numDimensions); return arm_compute::NEStridedSlice::validate(&aclInput, &aclOutput, @@ -60,9 +61,10 @@ NeonStridedSliceWorkload::NeonStridedSliceWorkload(const StridedSliceQueueDescri m_Data.m_Parameters.m_End, m_Data.m_Parameters.m_Stride); - int32_t begin_mask = m_Data.m_Parameters.m_BeginMask; - int32_t end_mask = m_Data.m_Parameters.m_EndMask; - int32_t shrink_axis_mask = m_Data.m_Parameters.m_ShrinkAxisMask; + auto numDimensions = boost::numeric_cast(info.m_InputTensorInfos[0].GetNumDimensions()); + int32_t begin_mask = ConvertMaskToACLFormat(m_Data.m_Parameters.m_BeginMask, numDimensions); + int32_t end_mask = ConvertMaskToACLFormat(m_Data.m_Parameters.m_EndMask, numDimensions); + int32_t shrink_axis_mask = ConvertMaskToACLFormat(m_Data.m_Parameters.m_ShrinkAxisMask, numDimensions); arm_compute::DataLayout aclDataLayout = ConvertDataLayout(m_Data.m_Parameters.m_DataLayout); input.info()->set_data_layout(aclDataLayout); diff --git a/src/backends/reference/test/RefLayerTests.cpp b/src/backends/reference/test/RefLayerTests.cpp index 7f280382f1..2c38ed52cd 100644 --- a/src/backends/reference/test/RefLayerTests.cpp +++ b/src/backends/reference/test/RefLayerTests.cpp @@ -1278,6 +1278,21 @@ ARMNN_AUTO_TEST_CASE(StridedSlice4dReverseFloat32, StridedSlice4dReverseFloat32T ARMNN_AUTO_TEST_CASE(StridedSliceSimpleStrideFloat32, StridedSliceSimpleStrideFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSliceSimpleRangeMaskFloat32, StridedSliceSimpleRangeMaskFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskFloat32, StridedSliceShrinkAxisMaskFloat32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskCTSFloat32, StridedSliceShrinkAxisMaskCTSFloat32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Dim3Float32, + StridedSliceShrinkAxisMaskBitPosition0Dim3Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Float32, StridedSliceShrinkAxisMaskBitPosition0Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition1Float32, StridedSliceShrinkAxisMaskBitPosition1Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition2Float32, StridedSliceShrinkAxisMaskBitPosition2Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition3Float32, StridedSliceShrinkAxisMaskBitPosition3Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1Float32, + StridedSliceShrinkAxisMaskBitPosition0And1Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And2Float32, + StridedSliceShrinkAxisMaskBitPosition0And2Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And3Float32, + StridedSliceShrinkAxisMaskBitPosition0And3Float32Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1And3Float32, + StridedSliceShrinkAxisMaskBitPosition0And1And3Float32Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dFloat32, StridedSlice3dFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dReverseFloat32, StridedSlice3dReverseFloat32Test) ARMNN_AUTO_TEST_CASE(StridedSlice2dFloat32, StridedSlice2dFloat32Test) @@ -1288,6 +1303,20 @@ ARMNN_AUTO_TEST_CASE(StridedSlice4dReverseUint8, StridedSlice4dReverseUint8Test) ARMNN_AUTO_TEST_CASE(StridedSliceSimpleStrideUint8, StridedSliceSimpleStrideUint8Test) ARMNN_AUTO_TEST_CASE(StridedSliceSimpleRangeMaskUint8, StridedSliceSimpleRangeMaskUint8Test) ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskUint8, StridedSliceShrinkAxisMaskUint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Dim3Uint8, + StridedSliceShrinkAxisMaskBitPosition0Dim3Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0Uint8, StridedSliceShrinkAxisMaskBitPosition0Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition1Uint8, StridedSliceShrinkAxisMaskBitPosition1Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition2Uint8, StridedSliceShrinkAxisMaskBitPosition2Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition3Uint8, StridedSliceShrinkAxisMaskBitPosition3Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1Uint8, + StridedSliceShrinkAxisMaskBitPosition0And1Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And2Uint8, + StridedSliceShrinkAxisMaskBitPosition0And2Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And3Uint8, + StridedSliceShrinkAxisMaskBitPosition0And3Uint8Test) +ARMNN_AUTO_TEST_CASE(StridedSliceShrinkAxisMaskBitPosition0And1And3Uint8, + StridedSliceShrinkAxisMaskBitPosition0And1And3Uint8Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dUint8, StridedSlice3dUint8Test) ARMNN_AUTO_TEST_CASE(StridedSlice3dReverseUint8, StridedSlice3dReverseUint8Test) ARMNN_AUTO_TEST_CASE(StridedSlice2dUint8, StridedSlice2dUint8Test) -- cgit v1.2.1