From 6f92c8e9f8bb38dcf5dccf8deeff5112ecd8e37c Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Wed, 22 Nov 2023 11:41:15 +0000 Subject: Update Doxygen for 23.11 Signed-off-by: Nikhil Raj Change-Id: I47cd933f5002cb94a73aa97689d7b3d9c93cb849 --- ..._neon_channel_shuffle_workload_8hpp_source.html | 152 +++++++++++++++++++++ 1 file changed, 152 insertions(+) create mode 100644 23.11/_neon_channel_shuffle_workload_8hpp_source.html (limited to '23.11/_neon_channel_shuffle_workload_8hpp_source.html') diff --git a/23.11/_neon_channel_shuffle_workload_8hpp_source.html b/23.11/_neon_channel_shuffle_workload_8hpp_source.html new file mode 100644 index 0000000000..206bc769f5 --- /dev/null +++ b/23.11/_neon_channel_shuffle_workload_8hpp_source.html @@ -0,0 +1,152 @@ + + + + + + + + +Arm NN: src/backends/neon/workloads/NeonChannelShuffleWorkload.hpp Source File + + + + + + + + + + + + + + + + +
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+  23.11 +
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NeonChannelShuffleWorkload.hpp
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+Go to the documentation of this file.
1 //
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2 // Copyright © 2021 Arm Ltd and Contributors. All rights reserved.
+
3 // SPDX-License-Identifier: MIT
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4 //
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5 
+
6 #pragma once
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7 
+
8 #include "NeonBaseWorkload.hpp"
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9 
+
10 #include <arm_compute/core/Error.h>
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11 #include <arm_compute/runtime/NEON/functions/NEChannelShuffleLayer.h>
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12 
+
13 namespace armnn
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14 {
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15 
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16 arm_compute::Status NeonChannelShuffleValidate(const TensorInfo& input,
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17  const TensorInfo& output,
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18  const ChannelShuffleDescriptor& descriptor);
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19 
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20 class NeonChannelShuffleWorkload : public NeonBaseWorkload<ChannelShuffleQueueDescriptor>
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21 {
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22 public:
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23  NeonChannelShuffleWorkload(const ChannelShuffleQueueDescriptor& descriptor, const WorkloadInfo& info);
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24  virtual void Execute() const override;
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25 
+
26 private:
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27  mutable arm_compute::NEChannelShuffleLayer m_ChannelShuffleLayer;
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28 };
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29 
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30 } // namespace armnn
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armnn::WorkloadInfo
Contains information about TensorInfos of a layer.
Definition: WorkloadInfo.hpp:16
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armnn::NeonChannelShuffleWorkload::NeonChannelShuffleWorkload
NeonChannelShuffleWorkload(const ChannelShuffleQueueDescriptor &descriptor, const WorkloadInfo &info)
Definition: NeonChannelShuffleWorkload.cpp:51
+ +
armnn::Status
Status
Definition: Types.hpp:42
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armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
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armnn::NeonChannelShuffleValidate
arm_compute::Status NeonChannelShuffleValidate(const TensorInfo &input, const TensorInfo &output, const ChannelShuffleDescriptor &descriptor)
Definition: NeonChannelShuffleWorkload.cpp:17
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