From 8efb48a6847c5cd166c561127ae6611150963ce3 Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Fri, 19 May 2023 11:14:28 +0100 Subject: Update Doxygen docu for 23.05 Signed-off-by: Nikhil Raj Change-Id: I0a992286f14fa68fcc6e5eba31ac39fed003cbbe --- 23.05/_ref_log_softmax_workload_8cpp_source.xhtml | 189 ++++++++++++++++++++++ 1 file changed, 189 insertions(+) create mode 100644 23.05/_ref_log_softmax_workload_8cpp_source.xhtml (limited to '23.05/_ref_log_softmax_workload_8cpp_source.xhtml') diff --git a/23.05/_ref_log_softmax_workload_8cpp_source.xhtml b/23.05/_ref_log_softmax_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..a573b76daf --- /dev/null +++ b/23.05/_ref_log_softmax_workload_8cpp_source.xhtml @@ -0,0 +1,189 @@ + + + + + + + + + + + + + +ArmNN: src/backends/reference/workloads/RefLogSoftmaxWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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+  23.05 +
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RefLogSoftmaxWorkload.cpp
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+Go to the documentation of this file.
1 //
+
2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
+
3 // SPDX-License-Identifier: MIT
+
4 //
+
5 
+
6 #include "RefLogSoftmaxWorkload.hpp"
+
7 
+
8 #include "Decoders.hpp"
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9 #include "Encoders.hpp"
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10 #include "LogSoftmax.hpp"
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11 #include "RefWorkloadUtils.hpp"
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12 
+
13 #include <Profiling.hpp>
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14 
+
15 #include <armnn/utility/Assert.hpp>
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16 
+
17 namespace armnn
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18 {
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19 
+
20 void RefLogSoftmaxWorkload::Execute() const
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21 {
+
22  Execute(m_Data.m_Inputs, m_Data.m_Outputs);
+
23 }
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24 
+
25 void RefLogSoftmaxWorkload::ExecuteAsync(ExecutionData& executionData)
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26 {
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27  WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
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28  Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
+
29 }
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30 
+
31 void RefLogSoftmaxWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
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32 {
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33  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefLogSoftmaxWorkload_Execute");
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34 
+
35  const TensorInfo& inputInfo = GetTensorInfo(inputs[0]);
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36  const TensorInfo& outputInfo = GetTensorInfo(outputs[0]);
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37 
+
38  std::unique_ptr<Decoder<float>> decoder = MakeDecoder<float>(inputInfo, inputs[0]->Map());
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39  std::unique_ptr<Encoder<float>> encoder = MakeEncoder<float>(outputInfo, outputs[0]->Map());
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40 
+
41  ARMNN_ASSERT(decoder != nullptr);
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42  ARMNN_ASSERT(encoder != nullptr);
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43 
+
44  LogSoftmax(*decoder, *encoder, inputInfo, m_Data.m_Parameters);
+
45 }
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46 
+
47 } // namespace armnn
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+
+
armnn::GetTensorInfo
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
Definition: RefWorkloadUtils.hpp:27
+ + + + + + + +
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
+
armnn::RefLogSoftmaxWorkload::ExecuteAsync
void ExecuteAsync(ExecutionData &executionData) override
Definition: RefLogSoftmaxWorkload.cpp:25
+ +
armnn::LogSoftmax
void LogSoftmax(Decoder< float > &input, Encoder< float > &output, const TensorInfo &inputInfo, const LogSoftmaxDescriptor &descriptor)
Definition: LogSoftmax.cpp:29
+
ARMNN_SCOPED_PROFILING_EVENT
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
+ + + + + +
ARMNN_ASSERT
#define ARMNN_ASSERT(COND)
Definition: Assert.hpp:14
+ + +
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:27
+ +
armnn::Compute::CpuRef
@ CpuRef
CPU Execution: Reference C++ kernels.
+
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:26
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