From 8d2ca734165a068478df7cffa46185680b05cd20 Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Fri, 24 Feb 2023 10:28:19 +0000 Subject: Update Doxygen docu for 23.02 Signed-off-by: Nikhil Raj Change-Id: Ie6c19a27d50fefab2796b2b5875374e81f5bf971 --- .../_ref_logical_unary_workload_8cpp_source.xhtml | 148 +++++++++++++++++++++ 1 file changed, 148 insertions(+) create mode 100644 23.02/_ref_logical_unary_workload_8cpp_source.xhtml (limited to '23.02/_ref_logical_unary_workload_8cpp_source.xhtml') diff --git a/23.02/_ref_logical_unary_workload_8cpp_source.xhtml b/23.02/_ref_logical_unary_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..0e25924681 --- /dev/null +++ b/23.02/_ref_logical_unary_workload_8cpp_source.xhtml @@ -0,0 +1,148 @@ + + + + + + + + + + + + + +ArmNN: src/backends/reference/workloads/RefLogicalUnaryWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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+  23.02 +
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RefLogicalUnaryWorkload.cpp
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+Go to the documentation of this file.
1 //
2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
8 #include "Decoders.hpp"
10 #include "Encoders.hpp"
11 #include "RefWorkloadUtils.hpp"
12 
13 #include <Profiling.hpp>
14 
15 #include <armnn/TypesUtils.hpp>
16 
17 namespace armnn
18 {
19 
21  const WorkloadInfo& info)
23 {}
24 
26 {
28 }
29 
31 {
32  WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
33  Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
34 }
35 
36 void RefLogicalUnaryWorkload::Execute(std::vector<ITensorHandle*> inputs, std::vector<ITensorHandle*> outputs) const
37 {
38  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefLogicalUnaryWorkload_Execute");
39 
40  const TensorInfo& inputInfo = GetTensorInfo(inputs[0]);
41  const TensorInfo& outputInfo = GetTensorInfo(outputs[0]);
42 
43  const TensorShape& inShape = inputInfo.GetShape();
44  const TensorShape& outShape = outputInfo.GetShape();
45 
46  std::unique_ptr<Decoder<InType>> input = MakeDecoder<InType>(inputInfo, inputs[0]->Map());
47  std::unique_ptr<Encoder<OutType>> output = MakeEncoder<OutType>(outputInfo, outputs[0]->Map());
48 
50 
52  {
54  {
55  NotFunction(inShape, outShape, *input, *output);
56  break;
57  }
58  default:
59  {
60  throw InvalidArgumentException(std::string("Unsupported Logical Unary operation") +
62  }
63  }
64 }
65 
66 } // namespace armnn
+
void ExecuteAsync(ExecutionData &executionData) override
+ +
UnaryOperation m_Operation
Specifies the elementwiseUnary operation to execute.
+
const TensorShape & GetShape() const
Definition: Tensor.hpp:191
+
CPU Execution: Reference C++ kernels.
+ + + +
Copyright (c) 2021 ARM Limited and Contributors.
+ + +
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
+ + +
constexpr char const * GetUnaryOperationAsCString(UnaryOperation operation)
Definition: TypesUtils.hpp:75
+ + + + + +
RefLogicalUnaryWorkload(const ElementwiseUnaryQueueDescriptor &descriptor, const WorkloadInfo &info)
+ + + +
#define CHECK_LOCATION()
Definition: Exceptions.hpp:203
+ +
std::vector< ITensorHandle * > m_Outputs
+ +
Contains information about TensorInfos of a layer.
+
std::vector< ITensorHandle * > m_Inputs
+ + + +
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
+
+
+ + + + -- cgit v1.2.1