From cb0630959aeae05bc2ae9f6d80cf5f5983a8fb77 Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Wed, 23 Nov 2022 11:05:29 +0000 Subject: IVGCVSW-7075 Update Doxygen for 22.11 Release Signed-off-by: Nikhil Raj Change-Id: Ib5669e8fd3739d1b10f5dd694d020d51799896dc --- ...convert_fp32_to_bf16_workload_8cpp_source.xhtml | 134 +++++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100644 22.11/_ref_convert_fp32_to_bf16_workload_8cpp_source.xhtml (limited to '22.11/_ref_convert_fp32_to_bf16_workload_8cpp_source.xhtml') diff --git a/22.11/_ref_convert_fp32_to_bf16_workload_8cpp_source.xhtml b/22.11/_ref_convert_fp32_to_bf16_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..8f45cf95f2 --- /dev/null +++ b/22.11/_ref_convert_fp32_to_bf16_workload_8cpp_source.xhtml @@ -0,0 +1,134 @@ + + + + + + + + + + + + + +ArmNN: src/backends/reference/workloads/RefConvertFp32ToBf16Workload.cpp Source File + + + + + + + + + + + + + + + + +
+
+ + + + ArmNN + + + +
+
+  22.11 +
+
+
+ + + + + + + +
+
+ +
+
+
+ +
+ +
+
+ + +
+ +
+ +
+
+
RefConvertFp32ToBf16Workload.cpp
+
+
+Go to the documentation of this file.
1 //
2 // Copyright © 2022 Arm Ltd and Contributors. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "RefConvertFp32ToBf16Workload.hpp"
7 #include "RefWorkloadUtils.hpp"
8 
9 #include <armnnUtils/FloatingPointConverter.hpp>
10 
11 #include <BFloat16.hpp>
12 
13 namespace armnn
14 {
15 
16 void RefConvertFp32ToBf16Workload::Execute() const
17 {
18  Execute(m_Data.m_Inputs, m_Data.m_Outputs);
19 }
20 
21 void RefConvertFp32ToBf16Workload::ExecuteAsync(ExecutionData& executionData)
22 {
23  WorkingMemDescriptor* workingMemDescriptor = static_cast<WorkingMemDescriptor*>(executionData.m_Data);
24  Execute(workingMemDescriptor->m_Inputs, workingMemDescriptor->m_Outputs);
25 }
26 
27 void RefConvertFp32ToBf16Workload::Execute(std::vector<ITensorHandle*> inputs,
28  std::vector<ITensorHandle*> outputs) const
29 {
30  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefConvertFp32ToBf16Workload_Execute");
31 
32  const float* const input = reinterpret_cast<const float*>(inputs[0]->Map());
33  BFloat16* const output = reinterpret_cast<BFloat16*>(outputs[0]->Map());
34 
35  unsigned int numElements = GetTensorInfo(inputs[0]).GetNumElements();
36  armnnUtils::FloatingPointConverter::ConvertFloat32ToBFloat16(input, numElements, output);
37 }
38 
39 } //namespace armnn
armnn::Compute::CpuRef
CPU Execution: Reference C++ kernels.
+
FloatingPointConverter.hpp
+
RefWorkloadUtils.hpp
+ +
armnn::RefConvertFp32ToBf16Workload::ExecuteAsync
void ExecuteAsync(ExecutionData &executionData) override
Definition: RefConvertFp32ToBf16Workload.cpp:21
+
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
+
ARMNN_SCOPED_PROFILING_EVENT
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
+ + + +
armnn::BaseWorkload::m_Data
QueueDescriptor m_Data
Definition: Workload.hpp:83
+ +
armnnUtils::FloatingPointConverter::ConvertFloat32ToBFloat16
static void ConvertFloat32ToBFloat16(const float *srcFloat32Buffer, size_t numElements, void *dstBFloat16Buffer)
Definition: FloatingPointConverter.cpp:46
+
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:27
+
RefConvertFp32ToBf16Workload.hpp
+ + +
BFloat16.hpp
+
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:26
+
armnn::TensorInfo::GetNumElements
unsigned int GetNumElements() const
Definition: Tensor.hpp:196
+
armnn::GetTensorInfo
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
Definition: RefWorkloadUtils.hpp:27
+
+
+ + + + -- cgit v1.2.1