From f4019872c1134c6fcc1d6993e5746f55c1e79208 Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Tue, 8 Mar 2022 20:01:38 +0000 Subject: IVGCVSW-6819 Fix the directory structure and broken link to latest docu Signed-off-by: Nikhil Raj Change-Id: I05b559d15faf92c76ff536719693b361316be4f3 --- ...classarmnn_1_1_ref_convolution3d_workload.xhtml | 334 +++++++++++++++++++++ 1 file changed, 334 insertions(+) create mode 100644 22.02/classarmnn_1_1_ref_convolution3d_workload.xhtml (limited to '22.02/classarmnn_1_1_ref_convolution3d_workload.xhtml') diff --git a/22.02/classarmnn_1_1_ref_convolution3d_workload.xhtml b/22.02/classarmnn_1_1_ref_convolution3d_workload.xhtml new file mode 100644 index 0000000000..73dec89685 --- /dev/null +++ b/22.02/classarmnn_1_1_ref_convolution3d_workload.xhtml @@ -0,0 +1,334 @@ + + + + + + + + + + + + + +ArmNN: RefConvolution3dWorkload Class Reference + + + + + + + + + + + + + + + + +
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+ + + + ArmNN + + + +
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+  22.02 +
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+Public Member Functions | +List of all members
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+
RefConvolution3dWorkload Class Reference
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+ +

#include <RefConvolution3dWorkload.hpp>

+
+Inheritance diagram for RefConvolution3dWorkload:
+
+
+ + +RefBaseWorkload< Convolution3dQueueDescriptor > +BaseWorkload< Convolution3dQueueDescriptor > +IWorkload + +
+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +

+Public Member Functions

 RefConvolution3dWorkload (const Convolution3dQueueDescriptor &descriptor, const WorkloadInfo &info)
 
void PostAllocationConfigure () override
 
void Execute () const override
 
void ExecuteAsync (WorkingMemDescriptor &workingMemDescriptor) override
 
- Public Member Functions inherited from RefBaseWorkload< Convolution3dQueueDescriptor >
 RefBaseWorkload (const Convolution3dQueueDescriptor &descriptor, const WorkloadInfo &info)
 
virtual bool SupportsTensorHandleReplacement () const override
 
void ReplaceInputTensorHandle (ITensorHandle *tensorHandle, unsigned int slot) override
 
void ReplaceOutputTensorHandle (ITensorHandle *tensorHandle, unsigned int slot) override
 
- Public Member Functions inherited from BaseWorkload< Convolution3dQueueDescriptor >
 BaseWorkload (const Convolution3dQueueDescriptor &descriptor, const WorkloadInfo &info)
 
void ExecuteAsync (WorkingMemDescriptor &workingMemDescriptor) override
 
void PostAllocationConfigure () override
 
const Convolution3dQueueDescriptor & GetData () const
 
profiling::ProfilingGuid GetGuid () const final
 
- Public Member Functions inherited from IWorkload
virtual ~IWorkload ()
 
virtual void RegisterDebugCallback (const DebugCallbackFunction &)
 
+ + + + + + +

+Additional Inherited Members

- Protected Attributes inherited from BaseWorkload< Convolution3dQueueDescriptor >
Convolution3dQueueDescriptor m_Data
 
const profiling::ProfilingGuid m_Guid
 
+

Detailed Description

+
+

Definition at line 16 of file RefConvolution3dWorkload.hpp.

+

Constructor & Destructor Documentation

+ +

◆ RefConvolution3dWorkload()

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RefConvolution3dWorkload (const Convolution3dQueueDescriptor & descriptor,
const WorkloadInfo & info 
)
+ 		+explicit
+
+ +

Definition at line 15 of file RefConvolution3dWorkload.cpp.

+ +

References ARMNN_REPORT_PROFILING_WORKLOAD_DESC, Convolution3dDescriptor::m_BiasEnabled, WorkloadInfo::m_BiasTensorInfo, WorkloadInfo::m_InputTensorInfos, WorkloadInfo::m_OutputTensorInfos, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, and WorkloadInfo::m_WeightsTensorInfo.

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17  : RefBaseWorkload<Convolution3dQueueDescriptor>(descriptor, info)
18 {
19  WorkloadInfo detailsInfo;
20  detailsInfo.m_InputTensorInfos = info.m_InputTensorInfos;
21  detailsInfo.m_OutputTensorInfos = info.m_OutputTensorInfos;
22  detailsInfo.m_WeightsTensorInfo = armnn::Optional<armnn::TensorInfo>(info.m_InputTensorInfos[1]);
23  if (descriptor.m_Parameters.m_BiasEnabled)
24  {
25  detailsInfo.m_BiasTensorInfo = armnn::Optional<armnn::TensorInfo>(info.m_InputTensorInfos[2]);
26  }
27 
28  // Report Profiling Details
29  ARMNN_REPORT_PROFILING_WORKLOAD_DESC("RefConvolution3dWorkload_Construct",
30  descriptor.m_Parameters,
31  detailsInfo,
32  this->GetGuid());
33 }
+ +
ARMNN_REPORT_PROFILING_WORKLOAD_DESC
#define ARMNN_REPORT_PROFILING_WORKLOAD_DESC(name, desc, infos, guid)
Definition: Profiling.hpp:227
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+

Member Function Documentation

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◆ Execute()

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void Execute () const
+ 		+overridevirtual
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Implements IWorkload.

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Definition at line 55 of file RefConvolution3dWorkload.cpp.

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References BaseWorkload< Convolution3dQueueDescriptor >::m_Data, QueueDescriptor::m_Inputs, and QueueDescriptor::m_Outputs.

+ +

Referenced by RefConvolution3dWorkload::ExecuteAsync().

+
56 {
57  Execute(m_Data.m_Inputs, m_Data.m_Outputs);
58 }
+ +
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:27
+
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:26
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◆ ExecuteAsync()

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void ExecuteAsync (WorkingMemDescriptor & workingMemDescriptor)
+ 		+overridevirtual
+
+ +

Implements IWorkload.

+ +

Definition at line 60 of file RefConvolution3dWorkload.cpp.

+ +

References ARMNN_SCOPED_PROFILING_EVENT_GUID, armnn::Convolve3d(), armnn::CpuRef, RefConvolution3dWorkload::Execute(), BaseWorkload< Convolution3dQueueDescriptor >::GetGuid(), TensorInfo::GetShape(), armnn::GetTensorInfo(), Convolution3dDescriptor::m_BiasEnabled, BaseWorkload< Convolution3dQueueDescriptor >::m_Data, Convolution3dDescriptor::m_DataLayout, Convolution3dDescriptor::m_DilationX, Convolution3dDescriptor::m_DilationY, Convolution3dDescriptor::m_DilationZ, WorkingMemDescriptor::m_Inputs, WorkingMemDescriptor::m_Outputs, Convolution3dDescriptor::m_PadFront, Convolution3dDescriptor::m_PadLeft, Convolution3dDescriptor::m_PadTop, QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters, Convolution3dDescriptor::m_StrideX, Convolution3dDescriptor::m_StrideY, Convolution3dDescriptor::m_StrideZ, armnn::Map, and RefConvolution3dWorkload::PostAllocationConfigure().

+
61 {
62  PostAllocationConfigure(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs);
63 
64  Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs);
65 }
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◆ PostAllocationConfigure()

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void PostAllocationConfigure ()
+ 		+overridevirtual
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Implements IWorkload.

+ +

Definition at line 35 of file RefConvolution3dWorkload.cpp.

+ +

References TensorInfo::GetShape(), armnn::GetTensorInfo(), armnn::IgnoreUnused(), Convolution3dDescriptor::m_BiasEnabled, BaseWorkload< Convolution3dQueueDescriptor >::m_Data, QueueDescriptor::m_Inputs, QueueDescriptor::m_Outputs, and QueueDescriptorWithParameters< LayerDescriptor >::m_Parameters.

+ +

Referenced by RefConvolution3dWorkload::ExecuteAsync().

+
36 {
37  PostAllocationConfigure(m_Data.m_Inputs, m_Data.m_Outputs);
38 }
+ +
armnn::QueueDescriptor::m_Outputs
std::vector< ITensorHandle * > m_Outputs
Definition: WorkloadData.hpp:27
+
armnn::QueueDescriptor::m_Inputs
std::vector< ITensorHandle * > m_Inputs
Definition: WorkloadData.hpp:26
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The documentation for this class was generated from the following files: +
+
+ + + + -- cgit v1.2.1