From f4019872c1134c6fcc1d6993e5746f55c1e79208 Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Tue, 8 Mar 2022 20:01:38 +0000 Subject: IVGCVSW-6819 Fix the directory structure and broken link to latest docu Signed-off-by: Nikhil Raj Change-Id: I05b559d15faf92c76ff536719693b361316be4f3 --- ...stance_normalization_workload_8cpp_source.xhtml | 135 +++++++++++++++++++++ 1 file changed, 135 insertions(+) create mode 100644 22.02/_ref_instance_normalization_workload_8cpp_source.xhtml (limited to '22.02/_ref_instance_normalization_workload_8cpp_source.xhtml') diff --git a/22.02/_ref_instance_normalization_workload_8cpp_source.xhtml b/22.02/_ref_instance_normalization_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..76fe3294f5 --- /dev/null +++ b/22.02/_ref_instance_normalization_workload_8cpp_source.xhtml @@ -0,0 +1,135 @@ + + + + + + + + + + + + + +ArmNN: src/backends/reference/workloads/RefInstanceNormalizationWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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RefInstanceNormalizationWorkload.cpp
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+Go to the documentation of this file.
1 //
2 // Copyright © 2019 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
7 
8 #include "InstanceNorm.hpp"
9 #include "RefWorkloadUtils.hpp"
10 
11 #include "Profiling.hpp"
12 
13 namespace armnn
14 {
15 
17  const InstanceNormalizationQueueDescriptor& descriptor,
18  const WorkloadInfo& info)
20 
22 {
24 }
25 
27 {
28  Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs);
29 }
30 
31 void RefInstanceNormalizationWorkload::Execute(std::vector<ITensorHandle*> inputs,
32  std::vector<ITensorHandle*> outputs) const
33 {
34  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, "RefInstanceNormalizationWorkload_Execute");
35 
36  std::unique_ptr<Decoder<float>> inputDecoder = MakeDecoder<float>(GetTensorInfo(inputs[0]),
37  inputs[0]->Map());
38  std::unique_ptr<Encoder<float>> outputEncoder = MakeEncoder<float>(GetTensorInfo(outputs[0]),
39  outputs[0]->Map());
40  const TensorInfo& inputInfo = GetTensorInfo(inputs[0]);
41 
42  InstanceNorm(m_Data, inputInfo, *inputDecoder, *outputEncoder);
43 }
44 
45 } // namespace armnn
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CPU Execution: Reference C++ kernels.
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Copyright (c) 2021 ARM Limited and Contributors.
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#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
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void InstanceNorm(const InstanceNormalizationQueueDescriptor &data, const TensorInfo &inputInfo, Decoder< float > &inputDecoder, Encoder< float > &outputEncoder)
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InstanceNormalizationQueueDescriptor m_Data
Definition: Workload.hpp:77
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std::vector< ITensorHandle * > m_Outputs
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RefInstanceNormalizationWorkload(const InstanceNormalizationQueueDescriptor &descriptor, const WorkloadInfo &info)
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Contains information about TensorInfos of a layer.
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std::vector< ITensorHandle * > m_Inputs
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void ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) override
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const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
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