From 9aed8fb43441228343b925b42464a55042c47ca0 Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Wed, 17 Nov 2021 13:16:45 +0000 Subject: IVGCVSW-6040 Update 21.11 Doxygen Documents Signed-off-by: Nikhil Raj Change-Id: Ia36ec98c4bebc27a69103911ea3409cd7db587a5 --- 21.11/_space_to_batch_nd_8hpp_source.xhtml | 120 +++++++++++++++++++++++++++++ 1 file changed, 120 insertions(+) create mode 100644 21.11/_space_to_batch_nd_8hpp_source.xhtml (limited to '21.11/_space_to_batch_nd_8hpp_source.xhtml') diff --git a/21.11/_space_to_batch_nd_8hpp_source.xhtml b/21.11/_space_to_batch_nd_8hpp_source.xhtml new file mode 100644 index 0000000000..c899f48a67 --- /dev/null +++ b/21.11/_space_to_batch_nd_8hpp_source.xhtml @@ -0,0 +1,120 @@ + + + + + + + + + + + + + +ArmNN: src/backends/reference/workloads/SpaceToBatchNd.hpp Source File + + + + + + + + + + + + + + + + +
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SpaceToBatchNd.hpp
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+Go to the documentation of this file.
1 //
2 // Copyright © 2017 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #pragma once
7 
8 #include "BaseIterator.hpp"
9 #include "Decoders.hpp"
10 #include "Encoders.hpp"
11 
12 #include <armnn/Descriptors.hpp>
13 #include "armnn/Tensor.hpp"
14 
15 namespace armnn
16 {
17 
18 void SpaceToBatchNd(const TensorInfo& inputInfo,
19  const TensorInfo& outputInfo,
20  const SpaceToBatchNdDescriptor& params,
21  Decoder<float>& inputData,
22  Encoder<float>& outputData);
23 
24 } //namespace armnn
Tensor.hpp
+
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
+
Encoders.hpp
+
BaseIterator.hpp
+
Decoders.hpp
+
armnn::SpaceToBatchNd
void SpaceToBatchNd(const TensorInfo &inputInfo, const TensorInfo &outputInfo, const SpaceToBatchNdDescriptor &params, Decoder< float > &inputData, Encoder< float > &outputData)
Definition: SpaceToBatchNd.cpp:34
+
Descriptors.hpp
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+ + + + -- cgit v1.2.1