From 9aed8fb43441228343b925b42464a55042c47ca0 Mon Sep 17 00:00:00 2001 From: Nikhil Raj Date: Wed, 17 Nov 2021 13:16:45 +0000 Subject: IVGCVSW-6040 Update 21.11 Doxygen Documents Signed-off-by: Nikhil Raj Change-Id: Ia36ec98c4bebc27a69103911ea3409cd7db587a5 --- 21.11/_ref_transpose_workload_8cpp_source.xhtml | 132 ++++++++++++++++++++++++ 1 file changed, 132 insertions(+) create mode 100644 21.11/_ref_transpose_workload_8cpp_source.xhtml (limited to '21.11/_ref_transpose_workload_8cpp_source.xhtml') diff --git a/21.11/_ref_transpose_workload_8cpp_source.xhtml b/21.11/_ref_transpose_workload_8cpp_source.xhtml new file mode 100644 index 0000000000..0a10168624 --- /dev/null +++ b/21.11/_ref_transpose_workload_8cpp_source.xhtml @@ -0,0 +1,132 @@ + + + + + + + + + + + + + +ArmNN: src/backends/reference/workloads/RefTransposeWorkload.cpp Source File + + + + + + + + + + + + + + + + +
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RefTransposeWorkload.cpp
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+Go to the documentation of this file.
1 //
2 // Copyright © 2020 Arm Ltd. All rights reserved.
3 // SPDX-License-Identifier: MIT
4 //
5 
6 #include "RefTransposeWorkload.hpp"
7 #include "RefWorkloadUtils.hpp"
8 
9 #include <armnnUtils/Transpose.hpp>
10 
11 #include <ResolveType.hpp>
12 
13 namespace armnn
14 {
15 
16 template <armnn::DataType DataType>
17 void RefTransposeWorkload<DataType>::Execute() const
18 {
19  Execute(m_Data.m_Inputs, m_Data.m_Outputs);
20 }
21 
22 template <armnn::DataType DataType>
23 void RefTransposeWorkload<DataType>::ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor)
24 {
25  Execute(workingMemDescriptor.m_Inputs, workingMemDescriptor.m_Outputs);
26 }
27 
28 template <armnn::DataType DataType>
29 void RefTransposeWorkload<DataType>::Execute(std::vector<ITensorHandle*> inputs,
30  std::vector<ITensorHandle*> outputs) const
31 {
32  using T = ResolveType<DataType>;
33 
34  ARMNN_SCOPED_PROFILING_EVENT(Compute::CpuRef, GetName() + "_Execute");
35 
36  const ITensorHandle* src = inputs[0];
37  ITensorHandle* dst = outputs[0];
38  const PermutationVector& mappings = m_Data.m_Parameters.m_DimMappings;
39 
40  armnnUtils::Transpose(GetTensorInfo(src).GetShape(), mappings, src->Map(), dst->Map(), sizeof(T));
41 }
42 
43 template class RefTransposeWorkload<DataType::BFloat16>;
44 template class RefTransposeWorkload<DataType::Float16>;
45 template class RefTransposeWorkload<DataType::Float32>;
46 template class RefTransposeWorkload<DataType::QAsymmS8>;
47 template class RefTransposeWorkload<DataType::QAsymmU8>;
48 template class RefTransposeWorkload<DataType::QSymmS16>;
49 
50 } //namespace armnn
Transpose.hpp
+
armnn::Compute::CpuRef
CPU Execution: Reference C++ kernels.
+
RefWorkloadUtils.hpp
+
armnn::ResolveType
typename ResolveTypeImpl< DT >::Type ResolveType
Definition: ResolveType.hpp:79
+
ResolveType.hpp
+ +
armnn
Copyright (c) 2021 ARM Limited and Contributors.
Definition: 01_00_quick_start.dox:6
+
ARMNN_SCOPED_PROFILING_EVENT
#define ARMNN_SCOPED_PROFILING_EVENT(backendId, name)
Definition: Profiling.hpp:220
+ + + + + +
armnn::RefTransposeWorkload::ExecuteAsync
void ExecuteAsync(WorkingMemDescriptor &workingMemDescriptor) override
Definition: RefTransposeWorkload.cpp:23
+
armnn::ITensorHandle::Map
virtual const void * Map(bool blocking=true) const =0
Map the tensor data for access.
+
RefTransposeWorkload.hpp
+ + +
armnn::GetTensorInfo
const TensorInfo & GetTensorInfo(const ITensorHandle *tensorHandle)
float32 helpers
Definition: RefWorkloadUtils.hpp:26
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